LED data gets transmitted using signal but not stable yet

* Mark interconnect as unstable

* Explicitly set unstable feature in HIL tests

* WIP append feature set name to artifact

* Add name to feature sets, build all combinations

* Fix tests

* Provide a looping executor for stable async tests

* Fix usb serial jtag

* Hide interconnect types

.cargo/config.toml

@@ -1,2 +1,4 @@
 [alias]
 xtask = "run --package xtask --"
+xfmt = "xtask fmt-packages"
+qa = "xtask run-example qa-test"

.github/ISSUE_TEMPLATE/bug_report.md

@@ -0,0 +1,31 @@
+---
+name: Bug report
+about: Create a report to help us improve
+title: ''
+labels: ["bug", "status:needs-attention"]
+assignees: ''
+
+---
+
+## Bug description
+
+<!-- A clear and concise description of what the bug is. -->
+
+## To Reproduce
+
+<!-- Steps to reproduce the behavior. -->
+1. ...
+2. ...
+
+<!-- Please share the minimal repro of the issue where the bug can be reproduced. -->
+
+<!-- Make sure you are able to reproduce the bug in the `main` branch, too. -->
+
+## Expected behavior
+
+<!-- A clear and concise description of what you expected to happen. Attach screenshots if needed. -->
+
+## Environment
+
+- Target device: [e.g. ESP32-S3] <!-- Use `espflash board-info` to get the target device iformation. -->
+- Crate name and version: [e.g. esp-hal 0.20.0]

.github/ISSUE_TEMPLATE/config.yml

@@ -0,0 +1,8 @@
+blank_issues_enabled: true
+contact_links:
+  - name: Ask questions in Matrix channel (Recommended)
+    url: https://matrix.to/#/#esp-rs:matrix.org
+    about: Ask any questions directly in our Matrix channel.
+  - name: Ask questions in GitHub Discussions
+    url: https://github.com/esp-rs/esp-hal/discussions/new
+    about: Post your questions and engage in discussions via GitHub.

.github/ISSUE_TEMPLATE/feature_request.md

@@ -0,0 +1,24 @@
+---
+name: Feature request
+about: Suggest an idea for this project
+title: ''
+labels: ["enhancement", "status:needs-attention"]
+assignees: ''
+
+---
+
+## Motivations
+
+<!-- If your feature request is related to a problem, please describe it. -->
+
+## Solution
+
+<!-- Describe the solution you'd like. -->
+
+## Alternatives
+
+<!-- Describe any alternative solutions or features you've considered. -->
+
+## Additional context
+
+<!-- Add any other context or screenshots about the feature request here. -->

.github/PULL_REQUEST_TEMPLATE.md

@@ -1,18 +1,22 @@
-## Thank you!
+## Thank you for your contribution!
 
-Thank you for your contribution.
-Please make sure that your submission includes the following:
+We appreciate the time and effort you've put into this pull request.
+To help us review it efficiently, please ensure you've gone through the following checklist:
 
-### Must
+### Submission Checklist 📝
+- [ ] I have updated existing examples or added new ones (if applicable).
+- [ ] I have used `cargo xtask fmt-packages` command to ensure that all changed code is formatted correctly.
+- [ ] My changes were added to the [`CHANGELOG.md`](https://github.com/esp-rs/esp-hal/blob/main/esp-hal/CHANGELOG.md) in the **_proper_** section.
+- [ ] I have added necessary changes to user code to the [Migration Guide](https://github.com/esp-rs/esp-hal/blob/main/esp-hal/MIGRATING-0.21.md).
+- [ ] My changes are in accordance to the [esp-rs API guidelines](https://github.com/esp-rs/esp-hal/blob/main/documentation/API-GUIDELINES.md)
 
-- [ ] The code compiles without `errors` or `warnings`.
-- [ ] All examples work.
-- [ ] `cargo fmt` was run.
-- [ ] Your changes were added to the `CHANGELOG.md` in the proper section.
-- [ ] You updated existing examples or added examples (if applicable).
-- [ ] Added examples are checked in CI
+#### Extra:
+- [ ] I have read the [CONTRIBUTING.md guide](https://github.com/esp-rs/esp-hal/blob/main/documentation/CONTRIBUTING.md) and followed its instructions.
 
-### Nice to have
+### Pull Request Details 📖
 
-- [ ] You add a description of your work to this PR.
-- [ ] You added proper docs for your newly added features and code.
+#### Description
+Please provide a clear and concise description of your changes, including the motivation behind these changes. The context is crucial for the reviewers.
+
+#### Testing
+Describe how you tested your changes.

.github/actions/check-esp-hal/action.yml

@@ -0,0 +1,68 @@
+name: Build and Check
+description: Build and check the esp-hal and esp-lp-hal pacakges for a specified device
+inputs:
+  device:
+    description: "Device SOC"
+    required: true
+  target:
+    description: "Target"
+    required: true
+  toolchain:
+    description: "Toolchain channel"
+    required: true
+runs:
+  using: "composite"
+  steps:
+    - name: Set up cargo environment
+      shell: bash
+      run: |
+        # Convert the target triple from kebab-case to SCREAMING_SNAKE_CASE:
+        big_target=$(echo "${{ matrix.device.target }}" | tr [:lower:] [:upper:] | tr '-' '_')
+        # Set the *target specific* RUSTFLAGS for the current device:
+        echo "CARGO_TARGET_${big_target}_RUSTFLAGS=-Dwarnings" >> $GITHUB_ENV
+        # Linting toolchain (stable cant build documentation)
+        if [ "${{ inputs.toolchain }}" == "nightly" ]; then
+          echo "LINTING_TOOLCHAIN=+nightly" >> $GITHUB_ENV
+        else
+          echo "LINTING_TOOLCHAIN=+esp" >> $GITHUB_ENV
+        fi
+    # Clippy and docs checks
+    - name: Clippy
+      shell: bash
+      run: cargo $LINTING_TOOLCHAIN xtask lint-packages --chips ${{ inputs.device }}
+    - name: Check doc-tests
+      shell: bash
+      run: cargo $LINTING_TOOLCHAIN xtask run-doc-test esp-hal ${{ inputs.device }}
+    - name: Check documentation
+      shell: bash
+      run: cargo $LINTING_TOOLCHAIN xtask build-documentation --packages esp-hal --chips ${{ inputs.device }}
+    # Build all supported examples for the low-power core first (if present):
+    - name: Build prerequisite examples (esp-lp-hal)
+      shell: bash
+      if: contains(fromJson('["esp32c6", "esp32s2", "esp32s3"]'), inputs.device)
+      run: cargo +${{ inputs.toolchain }} xtask build-examples esp-lp-hal ${{ inputs.device }}
+    - name: Check esp-lp-hal documentation
+      shell: bash
+      if: contains(fromJson('["esp32c6", "esp32s2", "esp32s3"]'), inputs.device)
+      run: cargo $LINTING_TOOLCHAIN xtask build-documentation --packages esp-lp-hal --chips ${{ inputs.device }}
+    # Make sure we're able to build the HAL without the default features
+    # enabled:
+    - name: Build (no features)
+      shell: bash
+      run: |
+        cargo xtask build-package \
+        	--no-default-features \
+          --toolchain=${{ inputs.toolchain }} \
+        	--features=${{ inputs.device }} \
+        	--target=${{ inputs.target }} \
+        	esp-hal
+    - name: Build (examples)
+      env:
+        CI: 1
+      shell: bash
+      run: cargo +${{ inputs.toolchain }} xtask build-examples esp-hal ${{ inputs.device }} --debug
+    - name: Build (qa-test)
+      env:
+        CI: 1
+      shell: bash
+      run: cargo +${{ inputs.toolchain }} xtask build-examples qa-test ${{ inputs.device }} --debug

.github/scripts/build_docs.sh

@@ -1,25 +0,0 @@
-#!/usr/bin/env bash
-
-set -euo pipefail
-
-# Extract the package version from `esp-hal` (using arcane methods):
-PKG_VERSION=$(
-  cargo metadata --format-version=1 --no-deps --manifest-path=esp-hal/Cargo.toml \
-  | jq -r '.packages[] | select(.name=="esp-hal") | .version'
-)
-
-# Build the documentation for each supported cheap, namespacing by
-# package version and chip:
-CHIPS=("esp32" "esp32c2" "esp32c3" "esp32c6" "esp32h2" "esp32p4" "esp32s2" "esp32s3")
-
-for CHIP in "${CHIPS[@]}"; do
-  cargo xtask build-documentation \
-    --output-path="docs/esp-hal/$PKG_VERSION"/"$CHIP"/ \
-    esp-hal \
-    "$CHIP"
-done
-
-# Copy any additional resources (such as the index and our logo)
-# to the location of the built documentation as well:
-cp resources/esp-rs.svg docs/
-cp resources/index.html docs/

.github/workflows/changelog.yml

@@ -2,8 +2,12 @@ name: Changelog check
 
 on:
   pull_request:
-    # We will not track changes for the `xtask` package.
+    # We will not track changes for the following packages/directories.
     paths-ignore:
+      - "/examples/"
+      - "/extras/"
+      - "/hil-tests/"
+      - "/resources/"
       - "/xtask/"
     # Run on labeled/unlabeled in addition to defaults to detect
     # adding/removing skip-changelog labels.
@@ -15,10 +19,162 @@ jobs:
 
     steps:
       - name: Checkout sources
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4
 
-      - uses: dangoslen/changelog-enforcer@v3
+      - name: Check which package is modified
+        uses: dorny/paths-filter@v3
+        id: changes
         with:
-          changeLogPath: CHANGELOG.md
+          filters: |
+            esp-alloc:
+              - 'esp-alloc/**'
+            esp-backtrace:
+              - 'esp-backtrace/**'
+            esp-build:
+              - 'esp-build/**'
+            esp-config:
+              - 'esp-config/**'
+            esp-hal:
+              - 'esp-hal/**'
+            esp-hal-embassy:
+              - 'esp-hal-embassy/**'
+            esp-hal-procmacros:
+              - 'esp-hal-procmacros/**'
+            esp-ieee802154:
+              - 'esp-ieee802154/**'
+            esp-lp-hal:
+              - 'esp-lp-hal/**'
+            esp-metadata:
+              - 'esp-metadata/**'
+            esp-println:
+              - 'esp-println/**'
+            esp-riscv-rt:
+              - 'esp-riscv-rt/**'
+            esp-storage:
+              - 'esp-storage/**'
+            esp-wifi:
+              - 'esp-wifi/**'
+            xtensa-lx:
+              - 'xtensa-lx/**'
+            xtensa-lx-rt:
+              - 'xtensa-lx-rt/**'
+
+      - name: Check that changelog updated (esp-alloc)
+        if: steps.changes.outputs.esp-alloc == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-alloc/CHANGELOG.md
           skipLabels: "skip-changelog"
-          missingUpdateErrorMessage: "Please add a changelog entry in the CHANGELOG.md file."
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-alloc/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-backtrace)
+        if: steps.changes.outputs.esp-backtrace == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-backtrace/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-backtrace/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-build)
+        if: steps.changes.outputs.esp-build == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-build/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-build/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-config)
+        if: steps.changes.outputs.esp-config == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-config/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-config/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-hal)
+        if: steps.changes.outputs.esp-hal == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-hal/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-hal/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-hal-embassy)
+        if: steps.changes.outputs.esp-hal-embassy == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-hal-embassy/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-hal-embassy/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-hal-procmacros)
+        if: steps.changes.outputs.esp-hal-procmacros == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-hal-procmacros/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-hal-procmacros/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-ieee802154)
+        if: steps.changes.outputs.esp-ieee802154 == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-ieee802154/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-ieee802154/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-lp-hal)
+        if: steps.changes.outputs.esp-lp-hal == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-lp-hal/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-lp-hal/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-println)
+        if: steps.changes.outputs.esp-println == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-println/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-println/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-riscv-rt)
+        if: steps.changes.outputs.esp-riscv-rt == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-riscv-rt/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-riscv-rt/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-storage)
+        if: steps.changes.outputs.esp-storage == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-storage/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-storage/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-wifi)
+        if: steps.changes.outputs.esp-wifi == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-wifi/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-wifi/CHANGELOG.md file."
+
+      - name: Check that changelog updated (xtensa-lx)
+        if: steps.changes.outputs.xtensa-lx == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: xtensa-lx/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the xtensa-lx/CHANGELOG.md file."
+
+      - name: Check that changelog updated (xtensa-lx-rt)
+        if: steps.changes.outputs.xtensa-lx-rt == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: xtensa-lx-rt/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the xtensa-lx-rt/CHANGELOG.md file."

.github/workflows/ci.yml

@@ -7,30 +7,25 @@
 # 1.) In the 'esp-hal' job, add the name of the chip to the `matrix.soc` array.
 # 1a.) If the device has a low-power core (which is supported in
 #      `esp-lp-hal`), then update the `if` condition to build prerequisites.
-# 2.) In the 'msrv-riscv' job, add checks as needed for the new chip.
-# 3.) In the 'clippy-riscv' job, add checks as needed for the new chip.
-# 3.) In the 'rustfmt' job, add checks as needed for the new chip.
+# 2.) In the 'msrv' job, add checks as needed for the new chip.
 
 name: CI
 
 on:
   pull_request:
-    paths-ignore:
-      - "**/CHANGELOG.md"
-      - "**/README.md"
   push:
     branches-ignore:
       - "gh-readonly-queue/**"
-    paths-ignore:
-      - "**/CHANGELOG.md"
-      - "**/README.md"
+      - "main"
   merge_group:
   workflow_dispatch:
 
 env:
   CARGO_TERM_COLOR: always
   GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
-  MSRV: "1.76.0"
+  MSRV: "1.83.0"
+  RUSTDOCFLAGS: -Dwarnings
+  DEFMT_LOG: trace
 
 # Cancel any currently running workflows from the same PR, branch, or
 # tag when a new workflow is triggered.
@@ -45,230 +40,130 @@ jobs:
   # Build Packages
 
   esp-hal:
+    name: esp-hal (${{ matrix.device.soc }})
     runs-on: ubuntu-latest
+    env:
+      SSID: SSID
+      PASSWORD: PASSWORD
+      STATIC_IP: 1.1.1.1
+      GATEWAY_IP: 1.1.1.1
+      HOST_IP: 1.1.1.1
 
     strategy:
       fail-fast: false
       matrix:
-        soc: [
+        device: [
             # RISC-V devices:
-            "esp32c2",
-            "esp32c3",
-            "esp32c6",
-            "esp32h2",
-            "esp32p4",
+            { soc: "esp32c2", target: "riscv32imc-unknown-none-elf", toolchain: "stable" },
+            { soc: "esp32c3", target: "riscv32imc-unknown-none-elf", toolchain: "stable" },
+            { soc: "esp32c6", target: "riscv32imac-unknown-none-elf", toolchain: "stable" },
+            { soc: "esp32h2", target: "riscv32imac-unknown-none-elf", toolchain: "stable" },
             # Xtensa devices:
-            "esp32",
-            "esp32s2",
-            "esp32s3",
+            { soc: "esp32", target: "xtensa-esp32-none-elf", toolchain: "esp" },
+            { soc: "esp32s2", target: "xtensa-esp32s2-none-elf", toolchain: "esp" },
+            { soc: "esp32s3", target: "xtensa-esp32s3-none-elf", toolchain: "esp" },
           ]
-
     steps:
       - uses: actions/checkout@v4
 
-      # Install the Rust toolchain for RISC-V devices:
-      - if: ${{ !contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.soc) }}
-        uses: dtolnay/rust-toolchain@v1
-        with:
-          target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf,riscv32imafc-unknown-none-elf
-          toolchain: nightly
-          components: rust-src
       # Install the Rust toolchain for Xtensa devices:
-      - if: contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.soc)
-        uses: esp-rs/xtensa-toolchain@v1.5
+      - uses: esp-rs/xtensa-toolchain@v1.5
         with:
-          buildtargets: ${{ matrix.soc }}
-          default: true
           ldproxy: false
-
-      - uses: Swatinem/rust-cache@v2
-
-      # Build all supported examples for the low-power core first (if present):
-      - if: contains(fromJson('["esp32c6", "esp32s2", "esp32s3"]'), matrix.soc)
-        name: Build prerequisites (esp-lp-hal)
-        run: cargo xtask build-examples esp-lp-hal ${{ matrix.soc }}
-
-      # Build all supported examples for the specified device:
-      - name: Build examples
-        run: cargo xtask build-examples esp-hal ${{ matrix.soc }}
-      # Ensure we can build the documentation for the specified device:
-      - name: Build documentation
-        run: cargo xtask build-documentation esp-hal ${{ matrix.soc }}
-
-  esp-lp-hal:
-    runs-on: ubuntu-latest
-
-    strategy:
-      fail-fast: false
-      matrix:
-        soc: ["esp32c6", "esp32s2", "esp32s3"]
-
-    steps:
-      - uses: actions/checkout@v4
-
-      # Install the Rust toolchain for RISC-V devices:
+          version: 1.83.0.1
+      # Install the Rust stable toolchain for RISC-V devices:
       - uses: dtolnay/rust-toolchain@v1
         with:
           target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
-          toolchain: nightly
+          toolchain: stable
           components: rust-src
 
       - uses: Swatinem/rust-cache@v2
 
-      # Build all supported examples for the specified device:
-      - name: Build examples
-        run: cargo xtask build-examples esp-lp-hal ${{ matrix.soc }}
-      # Ensure we can build the documentation for the specified device:
-      - name: Build documentation
-        run: cargo xtask build-documentation esp-lp-hal ${{ matrix.soc }}
+      - name: Build and Check
+        uses: ./.github/actions/check-esp-hal
+        with:
+          device: ${{ matrix.device.soc }}
+          target: ${{ matrix.device.target }}
+          toolchain: ${{ matrix.device.toolchain }}
 
-  esp-riscv-rt:
+  extras:
     runs-on: ubuntu-latest
 
     steps:
       - uses: actions/checkout@v4
       - uses: dtolnay/rust-toolchain@v1
         with:
-          target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf,riscv32imafc-unknown-none-elf
-          toolchain: nightly
-          components: rust-src
+          toolchain: stable
       - uses: Swatinem/rust-cache@v2
 
-      # Build for all RISC-V targets (no features):
-      - name: Build esp-riscv-rt (riscv32imc, no features)
-        run: cd esp-riscv-rt/ && cargo build -Zbuild-std=core --target=riscv32imc-unknown-none-elf
-      - name: Build esp-riscv-rt (riscv32imac, no features)
-        run: cd esp-riscv-rt/ && cargo build -Zbuild-std=core --target=riscv32imac-unknown-none-elf
-      - name: Build esp-riscv-rt (riscv32imafc, no features)
-        run: cd esp-riscv-rt/ && cargo build -Zbuild-std=core --target=riscv32imafc-unknown-none-elf
-      # Build for all RISC-V targets (all features):
-      - name: Build esp-riscv-rt (riscv32imc, all features)
-        run: cd esp-riscv-rt/ && cargo build -Zbuild-std=core --target=riscv32imc-unknown-none-elf --features=ci
-      - name: Build esp-riscv-rt (riscv32imac, all features)
-        run: cd esp-riscv-rt/ && cargo build -Zbuild-std=core --target=riscv32imac-unknown-none-elf --features=ci
-      - name: Build esp-riscv-rt (riscv32imafc, all features)
-        run: cd esp-riscv-rt/ && cargo build -Zbuild-std=core --target=riscv32imafc-unknown-none-elf --features=ci
-      # Ensure documentation can be built
-      - name: rustdoc
-        run: cd esp-riscv-rt/ && cargo doc
+      - name: Install dependencies
+        run: sudo apt-get update && sudo apt-get -y install musl-tools libudev-dev pkg-config
+      # Build the extra crates
+      - name: Build the bench-server
+        run: cd extras/bench-server && cargo build
+      - name: Build esp-wifishark
+        run: cd extras/esp-wifishark && cargo build
+      - name: Build ieee802154-sniffer
+        run: cd extras/ieee802154-sniffer && cargo build
 
   # --------------------------------------------------------------------------
   # MSRV
 
-  msrv-riscv:
+  msrv:
     runs-on: ubuntu-latest
     env:
       RUSTC_BOOTSTRAP: 1
 
-    steps:
-      - uses: actions/checkout@v4
-      - uses: dtolnay/rust-toolchain@v1
-        with:
-          target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
-          toolchain: ${{ env.MSRV }}
-          components: rust-src
-      - uses: Swatinem/rust-cache@v2
-
-      # TODO:
-      #  - Enable additional (all?) features for MSRV check
-
-      # Verify the MSRV for all RISC-V chips.
-      - name: msrv (esp-hal)
-        run: |
-          cargo xtask build-package --features=esp32c2 --target=riscv32imc-unknown-none-elf   esp-hal
-          cargo xtask build-package --features=esp32c3 --target=riscv32imc-unknown-none-elf   esp-hal
-          cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf  esp-hal
-          cargo xtask build-package --features=esp32h2 --target=riscv32imac-unknown-none-elf  esp-hal
-          cargo xtask build-package --features=esp32p4 --target=riscv32imafc-unknown-none-elf esp-hal
-      - name: msrv (esp-lp-hal)
-        run: |
-          cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf esp-lp-hal
-          cargo xtask build-package --features=esp32s2 --target=riscv32imc-unknown-none-elf  esp-lp-hal
-          cargo xtask build-package --features=esp32s3 --target=riscv32imc-unknown-none-elf  esp-lp-hal
-
-  msrv-xtensa:
-    runs-on: ubuntu-latest
-    env:
-      RUSTC_BOOTSTRAP: 1
-
-      # TODO:
-      #  - Enable additional (all?) features for MSRV check
-
     steps:
       - uses: actions/checkout@v4
       - uses: esp-rs/xtensa-toolchain@v1.5
         with:
           ldproxy: false
           version: ${{ env.MSRV }}
-      - uses: Swatinem/rust-cache@v2
-
-      # Verify the MSRV for all Xtensa chips:
-      - name: msrv (esp-hal)
-        run: |
-          cargo xtask build-package --toolchain=esp --features=esp32   --target=xtensa-esp32-none-elf   esp-hal
-          cargo xtask build-package --toolchain=esp --features=esp32s2 --target=xtensa-esp32s2-none-elf esp-hal
-          cargo xtask build-package --toolchain=esp --features=esp32s3 --target=xtensa-esp32s3-none-elf esp-hal
-
-  # --------------------------------------------------------------------------
-  # Lint
-
-  clippy-riscv:
-    runs-on: ubuntu-latest
-
-    steps:
-      - uses: actions/checkout@v4
       - uses: dtolnay/rust-toolchain@v1
         with:
-          toolchain: nightly
-          targets: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf,riscv32imafc-unknown-none-elf
-          components: clippy,rust-src
+          target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
+          toolchain: ${{ env.MSRV }}
+          components: rust-src
       - uses: Swatinem/rust-cache@v2
 
-      # Run 'cargo clippy' on all packages targeting RISC-V:
-      ## esp-hal:
-      - name: clippy (esp-hal, esp32c2)
-        run: cd esp-hal && cargo clippy --features=esp32c2 --target=riscv32imc-unknown-none-elf -- -D warnings
-      - name: clippy (esp-hal, esp32c3)
-        run: cd esp-hal && cargo clippy --features=esp32c3 --target=riscv32imc-unknown-none-elf -- -D warnings
-      - name: clippy (esp-hal, esp32c6)
-        run: cd esp-hal && cargo clippy --features=esp32c6 --target=riscv32imac-unknown-none-elf -- -D warnings
-      - name: clippy (esp-hal, esp32h2)
-        run: cd esp-hal && cargo clippy --features=esp32h2 --target=riscv32imac-unknown-none-elf -- -D warnings
-      # TODO: Re-enable when able
-      # - name: clippy (esp-hal, esp32p4)
-      #   run: cd esp-hal && cargo clippy --features=esp32p4 --target=riscv32imafc-unknown-none-elf -- -D warnings
-      ## esp-hal-smartled:
-      - name: clippy (esp-hal-smartled)
-        run: cd esp-hal-smartled && cargo clippy --features=esp32c6 --target=riscv32imac-unknown-none-elf -- -D warnings
-      ## esp-lp-hal:
-      - name: clippy (esp-lp-hal, esp32c6)
-        run: cd esp-lp-hal && cargo clippy --features=esp32c6 --target=riscv32imac-unknown-none-elf -- -D warnings
-      - name: clippy (esp-lp-hal, esp32s2)
-        run: cd esp-lp-hal && cargo clippy --features=esp32s2 --target=riscv32imc-unknown-none-elf -- -D warnings
-      - name: clippy (esp-lp-hal, esp32s3)
-        run: cd esp-lp-hal && cargo clippy --features=esp32s3 --target=riscv32imc-unknown-none-elf -- -D warnings
-      # esp-riscv-rt:
-      - name: clippy (esp-riscv-rt)
-        run: cd esp-riscv-rt && cargo clippy --target=riscv32imc-unknown-none-elf -- -D warnings
+      # Verify the MSRV for all RISC-V chips.
+      - name: msrv RISCV (esp-hal)
+        run: |
+          cargo xtask build-package --features=esp32c2,ci --target=riscv32imc-unknown-none-elf   esp-hal
+          cargo xtask build-package --features=esp32c3,ci --target=riscv32imc-unknown-none-elf   esp-hal
+          cargo xtask build-package --features=esp32c6,ci --target=riscv32imac-unknown-none-elf  esp-hal
+          cargo xtask build-package --features=esp32h2,ci --target=riscv32imac-unknown-none-elf  esp-hal
 
-  clippy-xtensa:
-    runs-on: ubuntu-latest
+      - name: msrv RISCV (esp-wifi)
+        run: |
+          cargo xtask build-package --features=esp32c2,wifi,ble,esp-hal/unstable --target=riscv32imc-unknown-none-elf   esp-wifi
+          cargo xtask build-package --features=esp32c3,wifi,ble,esp-hal/unstable --target=riscv32imc-unknown-none-elf   esp-wifi
+          cargo xtask build-package --features=esp32c6,wifi,ble,esp-hal/unstable --target=riscv32imac-unknown-none-elf  esp-wifi
+          cargo xtask build-package --features=esp32h2,ble,esp-hal/unstable --target=riscv32imac-unknown-none-elf  esp-wifi
 
-    steps:
-      - uses: actions/checkout@v4
-      - uses: esp-rs/xtensa-toolchain@v1.5
-        with:
-          default: true
-          ldproxy: false
-      - uses: Swatinem/rust-cache@v2
+        # Verify the MSRV for all Xtensa chips:
+      - name: msrv Xtensa (esp-hal)
+        run: |
+          cargo xtask build-package --toolchain=esp --features=esp32,ci   --target=xtensa-esp32-none-elf   esp-hal
+          cargo xtask build-package --toolchain=esp --features=esp32s2,ci --target=xtensa-esp32s2-none-elf esp-hal
+          cargo xtask build-package --toolchain=esp --features=esp32s3,ci --target=xtensa-esp32s3-none-elf esp-hal
 
-      # Run 'cargo clippy' on all packages targeting Xtensa:
-      - name: clippy (esp-hal, esp32)
-        run: cd esp-hal && cargo clippy -Zbuild-std=core --features=esp32 --target=xtensa-esp32-none-elf -- -D warnings
-      - name: clippy (esp-hal, esp32s2)
-        run: cd esp-hal && cargo clippy -Zbuild-std=core --features=esp32s2 --target=xtensa-esp32s2-none-elf -- -D warnings
-      - name: clippy (esp-hal, esp32s3)
-        run: cd esp-hal && cargo clippy -Zbuild-std=core --features=esp32s3 --target=xtensa-esp32s3-none-elf -- -D warnings
+      - name: msrv Xtensa (esp-wifi)
+        run: |
+          cargo xtask build-package --toolchain=esp --features=esp32,wifi,ble,esp-hal/unstable   --target=xtensa-esp32-none-elf   esp-wifi
+          cargo xtask build-package --toolchain=esp --features=esp32s2,wifi,esp-hal/unstable     --target=xtensa-esp32s2-none-elf esp-wifi
+          cargo xtask build-package --toolchain=esp --features=esp32s3,wifi,ble,esp-hal/unstable --target=xtensa-esp32s3-none-elf esp-wifi
+
+      - name: msrv (esp-lp-hal)
+        run: |
+          cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf esp-lp-hal
+          cargo xtask build-package --features=esp32s2 --target=riscv32imc-unknown-none-elf  esp-lp-hal
+          cargo xtask build-package --features=esp32s3 --target=riscv32imc-unknown-none-elf  esp-lp-hal
+
+  # --------------------------------------------------------------------------
+  # Format
 
   rustfmt:
     runs-on: ubuntu-latest
@@ -284,15 +179,20 @@ jobs:
       - uses: Swatinem/rust-cache@v2
 
       # Check the formatting of all packages:
-      - name: rustfmt (esp-hal)
-        run: cargo fmt --all --manifest-path=esp-hal/Cargo.toml -- --check
-      - name: rustfmt (esp-hal-procmacros)
-        run: cargo fmt --all --manifest-path=esp-hal-procmacros/Cargo.toml -- --check
-      - name: rustfmt (esp-hal-smartled)
-        run: cargo fmt --all --manifest-path=esp-hal-smartled/Cargo.toml -- --check
-      - name: rustfmt (esp-lp-hal)
-        run: cargo fmt --all --manifest-path=esp-lp-hal/Cargo.toml -- --check
-      - name: rustfmt (esp-riscv-rt)
-        run: cargo fmt --all --manifest-path=esp-riscv-rt/Cargo.toml -- --check
-      - name: rustfmt (examples)
-        run: cargo fmt --all --manifest-path=examples/Cargo.toml -- --check
+      - run: cargo xtask fmt-packages --check
+
+  # --------------------------------------------------------------------------
+  # host tests
+
+  host-tests:
+    runs-on: ubuntu-latest
+
+    steps:
+      - uses: actions/checkout@v4
+      - uses: dtolnay/rust-toolchain@v1
+        with:
+          toolchain: stable
+      - uses: Swatinem/rust-cache@v2
+
+      # Check the formatting of all packages:
+      - run: cd esp-config && cargo test --features build

.github/workflows/ci_nightly.yml

@@ -0,0 +1,53 @@
+name: CI - nightly
+
+on:
+  workflow_dispatch:
+  schedule:
+    - cron: "0 0 * * *"
+
+env:
+  CARGO_TERM_COLOR: always
+  GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+  RUSTDOCFLAGS: -Dwarnings
+  DEFMT_LOG: trace
+
+jobs:
+
+  esp-hal-nightly:
+    name: esp-hal | nightly (${{ matrix.device.soc }})
+    runs-on: ubuntu-latest
+    env:
+      SSID: SSID
+      PASSWORD: PASSWORD
+      STATIC_IP: 1.1.1.1
+      GATEWAY_IP: 1.1.1.1
+      HOST_IP: 1.1.1.1
+
+    strategy:
+      fail-fast: false
+      matrix:
+        device: [
+            # RISC-V devices:
+            { soc: "esp32c2", target: "riscv32imc-unknown-none-elf" },
+            { soc: "esp32c3", target: "riscv32imc-unknown-none-elf" },
+            { soc: "esp32c6", target: "riscv32imac-unknown-none-elf" },
+            { soc: "esp32h2", target: "riscv32imac-unknown-none-elf" },
+          ]
+    steps:
+      - uses: actions/checkout@v4
+
+      # Install the Rust nightly toolchain for RISC-V devices:
+      - uses: dtolnay/rust-toolchain@v1
+        with:
+          target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
+          toolchain: nightly
+          components: rust-src, clippy, rustfmt
+
+      - uses: Swatinem/rust-cache@v2
+
+      - name: Build and Check
+        uses: ./.github/actions/check-esp-hal
+        with:
+          device: ${{ matrix.device.soc }}
+          target: ${{ matrix.device.target }}
+          toolchain: nightly

.github/workflows/documentation.yml

@@ -2,12 +2,33 @@ name: Documentation
 
 on:
   workflow_dispatch:
+    inputs:
+      esp-hal:
+        description: "esp-hal tag"
+        required: true
+      esp-wifi:
+        description: "esp-wifi tag"
+        required: true
 
 env:
   CARGO_TERM_COLOR: always
 
 jobs:
+  setup:
+    runs-on: ubuntu-latest
+    outputs:
+      packages: '[
+            { "name": "esp-hal",  "tag": "${{ github.event.inputs.esp-hal }}" },
+            { "name": "esp-wifi", "tag": "esp-wifi-${{ github.event.inputs.esp-wifi }}" }
+          ]'
+    steps:
+      - run: echo "Setup complete!"
   build:
+    needs: setup
+    strategy:
+      fail-fast: true
+      matrix:
+        packages: ${{ fromJson(needs.setup.outputs.packages) }}
     runs-on: ubuntu-latest
     steps:
       - uses: actions/checkout@v4
@@ -15,22 +36,50 @@ jobs:
         with:
           default: true
           ldproxy: false
+          version: 1.83.0.1
+
+      - name: Checkout repository
+        uses: actions/checkout@v4
+        with:
+          repository: esp-rs/esp-hal
+          ref: ${{ matrix.packages.tag }}
 
       - name: Build documentation
-        run: ./.github/scripts/build_docs.sh
+        run: cargo xtask build-documentation --packages=${{ matrix.packages.name }}
 
       # https://github.com/actions/deploy-pages/issues/303#issuecomment-1951207879
       - name: Remove problematic '.lock' files
         run: find docs -name ".lock" -exec rm -f {} \;
 
+      - name: Upload docs for ${{ matrix.packages.name }}
+        uses: actions/upload-artifact@v4
+        with:
+          name: ${{ matrix.packages.name }}
+          path: "docs/${{ matrix.packages.name }}"
+
+  assemble:
+    needs: [setup, build]
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v4
+      - name: Prepare
+        run: mkdir docs
+      - name: Download all docs
+        uses: actions/download-artifact@v4
+        with:
+          path: "docs/"
+      
+      - name: Create index.html
+        run: "cargo xtask build-documentation-index --packages=$(echo '${{ needs.setup.outputs.packages }}' | jq -r '[.[].name] | join(\",\")')"
+
       - name: Upload Pages artifact
         uses: actions/upload-pages-artifact@v3
         with:
-          path: "docs"
+          path: "docs/"
 
   deploy:
-    # Add a dependency to the build job:
-    needs: build
+    # Add a dependency to the assemble job:
+    needs: assemble
 
     # Grant GITHUB_TOKEN the permissions required to make a Pages deployment:
     permissions:

.github/workflows/hil.yml

@@ -0,0 +1,186 @@
+name: HIL
+
+on:
+  pull_request:
+    types: [opened, synchronize, reopened, ready_for_review]
+  merge_group:
+  workflow_dispatch:
+    inputs:
+      repository:
+        description: "Owner and repository to test"
+        required: true
+        default: 'esp-rs/esp-hal'
+      branch:
+        description: "Branch, tag or SHA to checkout."
+        required: true
+        default: "main"
+
+# Cancel any currently running workflows from the same PR, branch, or
+# tag when a new workflow is triggered.
+#
+# https://stackoverflow.com/a/66336834
+concurrency:
+  cancel-in-progress: true
+  group: ${{ github.workflow }}-${{ github.event.pull_request.number || github.ref }}
+
+env:
+  CARGO_TERM_COLOR: always
+  GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+
+jobs:
+  build-xtasks:
+    name: Build xtasks | ${{ matrix.host.arch }}
+    runs-on: ubuntu-latest
+
+    strategy:
+      fail-fast: false
+      matrix:
+        host:
+          - arch: armv7
+            rust-target: armv7-unknown-linux-gnueabihf
+          - arch: aarch64
+            rust-target: aarch64-unknown-linux-gnu
+
+    steps:
+      - uses: actions/checkout@v4
+        if: github.event_name != 'workflow_dispatch'
+      - uses: actions/checkout@v4
+        if: github.event_name == 'workflow_dispatch'
+        with:
+          repository: ${{ github.event.inputs.repository }}
+          ref: ${{ github.event.inputs.branch }}
+
+      - name: Install Rust toolchain
+        uses: dtolnay/rust-toolchain@v1
+        with:
+          toolchain: stable
+          components: rust-src
+
+      - name: Install cross
+        run: cargo install cross
+
+      - name: Build xtasks
+        run: cross build --release --target ${{ matrix.host.rust-target }} -p xtask
+
+      - name: Upload artifact
+        uses: actions/upload-artifact@v4
+        with:
+          name: xtask-${{ matrix.host.arch }}
+          path: target/${{ matrix.host.rust-target }}/release/xtask
+
+  build-tests:
+    name: Build HIL Tests | ${{ matrix.target.soc }}
+    runs-on: ubuntu-latest
+
+    strategy:
+      fail-fast: false
+      matrix:
+        target:
+          # RISC-V devices:
+          - soc: esp32c2
+            rust-target: riscv32imc-unknown-none-elf
+          - soc: esp32c3
+            rust-target: riscv32imc-unknown-none-elf
+          - soc: esp32c6
+            rust-target: riscv32imac-unknown-none-elf
+          - soc: esp32h2
+            rust-target: riscv32imac-unknown-none-elf
+          # # Xtensa devices:
+          - soc: esp32
+            rust-target: xtensa-esp32-none-elf
+          - soc: esp32s2
+            rust-target: xtensa-esp32s2-none-elf
+          - soc: esp32s3
+            rust-target: xtensa-esp32s3-none-elf
+
+    steps:
+      - uses: actions/checkout@v4
+        if: github.event_name != 'workflow_dispatch'
+      - uses: actions/checkout@v4
+        if: github.event_name == 'workflow_dispatch'
+        with:
+          repository: ${{ github.event.inputs.repository }}
+          ref: ${{ github.event.inputs.branch }}
+
+      # Install the Rust toolchain for RISC-V devices:
+      - if: ${{ !contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.target.soc) }}
+        uses: dtolnay/rust-toolchain@v1
+        with:
+          target: ${{ matrix.target.rust-target }}
+          toolchain: stable
+          components: rust-src
+      # Install the Rust toolchain for Xtensa devices:
+      - if: contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.target.soc)
+        uses: esp-rs/xtensa-toolchain@v1.5
+        with:
+          buildtargets: ${{ matrix.target.soc }}
+          default: true
+          ldproxy: false
+          version: 1.83.0.1
+
+      - name: Build tests
+        run: cargo xtask build-tests ${{ matrix.target.soc }}
+
+      - uses: actions/upload-artifact@v4
+        with:
+          name: tests-${{ matrix.target.soc }}
+          path: /home/runner/work/esp-hal/esp-hal/target/tests/${{ matrix.target.soc }}
+          if-no-files-found: error
+          overwrite: true
+
+  hil:
+    name: Run HIL Tests | ${{ matrix.target.soc }}
+    needs: [build-tests, build-xtasks]
+    runs-on:
+      labels: [self-hosted, "${{ matrix.target.runner }}"]
+    strategy:
+      fail-fast: false
+      matrix:
+        target:
+          # RISC-V devices:
+          - soc: esp32c2
+            runner: esp32c2-jtag
+            host: aarch64
+          - soc: esp32c3
+            runner: esp32c3-usb
+            host: armv7
+          - soc: esp32c6
+            runner: esp32c6-usb
+            host: armv7
+          - soc: esp32h2
+            runner: esp32h2-usb
+            host: armv7
+          # Xtensa devices:
+          - soc: esp32
+            runner: esp32-jtag
+            host: aarch64
+          - soc: esp32s2
+            runner: esp32s2-jtag
+            host: armv7
+          - soc: esp32s3
+            runner: esp32s3-usb
+            host: armv7
+    steps:
+      - uses: actions/download-artifact@v4
+        with:
+          name: tests-${{ matrix.target.soc }}
+          path: tests-${{ matrix.target.soc }}
+
+      - uses: actions/download-artifact@v4
+        with:
+          name: xtask-${{ matrix.target.host }}
+
+      - name: Run Tests
+        id: run-tests
+        run: |
+          [ -f ~/setup.sh ] && source ~/setup.sh
+
+          export PATH=$PATH:/home/espressif/.cargo/bin
+          chmod +x xtask
+          ./xtask run-elfs ${{ matrix.target.soc }} tests-${{ matrix.target.soc }}
+
+      - name: Clean up
+        if: always()
+        run: |
+          rm -rf tests-${{ matrix.target.soc }}
+          rm -f xtask

.github/workflows/issue_handler.yml

@@ -13,4 +13,4 @@ jobs:
       - uses: actions/add-to-project@v0.5.0
         with:
           project-url: https://github.com/orgs/esp-rs/projects/2
-          github-token: ${{ secrets.PAT }}
+          github-token: ${{ secrets.PAT }}

.vscode/extensions.json

@@ -1,3 +0,0 @@
-{
-  "recommendations": ["rust-lang.rust-analyzer", "tamasfe.even-better-toml"]
-}

CHANGELOG.md

@@ -1,469 +0,0 @@
-# Changelog
-
-All notable changes to this project will be documented in this file.
-
-Please note that only changes to the `esp-hal-common` package are tracked in this CHANGELOG.
-
-The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
-and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
-
-## [Unreleased]
-
-### Added
-
-- Add initial support for the ESP32-P4 (#1101)
-- Implement `embedded_hal::pwm::SetDutyCycle` trait for `ledc::channel::Channel` (#1097)
-- ESP32-P4: Add initial GPIO support (#1109)
-- ESP32-P4: Add initial support for interrupts (#1112)
-- ESP32-P4: Add efuse reading support (#1114)
-- ESP32-S3: Added LCD_CAM I8080 driver (#1086)
-- Allow for splitting of the USB Serial JTAG peripheral into tx/rx components (#1024)
-- `RngCore` trait is implemented (#1122)
-- Support Rust's `stack-protector` feature (#1135)
-- Adding clock support for `ESP32-P4` (#1145)
-- Implementation OutputPin and InputPin for AnyPin (#1067)
-- Implement `estimate_xtal_frequency` for ESP32-C6 / ESP32-H2 (#1174)
-- A way to push into I2S DMA buffer via a closure (#1189)
-- Added basic `LP-I2C` driver for C6 (#1185)
-- Ensuring that the random number generator is TRNG. (#1200)
-- ESP32-C6: Add timer wakeup source for deepsleep (#1201)
-- Introduce `InterruptExecutor::spawner()` (#1211)
-
-### Fixed
-
-- Fix embassy-time tick rate not set when using systick as the embassy timebase (#1124)
-- Fix `get_raw_core` on Xtensa (#1126)
-- Fix docs.rs documentation builds (#1129)
-- Fix circular DMA (#1144)
-- Fix `hello_rgb` example for ESP32 (#1173)
-- Fixed the multicore critical section on Xtensa (#1175)
-- Fix timer `now` for esp32c3 and esp32c6 (#1178)
-- Wait for registers to get synced before reading the timer count for all chips (#1183)
-- Fix I2C error handling (#1184)
-- Fix circular DMA (#1189)
-- Fix esp32c3 uart initialization (#1156)
-- Fix ESP32-S2 I2C read (#1214)
-- Reset/init UART if it's not the console UART (#1213)
-
-### Changed
-
-- DmaDescriptor struct to better model the hardware (#1054)
-- DMA descriptor count no longer needs to be multiplied by 3 (#1054)
-- RMT channels no longer take the channel number as a generic param (#959)
-- The `esp-hal-common` package is now called `esp-hal` (#1131)
-- Refactor the `Trace` driver to be generic around its peripheral (#1140)
-- Auto detect crystal frequency based on `RtcClock::estimate_xtal_frequency()` (#1165)
-- ESP32-S3: Configure 32k ICACHE (#1169)
-- Lift the minimal buffer size requirement for I2S (#1189)
-
-### Removed
-
-- Remove `xtal-26mhz` and `xtal-40mhz` features (#1165)
-- All chip-specific HAL packages have been removed (#1196)
-
-### Breaking
-
-- `ADC` and `DAC` drivers now take virtual peripherals in their constructors, instead of splitting `APB_SARADC`/`SENS` (#1100)
-- The `DAC` driver's constructor is now `new` instead of `dac`, to be more consistent with other APIs (#1100)
-- The DMA peripheral is now called `Dma` for devices with both PDMA and GDMA controllers (#1125)
-- The `ADC` driver's constructor is now `new` instead of `adc`, to be more consistent with other APIs (#1133)
-- `embassy-executor`'s `integrated-timers` is no longer enabled by default.
-- Renamed `embassy-time-systick` to `embassy-time-systick-16mhz` for use with all chips with a systimer, except `esp32s2`. Added `embassy-time-systick-80mhz` specifically for the `esp32s2`. (#1247)
-
-## [0.15.0] - 2024-01-19
-
-### Added
-
-- ESP32-C6: Properly initialize PMU (#974)
-- Implement overriding base mac address (#1044)
-- Add `rt-riscv` and `rt-xtensa` features to enable/disable runtime support (#1057)
-- ESP32-C6: Implement deep sleep (#918)
-- Add `embedded-io` feature to each chip-specific HAL (#1072)
-- Add `embassy-time-driver` to `esp-hal-common` due to updating `embassy-time` to `v0.3.0` (#1075)
-- ESP32-S3: Added support for 80Mhz PSRAM (#1069)
-- ESP32-C3/S3: Add workaround for USB pin exchange on usb-serial-jtag (#1104).
-- ESP32C6: Added LP_UART initialization (#1113)
-- Add `place-spi-driver-in-ram` feature to `esp-hal-common` (#1096)
-
-### Changed
-
-- Set up interrupts for the DMA and async enabled peripherals only when `async` feature is provided (#1042)
-- Update to `1.0.0` releases of the `embedded-hal-*` packages (#1068)
-- Update `embassy-time` to `0.3.0` and embassy-executor to `0.5.0` release due to the release of the `embedded-hal-*` packages (#1075)
-- No longer depend on `embassy-time` (#1092)
-- Update to latest `smart-leds-trait` and `smart-leds` packages (#1094)
-
-### Fixed
-
-- ESP32: correct gpio 32/33 in errata36() (#1053)
-- ESP32: make gpio 4 usable as analog pin (#1078)
-- Fix double &mut for the `SetDutyCycle` impl on `PwmPin` (#1033)
-- ESP32/ESP32-S3: Fix stack-top calculation for app-core (#1081)
-- ESP32/ESP32-S2/ESP32-S3: Fix embassy-time-timg0 driver (#1091)
-- ESP32: ADC readings are no longer inverted (#1093)
-
-### Removed
-
-### Breaking
-
-- Unify the low-power peripheral names (`RTC_CNTL` and `LP_CLKRST` to `LPWR`) (#1064)
-
-## [0.14.1] - 2023-12-13
-
-### Fixed
-
-- Fix SHA for all targets (#1021)
-
-## [0.14.0] - 2023-12-12
-
-### Added
-
-- ESP32-C6: LP core clock is configurable (#907)
-- Derive `Clone` and `Copy` for `EspTwaiFrame` (#914)
-- A way to configure inverted pins (#912)
-- Added API to check a GPIO-pin's interrupt status bit (#929)
-- A `embedded_io_async::Read` implementation for `UsbSerialJtag` (#889)
-- `RtcClock::get_xtal_freq`, `RtcClock::get_slow_freq` (#957)
-- Added Rx Timeout functionality to async Uart (#911)
-- RISC-V: Thread-mode and interrupt-mode executors, `#[main]` macro (#947)
-- A macro to make it easier to create DMA buffers and descriptors (#935)
-- I2C timeout is configurable (#1011)
-- ESP32-C6/ESP32-H2: `flip-link` feature gives zero-cost stack overflow protection (#1008)
-
-### Changed
-
-- Improve DMA documentation & clean up module (#915)
-- Only allow a single version of `esp-hal-common` to be present in an application (#934)
-- ESP32-C3/C6 and ESP32-H2 can now use the `zero-rtc-bss` feature to enable `esp-hal-common/rv-zero-rtc-bss` (#867)
-- Reuse `ieee802154_clock_enable/disable()` functions for BLE and rename `ble_ieee802154_clock_enable()` (#953)
-- The `embedded-io` trait implementations are now gated behind the `embedded-io` feature (#964)
-- Simplifed RMT channels and channel creators (#958)
-- Reworked construction of I2S driver instances (#983)
-- ESP32-S2/S3: Don't require GPIO 18 to create a USB peripheral driver instance (#990)
-- Updated to latest release candidate (`1.0.0-rc.2`) for `embedded-hal{-async,-nb}` (#994)
-- Explicit panic when hitting the `DefaultHandler` (#1005)
-- Relevant interrupts are now auto enabled in `embassy::init` (#1014).
-
-### Fixed
-
-- ESP32-C2/C3 examples: fix build error (#899)
-- ESP32-S3: Fix GPIO interrupt handler crashing when using GPIO48. (#898)
-- Fixed short wait times in embassy causing hangs (#906)
-- Make sure to clear LP/RTC RAM before loading code (#916)
-- Async RMT channels can be used concurrently (#925)
-- Xtensa: Allow using `embassy-executor`'s thread-mode executor if neither `embassy-executor-thread`, nor `embassy-executor-interrupt` is enabled. (#937)
-- Uart Async: Improve interrupt handling and irq <--> future communication (#977)
-- RISC-V: Fix stack allocation (#988)
-- ESP32-C6: Fix used RAM (#997)
-- ESP32-H2: Fix used RAM (#1003)
-- Fix SPI slave DMA dma_read and dma_write (#1013)
-- ESP32-C6/H2: Fix disabling of interrupts (#1040)
-
-### Removed
-
-- Direct boot support has been removed (#903).
-- Removed the `mcu-boot` feature from `esp32c3-hal` (#938)
-- Removed SpiBusController and SpiBusDevice in favour of embedded-hal-bus and embassy-embedded-hal implementataions. (#978)
-
-### Breaking
-
-- `Spi::new`/`Spi::new_half_duplex` takes no gpio pin now, instead you need to call `with_pins` to setup those (#901).
-- ESP32-C2, ESP32-C3, ESP32-S2: atomic emulation trap has been removed. (#904) (#985)
-  - When upgrading you must either remove [these lines](https://github.com/esp-rs/riscv-atomic-emulation-trap#usage) from your `.cargo/config.toml`.
-  - Usage of `core::sync::atomic::*` in dependent crates should be replaced with [portable-atomic](https://github.com/taiki-e/portable-atomic).
-- RSA driver now takes `u32` words instead of `u8` bytes. The expected slice length is now 4 times shorter. (#981)
-
-## [0.13.1] - 2023-11-02
-
-### Fixed
-
-- ESP32-C3: Make sure BLE and WiFi are not powered down when esp-wifi needs them (#891)
-- ESP32-C6/H2: Fix setting UART baud rate (#893)
-
-## [0.13.0] - 2023-10-31
-
-### Added
-
-- Implement SetFrequencyCycle and PwmPin from embedded_hal for PwmPin of MCPWM. (#880)
-- Added `embassy-time-systick` to ESP32-S2 (#827)
-- Implement enabling/disabling BLE clock on ESP32-C6 (#784)
-- Async support for RMT (#787)
-- Implement `defmt::Format` for more types (#786)
-- Add new_no_miso to Spi FullDuplexMode (#794)
-- Add UART support for splitting into TX and RX (#754)
-- Async support for I2S (#801)
-- Async support for PARL_IO (#807)
-- ETM driver, GPIO ETM (#819)
-- (G)DMA AES support (#821)
-- SYSTIMER ETM functionality (#828)
-- Adding async support for RSA peripheral(doesn't work properly for `esp32` chip - issue will be created)(#790)
-- Added sleep support for ESP32-C3 with timer and GPIO wakeups (#795)
-- Support for ULP-RISCV including Delay and GPIO (#840, #845)
-- Add bare-bones SPI slave support, DMA only (#580, #843)
-- Embassy `#[main]` convenience macro (#841)
-- Add a `defmt` feature to the `esp-hal-smartled` package (#846)
-- Support 16MB octal PS-RAM for ESP32-S3 (#858)
-- RISCV TRACE Encoder driver for ESP32-C6 / ESP32-H2 (#864)
-- `embedded_hal` 1 `InputPin` and `embedded_hal_async` `Wait` impls for open drain outputs (#905)
-
-### Changed
-
-- Bumped MSRV to 1.67 (#798)
-- Optimised multi-core critical section implementation (#797)
-- Changed linear- and curve-calibrated ADC to provide readings in mV (#836)
-
-### Fixed
-
-- S3: Allow powering down RC_FAST_CLK (#796)
-- UART/ESP32: fix calculating FIFO counter with `get_rx_fifo_count()` (#804)
-- Xtensa targets: Use ESP32Reset - not Reset (#823)
-- Examples should now work with the `defmt` feature (#810)
-- Fixed a race condition causing SpiDma to stop working unexpectedly (#869)
-- Fixed async uart serial, and updated the embassy_serial examples (#871).
-- Fix ESP32-S3 direct-boot (#873)
-- Fix ESP32-C6 ADC (#876)
-- Fix ADC Calibration not being used on ESP32-S2 and ESP32-S3 (#1000)
-
-### Removed
-
-- `Pin::is_pcore_interrupt_set` (#793)
-- `Pin::is_pcore_non_maskable_interrupt_set` (#793)
-- `Pin::is_acore_interrupt_set` (#793)
-- `Pin::is_acore_non_maskable_interrupt_set` (#793)
-- `Pin::enable_hold` (#793)
-- Removed the generic return type for ADC reads (#792)
-
-### Breaking
-
-- `Uart::new` now takes the `&Clocks` struct to ensure baudrate is correct for CPU/APB speed. (#808)
-- `Uart::new_with_config` takes an `Config` instead of `Option<Config>`. (#808)
-- `Alarm::set_period` takes a period (duration) instead of a frequency (#812)
-- `Alarm::interrupt_clear` is now `Alarm::clear_interrupt` to be consistent (#812)
-- The `PeripheralClockControl` struct is no longer public, drivers no longer take this as a parameter (#817)
-- Unify the system peripheral, `SYSTEM`, `DPORT` and `PCR` are now all exposed as `SYSTEM` (#832).
-- Unified the ESP32's and ESP32-C2's xtal frequency features (#831)
-- Replace any underscores in feature names with dashes (#833)
-- The `spi` and `spi_slave` modules have been refactored into the `spi`, `spi::master`, and `spi::slave` modules (#843)
-- The `WithDmaSpi2`/`WithDmaSpi3` structs are no longer generic around the inner peripheral type (#853)
-- The `SarAdcExt`/`SensExt` traits are now collectively named `AnalogExt` instead (#857)
-- Replace the `radio` module with peripheral singleton structs (#852)
-- The SPI traits are no longer re-exported in the main prelude, but from preludes in `spi::master`/`spi::slave` instead (#860)
-- The `embedded-hal-1` and `embedded-hal-async` traits are no longer re-exported in the prelude (#860)
-
-## [0.12.0] - 2023-09-05
-
-### Added
-
-- Implement RTCIO pullup, pulldown and hold control for Xtensa MCUs (#684)
-- S3: Implement RTCIO wakeup source (#690)
-- Add PARL_IO driver for ESP32-C6 / ESP32-H2 (#733, #760)
-- Implement `ufmt_write::uWrite` trait for USB Serial JTAG (#751)
-- Add HMAC peripheral support (#755)
-- Add multicore-aware embassy executor for Xtensa MCUs (#723, #756).
-- Add interrupt-executor for Xtensa MCUs (#723, #756).
-- Add missing `Into<Gpio<Analog, GPIONUN>>` conversion (#764)
-- Updated `clock` module documentation (#774)
-- Add `log` feature to enable log output (#773)
-- Add `defmt` feature to enable log output (#773)
-- A new macro to load LP core code on ESP32-C6 (#779)
-- Add `ECC`` peripheral driver (#785)
-- Initial LLD support for Xtensa chips (#861).
-
-### Changed
-
-- Update the `embedded-hal-*` packages to `1.0.0-rc.1` and implement traits from `embedded-io` and `embedded-io-async` (#747)
-- Moved AlignmentHelper to its own module (#753)
-- Disable all watchdog timers by default at startup (#763)
-- `log` crate is now opt-in (#773)
-
-### Fixed
-
-- Fix `psram` availability lookup in `esp-hal-common` build script (#718)
-- Fix wrong `dram_seg` length in `esp32s2-hal` linker script (#732)
-- Fix setting alarm when a timer group is used as the alarm source. (#730)
-- Fix `Instant::now()` not counting in some cases when using TIMG0 as the timebase (#737)
-- Fix number of ADC attenuations for ESP32-C6 (#771)
-- Fix SHA registers access (#805)
-
-### Breaking
-
-- `CpuControl::start_app_core()` now takes an `FnOnce` closure (#739)
-
-## [0.11.0] - 2023-08-10
-
-### Added
-
-- Add initial LP-IO support for ESP32-C6 (#639)
-- Implement sleep with some wakeup methods for `esp32` (#574)
-- Add a new RMT driver (#653, #667, #695)
-- Implemented calibrated ADC API for ESP32-S3 (#641)
-- Add MCPWM DeadTime configuration (#406)
-- Implement sleep with some wakeup methods for `esp32-s3` (#660, #689, #696)
-- Add feature enabling directly hooking the interrupt vector table (#621)
-- Add `ClockControl::max` helper for all chips (#701)
-- Added module-level documentation for all peripherals (#680)
-- Implement sleep with some wakeup methods for `esp32-s3` (#660)
-- Add `FlashSafeDma` wrapper for eh traits which ensure correct DMA transfer from source data in flash (ROM) (#678)
-
-### Changed
-
-- Update `embedded-hal-*` alpha packages to their latest versions (#640)
-- Implement the `Clone` and `Copy` traits for the `Rng` driver (#650)
-- Use all remaining memory as core-0's stack (#716)
-
-### Fixed
-
-- Fixed Async Uart `read` when `set_at_cmd` is not used (#652)
-- USB device support is working again (#656)
-- Add missing interrupt status read for esp32s3, which fixes USB-SERIAL-JTAG interrupts (#664)
-- GPIO interrupt status bits are now properly cleared (#670)
-- Increase frequency resolution in `set_periodic` (#686)
-- Fixed ESP32-S2, ESP32-S3, ESP32-C2, ESP32-C3 radio clock gating (#679, #681)
-- Partially fix ESP32 radio clocks (#709)
-- Fixed "ESP32/ESP32-S2 RMT transmission with with data.len() > RMT_CHANNEL_RAM_SIZE results in TransmissionError" #707 (#710)
-
-### Removed
-
-- Remove the `allow-opt-level-z` feature from `esp32c3-hal` (#654)
-- Remove the old `pulse_control` driver (#694)
-
-### Breaking
-
-- `DmaTransfer::wait` and `I2sReadDmaTransfer::wait_receive` now return `Result` (#665)
-- `gpio::Pin` is now object-safe (#687)
-
-## [0.10.0] - 2023-06-04
-
-### Added
-
-- Add `WithDmaSpi3` to prelude for ESP32S3 (#623)
-- Add bare-bones PSRAM support for ESP32 (#506)
-- Add initial support for the ESP32-H2 (#513, #526, #527, #528, #530, #538, #544, #548, #551, #556, #560, #566, #549, #564, #569, #576, #577, #589, #591, #597)
-- Add bare-bones PSRAM support for ESP32-S3 (#517)
-- Add async support to the I2C driver (#519)
-- Implement Copy and Eq for EspTwaiError (#540)
-- Add LEDC hardware fade support (#475)
-- Added support for multicore async GPIO (#542)
-- Add a fn to poll DMA transfers (#559)
-- Add unified field-based efuse access (#567)
-- Move `esp-riscv-rt` into esp-hal (#578)
-- Add CRC functions from ESP ROM (#587)
-- Add a `debug` feature to enable the PACs' `impl-register-debug` feature (#596)
-- Add initial support for `I2S` in ESP32-H2 (#597)
-- Add octal PSRAM support for ESP32-S3 (#610)
-- Add MD5 functions from ESP ROM (#618)
-- Add embassy async `read` support for `uart` (#620)
-- Add bare-bones support to run code on ULP-RISCV / LP core (#631)
-- Add ADC calibration implementation for a riscv chips (#555)
-- Add `async` implementation for `USB Serial/JTAG`(#632)
-
-### Changed
-
-- Simplify the `Delay` driver, derive `Clone` and `Copy` (#568)
-- DMA types can no longer be constructed by the user (#625)
-- Move core interrupt handling from Flash to RAM for RISC-V chips (ESP32-H2, ESP32-C2, ESP32-C3, ESP32-C6) (#541)
-- Change LED pin to GPIO2 in ESP32 blinky example (#581)
-- Update ESP32-H2 and ESP32-C6 clocks and remove `i2c_clock` for all chips but ESP32 (#592)
-- Use both timers in `TIMG0` for embassy time driver when able (#609)
-- Re-work `RadioExt` implementations, add support for ESP32-H2 (#627)
-- Improve examples documentation (#533)
-- esp32h2-hal: added README (#585)
-- Update `esp-hal-procmacros` package dependencies and features (#628)
-
-### Fixed
-
-- Corrected the expected DMA descriptor counts (#622, #625)
-- DMA is supported for SPI3 on ESP32-S3 (#507)
-- `change_bus_frequency` is now available on `SpiDma` (#529)
-- Fixed a bug where a GPIO interrupt could erroneously fire again causing the next `await` on that pin to instantly return `Poll::Ok` (#537)
-- Set `vecbase` on core 1 (ESP32, ESP32-S3) (#536)
-- ESP32-S3: Move PSRAM related function to RAM (#546)
-- ADC driver will now apply attenuation values to the correct ADC's channels. (#554)
-- Sometimes half-duplex non-DMA SPI reads were reading garbage in non-release mode (#552)
-- ESP32-C3: Fix GPIO5 ADC channel id (#562)
-- ESP32-H2: Fix direct-boot feature (#570)
-- Fix Async GPIO not disabling interupts on chips with multiple banks (#572)
-- ESP32-C6: Support FOSC CLK calibration for ECO1+ chip revisions (#593)
-- Fixed CI by pinning the log crate to 0.4.18 (#600)
-- ESP32-S3: Fix calculation of PSRAM start address (#601)
-- Fixed wrong variable access (FOSC CLK calibration for ESP32-C6 #593)
-- Fixed [trap location in ram](https://github.com/esp-rs/esp-hal/pull/605#issuecomment-1604039683) (#605)
-- Fix rom::crc docs (#611)
-- Fixed a possible overlap of `.data` and `.rwtext` (#616)
-- Avoid SDA/SCL being low while configuring pins for I2C (#619)
-
-### Breaking
-
-- Simplified user-facing SpiDma and I2s types (#626)
-- Significantly simplified user-facing GPIO pin types. (#553)
-- No longer re-export the `soc` module and the contents of the `interrupt` module at the package level (#607)
-
-## [0.9.0] - 2023-05-02
-
-### Added
-
-- Add bare-bones PSRAM support for ESP32-S2 (#493)
-- Add `DEBUG_ASSIST` functionality (#484)
-- Add RSA peripheral support (#467)
-- Add PeripheralClockControl argument to `timg`, `wdt`, `sha`, `usb-serial-jtag` and `uart` constructors (#463)
-- Added API to raise and reset software interrupts (#426)
-- Implement `embedded_hal_nb::serial::*` traits for `UsbSerialJtag` (#498)
-
-### Fixed
-
-- Fix `get_wakeup_cause` comparison error (#472)
-- Use 192 as mclk_multiple for 24-bit I2S (#471)
-- Fix `CpuControl::start_app_core` signature (#466)
-- Move `rwtext` after other RAM data sections (#464)
-- ESP32-C3: Disable `usb_pad_enable` when setting GPIO18/19 to input/output (#461)
-- Fix 802.15.4 clock enabling (ESP32-C6) (#458)
-- ESP32-S3: Disable usb_pad_enable when setting GPIO19/20 to input/output (#645)
-
-### Changed
-
-- Update `embedded-hal-async` and `embassy-*` dependencies (#488)
-- Update to `embedded-hal@1.0.0-alpha.10` and `embedded-hal-nb@1.0.0-alpha.2` (#487)
-- Let users configure the LEDC output pin as open-drain (#474)
-- Use bitflags to decode wakeup cause (#473)
-- Minor linker script additions (#470)
-- Minor documentation improvements (#460)
-
-### Removed
-
-- Remove unnecessary generic from `UsbSerialJtag` driver (#492)
-- Remove `#[doc(inline)]` from esp-hal-common re-exports (#490)
-
-## [0.8.0] - 2023-03-27
-
-## [0.7.1] - 2023-02-22
-
-## [0.7.0] - 2023-02-21
-
-## [0.5.0] - 2023-01-26
-
-## [0.4.0] - 2022-12-12
-
-## [0.3.0] - 2022-11-17
-
-## [0.2.0] - 2022-09-13
-
-## [0.1.0] - 2022-08-05
-
-[Unreleased]: https://github.com/esp-rs/esp-hal/compare/v0.15.0...HEAD
-[0.15.0]: https://github.com/esp-rs/esp-hal/compare/v0.14.1...v0.15.0
-[0.14.1]: https://github.com/esp-rs/esp-hal/compare/v0.14.0...v0.14.1
-[0.14.0]: https://github.com/esp-rs/esp-hal/compare/v0.13.1...v0.14.0
-[0.13.1]: https://github.com/esp-rs/esp-hal/compare/v0.13.0...v0.13.1
-[0.13.0]: https://github.com/esp-rs/esp-hal/compare/v0.12.0...v0.13.0
-[0.12.0]: https://github.com/esp-rs/esp-hal/compare/v0.11.0...v0.12.0
-[0.11.0]: https://github.com/esp-rs/esp-hal/compare/v0.10.0...v0.11.0
-[0.10.0]: https://github.com/esp-rs/esp-hal/compare/v0.9.0...v0.10.0
-[0.9.0]: https://github.com/esp-rs/esp-hal/compare/v0.8.0...v0.9.0
-[0.8.0]: https://github.com/esp-rs/esp-hal/compare/v0.7.1...v0.8.0
-[0.7.1]: https://github.com/esp-rs/esp-hal/compare/v0.7.0...v0.7.1
-[0.7.0]: https://github.com/esp-rs/esp-hal/compare/v0.5.0...v0.7.0
-[0.5.0]: https://github.com/esp-rs/esp-hal/compare/v0.4.0...v0.5.0
-[0.4.0]: https://github.com/esp-rs/esp-hal/compare/v0.3.0...v0.4.0
-[0.3.0]: https://github.com/esp-rs/esp-hal/compare/v0.2.0...v0.3.0
-[0.2.0]: https://github.com/esp-rs/esp-hal/compare/v0.1.0...v0.2.0
-[0.1.0]: https://github.com/esp-rs/esp-hal/releases/tag/v0.1.0

CONTRIBUTING.md

@@ -1,101 +0,0 @@
-# Welcome to the `esp-hal` contributing guide
-
-Thank you for investing your time in contributing to our project!
-
-In this guide you will get an overview of the contribution workflow from opening an issue, creating a PR, reviewing, and merging the PR.
-
-Use the table of contents icon (<img src="resources/table-of-contents.png" width="24" height="24" />) in the top right corner of this document to get to a specific section of this guide quickly.
-
-## New Contributor Guide
-
-To get an overview of the project, please read the [README]. Here are some resources to help you get started with open source contributions:
-
-- [Finding ways to contribute to open source on GitHub]
-- [Set up Git]
-- [GitHub flow]
-- [Collaborating with pull requests]
-
-[README]: README.md
-[Finding ways to contribute to open source on GitHub]: https://docs.github.com/en/get-started/exploring-projects-on-github/finding-ways-to-contribute-to-open-source-on-github
-[Set up Git]: https://docs.github.com/en/get-started/quickstart/set-up-git
-[GitHub flow]: https://docs.github.com/en/get-started/quickstart/github-flow
-[Collaborating with pull requests]: https://docs.github.com/en/github/collaborating-with-pull-requests
-
-## Getting Started
-
-### Issues
-
-#### Create a New Issue
-
-If you spot a problem with the docs, [search if an issue already exists]. If a related issue doesn't exist, you can open a new issue using the [issue form].
-
-[search if an issue already exists]: https://docs.github.com/en/github/searching-for-information-on-github/searching-on-github/searching-issues-and-pull-requests#search-by-the-title-body-or-comments
-[issue form]: https://github.com/esp-rs/esp-hal/issues/new/
-
-#### Solve an Issue
-
-Scan through our [existing issues] to find one that interests you. You can narrow down the search using labels as filters. If you find an issue to work on, you are welcome to open a PR with a fix.
-
-It's recommended that you comment in the relevant issue, mentioning that you are actively working on it, however this is not a requirement.
-
-If somebody is already assigned to an issue, this does not necessarily mean they are actively working on it; don't be afraid to comment in these issues asking if you can take over the work if you're interested.
-
-[existing issues]: https://github.com/esp-rs/esp-hal/issues
-
-### Make Changes
-
-1. Fork the repository.
-   - Using GitHub Desktop:
-     - [Getting started with GitHub Desktop] will guide you through setting up Desktop.
-     - Once Desktop is set up, you can use it to [fork the repo!]
-   - Using the command line:
-     - [Fork the repo] so that you can make your changes without affecting the original project until you're ready to merge them.
-2. Install or update to the latest version of Rust. See [rustup.rs] for more information.
-3. Create a working branch and start with your changes!
-
-[Getting started with GitHub Desktop]: https://docs.github.com/en/desktop/installing-and-configuring-github-desktop/getting-started-with-github-desktop
-[fork the repo!]: https://docs.github.com/en/desktop/contributing-and-collaborating-using-github-desktop/cloning-and-forking-repositories-from-github-desktop
-[Fork the repo]: https://docs.github.com/en/github/getting-started-with-github/fork-a-repo#fork-an-example-repository
-[rustup.rs]: https://rustup.rs/
-
-### Commit Your Update
-
-Commit the changes once you are happy with them. Don't forget to self-review to speed up the review process.
-
-We ask that you ensure all source code files has been properly formatted with `rustfmt`, and that you have linted your changes by running `cargo clippy`. These tools can be installed by running the following commands:
-
-```shell
-rustup component add rustfmt
-rustup component add clippy
-```
-
-We _strongly_ recommend that you use the supplied `pre-commit` Git hook, which will ensure that all source code has been formatted correctly prior to committing. See the [Git documentation] for more information on hooks.
-
-The `pre-commit` hook can be installed by running the following command in a terminal, from the root of the repository:
-
-```shell
-cp pre-commit .git/hooks/pre-commit
-```
-
-[Git documentation]: https://git-scm.com/book/en/v2/Customizing-Git-Git-Hooks
-
-### Pull Request
-
-When you're finished with the changes, create a pull request, also known as a PR.
-
-- Fill the pull request template so that we can review your PR. This template helps reviewers understand your changes as well as the purpose of your pull request.
-- Don't forget to [link PR to issue] if you are solving one.
-- Enable the checkbox to [allow maintainer edits] so the branch can be updated for a merge. Once you submit your PR, a Docs team member will review your proposal. We may ask questions or request additional information.
-- We may ask for changes to be made before a PR can be merged, either using [suggested changes] or pull request comments. You can apply suggested changes directly through the UI. You can make any other changes in your fork, then commit them to your branch.
-- As you update your PR and apply changes, mark each conversation as [resolved].
-- If you run into any merge issues, checkout this [git tutorial] to help you resolve merge conflicts and other issues.
-
-[link PR to issue]: https://docs.github.com/en/issues/tracking-your-work-with-issues/linking-a-pull-request-to-an-issue
-[allow maintainer edits]: https://docs.github.com/en/github/collaborating-with-issues-and-pull-requests/allowing-changes-to-a-pull-request-branch-created-from-a-fork
-[suggested changes]: https://docs.github.com/en/github/collaborating-with-issues-and-pull-requests/incorporating-feedback-in-your-pull-request
-[resolved]: https://docs.github.com/en/github/collaborating-with-issues-and-pull-requests/commenting-on-a-pull-request#resolving-conversations
-[git tutorial]: https://github.com/skills/resolve-merge-conflicts
-
-### Your PR is Merged!
-
-Congratulations! The esp-rs team thanks you for your contributions!

Cargo.toml

@@ -2,10 +2,27 @@
 resolver = "2"
 members  = ["xtask"]
 exclude  = [
+    "esp-alloc",
+    "esp-backtrace",
+    "esp-build",
+    "esp-config",
     "esp-hal",
+    "esp-hal-embassy",
     "esp-hal-procmacros",
-    "esp-hal-smartled",
+    "esp-ieee802154",
     "esp-lp-hal",
+    "esp-metadata",
+    "esp-println",
     "esp-riscv-rt",
+    "esp-wifi",
+    "esp-storage",
     "examples",
+    "extras/bench-server",
+    "extras/esp-wifishark",
+    "extras/ieee802154-sniffer",
+    "hil-test",
+    "qa-test",
+    "xtensa-lx",
+    "xtensa-lx-rt",
+    "xtensa-lx-rt/procmacros",
 ]

README.md

@@ -1,20 +1,29 @@
 # esp-hal
 
-![GitHub Workflow Status](https://img.shields.io/github/actions/workflow/status/esp-rs/esp-hal/ci.yml?label=CI&logo=github&style=flat-square)
-![MIT/Apache-2.0 licensed](https://img.shields.io/badge/license-MIT%2FApache--2.0-blue?style=flat-square)
-[![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
+![GitHub Actions Workflow Status](https://img.shields.io/github/actions/workflow/status/esp-rs/esp-hal/ci.yml?labelColor=1C2C2E&label=CI&logo=github&style=flat-square)
+![GitHub Actions Workflow Status](https://img.shields.io/github/actions/workflow/status/esp-rs/esp-hal/hil.yml?labelColor=1C2C2E&label=HIL&logo=github&style=flat-square&event=merge_group)
+![MIT/Apache-2.0 licensed](https://img.shields.io/badge/license-MIT%2FApache--2.0-blue?labelColor=1C2C2E&style=flat-square)
+[![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?labelColor=1C2C2E&label=join%20matrix&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
 
-**H**ardware **A**bstraction **L**ayer crates for the **ESP32**, **ESP32-C2/C3/C6**, **ESP32-H2**, **ESP32-P4**, and **ESP32-S2/S3** from Espressif. Additionally provides support for programming the low-power RISC-V cores found on the **ESP32-C6** and **ESP32-S2/S3**.
+Bare-metal (`no_std`) hardware abstraction layer for Espressif devices. Currently supports, to varying degrees, the following devices:
 
-These HALs are `no_std`; if you are looking for `std` support, please use [esp-idf-hal] instead.
+- ESP32 Series: _ESP32_
+- ESP32-C Series: _ESP32-C2, ESP32-C3, ESP32-C6_
+- ESP32-H Series: _ESP32-H2_
+- ESP32-S Series: _ESP32-S2, ESP32-S3_
+
+Additionally provides limited support for programming the low-power RISC-V cores found on the _ESP32-C6_, _ESP32-S2_, and _ESP32-S3_ via the [esp-lp-hal] package.
+
+These packages are all `no_std`; if you are looking for `std` support, please use [esp-idf-svc] instead.
 
 If you have any questions, comments, or concerns, please [open an issue], [start a new discussion], or join us on [Matrix]. For additional information regarding any of the crates in this repository, please refer to the relevant crate's README.
 
 > [!NOTE]
 >
-> This project is still in the relatively early stages of development, and as such there should be no expectation of API stability. A significant number of peripherals currently have drivers implemented but have varying levels of functionality. For most basic tasks, this should be usable already, however some more advanced or uncommon features may not yet be implemented.
+> This repository includes crates that are at various stages of maturity and stability. While many functionalities have already been implemented and are usable for most tasks, certain advanced or less common features may still be under development. Each crate may offer different levels of functionality and guarantees.
 
-[esp-idf-hal]: https://github.com/esp-rs/esp-idf-hal
+[esp-lp-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp-lp-hal
+[esp-idf-svc]: https://github.com/esp-rs/esp-idf-svc
 [open an issue]: https://github.com/esp-rs/esp-hal/issues/new
 [start a new discussion]: https://github.com/esp-rs/esp-hal/discussions/new
 [matrix]: https://matrix.to/#/#esp-rs:matrix.org
@@ -23,10 +32,10 @@ If you have any questions, comments, or concerns, please [open an issue], [start
 
 For information relating to the development of Rust applications on ESP devices, please first read [The Rust on ESP Book].
 
-For information about the HAL and how to use it in your own projects, please refer to the documentation on [docs.rs] for the relevant chip.
+For information about the HAL and how to use it in your own projects, please refer to the [documentation].
 
 [The Rust on ESP Book]: https://esp-rs.github.io/book/
-[docs.rs]: https://docs.rs
+[documentation]: https://docs.esp-rs.org/esp-hal/
 
 ## Resources
 
@@ -38,92 +47,14 @@ For information about the HAL and how to use it in your own projects, please ref
 
 ## Crates
 
-### [esp-hal]
+This repository is home to a number of different packages; for more information regarding a particular package, please refer to its `README.md` and/or documentation.
 
-Implements number of the traits defined in [embedded-hal](https://github.com/rust-embedded/embedded-hal) for various ESP devices. Full list of currently supported devices with basic information is in the table below.
+## Contributing
 
-|   Feature     | Technical Reference Manual |             Target              |    MSRV    |
-| :-----------: | :------------------------: | :-----------------------------: | :--------: |
-| `esp32`       |           [ESP32]          |     `xtensa-esp32-none-elf`     |   ![esp]   |
-| `esp32c2`     |         [ESP32-C2]         |  `riscv32imc-unknown-none-elf`  | ![stable] |
-| `esp32c3`     |         [ESP32-C3]         |  `riscv32imc-unknown-none-elf`  | ![stable] |
-| `esp32c6`     |         [ESP32-C6]         | `riscv32imac-unknown-none-elf`  | ![stable] |
-| `esp32h2`     |         [ESP32-H2]         | `riscv32imac-unknown-none-elf`  | ![stable] |
-| `esp32p4`     |         [ESP32-P4]         | `riscv32imafc-unknown-none-elf` | ![stable] |
-| `esp32s2`     |         [ESP32-S2]         |    `xtensa-esp32s2-none-elf`    |   ![esp]   |
-| `esp32s3`     |         [ESP32-S3]         |    `xtensa-esp32s3-none-elf`    |   ![esp]   |
+We have a number of living documents to aid contributing to the project, please give these a read before modifying code:
 
-[esp-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp-hal
-[esp]: https://img.shields.io/badge/rustc-esp%201.74+-red.svg
-[stable]: https://img.shields.io/badge/rustc-stable%201.76+-red.svg
-[esp32]: https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf
-[esp32-c2]: https://www.espressif.com/sites/default/files/documentation/esp8684_technical_reference_manual_en.pdf
-[esp32-c3]: https://www.espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf
-[esp32-c6]: https://www.espressif.com/sites/default/files/documentation/esp32-c6_technical_reference_manual_en.pdf
-[esp32-h2]: https://www.espressif.com/sites/default/files/documentation/esp32-h2_technical_reference_manual_en.pdf
-[esp32-p4]: https://www.espressif.com/sites/default/files/documentation/esp32-p4_technical_reference_manual_en.pdf
-[esp32-s2]: https://www.espressif.com/sites/default/files/documentation/esp32-s2_technical_reference_manual_en.pdf
-[esp32-s3]: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf
-
-### [esp-lp-hal]
-
-Implements a number of the traits defined in [embedded-hal](https://github.com/rust-embedded/embedded-hal) for the low-power (lp) RISC-V coprocessors found on the ESP32-C6, ESP32-S2, and ESP32-S3 from Espressif. The main idea is to have code running on lp core and putting the main core into sleep, making it more power-efficient.
-
-
-|    Crate     |       Documentation       |                            Targets                            |
-| :----------: | :-----------------------: | :-----------------------------------------------------------: |
-| [esp-lp-hal] | N/A (_Not yet published_) | `riscv32imc-unknown-none-elf`, `riscv32imac-unknown-none-elf` |
-
-
-[esp-lp-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp-lp-hal
-
-### [esp-hal-procmacros]
-
-Procedural macros for use with the esp-hal family of HAL packages.
-
-[esp-hal-procmacros]: https://github.com/esp-rs/esp-hal/tree/main/esp-hal-procmacros
-
-### [esp-riscv-rt]
-
-Minimal runtime / startup for RISC-V CPUs from Espressif.
-
-[esp-riscv-rt]: https://github.com/esp-rs/esp-hal/tree/main/esp-riscv-rt
-
-## Ancillary Crates
-
-There are a number of other crates within the [esp-rs organization] which can be used in conjunction with `esp-hal`:
-
-|      Crate       |                                  Description                                   |
-| :--------------: | :----------------------------------------------------------------------------: |
-|   [esp-alloc]    |                        A simple `no_std` heap allocator                        |
-| [esp-backtrace]  |                 Backtrace support for bare-metal applications                  |
-| [esp-ieee802154] |          Low-level IEEE802.15.4 driver for the ESP32-C6 and ESP32-H2           |
-| [esp-openthread] |           A bare-metal Thread implementation using `esp-ieee802154`            |
-|  [esp-println]   |                Provides `print!` and `println!` implementations                |
-|  [esp-storage]   | Implementation of [embedded-storage] traits to access unencrypted flash memory |
-|    [esp-wifi]    |                       `no_std` Wi-Fi/BLE/ESP-NOW support                       |
-
-[esp-rs organization]: https://github.com/esp-rs
-[esp-alloc]: https://github.com/esp-rs/esp-alloc
-[esp-backtrace]: https://github.com/esp-rs/esp-backtrace
-[esp-ieee802154]: https://github.com/esp-rs/esp-ieee802154
-[esp-openthread]: https://github.com/esp-rs/esp-openthread
-[esp-println]: https://github.com/esp-rs/esp-println
-[esp-storage]: https://github.com/esp-rs/esp-storage
-[embedded-storage]: https://github.com/rust-embedded-community/embedded-storage
-[esp-wifi]: https://github.com/esp-rs/esp-wifi
-
-## Git Hooks
-
-We provide a simple `pre-commit` hook to verify the formatting of each package prior to committing changes. We _strongly_ encourage use of this git hook.
-
-The hook can be enabled by copying it in to the `.git/hooks/` directory:
-
-```bash
-cp pre-commit .git/hooks/pre-commit
-```
-
-When using this hook, you can choose to ignore its failure on a per-commit basis by committing with the `--no-verify` flag; however, you will need to be sure that all packages are formatted when submitting a pull request.
+- [API-GUIDELINES](https://github.com/esp-rs/esp-hal/blob/main/documentation/API-GUIDELINES.md)
+- [CONTRIBUTING-GUIDE](https://github.com/esp-rs/esp-hal/blob/main/documentation/CONTRIBUTING.md)
 
 ## License
 
@@ -134,7 +65,7 @@ Licensed under either of:
 
 at your option.
 
-### Contribution
+### Contribution notice
 
 Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in
 the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without

documentation/API-GUIDELINES.md

@@ -0,0 +1,144 @@
+# `esp-rs` API Guidelines
+
+## About
+
+This is a living document - make sure to check the latest version of this document.
+
+> [!NOTE]
+> Not all of the currently existing code follows this guideline, yet.
+
+In general, the [Rust API Guidelines](https://rust-lang.github.io/api-guidelines) apply to all projects in the ESP-RS GitHub organization where possible.
+  - Especially for public API but if possible also for internal APIs.
+
+## Amendments to the Rust API Guidelines
+
+- `C-RW-VALUE` and `C-SERDE` do not apply.
+- `C-COMMON-TRAITS`:
+  The set of traits to implement depend on the type and use case. In esp-hal, we can highlight a few such use cases and provide recommendations what should be implemented. If nothing here applies, use your best judgement.
+  - Driver structures: `Debug`
+  - Driver configuration: `Default`, `Debug`, `PartialEq/Eq`, `Clone/Copy`, `Hash`
+    - `Clone/Copy` depends on the size and contents of the structure. They should generally be implemented, unless there is a good reason not to.
+    - The `Default` configuration needs to make sense for a particular driver, and applying the default configuration must not fail.
+  - Error types: `Debug`, `PartialEq/Eq`, `Clone/Copy`, `Hash`, `Error`, `Display`
+
+## Construction and Destruction of Drivers
+
+- Drivers must take peripherals via the `PeripheralRef` pattern - they don't consume peripherals directly.
+- If a driver requires pins, those pins should be configured using `fn with_signal_name(self, pin: impl Peripheral<P = impl PeripheralInput> + 'd) -> Self` or `fn with_signal_name(self, pin: impl Peripheral<P = impl PeripheralOutput> + 'd) -> Self`
+- If a driver supports multiple peripheral instances (for example, I2C0 is one such instance):
+  - The driver should not be generic over the peripheral instance.
+  - The author must to use `crate::any_peripheral` to define the "any" peripheral instance type.
+  - The driver must implement a `new` constructor that automatically converts the peripheral instance into the any type.
+- If a driver is configurable, configuration options should be implemented as a `Config` struct in the same module where the driver is located.
+  - The driver's constructor should take the config struct by value, and it should return `Result<Self, ConfigError>`.
+  - The `ConfigError` enum should be separate from other `Error` enums used by the driver.
+  - The driver should implement `fn apply_config(&mut self, config: &Config) -> Result<(), ConfigError>`.
+  - In case the driver's configuration is infallible (all possible combinations of options are supported by the hardware), the `ConfigError` should be implemented as an empty `enum`.
+  - Configuration structs should derive `procmacros::BuilderLite` in order to automatically implement the Builder Lite pattern for them.
+- If a driver implements both blocking and async operations, or only implements blocking operations, but may support asynchronous ones in the future, the driver's type signature must include a `crate::Mode` type parameter.
+- By default, constructors must configure the driver for blocking mode. The driver must implement `into_async` (and a matching `into_blocking`) function that reconfigures the driver.
+  - `into_async` must configure the driver and/or the associated DMA channels. This most often means enabling an interrupt handler.
+  - `into_blocking` must undo the configuration done by `into_async`.
+- The asynchronous driver implementation must also expose the blocking methods (except for interrupt related functions).
+- Drivers must have a `Drop` implementation resetting the peripheral to idle state. There are some exceptions to this:
+  - GPIO where common usage is to "set and drop" so they can't be changed
+  - Where we don't want to disable the peripheral as it's used internally, for example SYSTIMER is used by `time::now()` API. See `KEEP_ENABLED` in src/system.rs
+  - A driver doesn't need to do anything special for deinitialization and has a `PeripheralGuard` field which implements the disabling and resetting of the peripheral.
+- Consider using a builder-like pattern for driver construction.
+
+## Interoperability
+
+- Don't use `log::XXX!` macros directly - use the wrappers in `fmt.rs` (e.g. just `info!` instead of `log::info!` or importing `log::*`)!
+- Consider implementing common ecosystem traits, like the ones in `embedded-hal` or `embassy-embedded-hal`.
+  - Where the guidelines suggest implementing `Debug`, `defmt::Format` should also be implemented.
+    - The `defmt::Format` implementation needs to be gated behind the `defmt` feature.
+    - see [this example](https://github.com/esp-rs/esp-hal/blob/df2b7bd8472cc1d18db0d9441156575570f59bb3/esp-hal/src/spi/mod.rs#L15)
+    - e.g. `#[cfg_attr(feature = "defmt", derive(defmt::Format))]`
+  - Implementations of common, but unstable traits (e.g. `embassy_embedded_hal::SetConfig`) need to be gated with the `unstable` feature.
+
+## API Surface
+
+- API documentation must be provided for every new driver and API.
+- Private details should not leak into the public API, and should be made private where technically possible.
+  - Implementation details that _need_ to be public should be marked with `#[doc(hidden)]` and a comment as to why it needs to be public.
+    - For the time being, this includes any `Instance` traits, and `State` or `Info` structs as well.
+  - Functions which technically need to be public but shouldn't be callable by the user need to be sealed.
+    - see [this example in Rust's core library](https://github.com/rust-lang/rust/blob/044a28a4091f2e1a5883f7fa990223f8b200a2cd/library/core/src/error.rs#L89-L100)
+- Any public traits, that **must not** be implemented downstream need to be `Sealed`.
+- Prefer compile-time checks over runtime checks where possible, prefer a fallible API over panics.
+- Follow naming conventions in order to be consistent across drivers - take inspiration from existing drivers.
+- Design APIs in a way that they are easy to use.
+- Driver API decisions should be assessed individually, don't _not_ just follow embedded-hal or other ecosystem trait crates. Expose the capabilities of the hardware. (Ecosystem traits are implemented on top of the inherent API)
+- Avoid type states and extraneous generics whenever possible
+  - These often lead to usability problems, and tend to just complicate things needlessly - sometimes it can be a good tradeoff to make a type not ZST
+  - Common cases of useless type info is storing pin information - this is usually not required after configuring the pins and will bloat the complexity of the type massively. When following the `PeripheralRef` pattern it's not needed in order to keep users from re-using the pin while in use
+- Avoiding `&mut self` when `&self` is safe to use. `&self` is generally easier to use as an API. Typical applications of this are where the methods just do writes to registers which don't have side effects.
+- Maintain order consistency in the API, such as in the case of pairs like RX/TX.
+- If your driver provides a way to listen for interrupts, the interrupts should be listed in a `derive(EnumSetType)` enum as opposed to one function per interrupt flag.
+- If a driver only implements a subset of a peripheral's capabilities, it should be placed in the `peripheral::subcategory` module.
+  - For example, if a driver implements the slave-mode I2C driver, it should be placed into `i2c::slave`.
+  - This helps us reducing the need of introducing breaking changes if we implement additional functionalities.
+- Avoid abbreviations and contractions in the API, where possible.
+  - Saving a few characters may introduce ambiguity, e.g `SpiTransDone`, is it `Transmit` or `Transfer`?
+  - Common abbreviations, that are well understood such as `Dma` are perfectly fine.
+
+## Maintainability
+
+- Avoid excessive use of macros unless there is no other option; modification of the PAC crates should be considered before resorting to macros.
+- Every line of code is a liability. Take some time to see if your implementation can be simplified before opening a PR.
+- If you are porting code from ESP-IDF (or anything else), please include a link WITH the commit hash in it, and please highlight the relevant line(s) of code
+- If necessary provide further context as comments (consider linking to code, PRs, TRM - make sure to use permanent links, e.g. include the hash when linking to a Git repository, include the revision, page number etc. when linking to TRMs)
+- Prefer line comments (//) to block comments (/* ... */)
+- Generally, follow common "good practices" and idiomatic Rust style
+- All `Future` objects (public or private) must be marked with ``#[must_use = "futures do nothing unless you `.await` or poll them"]``.
+- Prefer `cfg_if!` (or, if the branches just pick between separate values of the same variable, `cfg!()`) over multiple exclusive `#[cfg]` attributes. `cfg_if!`/`cfg!()` visually divide the options, often results in simpler conditions and simplifies adding new branches in the future.
+
+## Driver implementation
+
+- If a common `Instance` trait is used for multiple peripherals, those traits should not have any logic implemented in them.
+- The `Instance` traits should only be used to access information about a peripheral instance.
+- The internal implementation of the driver should be non-generic over the peripheral instance. This helps the compiler produce smaller code.
+- The author is encouraged to return a static shared reference to an `Info` and a `State` structure from the `Instance` trait.
+  - The `Info` struct should describe the peripheral. Do not use any interior mutability.
+  - The `State` struct should contain counters, wakers and other, mutable state. As this is accessed via a shared reference, interior mutability and atomic variables are preferred.
+
+## Modules Documentation
+
+Modules should have the following documentation format:
+```rust
+//! # Peripheral Name (Peripheral Acronym)
+//!
+//! ## Overview
+//! Small description of the peripheral, see ESP-IDF docs or TRM
+//!
+//! ## Configuration
+//! Explain how can the peripheral be configured, and which parameters can be configured
+//!
+//! ## Usage
+//! Explain if we implement any external traits
+//!
+//! ## Examples
+//!
+//! ### Name of the Example
+//! Small description of the example if needed
+//! ```rust, no_run
+//! ...
+//! ```
+//!
+//! ## Implementation State
+//! List unsupported features
+```
+- If any of the headers is empty, remove it
+- When possible, use ESP-IDF docs and TRM as references and include links if possible.
+  - In case of referencing an ESP-IDF link make it chip-specific, for example:
+    ```
+    #![doc = concat!("[ESP-IDF documentation](https://docs.espressif.com/projects/esp-idf/en/latest/", crate::soc::chip!(), "/api-reference/peripherals/etm.html)")]
+    ```
+  - In case of referencing a TRM chapter, use the `crate::trm_markdown_link!()` macro. If you are referring to a particular chapter, you may use `crate::trm_markdown_link!("#chapter_anchor")`.
+- Documentation examples must be short
+  - But must also provide value beyond what the rustdoc generated docs show
+    - Showing a snippet of a slightly more complex interaction, for example inverting the signals for a driver
+    - Showing construction if it is more complex, or requires some non-obvious precursor steps. Think about this for drivers that take a generic instance to construct, rustdoc doesn't do a good job of showing what concrete things can be passed into a constructor.
+  - For more complex scenarios, create an example.
+- Use rustdoc syntax for linking to other documentation items instead of markdown links where possible
+  - https://doc.rust-lang.org/rustdoc/write-documentation/linking-to-items-by-name.html

documentation/CONTRIBUTING.md

@@ -0,0 +1,143 @@
+
+# Welcome to the `esp-hal` Contributing Guide
+
+Thank you for considering contributing to our project! Your efforts help make `esp-hal` a better ecosystem for everyone.
+
+This guide outlines the contribution workflow, from reporting issues and submitting pull requests, to the review process and eventual merger of contributions.
+
+## Quick Navigation
+*   [New Contributor Guide]
+*   [Getting Started]
+    *   [Issues: Reporting and Resolving]
+    *   [Making Changes: Fork, Edit, and Pull Request]
+    *   [Testing Your Contributions]
+    *   [Commit Your Updates]
+*   [Pull Request: From Submission to Merge]
+*   [Your PR is merged!]
+
+[New Contributor Guide]: #new-contributor-guide
+[Getting Started]: #getting-started
+[Issues: Reporting and Resolving]: #issues-reporting-and-resolving
+[Making Changes: Fork, Edit, and Pull Request]: #making-changes-fork-edit-and-pull-request
+[Testing Your Contributions]: #testing-your-contributions
+[Commit your updates]: #commit-your-updates
+[Pull Request: From Submission to Merge]: #pull-request-from-submission-to-merge
+[Your PR is merged!]: #your-pr-is-merged
+
+## New Contributor Guide
+
+Welcome aboard! If you're new to `esp-hal` or open-source contribution, here are some resources to get you started:
+
+*   [Understanding the Project]: A high-level overview of `esp-hal`.
+*   Intro to Open Source Contribution: [GitHub's Guide]
+*   [Setting Up Git]
+*   Workflow Insights: [GitHub Flow]
+*   Collaborating via [Pull Requests]
+
+Before adding or changing code, review the [esp-rs API guidelines].
+
+[Understanding the Project]: README.md
+[GitHub's Guide]: https://docs.github.com/en/get-started/exploring-projects-on-github/finding-ways-to-contribute-to-open-source-on-github
+[Setting Up Git]: https://docs.github.com/en/get-started/quickstart/set-up-git
+[GitHub Flow]: https://docs.github.com/en/get-started/quickstart/github-flow
+[Pull Requests]: https://docs.github.com/en/github/collaborating-with-pull-requests
+[esp-rs API guidelines]: ./documentation/API-GUIDELINES.md
+
+## Getting Started
+
+### Issues: Reporting and Resolving
+
+#### Reporting a New Issue
+
+Encountered a problem or have an idea? First, [check existing issues] to avoid duplicates. If your concern is new, use our [issue form] to submit it.
+
+[check existing issues]: https://github.com/esp-rs/esp-hal/issues
+[issue form]: https://github.com/esp-rs/esp-hal/issues/new/
+
+#### Working on an Issue
+
+Browse [existing issues] to find one that resonates with you. Use labels for easier filtering. If you decide to tackle an issue, it's courteous (but not mandatory) to let others know by commenting.
+
+[existing issues]: https://github.com/esp-rs/esp-hal/issues
+
+#### Making Changes: Fork, Edit, and Pull Request
+
+1. **Fork**: Start by [forking the repository]. This keeps the main project safe while you make your changes.
+2. **Setup**: Ensure you have the latest Rust toolchain via [rustup.rs].
+3. **Branch**: Create a branch in your fork for your changes. Keep your changes focused and limited to a single issue or feature.
+
+[forking the repository]: https://docs.github.com/en/github/getting-started-with-github/fork-a-repo
+[rustup.rs]: https://rustup.rs/
+
+#### What You Should Do:
+
+* **API changes**: If your contribution changes the API, please adapt the driver (including module level documentation) and examples accordingly and update the [HIL] (Hardware-in-the-Loop) tests.
+* **Run Related Examples**: After making changes, run any affected examples to ensure they build successfully and perform as expected.
+* **Manual Testing**: For hardware-related changes, manually test your changes on the actual devices when possible. If not, please note it in the corresponding issue, and someone from our team will assist with testing. This is crucial because hardware behavior can sometimes differ from what's simulated or expected.
+* **HIL Tests**: Ensure that any changes to the API or hardware interaction logic are reflected in the HIL tests located in the `hil-test` directory. This helps verify the real-world applicability of your changes.
+
+By taking these extra steps to test your contributions, you help maintain the high quality and reliability of `esp-hal`, ensuring it remains a robust platform for everyone.
+
+[HIL]: https://github.com/esp-rs/esp-hal/tree/main/hil-test
+
+### Testing Your Contributions
+
+Ensuring the quality and reliability of `esp-hal` is a shared responsibility, and testing plays a critical role in this process. Our GitHub CI automatically checks the buildability of all examples and drivers within the project. However, automated tests can't catch everything, especially when it comes to the nuanced behavior of hardware interactions. So make sure that the example affected by your change works as expected. 
+
+Further steps that can (or should) be taken in testing:
+
+* Using [xtask], build examples for the specified chip.
+* Build the documentation and run the doctests if they have been modified using the `build-documentation` and  `run-doc-test` commands in [xtask].
+* Run the [HIL] tests locally if changes have been made to them.
+
+[xtask]: https://github.com/esp-rs/esp-hal/tree/main/xtask
+
+### Commit Your Updates
+
+Commit your changes once you're satisfied. Review your own work to streamline the review process later. Use `rustfmt` and `cargo clippy` to ensure your code adheres to Rust's conventions.
+
+```shell
+rustup component add rustfmt
+rustup component add clippy
+```
+
+We _strongly_ recommend that you format your code before committing to ensure consistency throughout the project.
+To format all packages in the workspace, run the following command in a terminal from the root of the repository:
+
+```shell
+cargo xtask fmt-packages
+```
+
+We also recommend using the `lint-packages` subcommand, which uses `cargo clippy` and will lint the entire driver in order to catch common mistakes in the code.
+
+```shell
+cargo xtask lint-packages
+```
+
+This will use `rustfmt` to ensure that all source code is formatted correctly prior to committing.
+
+## Pull Request: From Submission to Merge
+
+*   Fill the pull request template so that we can review your PR. This template helps reviewers understand your changes as well as the purpose of your pull request.
+*   [Link your PR] to any relevant issues it addresses.
+*   [Allow edits from maintainers] so the branch can be updated for a merge. Once you submit your PR, a Docs team member will review your proposal. We may ask questions or request additional information.
+*   Make sure you add an entry with your changes to the [Changelog]. Also make sure that it is in the appropriate section of the document.
+*   Make sure you add your changes to the current [migration guide].
+*   We may ask for changes to be made before a PR can be merged, either using [suggested changes] or pull request comments. You can apply suggested changes directly through the UI. You can make any other changes in your fork, then commit them to your branch.
+*   As you update your PR and apply changes, mark each conversation as [resolved].
+*   Resolve merge conflicts if they arise, using resources like [this git tutorial] for help.
+
+[Link your PR]: https://docs.github.com/en/issues/tracking-your-work-with-issues/linking-a-pull-request-to-an-issue
+[Allow edits from maintainers]: https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/allowing-changes-to-a-pull-request-branch-created-from-a-forkmember
+[Changelog]: esp-hal/CHANGELOG.md
+[migration guide]: esp-hal/MIGRATING-0.20.md
+[suggested changes]: https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/reviewing-changes-in-pull-requests/incorporating-feedback-in-your-pull-request
+[resolved]: https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/reviewing-changes-in-pull-requests/commenting-on-a-pull-request#resolving-conversations
+[this git tutorial]: https://github.com/skills/resolve-merge-conflicts
+
+
+## Your PR is Merged!
+
+Congratulations! The `esp-rs` team thanks you for your contributions!
+
+Contributing to open source extends beyond just code! Each contribution, regardless of size, plays a significant role. We appreciate your involvement in this collective endeavor.

esp-alloc/.clippy.toml

@@ -0,0 +1 @@
+avoid-breaking-exported-api = false

esp-alloc/CHANGELOG.md

@@ -0,0 +1,36 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## [Unreleased]
+
+### Added
+
+- `esp_alloc::HEAP.stats()` can now be used to get heap usage informations (#2137)
+
+### Changed
+
+### Fixed
+
+### Removed
+
+## 0.5.0 - 2024-10-10
+
+### Changed
+
+- a global allocator is created in esp-alloc, now you need to add individual memory regions (up to 3) to the allocator (#2099)
+
+## 0.4.0 - 2024-06-04
+
+## 0.3.0 - 2023-04-25
+
+## 0.2.1 - 2023-04-21
+
+## 0.2.0 - 2023-02-22
+
+## 0.1.0 - 2022-07-25
+
+[Unreleased]: https://github.com/esp-rs/esp-hal/commits/main/esp-alloc?since=2024-10-10

esp-alloc/Cargo.toml

@@ -0,0 +1,37 @@
+[package]
+name         = "esp-alloc"
+version      = "0.5.0"
+edition      = "2021"
+rust-version = "1.68"
+description  = "A heap allocator for Espressif devices"
+keywords     = ["allocator", "embedded", "embedded-hal", "esp32", "espressif", "memory"]
+categories   = ["embedded", "memory-management", "no-std"]
+repository   = "https://github.com/esp-rs/esp-hal"
+license      = "MIT OR Apache-2.0"
+
+[package.metadata.docs.rs]
+default-target = "riscv32imc-unknown-none-elf"
+features       = ["nightly"]
+
+[dependencies]
+defmt                 = { version = "0.3.8", optional = true }
+cfg-if                = "1.0.0"
+critical-section      = "1.1.3"
+enumset               = "1.1.5"
+linked_list_allocator = { version = "0.10.5", default-features = false, features = ["const_mut_refs"] }
+document-features     = "0.2.10"
+
+[features]
+default = []
+nightly = []
+
+## Implement `defmt::Format` on certain types.
+defmt = ["dep:defmt"]
+
+## Enable this feature if you want to keep stats about the internal heap usage such as:
+## - Max memory usage since initialization of the heap
+## - Total allocated memory since initialization of the heap
+## - Total freed memory since initialization of the heap
+##
+## ⚠️ Note: Enabling this feature will require extra computation every time alloc/dealloc is called.
+internal-heap-stats = []

esp-alloc/README.md

@@ -0,0 +1,26 @@
+# esp-alloc
+
+[![Crates.io](https://img.shields.io/crates/v/esp-alloc?labelColor=1C2C2E&color=C96329&logo=Rust&style=flat-square)](https://crates.io/crates/esp-alloc)
+[![docs.rs](https://img.shields.io/docsrs/esp-alloc?labelColor=1C2C2E&color=C96329&logo=rust&style=flat-square)](https://docs.rs/esp-alloc)
+![MSRV](https://img.shields.io/badge/MSRV-1.68-blue?labelColor=1C2C2E&style=flat-square)
+![Crates.io](https://img.shields.io/crates/l/esp-alloc?labelColor=1C2C2E&style=flat-square)
+[![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&labelColor=1C2C2E&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
+
+A simple `no_std` heap allocator for RISC-V and Xtensa processors from Espressif. Supports all currently available ESP32 devices.
+
+**NOTE:** using this as your global allocator requires using Rust 1.68 or greater, or the `nightly` release channel.
+
+## License
+
+Licensed under either of:
+
+- Apache License, Version 2.0 ([LICENSE-APACHE](../LICENSE-APACHE) or http://www.apache.org/licenses/LICENSE-2.0)
+- MIT license ([LICENSE-MIT](../LICENSE-MIT) or http://opensource.org/licenses/MIT)
+
+at your option.
+
+### Contribution
+
+Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in
+the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without
+any additional terms or conditions.

esp-alloc/src/lib.rs

@@ -0,0 +1,589 @@
+//! A `no_std` heap allocator for RISC-V and Xtensa processors from
+//! Espressif. Supports all currently available ESP32 devices.
+//!
+//! **NOTE:** using this as your global allocator requires using Rust 1.68 or
+//! greater, or the `nightly` release channel.
+//!
+//! # Using this as your Global Allocator
+//!
+//! ```rust
+//! use esp_alloc as _;
+//!
+//! fn init_heap() {
+//!     const HEAP_SIZE: usize = 32 * 1024;
+//!     static mut HEAP: MaybeUninit<[u8; HEAP_SIZE]> = MaybeUninit::uninit();
+//!
+//!     unsafe {
+//!         esp_alloc::HEAP.add_region(esp_alloc::HeapRegion::new(
+//!             HEAP.as_mut_ptr() as *mut u8,
+//!             HEAP_SIZE,
+//!             esp_alloc::MemoryCapability::Internal.into(),
+//!         ));
+//!     }
+//! }
+//! ```
+//!
+//! # Using this with the nightly `allocator_api`-feature
+//! Sometimes you want to have more control over allocations.
+//!
+//! For that, it's convenient to use the nightly `allocator_api`-feature,
+//! which allows you to specify an allocator for single allocations.
+//!
+//! **NOTE:** To use this, you have to enable the crate's `nightly` feature
+//! flag.
+//!
+//! Create and initialize an allocator to use in single allocations:
+//! ```rust
+//! static PSRAM_ALLOCATOR: esp_alloc::EspHeap = esp_alloc::EspHeap::empty();
+//!
+//! fn init_psram_heap() {
+//!     unsafe {
+//!         PSRAM_ALLOCATOR.add_region(esp_alloc::HeapRegion::new(
+//!             psram::psram_vaddr_start() as *mut u8,
+//!             psram::PSRAM_BYTES,
+//!             esp_alloc::MemoryCapability::Internal.into(),
+//!         ));
+//!     }
+//! }
+//! ```
+//!
+//! And then use it in an allocation:
+//! ```rust
+//! let large_buffer: Vec<u8, _> = Vec::with_capacity_in(1048576, &PSRAM_ALLOCATOR);
+//! ```
+//!
+//! You can also get stats about the heap usage at anytime with:
+//! ```rust
+//! let stats: HeapStats = esp_alloc::HEAP.stats();
+//! // HeapStats implements the Display and defmt::Format traits, so you can pretty-print the heap stats.
+//! println!("{}", stats);
+//! ```
+//!
+//! ```txt
+//! HEAP INFO
+//! Size: 131068
+//! Current usage: 46148
+//! Max usage: 46148
+//! Total freed: 0
+//! Total allocated: 46148
+//! Memory Layout:
+//! Internal | ████████████░░░░░░░░░░░░░░░░░░░░░░░ | Used: 35% (Used 46148 of 131068, free: 84920)
+//! Unused   | ░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░ |
+//! Unused   | ░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░ |
+//! ```
+//! ## Feature Flags
+#![doc = document_features::document_features!()]
+#![no_std]
+#![cfg_attr(feature = "nightly", feature(allocator_api))]
+#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
+
+mod macros;
+
+#[cfg(feature = "nightly")]
+use core::alloc::{AllocError, Allocator};
+use core::{
+    alloc::{GlobalAlloc, Layout},
+    cell::RefCell,
+    fmt::Display,
+    ptr::{self, NonNull},
+};
+
+use critical_section::Mutex;
+use enumset::{EnumSet, EnumSetType};
+use linked_list_allocator::Heap;
+
+/// The global allocator instance
+#[global_allocator]
+pub static HEAP: EspHeap = EspHeap::empty();
+
+const NON_REGION: Option<HeapRegion> = None;
+
+const BAR_WIDTH: usize = 35;
+
+fn write_bar(f: &mut core::fmt::Formatter<'_>, usage_percent: usize) -> core::fmt::Result {
+    let used_blocks = BAR_WIDTH * usage_percent / 100;
+    (0..used_blocks).try_for_each(|_| write!(f, "█"))?;
+    (used_blocks..BAR_WIDTH).try_for_each(|_| write!(f, "░"))
+}
+
+#[cfg(feature = "defmt")]
+fn write_bar_defmt(fmt: defmt::Formatter, usage_percent: usize) {
+    let used_blocks = BAR_WIDTH * usage_percent / 100;
+    (0..used_blocks).for_each(|_| defmt::write!(fmt, "█"));
+    (used_blocks..BAR_WIDTH).for_each(|_| defmt::write!(fmt, "░"));
+}
+
+#[derive(EnumSetType, Debug)]
+/// Describes the properties of a memory region
+pub enum MemoryCapability {
+    /// Memory must be internal; specifically it should not disappear when
+    /// flash/spiram cache is switched off
+    Internal,
+    /// Memory must be in SPI RAM
+    External,
+}
+
+/// Stats for a heap region
+#[derive(Debug)]
+pub struct RegionStats {
+    /// Total usable size of the heap region in bytes.
+    size: usize,
+
+    /// Currently used size of the heap region in bytes.
+    used: usize,
+
+    /// Free size of the heap region in bytes.
+    free: usize,
+
+    /// Capabilities of the memory region.
+    capabilities: EnumSet<MemoryCapability>,
+}
+
+impl Display for RegionStats {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        let usage_percent = self.used * 100 / self.size;
+
+        // Display Memory type
+        if self.capabilities.contains(MemoryCapability::Internal) {
+            write!(f, "Internal")?;
+        } else if self.capabilities.contains(MemoryCapability::External) {
+            write!(f, "External")?;
+        } else {
+            write!(f, "Unknown")?;
+        }
+
+        write!(f, " | ")?;
+
+        write_bar(f, usage_percent)?;
+
+        write!(
+            f,
+            " | Used: {}% (Used {} of {}, free: {})",
+            usage_percent, self.used, self.size, self.free
+        )
+    }
+}
+
+#[cfg(feature = "defmt")]
+impl defmt::Format for RegionStats {
+    fn format(&self, fmt: defmt::Formatter) {
+        let usage_percent = self.used * 100 / self.size;
+
+        if self.capabilities.contains(MemoryCapability::Internal) {
+            defmt::write!(fmt, "Internal");
+        } else if self.capabilities.contains(MemoryCapability::External) {
+            defmt::write!(fmt, "External");
+        } else {
+            defmt::write!(fmt, "Unknown");
+        }
+
+        defmt::write!(fmt, " | ");
+
+        write_bar_defmt(fmt, usage_percent);
+
+        defmt::write!(
+            fmt,
+            " | Used: {}% (Used {} of {}, free: {})",
+            usage_percent,
+            self.used,
+            self.size,
+            self.free
+        );
+    }
+}
+
+/// A memory region to be used as heap memory
+pub struct HeapRegion {
+    heap: Heap,
+    capabilities: EnumSet<MemoryCapability>,
+}
+
+impl HeapRegion {
+    /// Create a new [HeapRegion] with the given capabilities
+    ///
+    /// # Safety
+    ///
+    /// - The supplied memory region must be available for the entire program
+    ///   (`'static`).
+    /// - The supplied memory region must be exclusively available to the heap
+    ///   only, no aliasing.
+    /// - `size > 0`.
+    pub unsafe fn new(
+        heap_bottom: *mut u8,
+        size: usize,
+        capabilities: EnumSet<MemoryCapability>,
+    ) -> Self {
+        let mut heap = Heap::empty();
+        heap.init(heap_bottom, size);
+
+        Self { heap, capabilities }
+    }
+
+    /// Return stats for the current memory region
+    pub fn stats(&self) -> RegionStats {
+        RegionStats {
+            size: self.heap.size(),
+            used: self.heap.used(),
+            free: self.heap.free(),
+            capabilities: self.capabilities,
+        }
+    }
+}
+
+/// Stats for a heap allocator
+///
+/// Enable the "internal-heap-stats" feature if you want collect additional heap
+/// informations at the cost of extra cpu time during every alloc/dealloc.
+#[derive(Debug)]
+pub struct HeapStats {
+    /// Granular stats for all the configured memory regions.
+    region_stats: [Option<RegionStats>; 3],
+
+    /// Total size of all combined heap regions in bytes.
+    size: usize,
+
+    /// Current usage of the heap across all configured regions in bytes.
+    current_usage: usize,
+
+    /// Estimation of the max used heap in bytes.
+    #[cfg(feature = "internal-heap-stats")]
+    max_usage: usize,
+
+    /// Estimation of the total allocated bytes since initialization.
+    #[cfg(feature = "internal-heap-stats")]
+    total_allocated: usize,
+
+    /// Estimation of the total freed bytes since initialization.
+    #[cfg(feature = "internal-heap-stats")]
+    total_freed: usize,
+}
+
+impl Display for HeapStats {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        writeln!(f, "HEAP INFO")?;
+        writeln!(f, "Size: {}", self.size)?;
+        writeln!(f, "Current usage: {}", self.current_usage)?;
+        #[cfg(feature = "internal-heap-stats")]
+        {
+            writeln!(f, "Max usage: {}", self.max_usage)?;
+            writeln!(f, "Total freed: {}", self.total_freed)?;
+            writeln!(f, "Total allocated: {}", self.total_allocated)?;
+        }
+        writeln!(f, "Memory Layout: ")?;
+        for region in self.region_stats.iter() {
+            if let Some(region) = region.as_ref() {
+                region.fmt(f)?;
+                writeln!(f)?;
+            } else {
+                // Display unused memory regions
+                write!(f, "Unused   | ")?;
+                write_bar(f, 0)?;
+                writeln!(f, " |")?;
+            }
+        }
+        Ok(())
+    }
+}
+
+#[cfg(feature = "defmt")]
+impl defmt::Format for HeapStats {
+    fn format(&self, fmt: defmt::Formatter) {
+        defmt::write!(fmt, "HEAP INFO\n");
+        defmt::write!(fmt, "Size: {}\n", self.size);
+        defmt::write!(fmt, "Current usage: {}\n", self.current_usage);
+        #[cfg(feature = "internal-heap-stats")]
+        {
+            defmt::write!(fmt, "Max usage: {}\n", self.max_usage);
+            defmt::write!(fmt, "Total freed: {}\n", self.total_freed);
+            defmt::write!(fmt, "Total allocated: {}\n", self.total_allocated);
+        }
+        defmt::write!(fmt, "Memory Layout:\n");
+        for region in self.region_stats.iter() {
+            if let Some(region) = region.as_ref() {
+                defmt::write!(fmt, "{}\n", region);
+            } else {
+                defmt::write!(fmt, "Unused   | ");
+                write_bar_defmt(fmt, 0);
+                defmt::write!(fmt, " |\n");
+            }
+        }
+    }
+}
+
+/// Internal stats to keep track across multiple regions.
+#[cfg(feature = "internal-heap-stats")]
+struct InternalHeapStats {
+    max_usage: usize,
+    total_allocated: usize,
+    total_freed: usize,
+}
+
+/// A memory allocator
+///
+/// In addition to what Rust's memory allocator can do it allows to allocate
+/// memory in regions satisfying specific needs.
+pub struct EspHeap {
+    heap: Mutex<RefCell<[Option<HeapRegion>; 3]>>,
+    #[cfg(feature = "internal-heap-stats")]
+    internal_heap_stats: Mutex<RefCell<InternalHeapStats>>,
+}
+
+impl EspHeap {
+    /// Crate a new UNINITIALIZED heap allocator
+    pub const fn empty() -> Self {
+        EspHeap {
+            heap: Mutex::new(RefCell::new([NON_REGION; 3])),
+            #[cfg(feature = "internal-heap-stats")]
+            internal_heap_stats: Mutex::new(RefCell::new(InternalHeapStats {
+                max_usage: 0,
+                total_allocated: 0,
+                total_freed: 0,
+            })),
+        }
+    }
+
+    /// Add a memory region to the heap
+    ///
+    /// `heap_bottom` is a pointer to the location of the bottom of the heap.
+    ///
+    /// `size` is the size of the heap in bytes.
+    ///
+    /// You can add up to three regions per allocator.
+    ///
+    /// Note that:
+    ///
+    /// - Memory is allocated from the first suitable memory region first
+    ///
+    /// - The heap grows "upwards", towards larger addresses. Thus `end_addr`
+    ///   must be larger than `start_addr`
+    ///
+    /// - The size of the heap is `(end_addr as usize) - (start_addr as usize)`.
+    ///   The allocator won't use the byte at `end_addr`.
+    ///
+    /// # Safety
+    ///
+    /// - The supplied memory region must be available for the entire program (a
+    ///   `'static` lifetime).
+    /// - The supplied memory region must be exclusively available to the heap
+    ///   only, no aliasing.
+    /// - `size > 0`.
+    pub unsafe fn add_region(&self, region: HeapRegion) {
+        critical_section::with(|cs| {
+            let mut regions = self.heap.borrow_ref_mut(cs);
+            let free = regions
+                .iter()
+                .enumerate()
+                .find(|v| v.1.is_none())
+                .map(|v| v.0);
+
+            if let Some(free) = free {
+                regions[free] = Some(region);
+            } else {
+                panic!(
+                    "Exceeded the maximum of {} heap memory regions",
+                    regions.len()
+                );
+            }
+        });
+    }
+
+    /// Returns an estimate of the amount of bytes in use in all memory regions.
+    pub fn used(&self) -> usize {
+        critical_section::with(|cs| {
+            let regions = self.heap.borrow_ref(cs);
+            let mut used = 0;
+            for region in regions.iter() {
+                if let Some(region) = region.as_ref() {
+                    used += region.heap.used();
+                }
+            }
+            used
+        })
+    }
+
+    /// Return usage stats for the [Heap].
+    ///
+    /// Note:
+    /// [HeapStats] directly implements [Display], so this function can be
+    /// called from within `println!()` to pretty-print the usage of the
+    /// heap.
+    pub fn stats(&self) -> HeapStats {
+        const EMPTY_REGION_STAT: Option<RegionStats> = None;
+        let mut region_stats: [Option<RegionStats>; 3] = [EMPTY_REGION_STAT; 3];
+
+        critical_section::with(|cs| {
+            let mut used = 0;
+            let mut free = 0;
+            let regions = self.heap.borrow_ref(cs);
+            for (id, region) in regions.iter().enumerate() {
+                if let Some(region) = region.as_ref() {
+                    let stats = region.stats();
+                    free += stats.free;
+                    used += stats.used;
+                    region_stats[id] = Some(region.stats());
+                }
+            }
+
+            cfg_if::cfg_if! {
+                if #[cfg(feature = "internal-heap-stats")] {
+                    let internal_heap_stats = self.internal_heap_stats.borrow_ref(cs);
+                    HeapStats {
+                        region_stats,
+                        size: free + used,
+                        current_usage: used,
+                        max_usage: internal_heap_stats.max_usage,
+                        total_allocated: internal_heap_stats.total_allocated,
+                        total_freed: internal_heap_stats.total_freed,
+                    }
+                } else {
+                    HeapStats {
+                        region_stats,
+                        size: free + used,
+                        current_usage: used,
+                    }
+                }
+            }
+        })
+    }
+
+    /// Returns an estimate of the amount of bytes available.
+    pub fn free(&self) -> usize {
+        self.free_caps(EnumSet::empty())
+    }
+
+    /// The free heap satisfying the given requirements
+    pub fn free_caps(&self, capabilities: EnumSet<MemoryCapability>) -> usize {
+        critical_section::with(|cs| {
+            let regions = self.heap.borrow_ref(cs);
+            let mut free = 0;
+            for region in regions.iter().filter(|region| {
+                if region.is_some() {
+                    region
+                        .as_ref()
+                        .unwrap()
+                        .capabilities
+                        .is_superset(capabilities)
+                } else {
+                    false
+                }
+            }) {
+                if let Some(region) = region.as_ref() {
+                    free += region.heap.free();
+                }
+            }
+            free
+        })
+    }
+
+    /// Allocate memory in a region satisfying the given requirements.
+    ///
+    /// # Safety
+    ///
+    /// This function is unsafe because undefined behavior can result
+    /// if the caller does not ensure that `layout` has non-zero size.
+    ///
+    /// The allocated block of memory may or may not be initialized.
+    pub unsafe fn alloc_caps(
+        &self,
+        capabilities: EnumSet<MemoryCapability>,
+        layout: Layout,
+    ) -> *mut u8 {
+        critical_section::with(|cs| {
+            #[cfg(feature = "internal-heap-stats")]
+            let before = self.used();
+            let mut regions = self.heap.borrow_ref_mut(cs);
+            let mut iter = (*regions).iter_mut().filter(|region| {
+                if region.is_some() {
+                    region
+                        .as_ref()
+                        .unwrap()
+                        .capabilities
+                        .is_superset(capabilities)
+                } else {
+                    false
+                }
+            });
+
+            let res = loop {
+                if let Some(Some(region)) = iter.next() {
+                    let res = region.heap.allocate_first_fit(layout);
+                    if let Ok(res) = res {
+                        break Some(res);
+                    }
+                } else {
+                    break None;
+                }
+            };
+
+            res.map_or(ptr::null_mut(), |allocation| {
+                #[cfg(feature = "internal-heap-stats")]
+                {
+                    let mut internal_heap_stats = self.internal_heap_stats.borrow_ref_mut(cs);
+                    drop(regions);
+                    // We need to call used because [linked_list_allocator::Heap] does internal size
+                    // alignment so we cannot use the size provided by the layout.
+                    let used = self.used();
+
+                    internal_heap_stats.total_allocated += used - before;
+                    internal_heap_stats.max_usage =
+                        core::cmp::max(internal_heap_stats.max_usage, used);
+                }
+
+                allocation.as_ptr()
+            })
+        })
+    }
+}
+
+unsafe impl GlobalAlloc for EspHeap {
+    unsafe fn alloc(&self, layout: Layout) -> *mut u8 {
+        self.alloc_caps(EnumSet::empty(), layout)
+    }
+
+    unsafe fn dealloc(&self, ptr: *mut u8, layout: Layout) {
+        if ptr.is_null() {
+            return;
+        }
+
+        critical_section::with(|cs| {
+            #[cfg(feature = "internal-heap-stats")]
+            let before = self.used();
+            let mut regions = self.heap.borrow_ref_mut(cs);
+            let mut iter = (*regions).iter_mut();
+
+            while let Some(Some(region)) = iter.next() {
+                if region.heap.bottom() <= ptr && region.heap.top() >= ptr {
+                    region.heap.deallocate(NonNull::new_unchecked(ptr), layout);
+                }
+            }
+
+            #[cfg(feature = "internal-heap-stats")]
+            {
+                let mut internal_heap_stats = self.internal_heap_stats.borrow_ref_mut(cs);
+                drop(regions);
+                // We need to call `used()` because [linked_list_allocator::Heap] does internal
+                // size alignment so we cannot use the size provided by the
+                // layout.
+                internal_heap_stats.total_freed += before - self.used();
+            }
+        })
+    }
+}
+
+#[cfg(feature = "nightly")]
+unsafe impl Allocator for EspHeap {
+    fn allocate(&self, layout: Layout) -> Result<NonNull<[u8]>, AllocError> {
+        let raw_ptr = unsafe { self.alloc(layout) };
+
+        if raw_ptr.is_null() {
+            return Err(AllocError);
+        }
+
+        let ptr = NonNull::new(raw_ptr).ok_or(AllocError)?;
+        Ok(NonNull::slice_from_raw_parts(ptr, layout.size()))
+    }
+
+    unsafe fn deallocate(&self, ptr: NonNull<u8>, layout: Layout) {
+        self.dealloc(ptr.as_ptr(), layout);
+    }
+}

esp-alloc/src/macros.rs

@@ -0,0 +1,43 @@
+//! Macros provided for convenience
+
+/// Initialize a global heap allocator providing a heap of the given size in
+/// bytes
+#[macro_export]
+macro_rules! heap_allocator {
+    ($size:expr) => {{
+        static mut HEAP: core::mem::MaybeUninit<[u8; $size]> = core::mem::MaybeUninit::uninit();
+
+        unsafe {
+            $crate::HEAP.add_region($crate::HeapRegion::new(
+                HEAP.as_mut_ptr() as *mut u8,
+                $size,
+                $crate::MemoryCapability::Internal.into(),
+            ));
+        }
+    }};
+}
+
+/// Initialize a global heap allocator backed by PSRAM
+///
+/// You need a SoC which supports PSRAM
+/// and activate the feature to enable it. You need to pass the PSRAM peripheral
+/// and the psram module path.
+///
+/// # Usage
+/// ```rust, no_run
+/// esp_alloc::psram_allocator!(peripherals.PSRAM, hal::psram);
+/// ```
+#[macro_export]
+macro_rules! psram_allocator {
+    ($peripheral:expr, $psram_module:path) => {{
+        use $psram_module as _psram;
+        let (start, size) = _psram::psram_raw_parts(&$peripheral);
+        unsafe {
+            $crate::HEAP.add_region($crate::HeapRegion::new(
+                start,
+                size,
+                $crate::MemoryCapability::External.into(),
+            ));
+        }
+    }};
+}

esp-backtrace/CHANGELOG.md

@@ -0,0 +1,63 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## [Unreleased]
+
+### Added
+
+### Changed
+
+### Fixed
+
+### Removed
+
+## 0.14.2 - 2024-10-10
+
+### Fixed
+
+- Fix build when not using `panic-handler` (#2257)
+
+## 0.14.1 - 2024-09-06
+
+### Added
+
+### Changed
+
+- Print a more helpful message in case of a `Cp0Disabled` exception (#2061)
+
+### Fixed
+
+### Removed
+
+## 0.14.0 - 2024-08-29
+
+### Added
+
+- Add custom-pre-backtrace feature (#1822)
+
+### Changed
+
+- Improve panic message printing (#1823)
+
+## 0.13.0 - 2024-07-16
+
+No changes - published to avoid conflicts with `esp-println`
+
+## 0.12.2 - 2024-07-15
+
+### Changed
+
+- Remove build script check for `nightly-2024-06-12` (#1788)
+
+## 0.12.1 - 2024-06-19
+
+### Fixed
+
+- Fix compilation for nightly after 2024-06-12. (#1681)
+- Only prints float registers on targets which have them. (#1690)
+
+[Unreleased]: https://github.com/esp-rs/esp-hal/commits/main/esp-backtrace?since=2024-10-10

esp-backtrace/Cargo.toml

@@ -0,0 +1,55 @@
+[package]
+name         = "esp-backtrace"
+version      = "0.14.2"
+edition      = "2021"
+rust-version = "1.76.0"
+description  = "Bare-metal backtrace support for Espressif devices"
+keywords     = ["backtrace", "embedded", "esp32", "espressif"]
+categories   = ["embedded", "hardware-support", "no-std"]
+repository   = "https://github.com/esp-rs/esp-hal"
+license      = "MIT OR Apache-2.0"
+
+[package.metadata.docs.rs]
+default-target = "riscv32imc-unknown-none-elf"
+features       = ["esp32c3", "panic-handler", "exception-handler", "println", "esp-println/uart"]
+
+[dependencies]
+defmt       = { version = "0.3.8",  optional = true }
+esp-println = { version = "0.12.0", optional = true, default-features = false, path = "../esp-println" }
+semihosting = { version = "0.1.15", optional = true }
+
+[build-dependencies]
+esp-build = { version = "0.1.0", path = "../esp-build" }
+
+[features]
+default = ["colors"]
+
+# You must enable exactly one of the below features to support the correct chip:
+esp32   = ["esp-println?/esp32", "semihosting?/openocd-semihosting", "print-float-registers"]
+esp32c2 = ["esp-println?/esp32c2"]
+esp32c3 = ["esp-println?/esp32c3"]
+esp32c6 = ["esp-println?/esp32c6"]
+esp32h2 = ["esp-println?/esp32h2"]
+esp32p4 = ["esp-println?/esp32p4"]
+esp32s2 = ["esp-println?/esp32s2", "semihosting?/openocd-semihosting"]
+esp32s3 = ["esp-println?/esp32s3", "semihosting?/openocd-semihosting", "print-float-registers"]
+
+# Use esp-println
+println = ["dep:esp-println"]
+
+# Use defmt
+defmt = ["dep:defmt"]
+
+print-float-registers = [] # TODO support esp32p4
+
+# You may optionally enable one or more of the below features to provide
+# additional functionality:
+colors               = []
+custom-halt          = []
+custom-pre-backtrace = []
+exception-handler    = []
+halt-cores           = []
+panic-handler        = []
+
+[lints.rust]
+unexpected_cfgs = "allow"

esp-backtrace/README.md

@@ -0,0 +1,60 @@
+# esp-backtrace - backtrace for ESP32 bare-metal
+
+[![Crates.io](https://img.shields.io/crates/v/esp-backtrace?labelColor=1C2C2E&color=C96329&logo=Rust&style=flat-square)](https://crates.io/crates/esp-backtrace)
+[![docs.rs](https://img.shields.io/docsrs/esp-backtrace?labelColor=1C2C2E&color=C96329&logo=rust&style=flat-square)](https://docs.rs/esp-backtrace)
+![MSRV](https://img.shields.io/badge/MSRV-1.76-blue?labelColor=1C2C2E&style=flat-square)
+![Crates.io](https://img.shields.io/crates/l/esp-backtrace?labelColor=1C2C2E&style=flat-square)
+[![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&labelColor=1C2C2E&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
+
+Supports the ESP32, ESP32-C2/C3/C6, ESP32-H2, ESP32-P4, and ESP32-S2/S3. Optional exception and panic handlers are included, both of which can be enabled via their respective features.
+
+Please note that when targeting a RISC-V device, you **need** to force frame pointers (i.e. `"-C", "force-frame-pointers",` in your `.cargo/config.toml`); this is **not** required for Xtensa.
+
+You can get an array of backtrace addresses (currently limited to 10) via `arch::backtrace()` if
+you want to create a backtrace yourself (i.e. not using the panic or exception handler).
+
+When using the panic and/or exception handler make sure to include `use esp_backtrace as _;`.
+
+## Features
+
+| Feature              | Description                                                                                                        |
+|----------------------|--------------------------------------------------------------------------------------------------------------------|
+| esp32                | Target ESP32                                                                                                       |
+| esp32c2              | Target ESP32-C2                                                                                                    |
+| esp32c3              | Target ESP32-C3                                                                                                    |
+| esp32c6              | Target ESP32-C6                                                                                                    |
+| esp32h2              | Target ESP32-H2                                                                                                    |
+| esp32p4              | Target ESP32-P4                                                                                                    |
+| esp32s2              | Target ESP32-S2                                                                                                    |
+| esp32s3              | Target ESP32-S3                                                                                                    |
+| panic-handler        | Include a panic handler, will add `esp-println` as a dependency                                                    |
+| exception-handler    | Include an exception handler, will add `esp-println` as a dependency                                               |
+| println              | Use `esp-println` to print messages                                                                                |
+| defmt                | Use `defmt` logging to print messages\* (check [example](https://github.com/playfulFence/backtrace-defmt-example)) |
+| colors               | Print messages in red\*                                                                                            |
+| halt-cores           | Halt both CPUs on ESP32 / ESP32-S3 instead of doing a `loop {}` in case of a panic or exception                    |
+| semihosting          | Call `semihosting::process::abort()` on panic.                                                                     |
+| custom-halt          | Invoke the extern function `custom_halt()` instead of doing a `loop {}` in case of a panic or exception            |
+| custom-pre-backtrace | Invoke the extern function `custom_pre_backtrace()` before handling a panic or exception                           |
+
+\* _only used for panic and exception handlers_
+
+### `defmt` Feature
+
+Please note that `defmt` does _not_ provide MSRV guarantees with releases, and as such we are not able to make any MSRV guarantees when this feature is enabled. For more information refer to the MSRV section of `defmt`'s README:
+https://github.com/knurling-rs/defmt?tab=readme-ov-file#msrv
+
+## License
+
+Licensed under either of:
+
+- Apache License, Version 2.0 ([LICENSE-APACHE](../LICENSE-APACHE) or http://www.apache.org/licenses/LICENSE-2.0)
+- MIT license ([LICENSE-MIT](../LICENSE-MIT) or http://opensource.org/licenses/MIT)
+
+at your option.
+
+### Contribution
+
+Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in
+the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without
+any additional terms or conditions.

esp-backtrace/build.rs

@@ -0,0 +1,15 @@
+use esp_build::assert_unique_used_features;
+
+fn main() {
+    // Ensure that only a single chip is specified:
+    assert_unique_used_features!(
+        "esp32", "esp32c2", "esp32c3", "esp32c6", "esp32h2", "esp32p4", "esp32s2", "esp32s3"
+    );
+
+    // Ensure that exactly a backend is selected:
+    assert_unique_used_features!("defmt", "println");
+
+    if cfg!(feature = "custom-halt") && cfg!(feature = "halt-cores") {
+        panic!("Only one of `custom-halt` and `halt-cores` can be enabled");
+    }
+}

esp-backtrace/src/lib.rs

@@ -0,0 +1,341 @@
+#![allow(rustdoc::bare_urls, unused_macros)]
+#![cfg_attr(target_arch = "xtensa", feature(asm_experimental_arch))]
+#![doc = include_str!("../README.md")]
+#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
+#![no_std]
+
+#[cfg(feature = "defmt")]
+use defmt as _;
+#[cfg(feature = "println")]
+use esp_println as _;
+
+const MAX_BACKTRACE_ADDRESSES: usize = 10;
+
+#[cfg(feature = "colors")]
+const RESET: &str = "\u{001B}[0m";
+#[cfg(feature = "colors")]
+const RED: &str = "\u{001B}[31m";
+
+#[cfg(feature = "defmt")]
+macro_rules! println {
+    ("") => {
+        // Do nothing if the string is just a space
+    };
+    ($($arg:tt)*) => {
+        defmt::error!($($arg)*);
+    };
+}
+
+#[cfg(all(feature = "println", not(feature = "defmt")))]
+macro_rules! println {
+    ($($arg:tt)*) => {
+        esp_println::println!($($arg)*);
+    };
+}
+
+#[allow(unused, unused_variables)]
+fn set_color_code(code: &str) {
+    #[cfg(feature = "println")]
+    {
+        println!("{}", code);
+    }
+}
+
+#[cfg_attr(target_arch = "riscv32", path = "riscv.rs")]
+#[cfg_attr(target_arch = "xtensa", path = "xtensa.rs")]
+pub mod arch;
+
+#[cfg(feature = "panic-handler")]
+#[panic_handler]
+fn panic_handler(info: &core::panic::PanicInfo) -> ! {
+    pre_backtrace();
+
+    #[cfg(feature = "colors")]
+    set_color_code(RED);
+
+    println!("");
+    println!("====================== PANIC ======================");
+
+    #[cfg(not(feature = "defmt"))]
+    println!("{}", info);
+
+    #[cfg(feature = "defmt")]
+    println!("{}", defmt::Display2Format(info));
+
+    println!("");
+    println!("Backtrace:");
+    println!("");
+
+    let backtrace = crate::arch::backtrace();
+    #[cfg(target_arch = "riscv32")]
+    if backtrace.iter().filter(|e| e.is_some()).count() == 0 {
+        println!("No backtrace available - make sure to force frame-pointers. (see https://crates.io/crates/esp-backtrace)");
+    }
+    for addr in backtrace.into_iter().flatten() {
+        #[cfg(all(feature = "colors", feature = "println"))]
+        println!("{}0x{:x}", RED, addr - crate::arch::RA_OFFSET);
+
+        #[cfg(not(all(feature = "colors", feature = "println")))]
+        println!("0x{:x}", addr - crate::arch::RA_OFFSET);
+    }
+
+    #[cfg(feature = "colors")]
+    set_color_code(RESET);
+
+    #[cfg(feature = "semihosting")]
+    semihosting::process::abort();
+
+    #[cfg(not(feature = "semihosting"))]
+    halt();
+}
+
+#[cfg(all(feature = "exception-handler", target_arch = "xtensa"))]
+#[no_mangle]
+#[link_section = ".rwtext"]
+unsafe fn __user_exception(cause: arch::ExceptionCause, context: arch::Context) {
+    pre_backtrace();
+
+    #[cfg(feature = "colors")]
+    set_color_code(RED);
+
+    // Unfortunately, a different formatter string is used
+    #[cfg(not(feature = "defmt"))]
+    esp_println::println!("\n\nException occurred '{}'", cause);
+
+    #[cfg(feature = "defmt")]
+    defmt::error!("\n\nException occurred '{}'", cause);
+
+    println!("{:?}", context);
+
+    let backtrace = crate::arch::backtrace_internal(context.A1, 0);
+    for e in backtrace {
+        if let Some(addr) = e {
+            println!("0x{:x}", addr);
+        }
+    }
+    println!("");
+    println!("");
+    println!("");
+
+    #[cfg(feature = "colors")]
+    set_color_code(RESET);
+
+    #[cfg(feature = "semihosting")]
+    semihosting::process::abort();
+
+    #[cfg(not(feature = "semihosting"))]
+    halt();
+}
+
+#[cfg(all(feature = "exception-handler", target_arch = "riscv32"))]
+#[export_name = "ExceptionHandler"]
+fn exception_handler(context: &arch::TrapFrame) -> ! {
+    pre_backtrace();
+
+    let mepc = context.pc;
+    let code = context.mcause & 0xff;
+    let mtval = context.mtval;
+
+    #[cfg(feature = "colors")]
+    set_color_code(RED);
+
+    if code == 14 {
+        println!("");
+        println!(
+            "Stack overflow detected at 0x{:x} called by 0x{:x}",
+            mepc, context.ra
+        );
+        println!("");
+    } else {
+        let code = match code {
+            0 => "Instruction address misaligned",
+            1 => "Instruction access fault",
+            2 => "Illegal instruction",
+            3 => "Breakpoint",
+            4 => "Load address misaligned",
+            5 => "Load access fault",
+            6 => "Store/AMO address misaligned",
+            7 => "Store/AMO access fault",
+            8 => "Environment call from U-mode",
+            9 => "Environment call from S-mode",
+            10 => "Reserved",
+            11 => "Environment call from M-mode",
+            12 => "Instruction page fault",
+            13 => "Load page fault",
+            14 => "Reserved",
+            15 => "Store/AMO page fault",
+            _ => "UNKNOWN",
+        };
+
+        println!(
+            "Exception '{}' mepc=0x{:08x}, mtval=0x{:08x}",
+            code, mepc, mtval
+        );
+        #[cfg(not(feature = "defmt"))]
+        println!("{:x?}", context);
+
+        #[cfg(feature = "defmt")]
+        println!("{:?}", context);
+
+        let backtrace = crate::arch::backtrace_internal(context.s0 as u32, 0);
+        if backtrace.iter().filter(|e| e.is_some()).count() == 0 {
+            println!("No backtrace available - make sure to force frame-pointers. (see https://crates.io/crates/esp-backtrace)");
+        }
+        for addr in backtrace.into_iter().flatten() {
+            #[cfg(all(feature = "colors", feature = "println"))]
+            println!("{}0x{:x}", RED, addr - crate::arch::RA_OFFSET);
+
+            #[cfg(not(all(feature = "colors", feature = "println")))]
+            println!("0x{:x}", addr - crate::arch::RA_OFFSET);
+        }
+    }
+
+    println!("");
+    println!("");
+    println!("");
+
+    #[cfg(feature = "colors")]
+    set_color_code(RESET);
+
+    #[cfg(feature = "semihosting")]
+    semihosting::process::abort();
+
+    #[cfg(not(feature = "semihosting"))]
+    halt();
+}
+
+// Ensure that the address is in DRAM and that it is 16-byte aligned.
+//
+// Based loosely on the `esp_stack_ptr_in_dram` function from
+// `components/esp_hw_support/include/esp_memory_utils.h` in ESP-IDF.
+//
+// Address ranges can be found in `components/soc/$CHIP/include/soc/soc.h` as
+// `SOC_DRAM_LOW` and `SOC_DRAM_HIGH`.
+fn is_valid_ram_address(address: u32) -> bool {
+    if (address & 0xF) != 0 {
+        return false;
+    }
+
+    #[cfg(feature = "esp32")]
+    if !(0x3FFA_E000..=0x4000_0000).contains(&address) {
+        return false;
+    }
+
+    #[cfg(feature = "esp32c2")]
+    if !(0x3FCA_0000..=0x3FCE_0000).contains(&address) {
+        return false;
+    }
+
+    #[cfg(feature = "esp32c3")]
+    if !(0x3FC8_0000..=0x3FCE_0000).contains(&address) {
+        return false;
+    }
+
+    #[cfg(feature = "esp32c6")]
+    if !(0x4080_0000..=0x4088_0000).contains(&address) {
+        return false;
+    }
+
+    #[cfg(feature = "esp32h2")]
+    if !(0x4080_0000..=0x4085_0000).contains(&address) {
+        return false;
+    }
+
+    #[cfg(feature = "esp32p4")]
+    if !(0x4FF0_0000..=0x4FFC_0000).contains(&address) {
+        return false;
+    }
+
+    #[cfg(feature = "esp32s2")]
+    if !(0x3FFB_0000..=0x4000_0000).contains(&address) {
+        return false;
+    }
+
+    #[cfg(feature = "esp32s3")]
+    if !(0x3FC8_8000..=0x3FD0_0000).contains(&address) {
+        return false;
+    }
+
+    true
+}
+
+#[cfg(all(
+    any(
+        not(any(feature = "esp32", feature = "esp32p4", feature = "esp32s3")),
+        not(feature = "halt-cores")
+    ),
+    not(feature = "custom-halt")
+))]
+#[allow(unused)]
+fn halt() -> ! {
+    loop {
+        continue;
+    }
+}
+
+#[cfg(feature = "custom-halt")]
+fn halt() -> ! {
+    extern "Rust" {
+        fn custom_halt() -> !;
+    }
+    unsafe { custom_halt() }
+}
+
+// TODO: Enable `halt` function for `esp32p4` feature once implemented
+#[cfg(all(any(feature = "esp32", feature = "esp32s3"), feature = "halt-cores"))]
+#[allow(unused)]
+fn halt() -> ! {
+    #[cfg(feature = "esp32")]
+    mod registers {
+        pub(crate) const OPTIONS0: u32 = 0x3ff48000;
+        pub(crate) const SW_CPU_STALL: u32 = 0x3ff480ac;
+    }
+
+    #[cfg(feature = "esp32p4")]
+    mod registers {
+        pub(crate) const SW_CPU_STALL: u32 = 0x50115200;
+    }
+
+    #[cfg(feature = "esp32s3")]
+    mod registers {
+        pub(crate) const OPTIONS0: u32 = 0x60008000;
+        pub(crate) const SW_CPU_STALL: u32 = 0x600080bc;
+    }
+
+    let sw_cpu_stall = registers::SW_CPU_STALL as *mut u32;
+
+    #[cfg(feature = "esp32p4")]
+    unsafe {}
+
+    #[cfg(not(feature = "esp32p4"))]
+    unsafe {
+        // We need to write the value "0x86" to stall a particular core. The write
+        // location is split into two separate bit fields named "c0" and "c1", and the
+        // two fields are located in different registers. Each core has its own pair of
+        // "c0" and "c1" bit fields.
+
+        let options0 = registers::OPTIONS0 as *mut u32;
+
+        options0.write_volatile(options0.read_volatile() & !(0b1111) | 0b1010);
+
+        sw_cpu_stall.write_volatile(
+            sw_cpu_stall.read_volatile() & !(0b111111 << 20) & !(0b111111 << 26)
+                | (0x21 << 20)
+                | (0x21 << 26),
+        );
+    }
+
+    loop {}
+}
+
+#[cfg(not(feature = "custom-pre-backtrace"))]
+#[allow(unused)]
+fn pre_backtrace() {}
+
+#[cfg(feature = "custom-pre-backtrace")]
+fn pre_backtrace() {
+    extern "Rust" {
+        fn custom_pre_backtrace();
+    }
+    unsafe { custom_pre_backtrace() }
+}

esp-backtrace/src/riscv.rs

@@ -0,0 +1,219 @@
+use core::arch::asm;
+
+use crate::MAX_BACKTRACE_ADDRESSES;
+
+// subtract 4 from the return address
+// the return address is the address following the JALR
+// we get better results (especially if the caller was the last instruction in
+// the calling function) if we report the address of the JALR itself
+// even if it was a C.JALR we should get good results using RA - 4
+#[allow(unused)]
+pub(super) const RA_OFFSET: usize = 4;
+
+/// Registers saved in trap handler
+#[doc(hidden)]
+#[derive(Default, Clone, Copy)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+#[repr(C)]
+#[cfg(feature = "exception-handler")]
+pub(crate) struct TrapFrame {
+    /// Return address, stores the address to return to after a function call or
+    /// interrupt.
+    pub ra: usize,
+    /// Temporary register t0, used for intermediate values.
+    pub t0: usize,
+    /// Temporary register t1, used for intermediate values.
+    pub t1: usize,
+    /// Temporary register t2, used for intermediate values.
+    pub t2: usize,
+    /// Temporary register t3, used for intermediate values.
+    pub t3: usize,
+    /// Temporary register t4, used for intermediate values.
+    pub t4: usize,
+    /// Temporary register t5, used for intermediate values.
+    pub t5: usize,
+    /// Temporary register t6, used for intermediate values.
+    pub t6: usize,
+    /// Argument register a0, typically used to pass the first argument to a
+    /// function.
+    pub a0: usize,
+    /// Argument register a1, typically used to pass the second argument to a
+    /// function.
+    pub a1: usize,
+    /// Argument register a2, typically used to pass the third argument to a
+    /// function.
+    pub a2: usize,
+    /// Argument register a3, typically used to pass the fourth argument to a
+    /// function.
+    pub a3: usize,
+    /// Argument register a4, typically used to pass the fifth argument to a
+    /// function.
+    pub a4: usize,
+    /// Argument register a5, typically used to pass the sixth argument to a
+    /// function.
+    pub a5: usize,
+    /// Argument register a6, typically used to pass the seventh argument to a
+    /// function.
+    pub a6: usize,
+    /// Argument register a7, typically used to pass the eighth argument to a
+    /// function.
+    pub a7: usize,
+    /// Saved register s0, used to hold values across function calls.
+    pub s0: usize,
+    /// Saved register s1, used to hold values across function calls.
+    pub s1: usize,
+    /// Saved register s2, used to hold values across function calls.
+    pub s2: usize,
+    /// Saved register s3, used to hold values across function calls.
+    pub s3: usize,
+    /// Saved register s4, used to hold values across function calls.
+    pub s4: usize,
+    /// Saved register s5, used to hold values across function calls.
+    pub s5: usize,
+    /// Saved register s6, used to hold values across function calls.
+    pub s6: usize,
+    /// Saved register s7, used to hold values across function calls.
+    pub s7: usize,
+    /// Saved register s8, used to hold values across function calls.
+    pub s8: usize,
+    /// Saved register s9, used to hold values across function calls.
+    pub s9: usize,
+    /// Saved register s10, used to hold values across function calls.
+    pub s10: usize,
+    /// Saved register s11, used to hold values across function calls.
+    pub s11: usize,
+    /// Global pointer register, holds the address of the global data area.
+    pub gp: usize,
+    /// Thread pointer register, holds the address of the thread-local storage
+    /// area.
+    pub tp: usize,
+    /// Stack pointer register, holds the address of the top of the stack.
+    pub sp: usize,
+    /// Program counter, stores the address of the next instruction to be
+    /// executed.
+    pub pc: usize,
+    /// Machine status register, holds the current status of the processor,
+    /// including interrupt enable bits and privilege mode.
+    pub mstatus: usize,
+    /// Machine cause register, contains the reason for the trap (e.g.,
+    /// exception or interrupt number).
+    pub mcause: usize,
+    /// Machine trap value register, contains additional information about the
+    /// trap (e.g., faulting address).
+    pub mtval: usize,
+}
+
+#[cfg(feature = "exception-handler")]
+impl core::fmt::Debug for TrapFrame {
+    fn fmt(&self, fmt: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> {
+        write!(
+            fmt,
+            "TrapFrame
+PC=0x{:08x}         RA/x1=0x{:08x}      SP/x2=0x{:08x}      GP/x3=0x{:08x}      TP/x4=0x{:08x}
+T0/x5=0x{:08x}      T1/x6=0x{:08x}      T2/x7=0x{:08x}      S0/FP/x8=0x{:08x}   S1/x9=0x{:08x}
+A0/x10=0x{:08x}     A1/x11=0x{:08x}     A2/x12=0x{:08x}     A3/x13=0x{:08x}     A4/x14=0x{:08x}
+A5/x15=0x{:08x}     A6/x16=0x{:08x}     A7/x17=0x{:08x}     S2/x18=0x{:08x}     S3/x19=0x{:08x}
+S4/x20=0x{:08x}     S5/x21=0x{:08x}     S6/x22=0x{:08x}     S7/x23=0x{:08x}     S8/x24=0x{:08x}
+S9/x25=0x{:08x}     S10/x26=0x{:08x}    S11/x27=0x{:08x}    T3/x28=0x{:08x}     T4/x29=0x{:08x}
+T5/x30=0x{:08x}     T6/x31=0x{:08x}
+
+MSTATUS=0x{:08x}
+MCAUSE=0x{:08x}
+MTVAL=0x{:08x}
+        ",
+            self.pc,
+            self.ra,
+            self.gp,
+            self.sp,
+            self.tp,
+            self.t0,
+            self.t1,
+            self.t2,
+            self.s0,
+            self.s1,
+            self.a0,
+            self.a1,
+            self.a2,
+            self.a3,
+            self.a4,
+            self.a5,
+            self.a6,
+            self.a7,
+            self.s2,
+            self.s3,
+            self.s4,
+            self.s5,
+            self.s6,
+            self.s7,
+            self.s8,
+            self.s9,
+            self.s10,
+            self.s11,
+            self.t3,
+            self.t4,
+            self.t5,
+            self.t6,
+            self.mstatus,
+            self.mcause,
+            self.mtval,
+        )
+    }
+}
+
+/// Get an array of backtrace addresses.
+///
+/// This needs `force-frame-pointers` enabled.
+pub fn backtrace() -> [Option<usize>; MAX_BACKTRACE_ADDRESSES] {
+    let fp = unsafe {
+        let mut _tmp: u32;
+        asm!("mv {0}, x8", out(reg) _tmp);
+        _tmp
+    };
+
+    backtrace_internal(fp, 2)
+}
+
+pub(crate) fn backtrace_internal(
+    fp: u32,
+    suppress: i32,
+) -> [Option<usize>; MAX_BACKTRACE_ADDRESSES] {
+    let mut result = [None; 10];
+    let mut index = 0;
+
+    let mut fp = fp;
+    let mut suppress = suppress;
+    let mut old_address = 0;
+    loop {
+        unsafe {
+            let address = (fp as *const u32).offset(-1).read_volatile(); // RA/PC
+            fp = (fp as *const u32).offset(-2).read_volatile(); // next FP
+
+            if old_address == address {
+                break;
+            }
+
+            old_address = address;
+
+            if address == 0 {
+                break;
+            }
+
+            if !crate::is_valid_ram_address(fp) {
+                break;
+            }
+
+            if suppress == 0 {
+                result[index] = Some(address as usize);
+                index += 1;
+
+                if index >= MAX_BACKTRACE_ADDRESSES {
+                    break;
+                }
+            } else {
+                suppress -= 1;
+            }
+        }
+    }
+
+    result
+}

esp-backtrace/src/xtensa.rs

@@ -0,0 +1,424 @@
+use core::{arch::asm, fmt::Display};
+
+use crate::MAX_BACKTRACE_ADDRESSES;
+
+// subtract 3 from the return address
+// the return address is the address following the callxN
+// we get better results (especially if the caller was the last function in the
+// calling function) if we report the address of callxN itself
+#[allow(unused)]
+pub(super) const RA_OFFSET: usize = 3;
+
+/// Exception Cause
+#[doc(hidden)]
+#[derive(Debug, Clone, Copy, PartialEq)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+#[repr(C)]
+pub enum ExceptionCause {
+    /// Illegal Instruction
+    IllegalInstruction             = 0,
+    /// System Call (Syscall Instruction)
+    Syscall                        = 1,
+    /// Instruction Fetch Error
+    InstrFetchError                = 2,
+    /// Load Store Error
+    LoadStoreError                 = 3,
+    /// Level 1 Interrupt
+    LevelOneInterrupt              = 4,
+    /// Stack Extension Assist (movsp Instruction) For Alloca
+    Alloca                         = 5,
+    /// Integer Divide By Zero
+    DivideByZero                   = 6,
+    /// Use Of Failed Speculative Access (Not Implemented)
+    NextPCValueIllegal             = 7,
+    /// Privileged Instruction
+    PrivilegedInstruction          = 8,
+    /// Unaligned Load Or Store
+    UnalignedLoadOrStore           = 9,
+    /// Reserved
+    ExternalRegisterPrivilegeError = 10,
+    /// Reserved
+    ExclusiveError                 = 11,
+    /// Pif Data Error On Instruction Fetch (Rb-200x And Later)
+    InstrDataError                 = 12,
+    /// Pif Data Error On Load Or Store (Rb-200x And Later)
+    LoadStoreDataError             = 13,
+    /// Pif Address Error On Instruction Fetch (Rb-200x And Later)
+    InstrAddrError                 = 14,
+    /// Pif Address Error On Load Or Store (Rb-200x And Later)
+    LoadStoreAddrError             = 15,
+    /// Itlb Miss (No Itlb Entry Matches, Hw Refill Also Missed)
+    ItlbMiss                       = 16,
+    /// Itlb Multihit (Multiple Itlb Entries Match)
+    ItlbMultiHit                   = 17,
+    /// Ring Privilege Violation On Instruction Fetch
+    InstrRing                      = 18,
+    /// Size Restriction On Ifetch (Not Implemented)
+    Reserved19                     = 19,
+    /// Cache Attribute Does Not Allow Instruction Fetch
+    InstrProhibited                = 20,
+    /// Reserved
+    Reserved21                     = 21,
+    /// Reserved
+    Reserved22                     = 22,
+    /// Reserved
+    Reserved23                     = 23,
+    /// Dtlb Miss (No Dtlb Entry Matches, Hw Refill Also Missed)
+    DtlbMiss                       = 24,
+    /// Dtlb Multihit (Multiple Dtlb Entries Match)
+    DtlbMultiHit                   = 25,
+    /// Ring Privilege Violation On Load Or Store
+    LoadStoreRing                  = 26,
+    /// Size Restriction On Load/Store (Not Implemented)
+    Reserved27                     = 27,
+    /// Cache Attribute Does Not Allow Load
+    LoadProhibited                 = 28,
+    /// Cache Attribute Does Not Allow Store
+    StoreProhibited                = 29,
+    /// Reserved
+    Reserved30                     = 30,
+    /// Reserved
+    Reserved31                     = 31,
+    /// Access To Coprocessor 0 When Disabled
+    Cp0Disabled                    = 32,
+    /// Access To Coprocessor 1 When Disabled
+    Cp1Disabled                    = 33,
+    /// Access To Coprocessor 2 When Disabled
+    Cp2Disabled                    = 34,
+    /// Access To Coprocessor 3 When Disabled
+    Cp3Disabled                    = 35,
+    /// Access To Coprocessor 4 When Disabled
+    Cp4Disabled                    = 36,
+    /// Access To Coprocessor 5 When Disabled
+    Cp5Disabled                    = 37,
+    /// Access To Coprocessor 6 When Disabled
+    Cp6Disabled                    = 38,
+    /// Access To Coprocessor 7 When Disabled
+    Cp7Disabled                    = 39,
+    /// None
+    None                           = 255,
+}
+
+impl Display for ExceptionCause {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        if *self == Self::Cp0Disabled {
+            write!(f, "Cp0Disabled (Access to the floating point coprocessor is not allowed. You may want to enable the `float-save-restore` feature of the `xtensa-lx-rt` crate.)")
+        } else {
+            write!(f, "{:?}", self)
+        }
+    }
+}
+
+#[doc(hidden)]
+#[allow(non_snake_case)]
+#[derive(Clone, Copy)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+#[repr(C)]
+pub struct Context {
+    /// Program counter, stores the address of the next instruction to be
+    /// executed.
+    pub PC: u32,
+    /// Processor status, holds various status flags for the CPU.
+    pub PS: u32,
+    /// General-purpose register A0 used for data storage and manipulation.
+    pub A0: u32,
+    /// General-purpose register A1 used for data storage and manipulation.
+    pub A1: u32,
+    /// General-purpose register A2 used for data storage and manipulation.
+    pub A2: u32,
+    /// General-purpose register A3 used for data storage and manipulation.
+    pub A3: u32,
+    /// General-purpose register A4 used for data storage and manipulation.
+    pub A4: u32,
+    /// General-purpose register A5 used for data storage and manipulation.
+    pub A5: u32,
+    /// General-purpose register A6 used for data storage and manipulation.
+    pub A6: u32,
+    /// General-purpose register A7 used for data storage and manipulation.
+    pub A7: u32,
+    /// General-purpose register A8 used for data storage and manipulation.
+    pub A8: u32,
+    /// General-purpose register A9 used for data storage and manipulation.
+    pub A9: u32,
+    /// General-purpose register A10 used for data storage and manipulation.
+    pub A10: u32,
+    /// General-purpose register A11 used for data storage and manipulation.
+    pub A11: u32,
+    /// General-purpose register A12 used for data storage and manipulation.
+    pub A12: u32,
+    /// General-purpose register A13 used for data storage and manipulation.
+    pub A13: u32,
+    /// General-purpose register A14 used for data storage and manipulation.
+    pub A14: u32,
+    /// General-purpose register A15 used for data storage and manipulation.
+    pub A15: u32,
+    /// Shift amount register, used for shift and rotate instructions.
+    pub SAR: u32,
+    /// Exception cause, indicates the reason for the last exception.
+    pub EXCCAUSE: u32,
+    /// Exception address, holds the address related to the exception.
+    pub EXCVADDR: u32,
+    /// Loop start address, used in loop instructions.
+    pub LBEG: u32,
+    /// Loop end address, used in loop instructions.
+    pub LEND: u32,
+    /// Loop counter, used to count iterations in loop instructions.
+    pub LCOUNT: u32,
+    /// Thread pointer, used for thread-local storage.
+    pub THREADPTR: u32,
+    /// Compare register, used for certain compare instructions.
+    pub SCOMPARE1: u32,
+    /// Break register, used for breakpoint-related operations.
+    pub BR: u32,
+    /// Accumulator low register, used for extended arithmetic operations.
+    pub ACCLO: u32,
+    /// Accumulator high register, used for extended arithmetic operations.
+    pub ACCHI: u32,
+    /// Additional register M0 used for special operations.
+    pub M0: u32,
+    /// Additional register M1 used for special operations.
+    pub M1: u32,
+    /// Additional register M2 used for special operations.
+    pub M2: u32,
+    /// Additional register M3 used for special operations.
+    pub M3: u32,
+    /// 64-bit floating-point register (low part), available if the
+    /// `print-float-registers` feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F64R_LO: u32,
+    /// 64-bit floating-point register (high part), available if the
+    /// `print-float-registers` feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F64R_HI: u32,
+    /// Floating-point status register, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F64S: u32,
+    /// Floating-point control register, available if the
+    /// `print-float-registers` feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub FCR: u32,
+    /// Floating-point status register, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub FSR: u32,
+    /// Floating-point register F0, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F0: u32,
+    /// Floating-point register F1, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F1: u32,
+    /// Floating-point register F2, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F2: u32,
+    /// Floating-point register F3, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F3: u32,
+    /// Floating-point register F4, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F4: u32,
+    /// Floating-point register F5, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F5: u32,
+    /// Floating-point register F6, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F6: u32,
+    /// Floating-point register F7, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F7: u32,
+    /// Floating-point register F8, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F8: u32,
+    /// Floating-point register F9, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F9: u32,
+    /// Floating-point register F10, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F10: u32,
+    /// Floating-point register F11, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F11: u32,
+    /// Floating-point register F12, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F12: u32,
+    /// Floating-point register F13, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F13: u32,
+    /// Floating-point register F14, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F14: u32,
+    /// Floating-point register F15, available if the `print-float-registers`
+    /// feature is enabled.
+    #[cfg(feature = "print-float-registers")]
+    pub F15: u32,
+}
+
+impl core::fmt::Debug for Context {
+    fn fmt(&self, fmt: &mut core::fmt::Formatter<'_>) -> Result<(), core::fmt::Error> {
+        write!(
+            fmt,
+            "Context
+PC=0x{:08x}       PS=0x{:08x}
+A0=0x{:08x}       A1=0x{:08x}       A2=0x{:08x}       A3=0x{:08x}       A4=0x{:08x}
+A5=0x{:08x}       A6=0x{:08x}       A7=0x{:08x}       A8=0x{:08x}       A9=0x{:08x}
+A10=0x{:08x}      A11=0x{:08x}      A12=0x{:08x}      A13=0x{:08x}      A14=0x{:08x}
+A15=0x{:08x}
+SAR={:08x}
+EXCCAUSE=0x{:08x} EXCVADDR=0x{:08x}
+LBEG=0x{:08x}     LEND=0x{:08x}     LCOUNT=0x{:08x}
+THREADPTR=0x{:08x}
+SCOMPARE1=0x{:08x}
+BR=0x{:08x}
+ACCLO=0x{:08x}    ACCHI=0x{:08x}
+M0=0x{:08x}       M1=0x{:08x}       M2=0x{:08x}       M3=0x{:08x}
+",
+            self.PC,
+            self.PS,
+            self.A0,
+            self.A1,
+            self.A2,
+            self.A3,
+            self.A4,
+            self.A5,
+            self.A6,
+            self.A7,
+            self.A8,
+            self.A9,
+            self.A10,
+            self.A11,
+            self.A12,
+            self.A13,
+            self.A14,
+            self.A15,
+            self.SAR,
+            self.EXCCAUSE,
+            self.EXCVADDR,
+            self.LBEG,
+            self.LEND,
+            self.LCOUNT,
+            self.THREADPTR,
+            self.SCOMPARE1,
+            self.BR,
+            self.ACCLO,
+            self.ACCHI,
+            self.M0,
+            self.M1,
+            self.M2,
+            self.M3,
+        )?;
+        #[cfg(feature = "print-float-registers")]
+        write!(
+            fmt,
+            "F64R_LO=0x{:08x}  F64R_HI=0x{:08x}  F64S=0x{:08x}
+FCR=0x{:08x}      FSR=0x{:08x}
+F0=0x{:08x}       F1=0x{:08x}       F2=0x{:08x}       F3=0x{:08x}       F4=0x{:08x}
+F5=0x{:08x}       F6=0x{:08x}       F7=0x{:08x}       F8=0x{:08x}       F9=0x{:08x}
+F10=0x{:08x}      F11=0x{:08x}      F12=0x{:08x}      F13=0x{:08x}      F14=0x{:08x}
+F15=0x{:08x}",
+            self.F64R_LO,
+            self.F64R_HI,
+            self.F64S,
+            self.FCR,
+            self.FSR,
+            self.F0,
+            self.F1,
+            self.F2,
+            self.F3,
+            self.F4,
+            self.F5,
+            self.F6,
+            self.F7,
+            self.F8,
+            self.F9,
+            self.F10,
+            self.F11,
+            self.F12,
+            self.F13,
+            self.F14,
+            self.F15,
+        )?;
+
+        Ok(())
+    }
+}
+
+/// Get an array of backtrace addresses.
+pub fn backtrace() -> [Option<usize>; MAX_BACKTRACE_ADDRESSES] {
+    let sp = unsafe {
+        let mut _tmp: u32;
+        asm!("mov {0}, a1", out(reg) _tmp);
+        _tmp
+    };
+
+    backtrace_internal(sp, 1)
+}
+
+pub(crate) fn sanitize_address(address: u32) -> u32 {
+    (address & 0x3fff_ffff) | 0x4000_0000
+}
+
+pub(crate) fn backtrace_internal(
+    sp: u32,
+    suppress: i32,
+) -> [Option<usize>; MAX_BACKTRACE_ADDRESSES] {
+    let mut result = [None; 10];
+    let mut index = 0;
+
+    let mut fp = sp;
+    let mut suppress = suppress;
+    let mut old_address = 0;
+
+    loop {
+        unsafe {
+            let address = sanitize_address((fp as *const u32).offset(-4).read_volatile()); // RA/PC
+            fp = (fp as *const u32).offset(-3).read_volatile(); // next FP
+
+            if old_address == address {
+                break;
+            }
+
+            old_address = address;
+
+            // the address is 0 but we sanitized the address - then 0 becomes 0x40000000
+            if address == 0x40000000 {
+                break;
+            }
+
+            if !crate::is_valid_ram_address(fp) {
+                break;
+            }
+
+            if fp == 0 {
+                break;
+            }
+
+            if suppress == 0 {
+                result[index] = Some(address as usize);
+                index += 1;
+
+                if index >= MAX_BACKTRACE_ADDRESSES {
+                    break;
+                }
+            } else {
+                suppress -= 1;
+            }
+        }
+    }
+
+    result
+}

esp-build/CHANGELOG.md

@@ -0,0 +1,24 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## [Unreleased]
+
+### Added
+
+### Fixed
+
+### Changed
+
+- Use `panic` instead of `process::exit` in esp-build (#2402 )
+
+### Removed
+
+## [0.1.0] - 2024-04-17
+
+- Initial release
+
+[Unreleased]: https://github.com/esp-rs/esp-hal/commits/main/esp-build?since=2024-04-17

esp-build/Cargo.toml

@@ -0,0 +1,16 @@
+[package]
+name         = "esp-build"
+version      = "0.1.0"
+edition      = "2021"
+rust-version = "1.60.0"
+description  = "Build utilities for esp-hal"
+repository   = "https://github.com/esp-rs/esp-hal"
+license      = "MIT OR Apache-2.0"
+
+[lib]
+proc-macro = true
+
+[dependencies]
+quote     = "1.0.37"
+syn       = { version = "2.0.79", features = ["fold", "full"] }
+termcolor = "1.4.1"

esp-build/README.md

@@ -0,0 +1,33 @@
+# esp-build
+
+[![Crates.io](https://img.shields.io/crates/v/esp-build?labelColor=1C2C2E&color=C96329&logo=Rust&style=flat-square)](https://crates.io/crates/esp-build)
+[![docs.rs](https://img.shields.io/docsrs/esp-build?labelColor=1C2C2E&color=C96329&logo=rust&style=flat-square)](https://docs.rs/esp-build)
+![MSRV](https://img.shields.io/badge/MSRV-1.60-blue?labelColor=1C2C2E&style=flat-square)
+![Crates.io](https://img.shields.io/crates/l/esp-build?labelColor=1C2C2E&style=flat-square)
+[![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&labelColor=1C2C2E&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
+
+Build utilities for use with `esp-hal` and other related packages, intended for use in [build scripts]. This package is still quite minimal, but provides:
+
+[build scripts]: https://doc.rust-lang.org/cargo/reference/build-scripts.html
+
+## [Documentation](https://docs.rs/crate/esp-build)
+
+## Minimum Supported Rust Version (MSRV)
+
+This crate is guaranteed to compile on stable Rust 1.60 and up. It _might_
+compile with older versions but that may change in any new patch release.
+
+## License
+
+Licensed under either of:
+
+- Apache License, Version 2.0 ([LICENSE-APACHE](../LICENSE-APACHE) or http://www.apache.org/licenses/LICENSE-2.0)
+- MIT license ([LICENSE-MIT](../LICENSE-MIT) or http://opensource.org/licenses/MIT)
+
+at your option.
+
+### Contribution
+
+Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in
+the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without
+any additional terms or conditions.

esp-build/src/lib.rs

@@ -0,0 +1,229 @@
+//! Build utilities for esp-hal.
+
+#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
+
+use std::io::Write as _;
+
+use proc_macro::TokenStream;
+use quote::ToTokens;
+use syn::{parse_macro_input, punctuated::Punctuated, LitStr, Token};
+use termcolor::{Color, ColorChoice, ColorSpec, StandardStream, WriteColor};
+
+/// Print a build error and terminate the process.
+///
+/// It should be noted that the error will be printed BEFORE the main function
+/// is called, and as such this should NOT be thought analogous to `println!` or
+/// similar utilities.
+///
+/// ## Example
+///
+/// ```rust
+/// esp_build::error! {"
+/// ERROR: something really bad has happened!
+/// "}
+/// // Process exits with exit code 1
+/// ```
+#[proc_macro]
+pub fn error(input: TokenStream) -> TokenStream {
+    do_alert(Color::Red, input);
+    panic!("Build failed");
+}
+
+/// Print a build warning.
+///
+/// It should be noted that the warning will be printed BEFORE the main function
+/// is called, and as such this should NOT be thought analogous to `println!` or
+/// similar utilities.
+///
+/// ## Example
+///
+/// ```rust
+/// esp_build::warning! {"
+/// WARNING: something unpleasant has happened!
+/// "};
+/// ```
+#[proc_macro]
+pub fn warning(input: TokenStream) -> TokenStream {
+    do_alert(Color::Yellow, input)
+}
+
+/// Given some features, assert that **at most** one of the features is enabled.
+///
+/// ## Example
+/// ```rust
+/// assert_unique_features!("foo", "bar", "baz");
+/// ```
+#[proc_macro]
+pub fn assert_unique_features(input: TokenStream) -> TokenStream {
+    let features = parse_macro_input!(input with Punctuated<LitStr, Token![,]>::parse_terminated)
+        .into_iter()
+        .collect::<Vec<_>>();
+
+    let unique = impl_unique_features(&features, "exactly zero or one");
+
+    quote::quote! {
+        #unique
+    }
+    .into()
+}
+
+/// Given some features, assert that **at least** one of the features is
+/// enabled.
+///
+/// ## Example
+/// ```rust
+/// assert_used_features!("foo", "bar", "baz");
+/// ```
+#[proc_macro]
+pub fn assert_used_features(input: TokenStream) -> TokenStream {
+    let features = parse_macro_input!(input with Punctuated<LitStr, Token![,]>::parse_terminated)
+        .into_iter()
+        .collect::<Vec<_>>();
+
+    let used = impl_used_features(&features, "at least one");
+
+    quote::quote! {
+        #used
+    }
+    .into()
+}
+
+/// Given some features, assert that **exactly** one of the features is enabled.
+///
+/// ## Example
+/// ```rust
+/// assert_unique_used_features!("foo", "bar", "baz");
+/// ```
+#[proc_macro]
+pub fn assert_unique_used_features(input: TokenStream) -> TokenStream {
+    let features = parse_macro_input!(input with Punctuated<LitStr, Token![,]>::parse_terminated)
+        .into_iter()
+        .collect::<Vec<_>>();
+
+    let unique = impl_unique_features(&features, "exactly one");
+    let used = impl_used_features(&features, "exactly one");
+
+    quote::quote! {
+        #unique
+        #used
+    }
+    .into()
+}
+
+// ----------------------------------------------------------------------------
+// Helper Functions
+
+fn impl_unique_features(features: &[LitStr], expectation: &str) -> impl ToTokens {
+    let pairs = unique_pairs(features);
+    let unique_cfgs = pairs
+        .iter()
+        .map(|(a, b)| quote::quote! { all(feature = #a, feature = #b) });
+
+    let message = format!(
+        r#"
+ERROR: expected {expectation} enabled feature from feature group:
+  {:?}
+"#,
+        features.iter().map(|lit| lit.value()).collect::<Vec<_>>(),
+    );
+
+    quote::quote! {
+        #[cfg(any(#(#unique_cfgs),*))]
+        ::esp_build::error! { #message }
+    }
+}
+
+fn impl_used_features(features: &[LitStr], expectation: &str) -> impl ToTokens {
+    let message = format!(
+        r#"
+ERROR: expected {expectation} enabled feature from feature group:
+  {:?}
+    "#,
+        features.iter().map(|lit| lit.value()).collect::<Vec<_>>()
+    );
+
+    quote::quote! {
+        #[cfg(not(any(#(feature = #features),*)))]
+        ::esp_build::error! { #message }
+    }
+}
+
+// Adapted from:
+// https://github.com/dtolnay/build-alert/blob/49d060e/src/lib.rs#L54-L93
+fn do_alert(color: Color, input: TokenStream) -> TokenStream {
+    let message = parse_macro_input!(input as LitStr).value();
+
+    let stderr = &mut StandardStream::stderr(ColorChoice::Auto);
+    let color_spec = ColorSpec::new().set_fg(Some(color)).clone();
+
+    let mut has_nonspace = false;
+
+    for mut line in message.lines() {
+        if !has_nonspace {
+            let (maybe_heading, rest) = split_heading(line);
+
+            if let Some(heading) = maybe_heading {
+                stderr.set_color(color_spec.clone().set_bold(true)).ok();
+                write!(stderr, "\n{}", heading).ok();
+                has_nonspace = true;
+            }
+
+            line = rest;
+        }
+
+        if line.is_empty() {
+            writeln!(stderr).ok();
+        } else {
+            stderr.set_color(&color_spec).ok();
+            writeln!(stderr, "{}", line).ok();
+
+            has_nonspace = has_nonspace || line.contains(|ch: char| ch != ' ');
+        }
+    }
+
+    stderr.reset().ok();
+    writeln!(stderr).ok();
+
+    TokenStream::new()
+}
+
+// Adapted from:
+// https://github.com/dtolnay/build-alert/blob/49d060e/src/lib.rs#L95-L114
+fn split_heading(s: &str) -> (Option<&str>, &str) {
+    let mut end = 0;
+    while end < s.len() && s[end..].starts_with(|ch: char| ch.is_ascii_uppercase()) {
+        end += 1;
+    }
+
+    if end >= 3 && (end == s.len() || s[end..].starts_with(':')) {
+        let (heading, rest) = s.split_at(end);
+        (Some(heading), rest)
+    } else {
+        (None, s)
+    }
+}
+
+fn unique_pairs(features: &[LitStr]) -> Vec<(&LitStr, &LitStr)> {
+    let mut pairs = Vec::new();
+
+    let mut i = 0;
+    let mut j = 0;
+
+    while i < features.len() {
+        let a = &features[i];
+        let b = &features[j];
+
+        if a.value() != b.value() {
+            pairs.push((a, b));
+        }
+
+        j += 1;
+
+        if j >= features.len() {
+            i += 1;
+            j = i;
+        }
+    }
+
+    pairs
+}

esp-config/CHANGELOG.md

@@ -0,0 +1,32 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## [Unreleased]
+
+### Added
+
+### Fixed
+
+- Users no longer have to manually import `esp_config_int_parse`. (#2630)
+
+### Changed
+
+- Crate prefixes and configuration keys are now separated by `_CONFIG_` (#2848)
+
+### Removed
+
+## 0.2.0 - 2024-11-20
+
+### Added
+
+- Add configuration validation (#2475)
+
+## 0.1.0 - 2024-10-10
+
+- Initial release
+
+[Unreleased]: https://github.com/esp-rs/esp-hal/commits/main/esp-config?since=2024-11-20

esp-config/Cargo.toml

@@ -0,0 +1,18 @@
+[package]
+name         = "esp-config"
+version      = "0.2.0"
+edition      = "2021"
+rust-version = "1.79.0"
+description  = "Configure projects using esp-hal and related packages"
+repository   = "https://github.com/esp-rs/esp-hal"
+license      = "MIT OR Apache-2.0"
+
+[dependencies]
+document-features = "0.2.10"
+
+[dev-dependencies]
+temp-env = "0.3.6"
+
+[features]
+## Enable the generation and parsing of a config
+build = []

esp-config/README.md

@@ -0,0 +1,65 @@
+# esp-config
+
+[![Crates.io](https://img.shields.io/crates/v/esp-config?labelColor=1C2C2E&color=C96329&logo=Rust&style=flat-square)](https://crates.io/crates/esp-config)
+[![docs.rs](https://img.shields.io/docsrs/esp-config?labelColor=1C2C2E&color=C96329&logo=rust&style=flat-square)](https://docs.rs/esp-config)
+![MSRV](https://img.shields.io/badge/MSRV-1.79-blue?labelColor=1C2C2E&style=flat-square)
+![Crates.io](https://img.shields.io/crates/l/esp-config?labelColor=1C2C2E&style=flat-square)
+[![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&labelColor=1C2C2E&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
+
+## [Documentation](https://docs.rs/crate/esp-config)
+
+## Usage
+
+`esp-config` takes a prefix (usually the crate name) and a set of configuration keys and default values to produce a configuration system that supports:
+
+- Emitting rustc cfg's for boolean keys
+- Emitting environment variables for numbers
+  - Along with decimal parsing, it supports Hex, Octal and Binary with the respective `0x`, `0o` and `0b` prefixes.
+- Emitting environment variables string values
+
+### Viewing the configuration
+
+The possible configuration values are output as a markdown table in the crates `OUT_DIR` with the format `{prefix}_config_table.md`, this can then be included into the crates top level documentation. Here is an example of the output:
+
+
+| Name | Description | Default value |
+|------|-------------|---------------|
+|**ESP_HAL_PLACE_SPI_DRIVER_IN_RAM**|Places the SPI driver in RAM for better performance|false|
+
+### Setting configuration options
+
+For any available configuration option, the environment variable or cfg is _always_ set based on the default value specified in the table. Users can override this by setting environment variables locally in their shell _or_ the preferred option is to utilize cargo's [`env` section](https://doc.rust-lang.org/cargo/reference/config.html#env).
+
+It's important to note that due to a [bug in cargo](https://github.com/rust-lang/cargo/issues/10358), any modifications to the environment, local or otherwise will only get picked up on a full clean build of the project.
+
+To see the final selected configuration another table is output to the `OUT_DIR` with the format `{prefix}_selected_config.md`.
+
+### Capturing configuration values in the downstream crate
+
+For all supported data types, there are helper macros that emit `const` code for parsing the configuration values.
+
+- Numbers - `esp_config_int!(integer_type, "ENV")`
+- Strings - `esp_config_str!("ENV")`
+- Bool - `esp_config_bool!("ENV")`
+
+In addition to environment variables, for boolean types rust `cfg`'s are emitted in snake case _without_ the prefix.
+
+## Minimum Supported Rust Version (MSRV)
+
+This crate is guaranteed to compile on stable Rust 1.79 and up. It _might_
+compile with older versions but that may change in any new patch release.
+
+## License
+
+Licensed under either of:
+
+- Apache License, Version 2.0 ([LICENSE-APACHE](../LICENSE-APACHE) or http://www.apache.org/licenses/LICENSE-2.0)
+- MIT license ([LICENSE-MIT](../LICENSE-MIT) or http://opensource.org/licenses/MIT)
+
+at your option.
+
+### Contribution
+
+Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in
+the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without
+any additional terms or conditions.

esp-config/src/generate.rs

@@ -0,0 +1,699 @@
+use std::{
+    collections::HashMap,
+    env,
+    fmt::{self, Write as _},
+    fs,
+    ops::Range,
+    path::PathBuf,
+};
+
+const DOC_TABLE_HEADER: &str = r#"
+| Name | Description | Default value |
+|------|-------------|---------------|
+"#;
+
+const SELECTED_TABLE_HEADER: &str = r#"
+| Name | Selected value |
+|------|----------------|
+"#;
+
+/// Configuration errors.
+#[derive(Debug, Clone, PartialEq, Eq)]
+pub enum Error {
+    /// Parse errors.
+    Parse(String),
+    /// Validation errors.
+    Validation(String),
+}
+
+impl Error {
+    /// Convenience function for creating parse errors.
+    pub fn parse<S>(message: S) -> Self
+    where
+        S: Into<String>,
+    {
+        Self::Parse(message.into())
+    }
+
+    /// Convenience function for creating validation errors.
+    pub fn validation<S>(message: S) -> Self
+    where
+        S: Into<String>,
+    {
+        Self::Validation(message.into())
+    }
+}
+
+impl fmt::Display for Error {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            Error::Parse(message) => write!(f, "{message}"),
+            Error::Validation(message) => write!(f, "{message}"),
+        }
+    }
+}
+
+/// Supported configuration value types.
+#[derive(Debug, Clone, PartialEq, Eq)]
+pub enum Value {
+    /// Booleans.
+    Bool(bool),
+    /// Integers.
+    Integer(i128),
+    /// Strings.
+    String(String),
+}
+
+// TODO: Do we want to handle negative values for non-decimal values?
+impl Value {
+    fn parse_in_place(&mut self, s: &str) -> Result<(), Error> {
+        *self = match self {
+            Value::Bool(_) => match s {
+                "true" => Value::Bool(true),
+                "false" => Value::Bool(false),
+                _ => {
+                    return Err(Error::parse(format!(
+                        "Expected 'true' or 'false', found: '{s}'"
+                    )))
+                }
+            },
+            Value::Integer(_) => {
+                let inner = match s.as_bytes() {
+                    [b'0', b'x', ..] => i128::from_str_radix(&s[2..], 16),
+                    [b'0', b'o', ..] => i128::from_str_radix(&s[2..], 8),
+                    [b'0', b'b', ..] => i128::from_str_radix(&s[2..], 2),
+                    _ => i128::from_str_radix(&s, 10),
+                }
+                .map_err(|_| Error::parse(format!("Expected valid intger value, found: '{s}'")))?;
+
+                Value::Integer(inner)
+            }
+            Value::String(_) => Value::String(s.into()),
+        };
+
+        Ok(())
+    }
+
+    /// Convert the value to a [bool].
+    pub fn as_bool(&self) -> bool {
+        match self {
+            Value::Bool(value) => *value,
+            _ => panic!("attempted to convert non-bool value to a bool"),
+        }
+    }
+
+    /// Convert the value to an [i128].
+    pub fn as_integer(&self) -> i128 {
+        match self {
+            Value::Integer(value) => *value,
+            _ => panic!("attempted to convert non-integer value to an integer"),
+        }
+    }
+
+    /// Convert the value to a [String].
+    pub fn as_string(&self) -> String {
+        match self {
+            Value::String(value) => value.to_owned(),
+            _ => panic!("attempted to convert non-string value to a string"),
+        }
+    }
+
+    /// Is the value a bool?
+    pub fn is_bool(&self) -> bool {
+        matches!(self, Value::Bool(_))
+    }
+
+    /// Is the value an integer?
+    pub fn is_integer(&self) -> bool {
+        matches!(self, Value::Integer(_))
+    }
+
+    /// Is the value a string?
+    pub fn is_string(&self) -> bool {
+        matches!(self, Value::String(_))
+    }
+}
+
+impl fmt::Display for Value {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            Value::Bool(b) => write!(f, "{b}"),
+            Value::Integer(i) => write!(f, "{i}"),
+            Value::String(s) => write!(f, "{s}"),
+        }
+    }
+}
+
+/// Configuration value validation functions.
+pub enum Validator {
+    /// Only allow negative integers, i.e. any values less than 0.
+    NegativeInteger,
+    /// Only allow non-negative integers, i.e. any values greater than or equal
+    /// to 0.
+    NonNegativeInteger,
+    /// Only allow positive integers, i.e. any values greater than to 0.
+    PositiveInteger,
+    /// Ensure that an integer value falls within the specified range.
+    IntegerInRange(Range<i128>),
+    /// A custom validation function to run against any supported value type.
+    Custom(Box<dyn Fn(&Value) -> Result<(), Error>>),
+}
+
+impl Validator {
+    fn validate(&self, value: &Value) -> Result<(), Error> {
+        match self {
+            Validator::NegativeInteger => negative_integer(value)?,
+            Validator::NonNegativeInteger => non_negative_integer(value)?,
+            Validator::PositiveInteger => positive_integer(value)?,
+            Validator::IntegerInRange(range) => integer_in_range(range, value)?,
+            Validator::Custom(validator_fn) => validator_fn(value)?,
+        }
+
+        Ok(())
+    }
+}
+
+fn negative_integer(value: &Value) -> Result<(), Error> {
+    if !value.is_integer() {
+        return Err(Error::validation(
+            "Validator::NegativeInteger can only be used with integer values",
+        ));
+    } else if value.as_integer() >= 0 {
+        return Err(Error::validation(format!(
+            "Expected negative integer, found '{}'",
+            value.as_integer()
+        )));
+    }
+
+    Ok(())
+}
+
+fn non_negative_integer(value: &Value) -> Result<(), Error> {
+    if !value.is_integer() {
+        return Err(Error::validation(
+            "Validator::NonNegativeInteger can only be used with integer values",
+        ));
+    } else if value.as_integer() < 0 {
+        return Err(Error::validation(format!(
+            "Expected non-negative integer, found '{}'",
+            value.as_integer()
+        )));
+    }
+
+    Ok(())
+}
+
+fn positive_integer(value: &Value) -> Result<(), Error> {
+    if !value.is_integer() {
+        return Err(Error::validation(
+            "Validator::PositiveInteger can only be used with integer values",
+        ));
+    } else if value.as_integer() <= 0 {
+        return Err(Error::validation(format!(
+            "Expected positive integer, found '{}'",
+            value.as_integer()
+        )));
+    }
+
+    Ok(())
+}
+
+fn integer_in_range(range: &Range<i128>, value: &Value) -> Result<(), Error> {
+    if !value.is_integer() || !range.contains(&value.as_integer()) {
+        Err(Error::validation(format!(
+            "Value '{}' does not fall within range '{:?}'",
+            value, range
+        )))
+    } else {
+        Ok(())
+    }
+}
+
+/// Generate and parse config from a prefix, and an array tuples containing the
+/// name, description, default value, and an optional validator.
+///
+/// This function will parse any `SCREAMING_SNAKE_CASE` environment variables
+/// that match the given prefix. It will then attempt to parse the [`Value`] and
+/// run any validators which have been specified.
+///
+/// Once the config has been parsed, this function will emit `snake_case` cfg's
+/// _without_ the prefix which can be used in the dependant crate. After that,
+/// it will create a markdown table in the `OUT_DIR` under the name
+/// `{prefix}_config_table.md` where prefix has also been converted to
+/// `snake_case`. This can be included in crate documentation to outline the
+/// available configuration options for the crate.
+///
+/// Passing a value of true for the `emit_md_tables` argument will create and
+/// write markdown files of the available configuration and selected
+/// configuration which can be included in documentation.
+///
+/// Unknown keys with the supplied prefix will cause this function to panic.
+pub fn generate_config(
+    crate_name: &str,
+    config: &[(&str, &str, Value, Option<Validator>)],
+    emit_md_tables: bool,
+) -> HashMap<String, Value> {
+    // Only rebuild if `build.rs` changed. Otherwise, Cargo will rebuild if any
+    // other file changed.
+    println!("cargo:rerun-if-changed=build.rs");
+
+    #[cfg(not(test))]
+    env_change_work_around();
+
+    let mut doc_table = String::from(DOC_TABLE_HEADER);
+    let mut selected_config = String::from(SELECTED_TABLE_HEADER);
+
+    // Ensure that the prefix is `SCREAMING_SNAKE_CASE`:
+    let prefix = format!("{}_CONFIG_", screaming_snake_case(crate_name));
+
+    // Build a lookup table for any provided validators; we must prefix the
+    // name of the config and transform it to SCREAMING_SNAKE_CASE so that
+    // it matches the keys in the hash table produced by `create_config`.
+    let config_validators = config
+        .iter()
+        .flat_map(|(name, _description, _default, validator)| {
+            if let Some(validator) = validator {
+                let name = format!("{prefix}{}", screaming_snake_case(name));
+                Some((name, validator))
+            } else {
+                None
+            }
+        })
+        .collect::<HashMap<_, _>>();
+
+    let mut configs = create_config(&prefix, config, &mut doc_table);
+    capture_from_env(&prefix, &mut configs);
+
+    for (name, value) in configs.iter() {
+        if let Some(validator) = config_validators.get(name) {
+            validator.validate(value).unwrap();
+        }
+    }
+
+    emit_configuration(&prefix, &configs, &mut selected_config);
+
+    if emit_md_tables {
+        let file_name = snake_case(crate_name);
+        write_config_tables(&file_name, doc_table, selected_config);
+    }
+
+    configs
+}
+
+// A work-around for https://github.com/rust-lang/cargo/issues/10358
+// This can be removed when https://github.com/rust-lang/cargo/pull/14058 is merged.
+// Unlikely to work on projects in workspaces
+#[cfg(not(test))]
+fn env_change_work_around() {
+    let mut out_dir = PathBuf::from(env::var_os("OUT_DIR").unwrap());
+
+    // We clean out_dir by removing all trailing directories, until it ends with
+    // target
+    while !out_dir.ends_with("target") {
+        if !out_dir.pop() {
+            return; // We ran out of directories...
+        }
+    }
+    out_dir.pop();
+
+    let dotcargo = out_dir.join(".cargo/");
+    if dotcargo.exists() {
+        if dotcargo.join("config.toml").exists() {
+            println!(
+                "cargo:rerun-if-changed={}",
+                dotcargo.join("config.toml").display()
+            );
+        }
+        if dotcargo.join("config").exists() {
+            println!(
+                "cargo:rerun-if-changed={}",
+                dotcargo.join("config").display()
+            );
+        }
+    }
+}
+
+fn create_config(
+    prefix: &str,
+    config: &[(&str, &str, Value, Option<Validator>)],
+    doc_table: &mut String,
+) -> HashMap<String, Value> {
+    let mut configs = HashMap::new();
+
+    for (name, description, default, _validator) in config {
+        let name = format!("{prefix}{}", screaming_snake_case(name));
+        configs.insert(name.clone(), default.clone());
+
+        // Write documentation table line:
+        let default = default.to_string();
+        writeln!(doc_table, "|**{name}**|{description}|{default}|").unwrap();
+
+        // Rebuild if config environment variable changed:
+        println!("cargo:rerun-if-env-changed={name}");
+    }
+
+    configs
+}
+
+fn capture_from_env(prefix: &str, configs: &mut HashMap<String, Value>) {
+    let mut unknown = Vec::new();
+    let mut failed = Vec::new();
+
+    // Try and capture input from the environment:
+    for (var, value) in env::vars() {
+        if var.starts_with(prefix) {
+            let Some(cfg) = configs.get_mut(&var) else {
+                unknown.push(var);
+                continue;
+            };
+
+            if let Err(e) = cfg.parse_in_place(&value) {
+                failed.push(format!("{var}: {e}"));
+            }
+        }
+    }
+
+    if !failed.is_empty() {
+        panic!("Invalid configuration options detected: {:?}", failed);
+    }
+
+    if !unknown.is_empty() {
+        panic!("Unknown configuration options detected: {:?}", unknown);
+    }
+}
+
+fn emit_configuration(
+    prefix: &str,
+    configs: &HashMap<String, Value>,
+    selected_config: &mut String,
+) {
+    for (name, value) in configs.iter() {
+        let cfg_name = snake_case(name.trim_start_matches(prefix));
+        println!("cargo:rustc-check-cfg=cfg({cfg_name})");
+
+        if let Value::Bool(true) = value {
+            println!("cargo:rustc-cfg={cfg_name}");
+        }
+
+        let value = value.to_string();
+
+        // Values that haven't been seen will be output here with the default value:
+        println!("cargo:rustc-env={}={}", name, value);
+        writeln!(selected_config, "|**{name}**|{value}|").unwrap();
+    }
+}
+
+fn write_config_tables(prefix: &str, doc_table: String, selected_config: String) {
+    let out_dir = PathBuf::from(env::var_os("OUT_DIR").unwrap());
+
+    let out_file = out_dir
+        .join(format!("{prefix}_config_table.md"))
+        .display()
+        .to_string();
+    fs::write(out_file, doc_table).unwrap();
+
+    let out_file = out_dir
+        .join(format!("{prefix}_selected_config.md"))
+        .display()
+        .to_string();
+    fs::write(out_file, selected_config).unwrap();
+}
+
+fn snake_case(name: &str) -> String {
+    let mut name = name.replace("-", "_");
+    name.make_ascii_lowercase();
+
+    name
+}
+
+fn screaming_snake_case(name: &str) -> String {
+    let mut name = name.replace("-", "_");
+    name.make_ascii_uppercase();
+
+    name
+}
+
+#[cfg(test)]
+mod test {
+    use super::*;
+
+    #[test]
+    fn value_number_formats() {
+        const INPUTS: &[&str] = &["0xAA", "0o252", "0b0000000010101010", "170"];
+        let mut v = Value::Integer(0);
+
+        for input in INPUTS {
+            v.parse_in_place(input).unwrap();
+            // no matter the input format, the output format should be decimal
+            assert_eq!(format!("{v}"), "170");
+        }
+    }
+
+    #[test]
+    fn value_bool_inputs() {
+        let mut v = Value::Bool(false);
+
+        v.parse_in_place("true").unwrap();
+        assert_eq!(format!("{v}"), "true");
+
+        v.parse_in_place("false").unwrap();
+        assert_eq!(format!("{v}"), "false");
+    }
+
+    #[test]
+    fn env_override() {
+        temp_env::with_vars(
+            [
+                ("ESP_TEST_CONFIG_NUMBER", Some("0xaa")),
+                ("ESP_TEST_CONFIG_NUMBER_SIGNED", Some("-999")),
+                ("ESP_TEST_CONFIG_STRING", Some("Hello world!")),
+                ("ESP_TEST_CONFIG_BOOL", Some("true")),
+            ],
+            || {
+                let configs = generate_config(
+                    "esp-test",
+                    &[
+                        ("number", "NA", Value::Integer(999), None),
+                        ("number_signed", "NA", Value::Integer(-777), None),
+                        ("string", "NA", Value::String("Demo".to_owned()), None),
+                        ("bool", "NA", Value::Bool(false), None),
+                        ("number_default", "NA", Value::Integer(999), None),
+                        (
+                            "string_default",
+                            "NA",
+                            Value::String("Demo".to_owned()),
+                            None,
+                        ),
+                        ("bool_default", "NA", Value::Bool(false), None),
+                    ],
+                    false,
+                );
+
+                // some values have changed
+                assert_eq!(
+                    match configs.get("ESP_TEST_CONFIG_NUMBER").unwrap() {
+                        Value::Integer(num) => *num,
+                        _ => unreachable!(),
+                    },
+                    0xaa
+                );
+                assert_eq!(
+                    match configs.get("ESP_TEST_CONFIG_NUMBER_SIGNED").unwrap() {
+                        Value::Integer(num) => *num,
+                        _ => unreachable!(),
+                    },
+                    -999
+                );
+                assert_eq!(
+                    match configs.get("ESP_TEST_CONFIG_STRING").unwrap() {
+                        Value::String(val) => val,
+                        _ => unreachable!(),
+                    },
+                    "Hello world!"
+                );
+                assert_eq!(
+                    match configs.get("ESP_TEST_CONFIG_BOOL").unwrap() {
+                        Value::Bool(val) => *val,
+                        _ => unreachable!(),
+                    },
+                    true
+                );
+
+                // the rest are the defaults
+                assert_eq!(
+                    match configs.get("ESP_TEST_CONFIG_NUMBER_DEFAULT").unwrap() {
+                        Value::Integer(num) => *num,
+                        _ => unreachable!(),
+                    },
+                    999
+                );
+                assert_eq!(
+                    match configs.get("ESP_TEST_CONFIG_STRING_DEFAULT").unwrap() {
+                        Value::String(val) => val,
+                        _ => unreachable!(),
+                    },
+                    "Demo"
+                );
+                assert_eq!(
+                    match configs.get("ESP_TEST_CONFIG_BOOL_DEFAULT").unwrap() {
+                        Value::Bool(val) => *val,
+                        _ => unreachable!(),
+                    },
+                    false
+                );
+            },
+        )
+    }
+
+    #[test]
+    fn builtin_validation_passes() {
+        temp_env::with_vars(
+            [
+                ("ESP_TEST_CONFIG_POSITIVE_NUMBER", Some("7")),
+                ("ESP_TEST_CONFIG_NEGATIVE_NUMBER", Some("-1")),
+                ("ESP_TEST_CONFIG_NON_NEGATIVE_NUMBER", Some("0")),
+                ("ESP_TEST_CONFIG_RANGE", Some("9")),
+            ],
+            || {
+                generate_config(
+                    "esp-test",
+                    &[
+                        (
+                            "positive_number",
+                            "NA",
+                            Value::Integer(-1),
+                            Some(Validator::PositiveInteger),
+                        ),
+                        (
+                            "negative_number",
+                            "NA",
+                            Value::Integer(1),
+                            Some(Validator::NegativeInteger),
+                        ),
+                        (
+                            "non_negative_number",
+                            "NA",
+                            Value::Integer(-1),
+                            Some(Validator::NonNegativeInteger),
+                        ),
+                        (
+                            "range",
+                            "NA",
+                            Value::Integer(0),
+                            Some(Validator::IntegerInRange(5..10)),
+                        ),
+                    ],
+                    false,
+                )
+            },
+        );
+    }
+
+    #[test]
+    fn custom_validation_passes() {
+        temp_env::with_vars([("ESP_TEST_CONFIG_NUMBER", Some("13"))], || {
+            generate_config(
+                "esp-test",
+                &[(
+                    "number",
+                    "NA",
+                    Value::Integer(-1),
+                    Some(Validator::Custom(Box::new(|value| {
+                        let range = 10..20;
+                        if !value.is_integer() || !range.contains(&value.as_integer()) {
+                            Err(Error::validation("value does not fall within range"))
+                        } else {
+                            Ok(())
+                        }
+                    }))),
+                )],
+                false,
+            )
+        });
+    }
+
+    #[test]
+    #[should_panic]
+    fn builtin_validation_bails() {
+        temp_env::with_vars([("ESP_TEST_CONFIG_POSITIVE_NUMBER", Some("-99"))], || {
+            generate_config(
+                "esp-test",
+                &[(
+                    "positive_number",
+                    "NA",
+                    Value::Integer(-1),
+                    Some(Validator::PositiveInteger),
+                )],
+                false,
+            )
+        });
+    }
+
+    #[test]
+    #[should_panic]
+    fn custom_validation_bails() {
+        temp_env::with_vars([("ESP_TEST_CONFIG_NUMBER", Some("37"))], || {
+            generate_config(
+                "esp-test",
+                &[(
+                    "number",
+                    "NA",
+                    Value::Integer(-1),
+                    Some(Validator::Custom(Box::new(|value| {
+                        let range = 10..20;
+                        if !value.is_integer() || !range.contains(&value.as_integer()) {
+                            Err(Error::validation("value does not fall within range"))
+                        } else {
+                            Ok(())
+                        }
+                    }))),
+                )],
+                false,
+            )
+        });
+    }
+
+    #[test]
+    #[should_panic]
+    fn env_unknown_bails() {
+        temp_env::with_vars(
+            [
+                ("ESP_TEST_CONFIG_NUMBER", Some("0xaa")),
+                ("ESP_TEST_CONFIG_RANDOM_VARIABLE", Some("")),
+            ],
+            || {
+                generate_config(
+                    "esp-test",
+                    &[("number", "NA", Value::Integer(999), None)],
+                    false,
+                );
+            },
+        );
+    }
+
+    #[test]
+    #[should_panic]
+    fn env_invalid_values_bails() {
+        temp_env::with_vars([("ESP_TEST_CONFIG_NUMBER", Some("Hello world"))], || {
+            generate_config(
+                "esp-test",
+                &[("number", "NA", Value::Integer(999), None)],
+                false,
+            );
+        });
+    }
+
+    #[test]
+    fn env_unknown_prefix_is_ignored() {
+        temp_env::with_vars(
+            [("ESP_TEST_OTHER_CONFIG_NUMBER", Some("Hello world"))],
+            || {
+                generate_config(
+                    "esp-test",
+                    &[("number", "NA", Value::Integer(999), None)],
+                    false,
+                );
+            },
+        );
+    }
+}

esp-config/src/lib.rs

@@ -0,0 +1,110 @@
+#![doc = include_str!("../README.md")]
+//! ## Feature Flags
+#![doc = document_features::document_features!(feature_label = r#"<span class="stab portability"><code>{feature}</code></span>"#)]
+#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
+#![cfg_attr(not(feature = "build"), no_std)]
+#![deny(missing_docs, rust_2018_idioms)]
+
+#[cfg(feature = "build")]
+mod generate;
+#[cfg(feature = "build")]
+pub use generate::{generate_config, Error, Validator, Value};
+
+/// Parse the value of an environment variable as a [bool] at compile time.
+#[macro_export]
+macro_rules! esp_config_bool {
+    ( $var:expr ) => {
+        match env!($var).as_bytes() {
+            b"true" => true,
+            b"false" => false,
+            _ => ::core::panic!("boolean value must be either 'true' or 'false'"),
+        }
+    };
+}
+
+// TODO: From 1.82 on, we can use `<$ty>::from_str_radix(env!($var), 10)`
+/// Parse the value of an environment variable as an integer at compile time.
+#[macro_export]
+macro_rules! esp_config_int {
+    ( $ty:ty, $var:expr ) => {
+        const {
+            const BYTES: &[u8] = env!($var).as_bytes();
+            $crate::esp_config_int_parse!($ty, BYTES)
+        }
+    };
+}
+
+/// Get the string value of an environment variable at compile time.
+#[macro_export]
+macro_rules! esp_config_str {
+    ( $var:expr ) => {
+        env!($var)
+    };
+}
+
+/// Parse a string like "777" into an integer, which _can_ be used in a `const`
+/// context
+#[doc(hidden)] // To avoid confusion with `esp_config_int`, hide this in the docs
+#[macro_export]
+macro_rules! esp_config_int_parse {
+    ( $ty:ty, $bytes:expr ) => {{
+        let mut bytes = $bytes;
+        let mut val: $ty = 0;
+        let mut sign_seen = false;
+        let mut is_negative = false;
+
+        while let [byte, rest @ ..] = bytes {
+            match *byte {
+                b'0'..=b'9' => {
+                    val = val * 10 + (*byte - b'0') as $ty;
+                }
+                b'-' | b'+' if !sign_seen => {
+                    is_negative = *byte == b'-';
+                    sign_seen = true;
+                }
+                _ => ::core::panic!("invalid character encountered while parsing integer"),
+            }
+
+            bytes = rest;
+        }
+
+        if is_negative {
+            let original = val;
+            // Subtract the value twice to get a negative:
+            val -= original;
+            val -= original;
+        }
+
+        val
+    }};
+}
+
+#[cfg(test)]
+mod test {
+    // We can only test success in the const context
+    const _: () = {
+        core::assert!(esp_config_int_parse!(i64, "-77777".as_bytes()) == -77777);
+        core::assert!(esp_config_int_parse!(isize, "-7777".as_bytes()) == -7777);
+        core::assert!(esp_config_int_parse!(i32, "-999".as_bytes()) == -999);
+        core::assert!(esp_config_int_parse!(i16, "-99".as_bytes()) == -99);
+        core::assert!(esp_config_int_parse!(i8, "-9".as_bytes()) == -9);
+
+        core::assert!(esp_config_int_parse!(u64, "77777".as_bytes()) == 77777);
+        core::assert!(esp_config_int_parse!(usize, "7777".as_bytes()) == 7777);
+        core::assert!(esp_config_int_parse!(u32, "999".as_bytes()) == 999);
+        core::assert!(esp_config_int_parse!(u16, "99".as_bytes()) == 99);
+        core::assert!(esp_config_int_parse!(u8, "9".as_bytes()) == 9);
+    };
+
+    #[test]
+    #[should_panic]
+    fn test_expect_positive() {
+        esp_config_int_parse!(u8, "-5".as_bytes());
+    }
+
+    #[test]
+    #[should_panic]
+    fn test_invalid_digit() {
+        esp_config_int_parse!(u32, "a".as_bytes());
+    }
+}

esp-hal-embassy/.clippy.toml

@@ -0,0 +1 @@
+avoid-breaking-exported-api = false

esp-hal-embassy/CHANGELOG.md

@@ -0,0 +1,74 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## [Unreleased]
+
+
+### Added
+
+### Changed
+
+- Bump MSRV to 1.83 (#2615)
+
+- Config: Crate prefixes and configuration keys are now separated by `_CONFIG_` (#2848)
+
+### Fixed
+
+### Removed
+
+## 0.5.0 - 2024-11-20
+
+### Added
+
+- `ESP_HAL_EMBASSY_LOW_POWER_WAIT` configuration option. (#2329)
+
+### Changed
+
+- Reduce memory footprint by 4 bytes on multi-core MCUs.
+- The time driver no longer uses cross-core critical sections. (#2559)
+
+### Fixed
+
+- Alarm interrupts are now handled on the core that allocated them. (For executors created on the second core after calling `esp_hal_embassy::init`) (#2451)
+
+### Removed
+
+## 0.4.0 - 2024-10-10
+
+### Changed
+
+- MSRV bump to 1.79 (#2156)
+
+### Removed
+
+- Removed the `clocks` parameter from `esp_hal_embassy::init`. (#1999)
+
+## 0.3.0 - 2024-08-29
+
+### Added
+
+- This package now re-exports the `esp_hal_procmacros::main` macro (#1828)
+
+### Changed
+
+- Updated to latest release (`0.6.0`) for `embassy-executor` (#1942)
+- Changed `init` to accept timers of multiple types (#1957, #2012)
+
+### Fixed
+
+- Fixed a bug where the timeout was huge whenever the timestamp at the time of scheduling was already in the past (#1875)
+- Fixed interrupt executors looping endlessly when `integrated-timers` is used. (#1936)
+
+## 0.2.0 - 2024-07-15
+
+### Changed
+
+- Removed the TIMG and SYSTIMER time drivers, replaced by a generic time driver taking `OneShotTimer<ErasedTimer>` (#1753)
+
+## 0.1.0 - 2024-06-04
+
+[Unreleased]: https://github.com/esp-rs/esp-hal/commits/main/esp-hal-embassy?since=2024-11-20

esp-hal-embassy/Cargo.toml

@@ -0,0 +1,54 @@
+[package]
+name         = "esp-hal-embassy"
+version      = "0.5.0"
+edition      = "2021"
+rust-version = "1.83.0"
+description  = "Embassy support for esp-hal"
+keywords     = ["async", "embedded", "esp32", "espressif"]
+categories   = ["asynchronous", "embedded", "hardware-support", "no-std"]
+repository   = "https://github.com/esp-rs/esp-hal"
+license      = "MIT OR Apache-2.0"
+
+[package.metadata.docs.rs]
+default-target = "riscv32imac-unknown-none-elf"
+features       = ["esp32c6"]
+
+[dependencies]
+critical-section    = "1.2.0"
+defmt               = { version = "0.3.8", optional = true }
+document-features   = "0.2.10"
+embassy-executor    = { version = "0.6.3", optional = true }
+embassy-time-driver = { version = "0.1.0", features = [ "tick-hz-1_000_000" ] }
+esp-hal             = { version = "0.22.0", path = "../esp-hal" }
+log                 = { version = "0.4.22", optional = true }
+macros              = { version = "0.15.0", features = ["embassy"], package = "esp-hal-procmacros", path = "../esp-hal-procmacros" }
+portable-atomic     = "1.9.0"
+static_cell         = "2.1.0"
+
+[build-dependencies]
+esp-build    = { version = "0.1.0", path = "../esp-build" }
+esp-config   = { version = "0.2.0", path = "../esp-config", features = ["build"] }
+esp-metadata = { version = "0.4.0", path = "../esp-metadata" }
+
+[features]
+default = ["executors"]
+
+esp32   = ["esp-hal/esp32"]
+esp32c2 = ["esp-hal/esp32c2"]
+esp32c3 = ["esp-hal/esp32c3"]
+esp32c6 = ["esp-hal/esp32c6"]
+esp32h2 = ["esp-hal/esp32h2"]
+esp32s2 = ["esp-hal/esp32s2"]
+esp32s3 = ["esp-hal/esp32s3"]
+
+## Implement `defmt::Format` on certain types.
+defmt = ["dep:defmt", "embassy-executor?/defmt", "esp-hal/defmt"]
+## Enable logging via the log crate
+log = ["dep:log"]
+## Provide `Executor` and `InterruptExecutor`
+executors = ["dep:embassy-executor", "esp-hal/__esp_hal_embassy"]
+## Use the executor-integrated `embassy-time` timer queue.
+integrated-timers = ["embassy-executor?/integrated-timers"]
+
+[lints.rust]
+unexpected_cfgs = "allow"

esp-hal-embassy/MIGRATING-0.3.md

@@ -0,0 +1,63 @@
+# Migration Guide from 0.3.x to v0.4.x
+
+## Initialization
+
+You no longer have to set up clocks and pass them to `esp_hal_embassy::init`.
+
+```diff
+ use esp_hal::{
+-    clock::ClockControl,
+-    peripherals::Peripherals,
+     prelude::*,
+-    system::SystemControl,
+ };
+
+ #[esp_hal_embassy::main]
+ async fn main(_spawner: Spawner) -> ! {
+-    let peripherals = Peripherals::take();
+-    let system = SystemControl::new(peripherals.SYSTEM);
+-    let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
++    let peripherals = esp_hal::init(esp_hal::Config::default());
+
+     let timg0 = TimerGroup::new(peripherals.TIMG0);
+-    esp_hal_embassy::init(&clocks, timg0);
++    esp_hal_embassy::init(timg0.timer0);
+
+     // ...
+ }
+```
+
+You have to specify a timer instance (that may be a `TimerGroup` timer unit
+or a `SystemTimer` alarm) or an array of `AnyTimer`s when calling `init`.
+An example of how you can set multiple timers (for example when using
+multiple executors):
+
+```rust
+use esp_hal::{
+    prelude::*,
+    timer::{
+        AnyTimer,
+        systimer::SystemTimer
+    }
+};
+
+#[esp_hal_embassy::main]
+async fn main(_spawner: Spawner) -> ! {
+    let peripherals = esp_hal::init(esp_hal::Config::default());
+
+    let timg0 = TimerGroup::new(peripherals.TIMG0);
+    let timer0: AnyTimer = timg0.timer0.into();
+    let timer1: AnyTimer = timg0.timer1.into();
+
+    // You can use either a TimerGroup timer, a SystemTimer alarm,
+    // or you can mix and match them as well.
+    let systimer = SystemTimer::new(peripherals.SYSTIMER).split::<Target>();
+    let timer2: AnyTimer = systimer.alarm0;
+
+    esp_hal_embassy::init([timer0, timer1, timer2]);
+
+    // ...
+}
+```
+
+Note that you only have to convert into `AnyTimer` if you want to use multiple timers.

esp-hal-embassy/MIGRATING-0.4.md

@@ -0,0 +1,3 @@
+# Migration Guide from 0.4.x to v0.5.x
+
+You don't have to make changes to your code to update esp-hal-embassy.

esp-hal-embassy/MIGRATING-0.5.md

@@ -0,0 +1,15 @@
+# Migration Guide from 0.5.x to v0.6.x
+
+## Crate configuration changes
+
+To prevent ambiguity between configurations, we had to change the naming format of configuration
+keys. Before, we used `{prefix}_{key}`, which meant that esp-hal and esp-hal-* configuration keys
+were impossible to tell apart. To fix this issue, we are changing the separator from one underscore
+character to `_CONFIG_`. This also means that users will have to change their `config.toml`
+configurations to match the new format.
+
+```diff
+ [env]
+-ESP_HAL_EMBASSY_LOW_POWER_WAIT="false"
++ESP_HAL_EMBASSY_CONFIG_LOW_POWER_WAIT="false"
+```

esp-hal-embassy/README.md

@@ -0,0 +1,37 @@
+# esp-hal-embassy
+
+[![Crates.io](https://img.shields.io/crates/v/esp-hal-embassy?labelColor=1C2C2E&color=C96329&logo=Rust&style=flat-square)](https://crates.io/crates/esp-hal-embassy)
+[![docs.rs](https://img.shields.io/docsrs/esp-hal-embassy?labelColor=1C2C2E&color=C96329&logo=rust&style=flat-square)](https://docs.rs/esp-hal-embassy)
+![MSRV](https://img.shields.io/badge/MSRV-1.83-blue?labelColor=1C2C2E&style=flat-square)
+![Crates.io](https://img.shields.io/crates/l/esp-hal-embassy?labelColor=1C2C2E&style=flat-square)
+[![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&labelColor=1C2C2E&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
+
+[Embassy] support for `esp-hal`.
+
+Note that this crate currently requires you to enable the `unstable` feature on `esp-hal`.
+
+[embassy]: https://github.com/embassy-rs/embassy
+
+## [Documentation]
+
+[documentation]: https://docs.rs/esp-hal-embassy/
+
+## Minimum Supported Rust Version (MSRV)
+
+This crate is guaranteed to compile on stable Rust 1.83 and up. It _might_
+compile with older versions but that may change in any new patch release.
+
+## License
+
+Licensed under either of:
+
+- Apache License, Version 2.0 ([LICENSE-APACHE](../LICENSE-APACHE) or http://www.apache.org/licenses/LICENSE-2.0)
+- MIT license ([LICENSE-MIT](../LICENSE-MIT) or http://opensource.org/licenses/MIT)
+
+at your option.
+
+### Contribution
+
+Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in
+the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without
+any additional terms or conditions.

esp-hal-embassy/build.rs

@@ -0,0 +1,54 @@
+use std::{error::Error, str::FromStr};
+
+use esp_build::assert_unique_used_features;
+use esp_config::{generate_config, Value};
+use esp_metadata::{Chip, Config};
+
+fn main() -> Result<(), Box<dyn Error>> {
+    // NOTE: update when adding new device support!
+    // Ensure that exactly one chip has been specified:
+    assert_unique_used_features!(
+        "esp32", "esp32c2", "esp32c3", "esp32c6", "esp32h2", "esp32s2", "esp32s3"
+    );
+
+    // NOTE: update when adding new device support!
+    // Determine the name of the configured device:
+    let device_name = if cfg!(feature = "esp32") {
+        "esp32"
+    } else if cfg!(feature = "esp32c2") {
+        "esp32c2"
+    } else if cfg!(feature = "esp32c3") {
+        "esp32c3"
+    } else if cfg!(feature = "esp32c6") {
+        "esp32c6"
+    } else if cfg!(feature = "esp32h2") {
+        "esp32h2"
+    } else if cfg!(feature = "esp32s2") {
+        "esp32s2"
+    } else if cfg!(feature = "esp32s3") {
+        "esp32s3"
+    } else {
+        unreachable!() // We've confirmed exactly one known device was selected
+    };
+
+    // Load the configuration file for the configured device:
+    let chip = Chip::from_str(device_name)?;
+    let config = Config::for_chip(&chip);
+
+    // Define all necessary configuration symbols for the configured device:
+    config.define_symbols();
+
+    // emit config
+    generate_config(
+        "esp_hal_embassy",
+        &[(
+            "low-power-wait",
+            "Enables the lower-power wait if no tasks are ready to run on the thread-mode executor. This allows the MCU to use less power if the workload allows. Recommended for battery-powered systems. May impact analog performance.",
+            Value::Bool(true),
+            None
+        )],
+        true,
+    );
+
+    Ok(())
+}

esp-hal-embassy/src/executor/interrupt.rs

@@ -0,0 +1,137 @@
+//! Interrupt-mode executor.
+
+use core::{cell::UnsafeCell, mem::MaybeUninit};
+
+use embassy_executor::{raw, SendSpawner};
+use esp_hal::{
+    interrupt::{self, software::SoftwareInterrupt, InterruptHandler},
+    Cpu,
+};
+use portable_atomic::{AtomicUsize, Ordering};
+
+const COUNT: usize = 3 + cfg!(not(multi_core)) as usize;
+static mut EXECUTORS: [CallbackContext; COUNT] = [const { CallbackContext::new() }; COUNT];
+
+/// Interrupt mode executor.
+///
+/// This executor runs tasks in interrupt mode. The interrupt handler is set up
+/// to poll tasks, and when a task is woken the interrupt is pended from
+/// software.
+pub struct InterruptExecutor<const SWI: u8> {
+    core: AtomicUsize,
+    executor: UnsafeCell<MaybeUninit<raw::Executor>>,
+    interrupt: SoftwareInterrupt<SWI>,
+}
+
+unsafe impl<const SWI: u8> Send for InterruptExecutor<SWI> {}
+unsafe impl<const SWI: u8> Sync for InterruptExecutor<SWI> {}
+
+struct CallbackContext {
+    raw_executor: UnsafeCell<*mut raw::Executor>,
+}
+
+impl CallbackContext {
+    const fn new() -> Self {
+        Self {
+            raw_executor: UnsafeCell::new(core::ptr::null_mut()),
+        }
+    }
+
+    fn get(&self) -> *mut raw::Executor {
+        unsafe { *self.raw_executor.get() }
+    }
+
+    fn set(&self, executor: *mut raw::Executor) {
+        unsafe { self.raw_executor.get().write(executor) };
+    }
+}
+
+extern "C" fn handle_interrupt<const NUM: u8>() {
+    let swi = unsafe { SoftwareInterrupt::<NUM>::steal() };
+    swi.reset();
+
+    unsafe {
+        let executor = unwrap!(EXECUTORS[NUM as usize].get().as_mut());
+        executor.poll();
+    }
+}
+
+impl<const SWI: u8> InterruptExecutor<SWI> {
+    /// Create a new `InterruptExecutor`.
+    /// This takes the software interrupt to be used internally.
+    #[inline]
+    pub const fn new(interrupt: SoftwareInterrupt<SWI>) -> Self {
+        Self {
+            core: AtomicUsize::new(usize::MAX),
+            executor: UnsafeCell::new(MaybeUninit::uninit()),
+            interrupt,
+        }
+    }
+
+    /// Start the executor at the given priority level.
+    ///
+    /// This initializes the executor, enables the interrupt, and returns.
+    /// The executor keeps running in the background through the interrupt.
+    ///
+    /// This returns a [`SendSpawner`] you can use to spawn tasks on it. A
+    /// [`SendSpawner`] is returned instead of a
+    /// [`Spawner`](embassy_executor::Spawner) because the
+    /// executor effectively runs in a different "thread" (the interrupt),
+    /// so spawning tasks on it is effectively sending them.
+    ///
+    /// To obtain a [`Spawner`](embassy_executor::Spawner) for this executor,
+    /// use [`Spawner::for_current_executor`](embassy_executor::Spawner::for_current_executor)
+    /// from a task running in it.
+    pub fn start(&'static mut self, priority: interrupt::Priority) -> SendSpawner {
+        if self
+            .core
+            .compare_exchange(
+                usize::MAX,
+                Cpu::current() as usize,
+                Ordering::Acquire,
+                Ordering::Relaxed,
+            )
+            .is_err()
+        {
+            panic!("InterruptExecutor::start() called multiple times on the same executor.");
+        }
+
+        unsafe {
+            (*self.executor.get())
+                .as_mut_ptr()
+                .write(raw::Executor::new((SWI as usize) as *mut ()));
+
+            EXECUTORS[SWI as usize].set((*self.executor.get()).as_mut_ptr());
+        }
+
+        let swi_handler = match SWI {
+            0 => handle_interrupt::<0>,
+            1 => handle_interrupt::<1>,
+            2 => handle_interrupt::<2>,
+            #[cfg(not(multi_core))]
+            3 => handle_interrupt::<3>,
+            _ => unreachable!(),
+        };
+
+        self.interrupt
+            .set_interrupt_handler(InterruptHandler::new(swi_handler, priority));
+
+        let executor = unsafe { (*self.executor.get()).assume_init_ref() };
+        executor.spawner().make_send()
+    }
+
+    /// Get a SendSpawner for this executor
+    ///
+    /// This returns a [`SendSpawner`] you can use to spawn tasks on this
+    /// executor.
+    ///
+    /// This MUST only be called on an executor that has already been started.
+    /// The function will panic otherwise.
+    pub fn spawner(&'static self) -> SendSpawner {
+        if self.core.load(Ordering::Acquire) == usize::MAX {
+            panic!("InterruptExecutor::spawner() called on uninitialized executor.");
+        }
+        let executor = unsafe { (*self.executor.get()).assume_init_ref() };
+        executor.spawner().make_send()
+    }
+}

esp-hal-embassy/src/executor/mod.rs

@@ -0,0 +1,24 @@
+pub use self::{interrupt::*, thread::*};
+
+mod interrupt;
+mod thread;
+
+#[export_name = "__pender"]
+fn __pender(context: *mut ()) {
+    use esp_hal::interrupt::software::SoftwareInterrupt;
+
+    match context as usize {
+        // For interrupt executors, the context value is the
+        // software interrupt number
+        0 => unsafe { SoftwareInterrupt::<0>::steal().raise() },
+        1 => unsafe { SoftwareInterrupt::<1>::steal().raise() },
+        2 => unsafe { SoftwareInterrupt::<2>::steal().raise() },
+        #[cfg(not(multi_core))]
+        3 => unsafe { SoftwareInterrupt::<3>::steal().raise() },
+        // THREAD_MODE_CONTEXT + core ID
+        16 => thread::pend_thread_mode(0),
+        #[cfg(multi_core)]
+        17 => thread::pend_thread_mode(1),
+        _ => unreachable!(),
+    }
+}

esp-hal-embassy/src/executor/thread.rs

@@ -0,0 +1,176 @@
+//! Multicore-aware thread-mode embassy executor.
+
+use core::marker::PhantomData;
+
+use embassy_executor::{raw, Spawner};
+use esp_hal::Cpu;
+#[cfg(multi_core)]
+use esp_hal::{interrupt::software::SoftwareInterrupt, macros::handler};
+#[cfg(low_power_wait)]
+use portable_atomic::{AtomicBool, Ordering};
+
+pub(crate) const THREAD_MODE_CONTEXT: usize = 16;
+
+/// global atomic used to keep track of whether there is work to do since sev()
+/// is not available on either Xtensa or RISC-V
+static SIGNAL_WORK_THREAD_MODE: [AtomicBool; Cpu::COUNT] =
+    [const { AtomicBool::new(false) }; Cpu::COUNT];
+
+#[cfg(all(multi_core, low_power_wait))]
+#[handler]
+fn software3_interrupt() {
+    // This interrupt is fired when the thread-mode executor's core needs to be
+    // woken. It doesn't matter which core handles this interrupt first, the
+    // point is just to wake up the core that is currently executing
+    // `waiti`.
+    unsafe { SoftwareInterrupt::<3>::steal().reset() };
+}
+
+pub(crate) fn pend_thread_mode(_core: usize) {
+    #[cfg(low_power_wait)]
+    {
+        // Signal that there is work to be done.
+        SIGNAL_WORK_THREAD_MODE[_core].store(true, Ordering::Relaxed);
+
+        // If we are pending a task on the current core, we're done. Otherwise, we
+        // need to make sure the other core wakes up.
+        #[cfg(multi_core)]
+        if _core != Cpu::current() as usize {
+            // We need to clear the interrupt from software. We don't actually
+            // need it to trigger and run the interrupt handler, we just need to
+            // kick waiti to return.
+            unsafe { SoftwareInterrupt::<3>::steal().raise() };
+        }
+    }
+}
+
+/// Thread mode executor.
+///
+/// This is the simplest and most common kind of executor. It runs on thread
+/// mode (at the lowest priority level).
+#[cfg_attr(multi_core, doc = "")]
+#[cfg_attr(
+    multi_core,
+    doc = "This executor is safe to use on multiple cores. You need to
+create one instance per core. The executors don't steal tasks from each other."
+)]
+pub struct Executor {
+    inner: raw::Executor,
+    not_send: PhantomData<*mut ()>,
+}
+
+impl Executor {
+    /// Create a new Executor.
+    #[cfg_attr(
+        multi_core,
+        doc = r#"
+
+This will use software-interrupt 3 which isn't available for anything else to wake the other core(s)."#
+    )]
+    pub fn new() -> Self {
+        #[cfg(all(multi_core, low_power_wait))]
+        unsafe {
+            SoftwareInterrupt::<3>::steal().set_interrupt_handler(software3_interrupt);
+        }
+
+        Self {
+            inner: raw::Executor::new((THREAD_MODE_CONTEXT + Cpu::current() as usize) as *mut ()),
+            not_send: PhantomData,
+        }
+    }
+
+    /// Run the executor.
+    ///
+    /// The `init` closure is called with a [`Spawner`] that spawns tasks on
+    /// this executor. Use it to spawn the initial task(s). After `init`
+    /// returns, the executor starts running the tasks.
+    ///
+    /// To spawn more tasks later, you may keep copies of the [`Spawner`] (it is
+    /// `Copy`), for example by passing it as an argument to the initial
+    /// tasks.
+    ///
+    /// This function requires `&'static mut self`. This means you have to store
+    /// the Executor instance in a place where it'll live forever and grants
+    /// you mutable access. There's a few ways to do this:
+    ///
+    /// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
+    /// - a `static mut` (unsafe, not recommended)
+    /// - a local variable in a function you know never returns (like `fn main()
+    ///   -> !`), upgrading its lifetime with `transmute`. (unsafe)
+    ///
+    /// This function never returns.
+    pub fn run(&'static mut self, init: impl FnOnce(Spawner)) -> ! {
+        init(self.inner.spawner());
+
+        #[cfg(low_power_wait)]
+        let cpu = Cpu::current() as usize;
+
+        loop {
+            unsafe { self.inner.poll() };
+
+            #[cfg(low_power_wait)]
+            Self::wait_impl(cpu);
+        }
+    }
+
+    #[cfg(all(xtensa, low_power_wait))]
+    fn wait_impl(cpu: usize) {
+        // Manual critical section implementation that only masks interrupts handlers.
+        // We must not acquire the cross-core on dual-core systems because that would
+        // prevent the other core from doing useful work while this core is sleeping.
+        let token: critical_section::RawRestoreState;
+        unsafe { core::arch::asm!("rsil {0}, 5", out(reg) token) };
+
+        // we do not care about race conditions between the load and store operations,
+        // interrupts will only set this value to true.
+        // Acquire makes no sense but at this time it's slightly faster than Relaxed.
+        if SIGNAL_WORK_THREAD_MODE[cpu].load(Ordering::Acquire) {
+            // if there is work to do, exit critical section and loop back to polling
+            unsafe {
+                core::arch::asm!(
+                    "wsr.ps {0}",
+                    "rsync",
+                    in(reg) token
+                );
+            }
+        } else {
+            // `waiti` sets the `PS.INTLEVEL` when slipping into sleep because critical
+            // sections in Xtensa are implemented via increasing `PS.INTLEVEL`.
+            // The critical section ends here. Take care not add code after
+            // `waiti` if it needs to be inside the CS.
+            // Do not lower INTLEVEL below the current value.
+            match token & 0x0F {
+                0 => unsafe { core::arch::asm!("waiti 0") },
+                1 => unsafe { core::arch::asm!("waiti 1") },
+                2 => unsafe { core::arch::asm!("waiti 2") },
+                3 => unsafe { core::arch::asm!("waiti 3") },
+                4 => unsafe { core::arch::asm!("waiti 4") },
+                _ => unsafe { core::arch::asm!("waiti 5") },
+            }
+        }
+        // If this races and some waker sets the signal, we'll reset it, but still poll.
+        SIGNAL_WORK_THREAD_MODE[cpu].store(false, Ordering::Relaxed);
+    }
+
+    #[cfg(all(riscv, low_power_wait))]
+    fn wait_impl(cpu: usize) {
+        // we do not care about race conditions between the load and store operations,
+        // interrupts will only set this value to true.
+        critical_section::with(|_| {
+            // if there is work to do, loop back to polling
+            if !SIGNAL_WORK_THREAD_MODE[cpu].load(Ordering::Relaxed) {
+                // if not, wait for interrupt
+                unsafe { core::arch::asm!("wfi") };
+            }
+        });
+        // if an interrupt occurred while waiting, it will be serviced here
+        // If this races and some waker sets the signal, we'll reset it, but still poll.
+        SIGNAL_WORK_THREAD_MODE[cpu].store(false, Ordering::Relaxed);
+    }
+}
+
+impl Default for Executor {
+    fn default() -> Self {
+        Self::new()
+    }
+}

esp-hal-embassy/src/fmt.rs

@@ -0,0 +1,226 @@
+#![macro_use]
+#![allow(unused_macros)]
+
+#[cfg(all(feature = "defmt", feature = "log"))]
+compile_error!("You may not enable both `defmt` and `log` features.");
+
+macro_rules! assert {
+    ($($x:tt)*) => {
+        {
+            #[cfg(not(feature = "defmt"))]
+            ::core::assert!($($x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::assert!($($x)*);
+        }
+    };
+}
+
+macro_rules! assert_eq {
+    ($($x:tt)*) => {
+        {
+            #[cfg(not(feature = "defmt"))]
+            ::core::assert_eq!($($x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::assert_eq!($($x)*);
+        }
+    };
+}
+
+macro_rules! assert_ne {
+    ($($x:tt)*) => {
+        {
+            #[cfg(not(feature = "defmt"))]
+            ::core::assert_ne!($($x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::assert_ne!($($x)*);
+        }
+    };
+}
+
+macro_rules! debug_assert {
+    ($($x:tt)*) => {
+        {
+            #[cfg(not(feature = "defmt"))]
+            ::core::debug_assert!($($x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::debug_assert!($($x)*);
+        }
+    };
+}
+
+macro_rules! debug_assert_eq {
+    ($($x:tt)*) => {
+        {
+            #[cfg(not(feature = "defmt"))]
+            ::core::debug_assert_eq!($($x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::debug_assert_eq!($($x)*);
+        }
+    };
+}
+
+macro_rules! debug_assert_ne {
+    ($($x:tt)*) => {
+        {
+            #[cfg(not(feature = "defmt"))]
+            ::core::debug_assert_ne!($($x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::debug_assert_ne!($($x)*);
+        }
+    };
+}
+
+macro_rules! todo {
+    ($($x:tt)*) => {
+        {
+            #[cfg(not(feature = "defmt"))]
+            ::core::todo!($($x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::todo!($($x)*);
+        }
+    };
+}
+
+macro_rules! unreachable {
+    ($($x:tt)*) => {
+        {
+            #[cfg(not(feature = "defmt"))]
+            ::core::unreachable!($($x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::unreachable!($($x)*);
+        }
+    };
+}
+
+macro_rules! panic {
+    ($($x:tt)*) => {
+        {
+            #[cfg(not(feature = "defmt"))]
+            ::core::panic!($($x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::panic!($($x)*);
+        }
+    };
+}
+
+macro_rules! trace {
+    ($s:literal $(, $x:expr)* $(,)?) => {
+        {
+            #[cfg(feature = "log")]
+            ::log::trace!($s $(, $x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::trace!($s $(, $x)*);
+            #[cfg(not(any(feature = "log", feature="defmt")))]
+            let _ = ($( & $x ),*);
+        }
+    };
+}
+
+macro_rules! debug {
+    ($s:literal $(, $x:expr)* $(,)?) => {
+        {
+            #[cfg(feature = "log")]
+            ::log::debug!($s $(, $x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::debug!($s $(, $x)*);
+            #[cfg(not(any(feature = "log", feature="defmt")))]
+            let _ = ($( & $x ),*);
+        }
+    };
+}
+
+macro_rules! info {
+    ($s:literal $(, $x:expr)* $(,)?) => {
+        {
+            #[cfg(feature = "log")]
+            ::log::info!($s $(, $x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::info!($s $(, $x)*);
+            #[cfg(not(any(feature = "log", feature="defmt")))]
+            let _ = ($( & $x ),*);
+        }
+    };
+}
+
+macro_rules! warn {
+    ($s:literal $(, $x:expr)* $(,)?) => {
+        {
+            #[cfg(feature = "log")]
+            ::log::warn!($s $(, $x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::warn!($s $(, $x)*);
+            #[cfg(not(any(feature = "log", feature="defmt")))]
+            let _ = ($( & $x ),*);
+        }
+    };
+}
+
+macro_rules! error {
+    ($s:literal $(, $x:expr)* $(,)?) => {
+        {
+            #[cfg(feature = "log")]
+            ::log::error!($s $(, $x)*);
+            #[cfg(feature = "defmt")]
+            ::defmt::error!($s $(, $x)*);
+            #[cfg(not(any(feature = "log", feature="defmt")))]
+            let _ = ($( & $x ),*);
+        }
+    };
+}
+
+#[cfg(feature = "defmt")]
+macro_rules! unwrap {
+    ($($x:tt)*) => {
+        ::defmt::unwrap!($($x)*)
+    };
+}
+
+#[cfg(not(feature = "defmt"))]
+macro_rules! unwrap {
+    ($arg:expr) => {
+        match $crate::fmt::Try::into_result($arg) {
+            ::core::result::Result::Ok(t) => t,
+            ::core::result::Result::Err(e) => {
+                ::core::panic!("unwrap of `{}` failed: {:?}", ::core::stringify!($arg), e);
+            }
+        }
+    };
+    ($arg:expr, $($msg:expr),+ $(,)? ) => {
+        match $crate::fmt::Try::into_result($arg) {
+            ::core::result::Result::Ok(t) => t,
+            ::core::result::Result::Err(e) => {
+                ::core::panic!("unwrap of `{}` failed: {}: {:?}", ::core::stringify!($arg), ::core::format_args!($($msg,)*), e);
+            }
+        }
+    }
+}
+
+#[derive(Debug, Copy, Clone, Eq, PartialEq)]
+pub struct NoneError;
+
+pub trait Try {
+    type Ok;
+    type Error;
+    #[allow(unused)]
+    fn into_result(self) -> Result<Self::Ok, Self::Error>;
+}
+
+impl<T> Try for Option<T> {
+    type Ok = T;
+    type Error = NoneError;
+
+    #[inline]
+    fn into_result(self) -> Result<T, NoneError> {
+        self.ok_or(NoneError)
+    }
+}
+
+impl<T, E> Try for Result<T, E> {
+    type Ok = T;
+    type Error = E;
+
+    #[inline]
+    fn into_result(self) -> Self {
+        self
+    }
+}

esp-hal-embassy/src/lib.rs

@@ -0,0 +1,162 @@
+//! Embassy support for [esp-hal].
+//!
+//! [Embassy] is a modern asynchronous framework intended for use with embedded
+//! systems. This package provides support for building applications using
+//! Embassy with [esp-hal].
+//!
+//! Note that this crate currently requires you to enable the `unstable` feature
+//! on `esp-hal`.
+//!
+//! [esp-hal]: https://github.com/esp-rs/esp-hal
+//! [embassy]: https://github.com/embassy-rs/embassy
+//!
+//! ## Executors
+//!
+//! Two types of executors are provided:
+//!
+//! - [Executor]: A thread-mode executor
+//! - [InterruptExecutor]: An interrupt-mode executor
+//!
+//! [InterruptExecutor] can be used to achieve preemptive multitasking in
+//! asynchronous applications, which is typically something reserved for more
+//! traditional RTOS. More information can be found in the [Embassy
+//! documentation].
+//!
+//! [embassy documentation]: https://embassy.dev/book/
+//!
+//! ## Initialization
+//!
+//! Embassy **must** be initialized by calling the [init] function. This
+//! initialization must be performed *prior* to spawning any tasks.
+//!
+//! ## Feature Flags
+#![doc = document_features::document_features!()]
+#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
+#![deny(missing_docs)]
+#![cfg_attr(xtensa, feature(asm_experimental_arch))]
+#![no_std]
+
+// MUST be the first module
+mod fmt;
+
+#[cfg(not(feature = "esp32"))]
+use esp_hal::timer::systimer::Alarm;
+use esp_hal::timer::{timg::Timer as TimgTimer, AnyTimer};
+pub use macros::main;
+
+#[cfg(feature = "executors")]
+pub use self::executor::{Executor, InterruptExecutor};
+use self::time_driver::{EmbassyTimer, Timer};
+
+#[cfg(feature = "executors")]
+mod executor;
+mod time_driver;
+
+macro_rules! mk_static {
+    ($t:ty,$val:expr) => {{
+        static STATIC_CELL: static_cell::StaticCell<$t> = static_cell::StaticCell::new();
+        #[deny(unused_attributes)]
+        let x = STATIC_CELL.uninit().write(($val));
+        x
+    }};
+}
+
+/// A trait to allow better UX for initializing the timers.
+///
+/// This trait is meant to be used only for the `init` function.
+/// Calling `timers()` multiple times may panic.
+pub trait TimerCollection {
+    /// Returns the timers as a slice.
+    fn timers(self) -> &'static mut [Timer];
+}
+
+/// Helper trait to reduce boilerplate.
+///
+/// We can't blanket-implement for `Into<AnyTimer>` because of possible
+/// conflicting implementations.
+trait IntoAnyTimer: Into<AnyTimer> {}
+
+impl IntoAnyTimer for AnyTimer {}
+
+impl IntoAnyTimer for TimgTimer where Self: Into<AnyTimer> {}
+
+#[cfg(not(feature = "esp32"))]
+impl IntoAnyTimer for Alarm where Self: Into<AnyTimer> {}
+
+impl<T> TimerCollection for T
+where
+    T: IntoAnyTimer,
+{
+    fn timers(self) -> &'static mut [Timer] {
+        Timer::new(self.into()).timers()
+    }
+}
+
+impl TimerCollection for Timer {
+    fn timers(self) -> &'static mut [Timer] {
+        let timers = mk_static!([Timer; 1], [self]);
+        timers.timers()
+    }
+}
+
+impl TimerCollection for &'static mut [Timer] {
+    fn timers(self) -> &'static mut [Timer] {
+        self
+    }
+}
+
+impl<const N: usize> TimerCollection for &'static mut [Timer; N] {
+    fn timers(self) -> &'static mut [Timer] {
+        self.as_mut()
+    }
+}
+
+macro_rules! impl_array {
+    ($n:literal) => {
+        impl<T> TimerCollection for [T; $n]
+        where
+            T: IntoAnyTimer,
+        {
+            fn timers(self) -> &'static mut [Timer] {
+                mk_static!([Timer; $n], self.map(|t| Timer::new(t.into())))
+            }
+        }
+    };
+}
+
+impl_array!(2);
+impl_array!(3);
+impl_array!(4);
+
+/// Initialize embassy.
+///
+/// Call this as soon as possible, before the first timer-related operation.
+///
+/// The time driver can be one of a number of different options:
+///
+/// - A timg `Timer` instance
+/// - A systimer `Alarm` instance
+/// - An `AnyTimer` instance
+/// - A `OneShotTimer` instance
+/// - A mutable static slice of `OneShotTimer` instances
+/// - A mutable static array of `OneShotTimer` instances
+/// - A 2, 3, 4 element array of `AnyTimer` instances
+///
+/// Note that if you use the `integrated-timers` feature,
+/// you need to pass as many timers as you start executors.
+///
+/// # Examples
+///
+/// ```rust, no_run
+#[doc = esp_hal::before_snippet!()]
+/// use esp_hal::timer::timg::TimerGroup;
+///
+/// let timg0 = TimerGroup::new(peripherals.TIMG0);
+/// esp_hal_embassy::init(timg0.timer0);
+///
+/// // ... now you can spawn embassy tasks or use `Timer::after` etc.
+/// # }
+/// ```
+pub fn init(time_driver: impl TimerCollection) {
+    EmbassyTimer::init(time_driver.timers())
+}

esp-hal-embassy/src/time_driver.rs

@@ -0,0 +1,253 @@
+use core::cell::Cell;
+
+use embassy_time_driver::{AlarmHandle, Driver};
+use esp_hal::{
+    interrupt::{InterruptHandler, Priority},
+    sync::Locked,
+    time::{now, ExtU64},
+    timer::OneShotTimer,
+    Blocking,
+};
+
+pub type Timer = OneShotTimer<'static, Blocking>;
+
+enum AlarmState {
+    Created(extern "C" fn()),
+    Allocated(extern "C" fn()),
+    Initialized(&'static mut Timer),
+}
+impl AlarmState {
+    fn initialize(timer: &'static mut Timer, interrupt_handler: extern "C" fn()) -> AlarmState {
+        // If the driver is initialized, bind the interrupt handler to the
+        // timer. This ensures that alarms allocated after init are correctly
+        // bound to the core that created the executor.
+        timer.set_interrupt_handler(InterruptHandler::new(interrupt_handler, Priority::max()));
+        timer.enable_interrupt(true);
+        AlarmState::Initialized(timer)
+    }
+}
+
+struct AlarmInner {
+    pub callback: Cell<(*const (), *mut ())>,
+    pub state: AlarmState,
+}
+
+struct Alarm {
+    pub inner: Locked<AlarmInner>,
+}
+
+unsafe impl Send for Alarm {}
+
+impl Alarm {
+    pub const fn new(handler: extern "C" fn()) -> Self {
+        Self {
+            inner: Locked::new(AlarmInner {
+                callback: Cell::new((core::ptr::null(), core::ptr::null_mut())),
+                state: AlarmState::Created(handler),
+            }),
+        }
+    }
+}
+
+pub(super) struct EmbassyTimer {
+    alarms: [Alarm; MAX_SUPPORTED_ALARM_COUNT],
+    available_timers: Locked<Option<&'static mut [Timer]>>,
+}
+
+/// Repeats the `Alarm::new` constructor for each alarm, creating an interrupt
+/// handler for each of them.
+macro_rules! alarms {
+    ($($idx:literal),*) => {
+        [$(
+            Alarm::new({
+                // Not #[handler] so we don't have to store the priority - which is constant.
+                extern "C" fn handler() {
+                    DRIVER.on_interrupt($idx);
+                }
+                handler
+            })
+        ),*]
+    };
+}
+
+const MAX_SUPPORTED_ALARM_COUNT: usize = 7;
+embassy_time_driver::time_driver_impl!(static DRIVER: EmbassyTimer = EmbassyTimer {
+    alarms: alarms!(0, 1, 2, 3, 4, 5, 6),
+    available_timers: Locked::new(None),
+});
+
+impl EmbassyTimer {
+    pub(super) fn init(mut timers: &'static mut [Timer]) {
+        assert!(
+            timers.len() <= MAX_SUPPORTED_ALARM_COUNT,
+            "Maximum {} timers can be used.",
+            MAX_SUPPORTED_ALARM_COUNT
+        );
+
+        // Reset timers
+        timers.iter_mut().for_each(|timer| {
+            timer.enable_interrupt(false);
+            timer.stop();
+        });
+
+        // Initialize already allocated timers
+        for alarm in DRIVER.alarms.iter() {
+            timers = alarm.inner.with(move |alarm| {
+                if let AlarmState::Allocated(interrupt_handler) = alarm.state {
+                    // Pluck off a timer
+
+                    let Some((timer, remaining_timers)) = timers.split_first_mut() else {
+                        not_enough_timers();
+                    };
+
+                    alarm.state = AlarmState::initialize(timer, interrupt_handler);
+
+                    remaining_timers
+                } else {
+                    timers
+                }
+            });
+        }
+
+        // Store the available timers
+        DRIVER
+            .available_timers
+            .with(|available_timers| *available_timers = Some(timers));
+    }
+
+    fn on_interrupt(&self, id: usize) {
+        let (cb, ctx) = self.alarms[id].inner.with(|alarm| {
+            if let AlarmState::Initialized(timer) = &mut alarm.state {
+                timer.clear_interrupt();
+                alarm.callback.get()
+            } else {
+                unsafe {
+                    // SAFETY: `on_interrupt` is registered right when the alarm is initialized.
+                    core::hint::unreachable_unchecked()
+                }
+            }
+        });
+
+        let cb: fn(*mut ()) = unsafe {
+            // Safety:
+            // - we can ignore the possibility of `f` being unset (null) because of the
+            //   safety contract of `allocate_alarm`.
+            // - other than that we only store valid function pointers into alarm.callback
+            core::mem::transmute(cb)
+        };
+
+        cb(ctx);
+    }
+
+    /// Returns `true` if the timer was armed, `false` if the timestamp is in
+    /// the past.
+    fn arm(timer: &mut Timer, timestamp: u64) -> bool {
+        let now = now().duration_since_epoch();
+        let ts = timestamp.micros();
+
+        if ts > now {
+            let timeout = ts - now;
+            unwrap!(timer.schedule(timeout));
+            true
+        } else {
+            // If the timestamp is past, we return `false` to ask embassy to poll again
+            // immediately.
+            timer.stop();
+            false
+        }
+    }
+}
+
+impl Driver for EmbassyTimer {
+    fn now(&self) -> u64 {
+        now().ticks()
+    }
+
+    unsafe fn allocate_alarm(&self) -> Option<AlarmHandle> {
+        for (i, alarm) in self.alarms.iter().enumerate() {
+            let handle = alarm.inner.with(|alarm| {
+                let AlarmState::Created(interrupt_handler) = alarm.state else {
+                    return None;
+                };
+
+                let timer = self.available_timers.with(|available_timers| {
+                    // `allocate_alarm` may be called before `esp_hal_embassy::init()`. If
+                    // `timers` is `None`, we return `None` to signal that the alarm cannot be
+                    // initialized yet. These alarms will be initialized when `init` is called.
+                    if let Some(timers) = available_timers.take() {
+                        // If the driver is initialized, we can allocate a timer.
+                        // If this fails, we can't do anything about it.
+                        let Some((timer, rest)) = timers.split_first_mut() else {
+                            not_enough_timers();
+                        };
+                        *available_timers = Some(rest);
+                        Some(timer)
+                    } else {
+                        None
+                    }
+                });
+
+                alarm.state = match timer {
+                    Some(timer) => AlarmState::initialize(timer, interrupt_handler),
+
+                    None => {
+                        // No timers are available yet, mark the alarm as allocated.
+                        AlarmState::Allocated(interrupt_handler)
+                    }
+                };
+
+                Some(AlarmHandle::new(i as u8))
+            });
+
+            if handle.is_some() {
+                return handle;
+            }
+        }
+
+        None
+    }
+
+    fn set_alarm_callback(&self, alarm: AlarmHandle, callback: fn(*mut ()), ctx: *mut ()) {
+        let n = alarm.id() as usize;
+
+        self.alarms[n].inner.with(|alarm| {
+            alarm.callback.set((callback as *const (), ctx));
+        })
+    }
+
+    fn set_alarm(&self, alarm: AlarmHandle, timestamp: u64) -> bool {
+        let alarm = &self.alarms[alarm.id() as usize];
+
+        // If `embassy-executor/integrated-timers` is enabled and there are no pending
+        // timers, embassy still calls `set_alarm` with `u64::MAX`. By returning
+        // `true` we signal that no re-polling is necessary.
+        if timestamp == u64::MAX {
+            return true;
+        }
+
+        // The hardware fires the alarm even if timestamp is lower than the current
+        // time. In this case the interrupt handler will pend a wake-up when we exit the
+        // critical section.
+        //
+        // This is correct behavior. See https://docs.rs/embassy-time-driver/0.1.0/embassy_time_driver/trait.Driver.html#tymethod.set_alarm
+        // (... the driver should return true and arrange to call the alarm callback as
+        // soon as possible, but not synchronously.)
+
+        alarm.inner.with(|alarm| {
+            if let AlarmState::Initialized(timer) = &mut alarm.state {
+                Self::arm(timer, timestamp)
+            } else {
+                panic!("set_alarm called before esp_hal_embassy::init()")
+            }
+        })
+    }
+}
+
+#[cold]
+#[track_caller]
+fn not_enough_timers() -> ! {
+    // This is wrapped in a separate function because rustfmt does not like
+    // extremely long strings. Also, if log is used, this avoids storing the string
+    // twice.
+    panic!("There are not enough timers to allocate a new alarm. Call esp_hal_embassy::init() with the correct number of timers, or consider using one of the embassy-timer/generic-queue-X features.");
+}

esp-hal-procmacros/CHANGELOG.md

@@ -0,0 +1,60 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## [Unreleased]
+
+### Added
+
+- Added the `BuilderLite` derive macro which implements the Builder Lite pattern for a struct (#2614)
+
+### Fixed
+
+### Changed
+
+- Functions marked with `#[handler]` can now be referenced in `const` context. (#2559)
+
+### Removed
+
+- Removed the `enum-dispatch`, `interrupt`, and `ram` features (#2594)
+
+## [0.15.0] - 2024-11-20
+
+### Changed
+
+- Remove `get_` prefix from functions (#2528)
+
+## [0.14.0] - 2024-10-10
+
+## [0.13.0] - 2024-08-29
+
+## [0.12.0] - 2024-07-15
+
+## [0.11.0] - 2024-06-04
+
+## [0.10.0] - 2024-04-18
+
+## [0.9.0] - 2024-03-18
+
+## [0.8.0] - 2023-12-12
+
+## [0.7.0] - 2023-10-31
+
+## [0.6.1] - 2023-09-05
+
+## [0.6.0] - 2023-07-04
+
+## [0.5.0] - 2023-03-27
+
+## [0.4.0] - 2023-02-21
+
+## [0.2.0] - 2023-01-26
+
+## [0.1.0] - 2022-08-25
+
+- Initial release
+
+[Unreleased]: https://github.com/esp-rs/esp-hal/commits/main/esp-hal-procmacros?since=2024-11-20

esp-hal-procmacros/Cargo.toml

@@ -1,8 +1,8 @@
 [package]
 name         = "esp-hal-procmacros"
-version      = "0.8.0"
+version      = "0.15.0"
 edition      = "2021"
-rust-version = "1.76.0"
+rust-version = "1.83.0"
 description  = "Procedural macros for esp-hal"
 repository   = "https://github.com/esp-rs/esp-hal"
 license      = "MIT OR Apache-2.0"
@@ -14,34 +14,28 @@ features = ["embassy", "has-ulp-core", "interrupt", "ram", "is-ulp-core"]
 proc-macro = true
 
 [dependencies]
-darling           = "0.20.5"
-document-features = "0.2.8"
+darling           = "0.20.10"
+document-features = "0.2.10"
 litrs             = "0.4.1"
-object            = { version = "0.32.2", optional = true }
-proc-macro-crate  = "3.1.0"
-proc-macro-error  = "1.0.4"
-proc-macro2       = "1.0.78"
-quote             = "1.0.35"
-syn               = { version = "2.0.48", features = ["extra-traits", "full"] }
+object            = { version = "0.36.5", default-features = false, features = ["read_core", "elf"], optional = true }
+proc-macro-crate  = "3.2.0"
+proc-macro-error2 = "2.0.1"
+proc-macro2       = "1.0.92"
+quote             = "1.0.37"
+syn               = { version = "2.0.89", features = ["extra-traits", "full"] }
 
 [features]
 ## Provide a `#[main]` procmacro to mark the entry point for Embassy applications.
 embassy = []
-## Provide enum dispatch helpers.
-enum-dispatch = []
-## Provide an `#[interrupt]` procmacro for defining interrupt service routines.
-interrupt = []
-## Provide a `#[ram]` procmacro to place functions in RAM instead of flash.
-ram = []
-## Indicates the target devices has RTC slow memory available.
-rtc_slow = []
+## Indicates the target device has RTC slow memory available.
+rtc-slow = []
 
 #! ### Low-power Core Feature Flags
 ## Indicate that the SoC contains an LP core.
 has-lp-core = ["dep:object"]
 ## Indicate that the SoC contains a ULP core.
 has-ulp-core = ["dep:object"]
-## Provide an `#[entry]` macro for running applications on the ESP32-C6/P4's
+## Provide an `#[entry]` macro for running applications on the ESP32-C6's
 ## LP core.
 is-lp-core = []
 ## Provide an `#[entry]` macro for running applications on the ESP32-S2/S3's

esp-hal-procmacros/README.md

@@ -2,21 +2,21 @@
 
 [![Crates.io](https://img.shields.io/crates/v/esp-hal-procmacros?labelColor=1C2C2E&color=C96329&logo=Rust&style=flat-square)](https://crates.io/crates/esp-hal-procmacros)
 [![docs.rs](https://img.shields.io/docsrs/esp-hal-procmacros?labelColor=1C2C2E&color=C96329&logo=rust&style=flat-square)](https://docs.rs/esp-hal-procmacros)
+![MSRV](https://img.shields.io/badge/MSRV-1.76-blue?labelColor=1C2C2E&style=flat-square)
 ![Crates.io](https://img.shields.io/crates/l/esp-hal-procmacros?labelColor=1C2C2E&style=flat-square)
 [![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&labelColor=1C2C2E&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
 
-Procedural macros for use with the `esp-hal` family of HAL packages.
-
-Provides macros for:
-
-- Placing statics and functions into RAM
-- Marking interrupt handlers
-- Automatically creating an `embassy` executor instance and spawning the defined entry point
+Procedural macros for use with `esp-hal` and other related packages.
 
 ## [Documentation]
 
 [documentation]: https://docs.rs/esp-hal-procmacros/
 
+## Minimum Supported Rust Version (MSRV)
+
+This crate is guaranteed to compile on stable Rust 1.76 and up. It _might_
+compile with older versions but that may change in any new patch release.
+
 ## License
 
 Licensed under either of:

esp-hal-procmacros/src/embassy.rs

@@ -22,8 +22,7 @@ pub(crate) mod main {
     use std::{cell::RefCell, fmt::Display, thread};
 
     use darling::{export::NestedMeta, FromMeta};
-    use proc_macro2::{Ident, Span, TokenStream};
-    use proc_macro_crate::{crate_name, FoundCrate};
+    use proc_macro2::TokenStream;
     use quote::{quote, ToTokens};
     use syn::{ReturnType, Type};
 
@@ -35,8 +34,7 @@ pub(crate) mod main {
         f: syn::ItemFn,
         main: TokenStream,
     ) -> Result<TokenStream, TokenStream> {
-        #[allow(unused_variables)]
-        let args = Args::from_list(args).map_err(|e| e.write_errors())?;
+        let _args = Args::from_list(args).map_err(|e| e.write_errors())?;
 
         let fargs = f.sig.inputs.clone();
 
@@ -48,13 +46,13 @@ pub(crate) mod main {
         if !f.sig.generics.params.is_empty() {
             ctxt.error_spanned_by(&f.sig, "main function must not be generic");
         }
-        if !f.sig.generics.where_clause.is_none() {
+        if f.sig.generics.where_clause.is_some() {
             ctxt.error_spanned_by(&f.sig, "main function must not have `where` clauses");
         }
-        if !f.sig.abi.is_none() {
+        if f.sig.abi.is_some() {
             ctxt.error_spanned_by(&f.sig, "main function must not have an ABI qualifier");
         }
-        if !f.sig.variadic.is_none() {
+        if f.sig.variadic.is_some() {
             ctxt.error_spanned_by(&f.sig, "main function must not be variadic");
         }
         match &f.sig.output {
@@ -79,11 +77,13 @@ pub(crate) mod main {
         let out = &f.sig.output;
 
         let result = quote! {
+            #[doc(hidden)]
             #[::embassy_executor::task()]
             async fn __embassy_main(#fargs) #out {
                 #f_body
             }
 
+            #[doc(hidden)]
             unsafe fn __make_static<T>(t: &mut T) -> &'static mut T {
                 ::core::mem::transmute(t)
             }
@@ -131,12 +131,6 @@ pub(crate) mod main {
                 .push(syn::Error::new_spanned(obj.into_token_stream(), msg));
         }
 
-        /// Add one of Syn's parse errors.
-        #[allow(unused)]
-        pub fn syn_error(&self, err: syn::Error) {
-            self.errors.borrow_mut().as_mut().unwrap().push(err);
-        }
-
         /// Consume this object, producing a formatted error string if there are
         /// errors.
         pub fn check(self) -> Result<(), TokenStream> {
@@ -162,23 +156,10 @@ pub(crate) mod main {
     }
 
     pub fn main() -> TokenStream {
-        let hal_crate = if cfg!(any(feature = "is-lp-core", feature = "is-ulp-core")) {
-            crate_name("esp-lp-hal")
-        } else {
-            crate_name("esp-hal")
-        };
-
-        let executor = if let Ok(FoundCrate::Name(ref name)) = hal_crate {
-            let ident = Ident::new(&name, Span::call_site().into());
-            quote!( #ident::embassy::executor::Executor )
-        } else {
-            quote!(crate::embassy::executor::Executor)
-        };
-
         quote! {
-            #[entry]
+            #[esp_hal::entry]
             fn main() -> ! {
-                let mut executor = #executor::new();
+                let mut executor = ::esp_hal_embassy::Executor::new();
                 let executor = unsafe { __make_static(&mut executor) };
                 executor.run(|spawner| {
                     spawner.must_spawn(__embassy_main(spawner));

esp-hal-procmacros/src/enum_dispatch.rs

@@ -1,80 +0,0 @@
-use proc_macro2::{Group, TokenStream, TokenTree};
-use quote::{format_ident, quote};
-use syn::{
-    parse::{Parse, ParseStream, Result},
-    Ident,
-};
-
-#[derive(Debug)]
-pub(crate) struct MakeGpioEnumDispatchMacro {
-    pub name: String,
-    pub filter: Vec<String>,
-    pub elements: Vec<(String, usize)>,
-}
-
-impl Parse for MakeGpioEnumDispatchMacro {
-    fn parse(input: ParseStream) -> Result<Self> {
-        let name = input.parse::<Ident>()?.to_string();
-        let filter = input
-            .parse::<Group>()?
-            .stream()
-            .into_iter()
-            .map(|v| match v {
-                TokenTree::Group(_) => String::new(),
-                TokenTree::Ident(ident) => ident.to_string(),
-                TokenTree::Punct(_) => String::new(),
-                TokenTree::Literal(_) => String::new(),
-            })
-            .filter(|p| !p.is_empty())
-            .collect();
-
-        let mut elements = vec![];
-
-        let mut stream = input.parse::<Group>()?.stream().into_iter();
-        let mut element_name = String::new();
-        loop {
-            match stream.next() {
-                Some(v) => match v {
-                    TokenTree::Ident(ident) => {
-                        element_name = ident.to_string();
-                    }
-                    TokenTree::Literal(lit) => {
-                        let index = lit.to_string().parse().unwrap();
-                        elements.push((element_name.clone(), index));
-                    }
-                    _ => (),
-                },
-                None => break,
-            }
-        }
-
-        Ok(MakeGpioEnumDispatchMacro {
-            name,
-            filter,
-            elements,
-        })
-    }
-}
-
-pub(crate) fn build_match_arms(input: MakeGpioEnumDispatchMacro) -> Vec<TokenStream> {
-    let mut arms = Vec::new();
-    for (gpio_type, num) in input.elements {
-        let enum_name = format_ident!("ErasedPin");
-        let variant_name = format_ident!("Gpio{}", num);
-
-        if input.filter.contains(&gpio_type) {
-            arms.push({
-                quote! { #enum_name::#variant_name($target) => $body }
-            });
-        } else {
-            arms.push({
-                quote! {
-                    #[allow(unused)]
-                    #enum_name::#variant_name($target) => { panic!("Unsupported") }
-                }
-            });
-        }
-    }
-
-    arms
-}

esp-hal-procmacros/src/interrupt.rs

@@ -24,7 +24,7 @@ pub(crate) fn check_attr_whitelist(
 
     'o: for attr in attrs {
         for val in whitelist {
-            if eq(&attr, &val) {
+            if eq(attr, val) {
                 continue 'o;
             }
         }
@@ -35,27 +35,12 @@ pub(crate) fn check_attr_whitelist(
             }
         };
 
-        return Err(Error::new(attr.span(), &err_str).to_compile_error().into());
+        return Err(Error::new(attr.span(), err_str).to_compile_error().into());
     }
 
     Ok(())
 }
 
-pub(crate) fn extract_cfgs(attrs: Vec<Attribute>) -> (Vec<Attribute>, Vec<Attribute>) {
-    let mut cfgs = vec![];
-    let mut not_cfgs = vec![];
-
-    for attr in attrs {
-        if eq(&attr, "cfg") {
-            cfgs.push(attr);
-        } else {
-            not_cfgs.push(attr);
-        }
-    }
-
-    (cfgs, not_cfgs)
-}
-
 /// Returns `true` if `attr.path` matches `name`
 fn eq(attr: &Attribute, name: &str) -> bool {
     attr.style == AttrStyle::Outer && attr.path().is_ident(name)

esp-hal-procmacros/src/lib.rs

@@ -16,105 +16,138 @@
 //! optimized memory usage and precise handling of hardware interrupts.
 //!
 //! Key Components:
-//!  - [interrupt](attr.interrupt.html) - Attribute macro for marking interrupt
-//!    handlers. Interrupt handlers are used to handle specific hardware
-//!    interrupts generated by peripherals.<br> The macro allows users to
-//!    specify the interrupt name explicitly or use the function name to match
-//!    the interrupt.
-//!  - [main](attr.main.html) - Creates a new `executor`` instance and declares
+//!  - [`interrupt`](attr.interrupt.html) - Attribute macro for marking
+//!    interrupt handlers. Interrupt handlers are used to handle specific
+//!    hardware interrupts generated by peripherals.
+//!
+//!    The macro allows users to specify the interrupt name explicitly or use
+//!    the function name to match the interrupt.
+//!  - [`main`](attr.main.html) - Creates a new `executor` instance and declares
 //!    an application entry point spawning the corresponding function body as an
 //!    async task.
-//!  - [ram](attr.ram.html) - Attribute macro for placing statics and functions
-//!    into specific memory sections, such as SRAM or RTC RAM (slow or fast)
-//!    with different initialization options. Supported options are:
-//!      - `rtc_fast` - Use RTC fast RAM
-//!      - `rtc_slow` - Use RTC slow RAM (not all targets support slow RTC RAM)
-//!      - `uninitialized` - Skip initialization of the memory
-//!      - `zeroed` - Initialize the memory to zero
+//!  - [`ram`](attr.ram.html) - Attribute macro for placing statics and
+//!    functions into specific memory sections, such as SRAM or RTC RAM (slow or
+//!    fast) with different initialization options. See its documentation for
+//!    details.
 //!
 //! ## Examples
 //!
-//! #### `interrupt` macro
-//!
-//! Requires the `interrupt` feature to be enabled.
-//!
-//! ```no_run
-//! #[interrupt]
-//! fn INTR_NAME() {
-//!     // Interrupt handling code here
-//! }
-//! ```
-//!
 //! #### `main` macro
 //!
 //! Requires the `embassy` feature to be enabled.
 //!
-//! ```no_run
+//! ```rust, no_run
 //! #[main]
 //! async fn main(spawner: Spawner) {
 //!     // Your application's entry point
 //! }
 //! ```
 //!
-//! #### `ram` macro
-//!
-//! Requires the `ram` feature to be enabled.
-//!
-//! ```no_run
-//! #[ram(rtc_fast)]
-//! static mut SOME_INITED_DATA: [u8; 2] = [0xaa, 0xbb];
-//!
-//! #[ram(rtc_fast, uninitialized)]
-//! static mut SOME_UNINITED_DATA: [u8; 2] = [0; 2];
-//!
-//! #[ram(rtc_fast, zeroed)]
-//! static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8];
-//! ```
-//!
 //! ## Feature Flags
 #![doc = document_features::document_features!()]
 #![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
 
-#[allow(unused)]
-use proc_macro::TokenStream;
+use darling::{ast::NestedMeta, Error, FromMeta};
+use proc_macro::{Span, TokenStream};
+use proc_macro2::Ident;
+use proc_macro_crate::{crate_name, FoundCrate};
+use proc_macro_error2::abort;
+use quote::{format_ident, quote};
+use syn::{
+    parse,
+    parse::Error as ParseError,
+    spanned::Spanned,
+    Data,
+    DataStruct,
+    GenericArgument,
+    Item,
+    ItemFn,
+    Path,
+    PathArguments,
+    PathSegment,
+    ReturnType,
+    Type,
+};
+
+use self::interrupt::{check_attr_whitelist, WhiteListCaller};
 
 #[cfg(feature = "embassy")]
 mod embassy;
-#[cfg(feature = "enum-dispatch")]
-mod enum_dispatch;
-#[cfg(feature = "interrupt")]
 mod interrupt;
-#[cfg(any(feature = "is-lp-core", feature = "is-ulp-core"))]
+#[cfg(any(
+    feature = "is-lp-core",
+    feature = "is-ulp-core",
+    feature = "has-lp-core",
+    feature = "has-ulp-core"
+))]
 mod lp_core;
 
-#[cfg(feature = "ram")]
 #[derive(Debug, Default, darling::FromMeta)]
 #[darling(default)]
 struct RamArgs {
     rtc_fast: bool,
     rtc_slow: bool,
-    uninitialized: bool,
+    persistent: bool,
     zeroed: bool,
 }
 
-/// This attribute allows placing statics and functions into ram.
+/// Sets which segment of RAM to use for a function or static and how it should
+/// be initialized.
 ///
-/// Options that can be specified are rtc_slow or rtc_fast to use the
-/// RTC slow or RTC fast ram instead of the normal SRAM.
+/// Requires the `ram` feature.
 ///
-/// The uninitialized option will skip initialization of the memory
-/// (e.g. to persist it across resets or deep sleep mode for the RTC RAM)
+/// # Options
 ///
-/// Not all targets support RTC slow ram.
-#[cfg(feature = "ram")]
+/// - `rtc_fast`: Use RTC fast RAM.
+/// - `rtc_slow`: Use RTC slow RAM. **Note**: not available on all targets.
+/// - `persistent`: Persist the contents of the `static` across resets. See [the
+///   section below](#persistent) for details.
+/// - `zeroed`: Initialize the memory of the `static` to zero. The initializer
+///   expression will be discarded. Types used must implement
+///   [`bytemuck::Zeroable`].
+///
+/// Using both `rtc_fast` and `rtc_slow` or `persistent` and `zeroed` together
+/// is an error.
+///
+/// ## `persistent`
+///
+/// Initialize the memory to zero after the initial boot. Thereafter,
+/// initialization is skipped to allow communication across `software_reset()`,
+/// deep sleep, watchdog timeouts, etc.
+///
+/// Types used must implement [`bytemuck::AnyBitPattern`].
+///
+/// ### Warnings
+///
+/// - A system-level or lesser reset occurring before the ram has been zeroed
+///   *could* skip initialization and start the application with the static
+///   filled with random bytes.
+/// - There is no way to keep some kinds of resets from happening while updating
+///   a persistent static—not even a critical section.
+///
+/// If these are issues for your application, consider adding a checksum
+/// alongside the data.
+///
+/// # Examples
+///
+/// ```rust, no_run
+/// #[ram(rtc_fast)]
+/// static mut SOME_INITED_DATA: [u8; 2] = [0xaa, 0xbb];
+///
+/// #[ram(rtc_fast, persistent)]
+/// static mut SOME_PERSISTENT_DATA: [u8; 2] = [0; 2];
+///
+/// #[ram(rtc_fast, zeroed)]
+/// static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8];
+/// ```
+///
+/// See the `ram` example in the esp-hal repository for a full usage example.
+///
+/// [`bytemuck::AnyBitPattern`]: https://docs.rs/bytemuck/1.9.0/bytemuck/trait.AnyBitPattern.html
+/// [`bytemuck::Zeroable`]: https://docs.rs/bytemuck/1.9.0/bytemuck/trait.Zeroable.html
 #[proc_macro_attribute]
-#[proc_macro_error::proc_macro_error]
+#[proc_macro_error2::proc_macro_error]
 pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream {
-    use darling::{ast::NestedMeta, Error, FromMeta};
-    use proc_macro::Span;
-    use proc_macro_error::abort;
-    use syn::{parse, Item};
-
     let attr_args = match NestedMeta::parse_meta_list(args.into()) {
         Ok(v) => v,
         Err(e) => {
@@ -125,7 +158,7 @@ pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream {
     let RamArgs {
         rtc_fast,
         rtc_slow,
-        uninitialized,
+        persistent,
         zeroed,
     } = match FromMeta::from_list(&attr_args) {
         Ok(v) => v,
@@ -136,7 +169,7 @@ pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream {
 
     let item: Item = parse(input).expect("failed to parse input");
 
-    #[cfg(not(feature = "rtc_slow"))]
+    #[cfg(not(feature = "rtc-slow"))]
     if rtc_slow {
         abort!(
             Span::call_site(),
@@ -145,7 +178,7 @@ pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream {
     }
 
     let is_fn = matches!(item, Item::Fn(_));
-    let section_name = match (is_fn, rtc_fast, rtc_slow, uninitialized, zeroed) {
+    let section_name = match (is_fn, rtc_fast, rtc_slow, persistent, zeroed) {
         (true, false, false, false, false) => Ok(".rwtext"),
         (true, true, false, false, false) => Ok(".rtc_fast.text"),
         (true, false, true, false, false) => Ok(".rtc_slow.text"),
@@ -153,11 +186,11 @@ pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream {
         (false, false, false, false, false) => Ok(".data"),
 
         (false, true, false, false, false) => Ok(".rtc_fast.data"),
-        (false, true, false, true, false) => Ok(".rtc_fast.noinit"),
+        (false, true, false, true, false) => Ok(".rtc_fast.persistent"),
         (false, true, false, false, true) => Ok(".rtc_fast.bss"),
 
         (false, false, true, false, false) => Ok(".rtc_slow.data"),
-        (false, false, true, true, false) => Ok(".rtc_slow.noinit"),
+        (false, false, true, true, false) => Ok(".rtc_slow.persistent"),
         (false, false, true, false, true) => Ok(".rtc_slow.bss"),
 
         _ => Err(()),
@@ -176,94 +209,89 @@ pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream {
         }
     };
 
+    let trait_check = if zeroed {
+        Some("zeroable")
+    } else if persistent {
+        Some("persistable")
+    } else {
+        None
+    };
+    let trait_check = trait_check.map(|name| {
+        use proc_macro_crate::{crate_name, FoundCrate};
+
+        let hal = Ident::new(
+            if let Ok(FoundCrate::Name(ref name)) = crate_name("esp-hal") {
+                name
+            } else {
+                "crate"
+            },
+            Span::call_site().into(),
+        );
+
+        let assertion = quote::format_ident!("assert_is_{name}");
+        let Item::Static(ref item) = item else {
+            abort!(item, "Expected a `static`");
+        };
+        let ty = &item.ty;
+        quote::quote! {
+            const _: () = #hal::__macro_implementation::#assertion::<#ty>();
+        }
+    });
+
     let output = quote::quote! {
         #section
         #item
+        #trait_check
     };
 
     output.into()
 }
 
-/// Marks a function as an interrupt handler
+/// Mark a function as an interrupt handler.
 ///
-/// Used to handle on of the [interrupts](enum.Interrupt.html).
+/// Optionally a priority can be specified, e.g. `#[handler(priority =
+/// esp_hal::interrupt::Priority::Priority2)]`.
 ///
-/// When specified between braces (`#[interrupt(example)]`) that interrupt will
-/// be used and the function can have an arbitrary name. Otherwise the name of
-/// the function must be the name of the interrupt.
-///
-/// Example usage:
-///
-/// ```rust
-/// #[interrupt]
-/// fn GPIO() {
-///     // code
-/// }
-/// ```
-///
-/// The interrupt context can also be supplied by adding a argument to the
-/// interrupt function for example, on Xtensa based chips:
-///
-/// ```rust
-/// fn GPIO(context: &mut xtensa_lx_rt::exception::Context) {
-///     // code
-/// }
-/// ```
-#[cfg(feature = "interrupt")]
+/// If no priority is given, `Priority::min()` is assumed
 #[proc_macro_attribute]
-pub fn interrupt(args: TokenStream, input: TokenStream) -> TokenStream {
-    use std::iter;
+#[proc_macro_error2::proc_macro_error]
+pub fn handler(args: TokenStream, input: TokenStream) -> TokenStream {
+    #[derive(Debug, FromMeta)]
+    struct MacroArgs {
+        priority: Option<syn::Expr>,
+    }
 
-    use darling::{ast::NestedMeta, Error};
-    use proc_macro::Span;
-    use proc_macro2::Ident;
-    use proc_macro_crate::{crate_name, FoundCrate};
-    use proc_macro_error::abort;
-    use quote::quote;
-    use syn::{
-        parse::Error as ParseError,
-        spanned::Spanned,
-        ItemFn,
-        Meta,
-        ReturnType,
-        Type,
-        Visibility,
-    };
-
-    use self::interrupt::{check_attr_whitelist, extract_cfgs, WhiteListCaller};
-
-    let mut f: ItemFn = syn::parse(input).expect("`#[interrupt]` must be applied to a function");
+    let mut f: ItemFn = syn::parse(input).expect("`#[handler]` must be applied to a function");
+    let original_span = f.span();
 
     let attr_args = match NestedMeta::parse_meta_list(args.into()) {
         Ok(v) => v,
         Err(e) => {
-            return TokenStream::from(Error::from(e).write_errors());
+            return TokenStream::from(darling::Error::from(e).write_errors());
         }
     };
 
-    if attr_args.len() > 1 {
-        abort!(
-            Span::call_site(),
-            "This attribute accepts zero or 1 arguments"
-        )
-    }
-
-    let ident = f.sig.ident.clone();
-    let mut ident_s = &ident.clone();
-
-    if attr_args.len() == 1 {
-        if let NestedMeta::Meta(Meta::Path(x)) = &attr_args[0] {
-            ident_s = x.get_ident().unwrap();
-        } else {
-            abort!(
-                Span::call_site(),
-                format!(
-                    "This attribute accepts a string attribute {:?}",
-                    attr_args[0]
-                )
-            )
+    let args = match MacroArgs::from_list(&attr_args) {
+        Ok(v) => v,
+        Err(e) => {
+            return TokenStream::from(e.write_errors());
         }
-    }
+    };
+
+    let root = Ident::new(
+        if let Ok(FoundCrate::Name(ref name)) = crate_name("esp-hal") {
+            name
+        } else {
+            "crate"
+        },
+        Span::call_site().into(),
+    );
+
+    let priority = if let Some(priority) = args.priority {
+        quote::quote!( #priority )
+    } else {
+        quote::quote! { #root::interrupt::Priority::min() }
+    };
 
     // XXX should we blacklist other attributes?
 
@@ -272,7 +300,6 @@ pub fn interrupt(args: TokenStream, input: TokenStream) -> TokenStream {
     }
 
     let valid_signature = f.sig.constness.is_none()
-        && f.vis == Visibility::Inherited
         && f.sig.abi.is_none()
         && f.sig.generics.params.is_empty()
         && f.sig.generics.where_clause.is_none()
@@ -290,393 +317,49 @@ pub fn interrupt(args: TokenStream, input: TokenStream) -> TokenStream {
     if !valid_signature {
         return ParseError::new(
             f.span(),
-            "`#[interrupt]` handlers must have signature `[unsafe] fn([&mut Context]) [-> !]`",
+            "`#[handler]` handlers must have signature `[unsafe] fn([&mut Context]) [-> !]`",
         )
         .to_compile_error()
         .into();
     }
 
+    f.sig.abi = syn::parse_quote_spanned!(original_span => extern "C");
+    let orig = f.sig.ident;
+    let vis = f.vis.clone();
     f.sig.ident = Ident::new(
-        &format!("__esp_hal_internal_{}", f.sig.ident),
+        &format!("__esp_hal_internal_{}", orig),
         proc_macro2::Span::call_site(),
     );
+    let new = f.sig.ident.clone();
 
-    let hal_crate = if cfg!(any(feature = "is-lp-core", feature = "is-ulp-core")) {
-        crate_name("esp-lp-hal")
-    } else {
-        crate_name("esp-hal")
-    };
-
-    let interrupt_in_hal_crate = if let Ok(FoundCrate::Name(ref name)) = hal_crate {
-        let ident = Ident::new(&name, Span::call_site().into());
-        quote!( #ident::peripherals::Interrupt::#ident_s )
-    } else {
-        quote!( crate::peripherals::Interrupt::#ident_s )
-    };
-
-    f.block.stmts.extend(iter::once(
-        syn::parse2(quote! {{
-            // Check that this interrupt actually exists
-            #interrupt_in_hal_crate;
-        }})
-        .unwrap(),
-    ));
-
-    let tramp_ident = Ident::new(
-        &format!("{}_trampoline", f.sig.ident),
-        proc_macro2::Span::call_site(),
-    );
-    let ident = &f.sig.ident;
-
-    let (ref cfgs, ref attrs) = extract_cfgs(f.attrs.clone());
-
-    let export_name = ident_s.to_string();
-
-    let trap_frame_in_hal_crate = if let Ok(FoundCrate::Name(ref name)) = hal_crate {
-        let ident = Ident::new(&name, Span::call_site().into());
-        quote!( #ident::trapframe::TrapFrame )
-    } else {
-        quote!(crate::trapframe::TrapFrame)
-    };
-
-    let context_call =
-        (f.sig.inputs.len() == 1).then(|| Ident::new("context", proc_macro2::Span::call_site()));
-
-    quote!(
-        #(#cfgs)*
-        #(#attrs)*
-        #[doc(hidden)]
-        #[export_name = #export_name]
-        pub unsafe extern "C" fn #tramp_ident(context: &mut #trap_frame_in_hal_crate) {
-            #ident(
-                #context_call
-            )
-        }
-
-        #[inline(always)]
+    quote::quote_spanned!(original_span =>
         #f
+
+        #[allow(non_upper_case_globals)]
+        #vis const #orig: #root::interrupt::InterruptHandler = #root::interrupt::InterruptHandler::new(#new, #priority);
     )
     .into()
 }
 
-/// Create an enum for erased GPIO pins, using the enum-dispatch pattern
-///
-/// Only used internally
-#[cfg(feature = "enum-dispatch")]
-#[proc_macro]
-pub fn make_gpio_enum_dispatch_macro(input: TokenStream) -> TokenStream {
-    use quote::{format_ident, quote};
-
-    use self::enum_dispatch::{build_match_arms, MakeGpioEnumDispatchMacro};
-
-    let input = syn::parse_macro_input!(input as MakeGpioEnumDispatchMacro);
-
-    let macro_name = format_ident!("{}", input.name);
-    let arms = build_match_arms(input);
-
-    quote! {
-        #[doc(hidden)]
-        #[macro_export]
-        macro_rules! #macro_name {
-            ($m:ident, $target:ident, $body:block) => {
-                match $m {
-                    #(#arms)*
-                }
-            }
-        }
-
-        pub(crate) use #macro_name;
-    }
-    .into()
-}
-
 /// Load code to be run on the LP/ULP core.
 ///
 /// ## Example
-/// ```no_run
+/// ```rust, no_run
 /// let lp_core_code = load_lp_code!("path.elf");
 /// lp_core_code.run(&mut lp_core, lp_core::LpCoreWakeupSource::HpCpu, lp_pin);
 /// ````
 #[cfg(any(feature = "has-lp-core", feature = "has-ulp-core"))]
 #[proc_macro]
 pub fn load_lp_code(input: TokenStream) -> TokenStream {
-    use std::{fs, path::Path};
-
-    use litrs::StringLit;
-    use object::{File, Object, ObjectSection, ObjectSymbol, Section, SectionKind};
-    use parse::Error;
-    use proc_macro::Span;
-    use proc_macro_crate::{crate_name, FoundCrate};
-    use quote::quote;
-    use syn::{parse, Ident};
-
-    let hal_crate = if cfg!(any(feature = "is-lp-core", feature = "is-ulp-core")) {
-        crate_name("esp-lp-hal")
-    } else {
-        crate_name("esp-hal")
-    };
-
-    let hal_crate = if let Ok(FoundCrate::Name(ref name)) = hal_crate {
-        let ident = Ident::new(&name, Span::call_site().into());
-        quote!( #ident )
-    } else {
-        quote!(crate)
-    };
-
-    let first_token = match input.into_iter().next() {
-        Some(token) => token,
-        None => {
-            return Error::new(
-                Span::call_site().into(),
-                "You need to give the path to an ELF file",
-            )
-            .to_compile_error()
-            .into();
-        }
-    };
-    let arg = match StringLit::try_from(&first_token) {
-        Ok(arg) => arg,
-        Err(_) => {
-            return Error::new(
-                Span::call_site().into(),
-                "You need to give the path to an ELF file",
-            )
-            .to_compile_error()
-            .into();
-        }
-    };
-    let elf_file = arg.value();
-
-    if !Path::new(elf_file).exists() {
-        return Error::new(Span::call_site().into(), "File not found")
-            .to_compile_error()
-            .into();
-    }
-
-    let bin_data = fs::read(elf_file).unwrap();
-    let obj_file = File::parse(&*bin_data).unwrap();
-    let sections = obj_file.sections();
-
-    let mut sections: Vec<Section> = sections
-        .into_iter()
-        .filter(|section| match section.kind() {
-            SectionKind::Text
-            | SectionKind::ReadOnlyData
-            | SectionKind::Data
-            | SectionKind::UninitializedData => true,
-            _ => false,
-        })
-        .collect();
-    sections.sort_by(|a, b| a.address().partial_cmp(&b.address()).unwrap());
-
-    let mut binary: Vec<u8> = Vec::new();
-    let mut last_address = if cfg!(feature = "has-lp-core") {
-        0x5000_0000
-    } else {
-        0x0
-    };
-
-    for section in sections {
-        if section.address() > last_address {
-            for _ in 0..(section.address() - last_address) {
-                binary.push(0);
-            }
-        }
-
-        binary.extend_from_slice(section.data().unwrap());
-        last_address = section.address() + section.size();
-    }
-
-    let magic_symbol = obj_file
-        .symbols()
-        .find(|s| s.name().unwrap().starts_with("__ULP_MAGIC_"));
-
-    if let None = magic_symbol {
-        return Error::new(
-            Span::call_site().into(),
-            "Given file doesn't seem to be an LP/ULP core application.",
-        )
-        .to_compile_error()
-        .into();
-    }
-
-    let magic_symbol = magic_symbol.unwrap().name().unwrap();
-
-    let magic_symbol = magic_symbol.trim_start_matches("__ULP_MAGIC_");
-    let args: Vec<proc_macro2::TokenStream> = magic_symbol
-        .split("$")
-        .into_iter()
-        .map(|t| {
-            let t = t.replace("GpioPin", "LowPowerPin");
-            t.parse().unwrap()
-        })
-        .filter(|v: &proc_macro2::TokenStream| !v.is_empty())
-        .collect();
-
-    #[cfg(feature = "has-lp-core")]
-    let imports = quote! {
-        use #hal_crate::lp_core::LpCore;
-        use #hal_crate::lp_core::LpCoreWakeupSource;
-        use #hal_crate::gpio::lp_gpio::LowPowerPin;
-        use #hal_crate::gpio::*;
-        use #hal_crate::uart::lp_uart::LpUart;
-        use #hal_crate::i2c::lp_i2c::LpI2c;
-    };
-    #[cfg(feature = "has-ulp-core")]
-    let imports = quote! {
-        use #hal_crate::ulp_core::UlpCore as LpCore;
-        use #hal_crate::ulp_core::UlpCoreWakeupSource as LpCoreWakeupSource;
-        use #hal_crate::gpio::*;
-    };
-
-    #[cfg(feature = "has-lp-core")]
-    let rtc_code_start = quote! { _rtc_fast_data_start };
-    #[cfg(feature = "has-ulp-core")]
-    let rtc_code_start = quote! { _rtc_slow_data_start };
-
-    quote! {
-        {
-            #imports
-
-            struct LpCoreCode {}
-
-            static LP_CODE: &[u8] = &[#(#binary),*];
-
-            extern "C" {
-                static #rtc_code_start: u32;
-            }
-
-            unsafe {
-                core::ptr::copy_nonoverlapping(LP_CODE as *const _ as *const u8, &#rtc_code_start as *const u32 as *mut u8, LP_CODE.len());
-            }
-
-            impl LpCoreCode {
-                pub fn run(
-                    &self,
-                    lp_core: &mut LpCore,
-                    wakeup_source: LpCoreWakeupSource,
-                    #(_: #args),*
-                ) {
-                    lp_core.run(wakeup_source);
-                }
-            }
-
-            LpCoreCode {}
-        }
-    }
-    .into()
+    lp_core::load_lp_code(input)
 }
 
+/// Marks the entry function of a LP core / ULP program.
 #[cfg(any(feature = "is-lp-core", feature = "is-ulp-core"))]
-#[proc_macro_error::proc_macro_error]
 #[proc_macro_attribute]
+#[proc_macro_error2::proc_macro_error]
 pub fn entry(args: TokenStream, input: TokenStream) -> TokenStream {
-    use proc_macro2::{Ident, Span};
-    use proc_macro_crate::{crate_name, FoundCrate};
-    use quote::{format_ident, quote};
-    use syn::{
-        parse::{self, Error},
-        parse_macro_input,
-        spanned::Spanned,
-        FnArg,
-        ItemFn,
-    };
-
-    use self::lp_core::{extract_pin, get_simplename, make_magic_symbol_name};
-
-    let found_crate = crate_name("esp-lp-hal").expect("esp-lp-hal is present in `Cargo.toml`");
-    let hal_crate = match found_crate {
-        FoundCrate::Itself => quote!(esp_lp_hal),
-        FoundCrate::Name(name) => {
-            let ident = Ident::new(&name, Span::call_site());
-            quote!( #ident::Something )
-        }
-    };
-
-    if !args.is_empty() {
-        return Error::new(Span::call_site(), "This attribute accepts no arguments")
-            .to_compile_error()
-            .into();
-    }
-
-    let f = parse_macro_input!(input as ItemFn);
-
-    let mut argument_types = Vec::new();
-    let mut create_peripheral = Vec::new();
-
-    let mut used_pins: Vec<u8> = Vec::new();
-
-    for (num, arg) in f.sig.inputs.iter().enumerate() {
-        let param_name = format_ident!("param{}", num);
-        match arg {
-            FnArg::Receiver(_) => {
-                return Error::new(arg.span(), "invalid argument")
-                    .to_compile_error()
-                    .into();
-            }
-            FnArg::Typed(t) => {
-                match get_simplename(&t.ty).as_str() {
-                    "GpioPin" => {
-                        let pin = extract_pin(&t.ty);
-                        if used_pins.contains(&pin) {
-                            return Error::new(arg.span(), "duplicate pin")
-                                .to_compile_error()
-                                .into();
-                        }
-                        used_pins.push(pin);
-                        create_peripheral.push(quote!(
-                            let mut #param_name = unsafe { the_hal::gpio::conjure().unwrap() };
-                        ));
-                    }
-                    "LpUart" => {
-                        create_peripheral.push(quote!(
-                            let mut #param_name = unsafe { the_hal::uart::conjure() };
-                        ));
-                    }
-                    "LpI2c" => {
-                        create_peripheral.push(quote!(
-                            let mut #param_name = unsafe { the_hal::i2c::conjure() };
-                        ));
-                    }
-                    _ => {
-                        return Error::new(arg.span(), "invalid argument to main")
-                            .to_compile_error()
-                            .into();
-                    }
-                }
-                argument_types.push(t);
-            }
-        }
-    }
-
-    let magic_symbol_name = make_magic_symbol_name(&argument_types);
-
-    let param_names: Vec<Ident> = argument_types
-        .into_iter()
-        .enumerate()
-        .map(|(num, _)| format_ident!("param{}", num))
-        .collect();
-
-    quote!(
-        #[allow(non_snake_case)]
-        #[export_name = "main"]
-        pub fn __risc_v_rt__main() -> ! {
-            #[export_name = #magic_symbol_name]
-            static ULP_MAGIC: [u32; 0] = [0u32; 0];
-
-            unsafe { ULP_MAGIC.as_ptr().read_volatile(); }
-
-            use #hal_crate as the_hal;
-            #(
-                #create_peripheral;
-            )*
-
-            main(#(#param_names),*);
-        }
-
-        #f
-    )
-    .into()
+    lp_core::entry(args, input)
 }
 
 /// Creates a new `executor` instance and declares an application entry point
@@ -713,3 +396,129 @@ pub fn main(args: TokenStream, item: TokenStream) -> TokenStream {
 
     run(&args.meta, f, main()).unwrap_or_else(|x| x).into()
 }
+
+/// Automatically implement the [Builder Lite] pattern for a struct.
+///
+/// This will create an `impl` which contains methods for each field of a
+/// struct, allowing users to easily set the values. The generated methods will
+/// be the field name prefixed with `with_`, and calls to these methods can be
+/// chained as needed.
+///
+/// ## Example
+///
+/// ```rust, no_run
+/// #[derive(Default)]
+/// enum MyEnum {
+///     #[default]
+///     A,
+///     B,
+/// }
+///
+/// #[derive(Default, BuilderLite)]
+/// #[non_exhaustive]
+/// struct MyStruct {
+///     enum_field: MyEnum,
+///     bool_field: bool,
+///     option_field: Option<i32>,
+/// }
+///
+/// MyStruct::default()
+///     .with_enum_field(MyEnum::B)
+///     .with_bool_field(true)
+///     .with_option_field(-5);
+/// ```
+///
+/// [Builder Lite]: https://matklad.github.io/2022/05/29/builder-lite.html
+#[proc_macro_derive(BuilderLite)]
+pub fn builder_lite_derive(item: TokenStream) -> TokenStream {
+    let input = syn::parse_macro_input!(item as syn::DeriveInput);
+
+    let span = input.span();
+    let ident = input.ident;
+
+    let mut fns = Vec::new();
+    if let Data::Struct(DataStruct { fields, .. }) = &input.data {
+        for field in fields {
+            let field_ident = field.ident.as_ref().unwrap();
+            let field_type = &field.ty;
+
+            let function_ident = format_ident!("with_{}", field_ident);
+
+            let maybe_path_type = extract_type_path(field_type)
+                .and_then(|path| extract_option_segment(path))
+                .and_then(|path_seg| match path_seg.arguments {
+                    PathArguments::AngleBracketed(ref params) => params.args.first(),
+                    _ => None,
+                })
+                .and_then(|generic_arg| match *generic_arg {
+                    GenericArgument::Type(ref ty) => Some(ty),
+                    _ => None,
+                });
+
+            let (field_type, field_assigns) = if let Some(inner_type) = maybe_path_type {
+                (inner_type, quote! { Some(#field_ident) })
+            } else {
+                (field_type, quote! { #field_ident })
+            };
+
+            fns.push(quote! {
+                #[doc = concat!(" Assign the given value to the `", stringify!(#field_ident) ,"` field.")]
+                #[must_use]
+                pub fn #function_ident(mut self, #field_ident: #field_type) -> Self {
+                    self.#field_ident = #field_assigns;
+                    self
+                }
+            });
+
+            if maybe_path_type.is_some() {
+                let function_ident = format_ident!("with_{}_none", field_ident);
+                fns.push(quote! {
+                    #[doc = concat!(" Set the value of `", stringify!(#field_ident), "` to `None`.")]
+                    #[must_use]
+                    pub fn #function_ident(mut self) -> Self {
+                        self.#field_ident = None;
+                        self
+                    }
+                });
+            }
+        }
+    } else {
+        return ParseError::new(
+            span,
+            "#[derive(Builder)] is only defined for structs, not for enums or unions!",
+        )
+        .to_compile_error()
+        .into();
+    }
+
+    let implementation = quote! {
+        #[automatically_derived]
+        impl #ident {
+            #(#fns)*
+        }
+    };
+
+    implementation.into()
+}
+
+// https://stackoverflow.com/a/56264023
+fn extract_type_path(ty: &Type) -> Option<&Path> {
+    match *ty {
+        Type::Path(ref typepath) if typepath.qself.is_none() => Some(&typepath.path),
+        _ => None,
+    }
+}
+
+// https://stackoverflow.com/a/56264023
+fn extract_option_segment(path: &Path) -> Option<&PathSegment> {
+    let idents_of_path = path.segments.iter().fold(String::new(), |mut acc, v| {
+        acc.push_str(&v.ident.to_string());
+        acc.push('|');
+        acc
+    });
+
+    vec!["Option|", "std|option|Option|", "core|option|Option|"]
+        .into_iter()
+        .find(|s| idents_of_path == *s)
+        .and_then(|_| path.segments.last())
+}

esp-hal-procmacros/src/lp_core.rs

@@ -1,71 +1,375 @@
+#[allow(unused)]
+use proc_macro::TokenStream;
 use quote::quote;
-use syn::{GenericArgument, PatType, PathArguments, Type};
 
-pub(crate) fn make_magic_symbol_name(args: &Vec<&PatType>) -> String {
-    let mut res = String::from("__ULP_MAGIC_");
-    for &a in args {
-        let t = &a.ty;
-        let quoted = to_string(&t);
-        res.push_str(&quoted);
-        res.push_str("$");
+#[cfg(any(feature = "is-lp-core", feature = "is-ulp-core"))]
+pub fn entry(args: TokenStream, input: TokenStream) -> TokenStream {
+    use proc_macro2::{Ident, Span};
+    use proc_macro_crate::{crate_name, FoundCrate};
+    use quote::format_ident;
+    use syn::{
+        parse::Error,
+        parse_macro_input,
+        spanned::Spanned,
+        FnArg,
+        GenericArgument,
+        ItemFn,
+        PatType,
+        PathArguments,
+        Type,
+    };
+
+    pub(crate) fn make_magic_symbol_name(args: &Vec<&PatType>) -> String {
+        let mut res = String::from("__ULP_MAGIC_");
+        for &a in args {
+            let t = &a.ty;
+            let quoted = to_string(t);
+            res.push_str(&quoted);
+            res.push('$');
+        }
+
+        res
     }
 
-    res
-}
+    pub(crate) fn simplename(t: &Type) -> String {
+        match t {
+            Type::Path(p) => p.path.segments.last().unwrap().ident.to_string(),
+            _ => String::new(),
+        }
+    }
 
-pub(crate) fn get_simplename(t: &Type) -> String {
-    String::from(match t {
-        Type::Path(p) => String::from(&p.path.segments.last().unwrap().ident.to_string()),
-        _ => String::new(),
-    })
-}
-
-pub(crate) fn extract_pin(ty: &Type) -> u8 {
-    let mut res = 255u8;
-    if let Type::Path(p) = ty {
-        let segment = p.path.segments.last().unwrap();
-        if let PathArguments::AngleBracketed(g) = &segment.arguments {
-            for arg in &g.args {
-                match arg {
-                    GenericArgument::Type(t) => {
-                        res = extract_pin(t);
+    pub(crate) fn extract_pin(ty: &Type) -> u8 {
+        let mut res = 255u8;
+        if let Type::Path(p) = ty {
+            let segment = p.path.segments.last().unwrap();
+            if let PathArguments::AngleBracketed(g) = &segment.arguments {
+                for arg in &g.args {
+                    match arg {
+                        GenericArgument::Type(t) => {
+                            res = extract_pin(t);
+                        }
+                        GenericArgument::Const(c) => {
+                            res = quote! { #c }.to_string().parse().unwrap();
+                        }
+                        _ => (),
                     }
-                    GenericArgument::Const(c) => {
-                        res = (&quote! { #c }.to_string()).parse().unwrap();
-                    }
-                    _ => (),
                 }
             }
         }
+
+        res
+    }
+
+    // This is a specialized implementation - won't fit other use-cases
+    fn to_string(ty: &Type) -> String {
+        let mut res = String::new();
+        if let Type::Path(p) = ty {
+            let segment = p.path.segments.last().unwrap();
+            res.push_str(&segment.ident.to_string());
+
+            if let PathArguments::AngleBracketed(g) = &segment.arguments {
+                res.push('<');
+                let mut pushed = false;
+                for arg in &g.args {
+                    if pushed {
+                        res.push(',');
+                    }
+
+                    match arg {
+                        GenericArgument::Type(t) => {
+                            pushed = true;
+                            res.push_str(&to_string(t));
+                        }
+                        GenericArgument::Const(c) => {
+                            pushed = true;
+                            res.push_str(&quote! { #c }.to_string());
+                        }
+                        _ => (),
+                    }
+                }
+                res.push('>');
+            }
+        }
+
+        res
+    }
+
+    let found_crate = crate_name("esp-lp-hal").expect("esp-lp-hal is present in `Cargo.toml`");
+    let hal_crate = match found_crate {
+        FoundCrate::Itself => quote!(esp_lp_hal),
+        FoundCrate::Name(name) => {
+            let ident = Ident::new(&name, Span::call_site());
+            quote!( #ident )
+        }
+    };
+
+    if !args.is_empty() {
+        return Error::new(Span::call_site(), "This attribute accepts no arguments")
+            .to_compile_error()
+            .into();
+    }
+
+    let f = parse_macro_input!(input as ItemFn);
+
+    let mut argument_types = Vec::new();
+    let mut create_peripheral = Vec::new();
+
+    let mut used_pins: Vec<u8> = Vec::new();
+
+    for (num, arg) in f.sig.inputs.iter().enumerate() {
+        let param_name = format_ident!("param{}", num);
+        match arg {
+            FnArg::Receiver(_) => {
+                return Error::new(arg.span(), "invalid argument")
+                    .to_compile_error()
+                    .into();
+            }
+            FnArg::Typed(t) => {
+                match simplename(&t.ty).as_str() {
+                    "Output" => {
+                        let pin = extract_pin(&t.ty);
+                        if used_pins.contains(&pin) {
+                            return Error::new(arg.span(), "duplicate pin")
+                                .to_compile_error()
+                                .into();
+                        }
+                        used_pins.push(pin);
+                        create_peripheral.push(quote!(
+                            let mut #param_name = unsafe { the_hal::gpio::conjure_output().unwrap() };
+                        ));
+                    }
+                    "Input" => {
+                        let pin = extract_pin(&t.ty);
+                        if used_pins.contains(&pin) {
+                            return Error::new(arg.span(), "duplicate pin")
+                                .to_compile_error()
+                                .into();
+                        }
+                        used_pins.push(pin);
+                        create_peripheral.push(quote!(
+                            let mut #param_name = unsafe { the_hal::gpio::conjure_input().unwrap() };
+                        ));
+                    }
+                    "LpUart" => {
+                        create_peripheral.push(quote!(
+                            let mut #param_name = unsafe { the_hal::uart::conjure() };
+                        ));
+                    }
+                    "LpI2c" => {
+                        create_peripheral.push(quote!(
+                            let mut #param_name = unsafe { the_hal::i2c::conjure() };
+                        ));
+                    }
+                    _ => {
+                        return Error::new(arg.span(), "invalid argument to main")
+                            .to_compile_error()
+                            .into();
+                    }
+                }
+                argument_types.push(t);
+            }
+        }
     }
 
-    res
+    let magic_symbol_name = make_magic_symbol_name(&argument_types);
+
+    let param_names: Vec<Ident> = argument_types
+        .into_iter()
+        .enumerate()
+        .map(|(num, _)| format_ident!("param{}", num))
+        .collect();
+
+    quote!(
+        #[allow(non_snake_case)]
+        #[export_name = "main"]
+        pub fn __risc_v_rt__main() -> ! {
+            #[export_name = #magic_symbol_name]
+            static ULP_MAGIC: [u32; 0] = [0u32; 0];
+
+            unsafe { ULP_MAGIC.as_ptr().read_volatile(); }
+
+            use #hal_crate as the_hal;
+            #(
+                #create_peripheral;
+            )*
+
+            main(#(#param_names),*);
+        }
+
+        #f
+    )
+    .into()
 }
 
-// This is a specialized implementation - won't fit other use-cases
-fn to_string(ty: &Type) -> String {
-    let mut res = String::new();
-    if let Type::Path(p) = ty {
-        let segment = p.path.segments.last().unwrap();
-        res.push_str(&segment.ident.to_string());
+#[cfg(any(feature = "has-lp-core", feature = "has-ulp-core"))]
+pub fn load_lp_code(input: TokenStream) -> TokenStream {
+    use std::{fs, path::Path};
 
-        if let PathArguments::AngleBracketed(g) = &segment.arguments {
-            res.push_str("<");
-            for arg in &g.args {
-                match arg {
-                    GenericArgument::Type(t) => {
-                        res.push_str(&to_string(t));
-                    }
-                    GenericArgument::Const(c) => {
-                        res.push_str(",");
-                        res.push_str(&quote! { #c }.to_string());
-                    }
-                    _ => (),
-                }
-            }
-            res.push_str(">");
+    use litrs::StringLit;
+    use object::{File, Object, ObjectSection, ObjectSymbol, Section, SectionKind};
+    use parse::Error;
+    use proc_macro::Span;
+    use proc_macro_crate::{crate_name, FoundCrate};
+    use syn::{parse, Ident};
+
+    let hal_crate = if cfg!(any(feature = "is-lp-core", feature = "is-ulp-core")) {
+        crate_name("esp-lp-hal")
+    } else {
+        crate_name("esp-hal")
+    };
+
+    let hal_crate = if let Ok(FoundCrate::Name(ref name)) = hal_crate {
+        let ident = Ident::new(name, Span::call_site().into());
+        quote!( #ident )
+    } else {
+        quote!(crate)
+    };
+
+    let first_token = match input.into_iter().next() {
+        Some(token) => token,
+        None => {
+            return Error::new(
+                Span::call_site().into(),
+                "You need to give the path to an ELF file",
+            )
+            .to_compile_error()
+            .into();
         }
+    };
+    let arg = match StringLit::try_from(&first_token) {
+        Ok(arg) => arg,
+        Err(_) => {
+            return Error::new(
+                Span::call_site().into(),
+                "You need to give the path to an ELF file",
+            )
+            .to_compile_error()
+            .into();
+        }
+    };
+    let elf_file = arg.value();
+
+    if !Path::new(elf_file).exists() {
+        return Error::new(Span::call_site().into(), "File not found")
+            .to_compile_error()
+            .into();
     }
 
-    res
+    let bin_data = fs::read(elf_file).unwrap();
+    let obj_file = File::parse(&*bin_data).unwrap();
+    let sections = obj_file.sections();
+
+    let mut sections: Vec<Section> = sections
+        .into_iter()
+        .filter(|section| {
+            matches!(
+                section.kind(),
+                SectionKind::Text
+                    | SectionKind::ReadOnlyData
+                    | SectionKind::Data
+                    | SectionKind::UninitializedData
+            )
+        })
+        .collect();
+    sections.sort_by(|a, b| a.address().partial_cmp(&b.address()).unwrap());
+
+    let mut binary: Vec<u8> = Vec::new();
+    let mut last_address = if cfg!(feature = "has-lp-core") {
+        0x5000_0000
+    } else {
+        0x0
+    };
+
+    for section in sections {
+        if section.address() > last_address {
+            let fill = section.address() - last_address;
+            binary.extend(std::iter::repeat(0).take(fill as usize));
+        }
+
+        binary.extend_from_slice(section.data().unwrap());
+        last_address = section.address() + section.size();
+    }
+
+    let magic_symbol = obj_file
+        .symbols()
+        .find(|s| s.name().unwrap().starts_with("__ULP_MAGIC_"));
+
+    let magic_symbol = if let Some(magic_symbol) = magic_symbol {
+        magic_symbol.name().unwrap()
+    } else {
+        return Error::new(
+            Span::call_site().into(),
+            "Given file doesn't seem to be an LP/ULP core application.",
+        )
+        .to_compile_error()
+        .into();
+    };
+
+    let magic_symbol = magic_symbol.trim_start_matches("__ULP_MAGIC_");
+    let args: Vec<proc_macro2::TokenStream> = magic_symbol
+        .split("$")
+        .map(|t| {
+            let t = if t.contains("OutputOpenDrain") {
+                t.replace("OutputOpenDrain", "LowPowerOutputOpenDrain")
+            } else {
+                t.replace("Output", "LowPowerOutput")
+            };
+            let t = t.replace("Input", "LowPowerInput");
+            t.parse().unwrap()
+        })
+        .filter(|v: &proc_macro2::TokenStream| !v.is_empty())
+        .collect();
+
+    #[cfg(feature = "has-lp-core")]
+    let imports = quote! {
+        use #hal_crate::lp_core::LpCore;
+        use #hal_crate::lp_core::LpCoreWakeupSource;
+        use #hal_crate::gpio::lp_io::LowPowerOutput;
+        use #hal_crate::gpio::*;
+        use #hal_crate::uart::lp_uart::LpUart;
+        use #hal_crate::i2c::lp_i2c::LpI2c;
+    };
+    #[cfg(feature = "has-ulp-core")]
+    let imports = quote! {
+        use #hal_crate::ulp_core::UlpCore as LpCore;
+        use #hal_crate::ulp_core::UlpCoreWakeupSource as LpCoreWakeupSource;
+        use #hal_crate::gpio::*;
+    };
+
+    #[cfg(feature = "has-lp-core")]
+    let rtc_code_start = quote! { _rtc_fast_data_start };
+    #[cfg(feature = "has-ulp-core")]
+    let rtc_code_start = quote! { _rtc_slow_data_start };
+
+    quote! {
+        {
+            #imports
+
+            struct LpCoreCode {}
+
+            static LP_CODE: &[u8] = &[#(#binary),*];
+
+            extern "C" {
+                static #rtc_code_start: u32;
+            }
+
+            unsafe {
+                core::ptr::copy_nonoverlapping(LP_CODE as *const _ as *const u8, &#rtc_code_start as *const u32 as *mut u8, LP_CODE.len());
+            }
+
+            impl LpCoreCode {
+                pub fn run(
+                    &self,
+                    lp_core: &mut LpCore,
+                    wakeup_source: LpCoreWakeupSource,
+                    #(_: #args),*
+                ) {
+                    lp_core.run(wakeup_source);
+                }
+            }
+
+            LpCoreCode {}
+        }
+    }
+    .into()
 }

esp-hal-smartled/Cargo.toml

@@ -1,37 +0,0 @@
-[package]
-name         = "esp-hal-smartled"
-version      = "0.8.0"
-edition      = "2021"
-rust-version = "1.76.0"
-description  = "RMT adapter for smartleds"
-repository   = "https://github.com/esp-rs/esp-hal"
-license      = "MIT OR Apache-2.0"
-
-[package.metadata.docs.rs]
-features = ["esp32c3"]
-targets  = ["riscv32imc-unknown-none-elf"]
-
-[dependencies]
-defmt             = { version = "=0.3.5", optional = true }
-document-features = "0.2.7"
-esp-hal           = { version = "0.15.0", path = "../esp-hal" }
-fugit             = "0.3.7"
-smart-leds-trait  = "0.3.0"
-
-[features]
-## Implement `defmt::Format` on certain types.
-defmt = ["dep:defmt", "esp-hal/defmt"]
-
-#! ### Chip Support Feature Flags
-## Target the ESP32.
-esp32   = ["esp-hal/esp32"]
-## Target the ESP32-C3.
-esp32c3 = ["esp-hal/esp32c3"]
-## Target the ESP32-C6.
-esp32c6 = ["esp-hal/esp32c6"]
-## Target the ESP32-H2.
-esp32h2 = ["esp-hal/esp32h2"]
-## Target the ESP32-S2.
-esp32s2 = ["esp-hal/esp32s2"]
-## Target the ESP32-S3.
-esp32s3 = ["esp-hal/esp32s3"]

esp-hal-smartled/README.md

@@ -1,27 +0,0 @@
-# esp-hal-smartled
-
-[![Crates.io](https://img.shields.io/crates/v/esp-hal-smartled?labelColor=1C2C2E&color=C96329&logo=Rust&style=flat-square)](https://crates.io/crates/esp-hal-smartled)
-[![docs.rs](https://img.shields.io/docsrs/esp-hal-smartled?labelColor=1C2C2E&color=C96329&logo=rust&style=flat-square)](https://docs.rs/esp-hal-smartled)
-![Crates.io](https://img.shields.io/crates/l/esp-hal-smartled?labelColor=1C2C2E&style=flat-square)
-[![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&labelColor=1C2C2E&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
-
-This adapter allows for the use of an RMT output channel to easily interact with RGB LEDs and use the convenience functions of the [`smart-leds`](https://crates.io/crates/smart-leds) crate.
-
-## [Documentation]
-
-[documentation]: https://docs.rs/esp-hal-smartled/
-
-## License
-
-Licensed under either of:
-
-- Apache License, Version 2.0 ([LICENSE-APACHE](../LICENSE-APACHE) or http://www.apache.org/licenses/LICENSE-2.0)
-- MIT license ([LICENSE-MIT](../LICENSE-MIT) or http://opensource.org/licenses/MIT)
-
-at your option.
-
-### Contribution
-
-Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in
-the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without
-any additional terms or conditions.

esp-hal-smartled/src/lib.rs

@@ -1,202 +0,0 @@
-//! This adapter allows for the use of an RMT output channel to easily interact
-//! with RGB LEDs and use the convenience functions of the
-//! [`smart-leds`](https://crates.io/crates/smart-leds) crate.
-//!
-//! This is a simple implementation where every LED is adressed in an
-//! individual RMT operation. This is working perfectly fine in blocking mode,
-//! but in case this is used in combination with interrupts that might disturb
-//! the sequential sending, an alternative implementation (addressing the LEDs
-//! in a sequence in a single RMT send operation) might be required!
-//!
-//! ## Example
-//!
-//! ```rust,ignore
-//! let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
-//! let rmt = Rmt::new(peripherals.RMT, 80u32.MHz(), &clocks).unwrap();
-//!
-//! let rmt_buffer = smartLedBuffer!(1);
-//! let mut led = SmartLedsAdapter::new(rmt.channel0, io.pins.gpio2, rmt_buffer);
-//! ```
-//!
-//! ## Feature Flags
-#![doc = document_features::document_features!()]
-#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
-#![deny(missing_docs)]
-#![no_std]
-
-use core::{fmt::Debug, slice::IterMut};
-
-use esp_hal::{
-    clock::Clocks,
-    gpio::OutputPin,
-    peripheral::Peripheral,
-    rmt::{Error as RmtError, PulseCode, TxChannel, TxChannelConfig, TxChannelCreator},
-};
-use smart_leds_trait::{SmartLedsWrite, RGB8};
-
-const SK68XX_CODE_PERIOD: u32 = 1200;
-const SK68XX_T0H_NS: u32 = 320;
-const SK68XX_T0L_NS: u32 = SK68XX_CODE_PERIOD - SK68XX_T0H_NS;
-const SK68XX_T1H_NS: u32 = 640;
-const SK68XX_T1L_NS: u32 = SK68XX_CODE_PERIOD - SK68XX_T1H_NS;
-
-/// All types of errors that can happen during the conversion and transmission
-/// of LED commands
-#[derive(Debug)]
-#[cfg_attr(feature = "defmt", derive(defmt::Format))]
-pub enum LedAdapterError {
-    /// Raised in the event that the provided data container is not large enough
-    BufferSizeExceeded,
-    /// Raised if something goes wrong in the transmission,
-    TransmissionError(RmtError),
-}
-
-/// Macro to allocate a buffer sized for a specific number of LEDs to be
-/// addressed.
-///
-/// Attempting to use more LEDs that the buffer is configured for will result in
-/// an `LedAdapterError:BufferSizeExceeded` error.
-#[macro_export]
-macro_rules! smartLedBuffer {
-    ( $buffer_size: literal ) => {
-        // The size we're assigning here is calculated as following
-        //  (
-        //   Nr. of LEDs
-        //   * channels (r,g,b -> 3)
-        //   * pulses per channel 8)
-        //  ) + 1 additional pulse for the end delimiter
-        [0u32; $buffer_size * 24 + 1]
-    };
-}
-
-/// Adapter taking an RMT channel and a specific pin and providing RGB LED
-/// interaction functionality using the `smart-leds` crate
-pub struct SmartLedsAdapter<TX, const BUFFER_SIZE: usize>
-where
-    TX: TxChannel,
-{
-    channel: Option<TX>,
-    rmt_buffer: [u32; BUFFER_SIZE],
-    pulses: (u32, u32),
-}
-
-impl<'d, TX, const BUFFER_SIZE: usize> SmartLedsAdapter<TX, BUFFER_SIZE>
-where
-    TX: TxChannel,
-{
-    /// Create a new adapter object that drives the pin using the RMT channel.
-    pub fn new<C, O>(
-        channel: C,
-        pin: impl Peripheral<P = O> + 'd,
-        rmt_buffer: [u32; BUFFER_SIZE],
-        clocks: &Clocks,
-    ) -> SmartLedsAdapter<TX, BUFFER_SIZE>
-    where
-        O: OutputPin + 'd,
-        C: TxChannelCreator<'d, TX, O>,
-    {
-        let config = TxChannelConfig {
-            clk_divider: 1,
-            idle_output_level: false,
-            carrier_modulation: false,
-            idle_output: true,
-
-            ..TxChannelConfig::default()
-        };
-
-        let channel = channel.configure(pin, config).unwrap();
-
-        // Assume the RMT peripheral is set up to use the APB clock
-        let src_clock = clocks.apb_clock.to_MHz();
-
-        Self {
-            channel: Some(channel),
-            rmt_buffer,
-            pulses: (
-                u32::from(PulseCode {
-                    level1: true,
-                    length1: ((SK68XX_T0H_NS * src_clock) / 1000) as u16,
-                    level2: false,
-                    length2: ((SK68XX_T0L_NS * src_clock) / 1000) as u16,
-                }),
-                u32::from(PulseCode {
-                    level1: true,
-                    length1: ((SK68XX_T1H_NS * src_clock) / 1000) as u16,
-                    level2: false,
-                    length2: ((SK68XX_T1L_NS * src_clock) / 1000) as u16,
-                }),
-            ),
-        }
-    }
-
-    fn convert_rgb_to_pulse(
-        value: RGB8,
-        mut_iter: &mut IterMut<u32>,
-        pulses: (u32, u32),
-    ) -> Result<(), LedAdapterError> {
-        Self::convert_rgb_channel_to_pulses(value.g, mut_iter, pulses)?;
-        Self::convert_rgb_channel_to_pulses(value.r, mut_iter, pulses)?;
-        Self::convert_rgb_channel_to_pulses(value.b, mut_iter, pulses)?;
-
-        Ok(())
-    }
-
-    fn convert_rgb_channel_to_pulses(
-        channel_value: u8,
-        mut_iter: &mut IterMut<u32>,
-        pulses: (u32, u32),
-    ) -> Result<(), LedAdapterError> {
-        for position in [128, 64, 32, 16, 8, 4, 2, 1] {
-            *mut_iter.next().ok_or(LedAdapterError::BufferSizeExceeded)? =
-                match channel_value & position {
-                    0 => pulses.0,
-                    _ => pulses.1,
-                }
-        }
-
-        Ok(())
-    }
-}
-
-impl<TX, const BUFFER_SIZE: usize> SmartLedsWrite for SmartLedsAdapter<TX, BUFFER_SIZE>
-where
-    TX: TxChannel,
-{
-    type Error = LedAdapterError;
-    type Color = RGB8;
-
-    /// Convert all RGB8 items of the iterator to the RMT format and
-    /// add them to internal buffer, then start a singular RMT operation
-    /// based on that buffer.
-    fn write<T, I>(&mut self, iterator: T) -> Result<(), Self::Error>
-    where
-        T: IntoIterator<Item = I>,
-        I: Into<Self::Color>,
-    {
-        // We always start from the beginning of the buffer
-        let mut seq_iter = self.rmt_buffer.iter_mut();
-
-        // Add all converted iterator items to the buffer.
-        // This will result in an `BufferSizeExceeded` error in case
-        // the iterator provides more elements than the buffer can take.
-        for item in iterator {
-            Self::convert_rgb_to_pulse(item.into(), &mut seq_iter, self.pulses)?;
-        }
-
-        // Finally, add an end element.
-        *seq_iter.next().ok_or(LedAdapterError::BufferSizeExceeded)? = 0;
-
-        // Perform the actual RMT operation. We use the u32 values here right away.
-        let channel = self.channel.take().unwrap();
-        match channel.transmit(&self.rmt_buffer).wait() {
-            Ok(chan) => {
-                self.channel = Some(chan);
-                Ok(())
-            }
-            Err((e, chan)) => {
-                self.channel = Some(chan);
-                Err(LedAdapterError::TransmissionError(e))
-            }
-        }
-    }
-}

esp-hal/.clippy.toml

@@ -0,0 +1 @@
+avoid-breaking-exported-api = false

esp-hal/Cargo.toml

@@ -1,80 +1,96 @@
 [package]
-name         = "esp-hal"
-version      = "0.15.0"
-edition      = "2021"
-rust-version = "1.76.0"
-description  = "Bare-metal HAL for Espressif devices"
-repository   = "https://github.com/esp-rs/esp-hal"
-license      = "MIT OR Apache-2.0"
-links        = "esp-hal"
+name          = "esp-hal"
+version       = "0.22.0"
+edition       = "2021"
+rust-version  = "1.83.0"
+description   = "Bare-metal HAL for Espressif devices"
+documentation = "https://docs.esp-rs.org/esp-hal/"
+keywords      = ["embedded", "embedded-hal", "esp32", "espressif", "hal"]
+categories    = ["embedded", "hardware-support", "no-std"]
+repository    = "https://github.com/esp-rs/esp-hal"
+license       = "MIT OR Apache-2.0"
+links         = "esp-hal"
+
+[package.metadata.docs.rs]
+default-target = "riscv32imac-unknown-none-elf"
+features       = ["esp32c6"]
+rustdoc-args   = ["--cfg", "docsrs"]
 
 [dependencies]
-bitflags             = "2.4.2"
-bitfield             = "0.14.0"
-cfg-if               = "1.0.0"
-critical-section     = "1.1.2"
-defmt                = { version = "=0.3.5", optional = true }
-document-features    = "0.2.8"
-embassy-executor     = { version = "0.5.0", optional = true }
-embassy-futures      = { version = "0.1.1", optional = true }
-embassy-sync         = { version = "0.5.0", optional = true }
-embassy-time-driver  = { version = "0.1.0", optional = true }
-embedded-can         = { version = "0.4.1", optional = true }
-embedded-dma         = "0.2.0"
-embedded-hal         = { version = "0.2.7", features = ["unproven"] }
-embedded-hal-1       = { version = "1.0.0", optional = true, package = "embedded-hal" }
-embedded-hal-async   = { version = "1.0.0", optional = true }
-embedded-hal-nb      = { version = "1.0.0", optional = true }
-embedded-io          = { version = "0.6.1", optional = true }
-embedded-io-async    = { version = "0.6.1", optional = true }
-enumset              = "1.1.3"
-esp-synopsys-usb-otg = { version = "0.4.0", optional = true, features = ["fs", "esp32sx"] }
-fugit                = "0.3.7"
-log                  = { version = "0.4.20", optional = true }
-nb                   = "1.1.0"
-paste                = "1.0.14"
-portable-atomic      = { version = "1.6.0", default-features = false }
-procmacros           = { version = "0.8.0", features = ["enum-dispatch", "ram"], package = "esp-hal-procmacros", path = "../esp-hal-procmacros" }
-riscv                = { version = "0.11.0", optional = true }
-strum                = { version = "0.25.0", default-features = false, features = ["derive"] }
-void                 = { version = "1.0.2", default-features = false }
-usb-device           = { version = "0.3.1", optional = true }
-rand_core            = "0.6.4"
-ufmt-write           = { version = "0.1.0", optional = true }
-xtensa-lx            = { version = "0.9.0", optional = true }
+bitflags                 = "2.6.0"
+bytemuck                 = "1.19.0"
+bitfield                 = "0.17.0"
+cfg-if                   = "1.0.0"
+chrono                   = { version = "0.4.38", default-features = false }
+critical-section         = "1.2.0"
+defmt                    = { version = "0.3.8", optional = true }
+delegate                 = "0.13.1"
+digest                   = { version = "0.10.7", default-features = false, optional = true }
+document-features        = "0.2.10"
+embassy-embedded-hal     = { version = "0.2.0", optional = true }
+embassy-futures          = "0.1.1"
+embassy-sync             = "0.6.1"
+embassy-usb-driver       = { version = "0.1.0", optional = true }
+embassy-usb-synopsys-otg = { version = "0.2.0", optional = true }
+embedded-can             = { version = "0.4.1", optional = true }
+embedded-hal             = "1.0.0"
+embedded-hal-async       = "1.0.0"
+embedded-hal-nb          = "1.0.0"
+embedded-io              = { version = "0.6.1", optional = true }
+embedded-io-async        = { version = "0.6.1", optional = true }
+enumset                  = "1.1.5"
+esp-build                = { version = "0.1.0", path = "../esp-build" }
+esp-synopsys-usb-otg     = { version = "0.4.2", optional = true, features = ["fs", "esp32sx"] }
+fugit                    = "0.3.7"
+instability              = "0.3.6"
+log                      = { version = "0.4.22", optional = true }
+nb                       = "1.1.0"
+paste                    = "1.0.15"
+portable-atomic          = { version = "1.9.0", default-features = false }
+procmacros               = { version = "0.15.0", package = "esp-hal-procmacros", path = "../esp-hal-procmacros" }
+strum                    = { version = "0.26.3", default-features = false, features = ["derive"] }
+void                     = { version = "1.0.2", default-features = false }
+usb-device               = { version = "0.3.2", optional = true }
+rand_core                = "0.6.4"
+ufmt-write               = "0.1.0"
 
 # IMPORTANT:
 # Each supported device MUST have its PAC included below along with a
 # corresponding feature.
-esp32   = { version = "0.29.0", features = ["critical-section"], optional = true }
-esp32c2 = { version = "0.18.0", features = ["critical-section"], optional = true }
-esp32c3 = { version = "0.21.0", features = ["critical-section"], optional = true }
-esp32c6 = { version = "0.12.0", features = ["critical-section"], optional = true }
-esp32h2 = { version = "0.8.0",  features = ["critical-section"], optional = true }
-esp32p4 = { version = "0.1.0",  features = ["critical-section"], optional = true }
-esp32s2 = { version = "0.20.0", features = ["critical-section"], optional = true }
-esp32s3 = { version = "0.24.0", features = ["critical-section"], optional = true }
+esp32   = { version = "0.34.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
+esp32c2 = { version = "0.23.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
+esp32c3 = { version = "0.26.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
+esp32c6 = { version = "0.17.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
+esp32h2 = { version = "0.13.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
+esp32s2 = { version = "0.25.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
+esp32s3 = { version = "0.29.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
 
 [target.'cfg(target_arch = "riscv32")'.dependencies]
-esp-riscv-rt = { version = "0.6.1", optional = true }
+riscv            = { version = "0.12.1" }
+esp-riscv-rt     = { version = "0.9.1", path = "../esp-riscv-rt" }
+critical-section = { version = "1.2.0", features = ["restore-state-u8"] }
 
 [target.'cfg(target_arch = "xtensa")'.dependencies]
-xtensa-lx-rt = { version = "0.16.0", optional = true }
+xtensa-lx        = { version = "0.9.0", path = "../xtensa-lx" }
+xtensa-lx-rt     = { version = "0.17.2", path = "../xtensa-lx-rt" }
+critical-section = { version = "1.2.0", features = ["restore-state-u32"] }
 
 [build-dependencies]
-basic-toml = "0.1.8"
-serde      = { version = "1.0.195", features = ["derive"] }
-cfg-if = "1"
+basic-toml   = "0.1.9"
+cfg-if       = "1.0.0"
+esp-build    = { version = "0.1.0", path = "../esp-build" }
+esp-metadata = { version = "0.4.0", path = "../esp-metadata" }
+esp-config   = { version = "0.2.0", path = "../esp-config", features = ["build"] }
+serde        = { version = "1.0.215", features = ["derive"] }
 
 [features]
-default = ["rt", "vectored"]
-
-riscv  = ["dep:riscv",     "critical-section/restore-state-u8",  "esp-riscv-rt?/zero-bss"]
-xtensa = ["dep:xtensa-lx", "critical-section/restore-state-u32"]
+default = []
 
 bluetooth = []
 
-usb-otg = ["esp-synopsys-usb-otg", "usb-device"]
+usb-otg = ["dep:embassy-usb-driver", "dep:embassy-usb-synopsys-otg", "dep:esp-synopsys-usb-otg", "dep:usb-device"]
+
+__esp_hal_embassy = []
 
 ## Enable debug features in the HAL (used for development).
 debug = [
@@ -83,131 +99,77 @@ debug = [
     "esp32c3?/impl-register-debug",
     "esp32c6?/impl-register-debug",
     "esp32h2?/impl-register-debug",
-    "esp32p4?/impl-register-debug",
     "esp32s2?/impl-register-debug",
     "esp32s3?/impl-register-debug",
 ]
 ## Enable logging output using the `log` crate.
 log = ["dep:log"]
-## Enable runtime support.
-rt = [
-    "dep:esp-riscv-rt",
-    "dep:xtensa-lx-rt",
-    "esp32?/rt",
-    "esp32c2?/rt",
-    "esp32c3?/rt",
-    "esp32c6?/rt",
-    "esp32h2?/rt",
-    "esp32p4?/rt",
-    "esp32s2?/rt",
-    "esp32s3?/rt",
-]
-## Enable interrupt vectoring.
-vectored = ["procmacros/interrupt"]
 
-#! ### Chip Support Feature Flags
-## Target the ESP32.
-esp32   = ["dep:esp32",   "xtensa", "xtensa-lx/spin", "xtensa-lx-rt?/esp32"]
-## Target the ESP32-C2.
-esp32c2 = ["dep:esp32c2", "riscv",  "portable-atomic/unsafe-assume-single-core"]
-## Target the ESP32-C3.
-esp32c3 = ["dep:esp32c3", "riscv",  "portable-atomic/unsafe-assume-single-core", "rv-zero-rtc-bss"]
-## Target the ESP32-C6.
-esp32c6 = ["dep:esp32c6", "riscv",  "procmacros/has-lp-core", "rv-zero-rtc-bss"]
-## Target the ESP32-H2.
-esp32h2 = ["dep:esp32h2", "riscv", "rv-zero-rtc-bss"]
-## Target the ESP32-P4.
-esp32p4 = ["dep:esp32p4", "riscv",  "procmacros/has-lp-core", "rv-zero-rtc-bss"]
-## Target the ESP32-S2.
-esp32s2 = ["dep:esp32s2", "xtensa", "portable-atomic/critical-section", "procmacros/has-ulp-core", "xtensa-lx-rt?/esp32s2", "usb-otg"]
-## Target the ESP32-S3.
-esp32s3 = ["dep:esp32s3", "xtensa", "procmacros/has-ulp-core", "xtensa-lx/spin", "xtensa-lx-rt?/esp32s3", "usb-otg"]
+# Chip Support Feature Flags
+# Target the ESP32.
+esp32   = ["dep:esp32", "procmacros/rtc-slow", "xtensa-lx-rt/esp32"]
+# Target the ESP32-C2.
+esp32c2 = ["dep:esp32c2", "portable-atomic/unsafe-assume-single-core"]
+# Target the ESP32-C3.
+esp32c3 = ["dep:esp32c3", "esp-riscv-rt/rtc-ram", "portable-atomic/unsafe-assume-single-core"]
+# Target the ESP32-C6.
+esp32c6 = ["dep:esp32c6", "esp-riscv-rt/rtc-ram", "procmacros/has-lp-core"]
+# Target the ESP32-H2.
+esp32h2 = ["dep:esp32h2", "esp-riscv-rt/rtc-ram"]
+# Target the ESP32-S2.
+esp32s2 = ["dep:esp32s2", "portable-atomic/critical-section", "procmacros/has-ulp-core", "procmacros/rtc-slow", "usb-otg", "xtensa-lx-rt/esp32s2"]
+# Target the ESP32-S3.
+esp32s3 = ["dep:esp32s3", "procmacros/has-ulp-core", "procmacros/rtc-slow", "usb-otg", "xtensa-lx-rt/esp32s3"]
 
 #! ### RISC-V Exclusive Feature Flags
-## Enable direct interrupt vectoring.
-direct-vectoring = ["esp-riscv-rt/direct-vectoring"]
 ## Move the stack to start of RAM to get zero-cost stack overflow protection
 ## (ESP32-C6 and ESPS32-H2 only!).
 flip-link = ["esp-riscv-rt/fix-sp"]
-## Enable interrupt preemption.
-interrupt-preemption = ["esp-riscv-rt/interrupt-preemption"]
-## Configuration for placing device drivers in the IRAM for faster access.
-place-spi-driver-in-ram = []
-## Initialize the `.data` section of memory.
-rv-init-data = ["esp-riscv-rt?/init-data", "esp-riscv-rt?/init-rw-text"]
-## Zero the `.bss` section of low-power memory.
-rv-zero-rtc-bss = ["esp-riscv-rt?/zero-rtc-fast-bss"]
-## Initialize the `.data` section of low-power memory.
-rv-init-rtc-data = ["esp-riscv-rt?/init-rtc-fast-data", "esp-riscv-rt?/init-rtc-fast-text"]
 
 #! ### Trait Implementation Feature Flags
-## Enable support for asynchronous operation, with interfaces provided by
-## `embedded-hal-async` and `embedded-io-async`.
-async = [
-    "embedded-hal-async",
-    "eh1",
-    "embassy-sync",
-    "embassy-futures",
-    "embedded-io",
-    "embedded-io-async",
-]
 ## Implement `defmt::Format` on certain types.
 defmt = [
     "dep:defmt",
-    "embassy-executor?/defmt",
-    "embassy-futures?/defmt",
-    "embassy-sync?/defmt",
-    "embedded-hal-1?/defmt-03",
+    "embassy-futures/defmt",
+    "embassy-sync/defmt",
+    "embedded-hal/defmt-03",
     "embedded-io/defmt-03",
-    "embedded-io-async?/defmt-03",
+    "embedded-io-async/defmt-03",
+    "esp32?/defmt",
+    "esp32c2?/defmt",
+    "esp32c3?/defmt",
+    "esp32c6?/defmt",
+    "esp32h2?/defmt",
+    "esp32s2?/defmt",
+    "esp32s3?/defmt",
+    "fugit/defmt",
 ]
-## Implement the traits defined in the `1.0.0` releases of `embedded-hal` and
-## `embedded-hal-nb` for the relevant peripherals.
-eh1 = ["embedded-hal-1", "embedded-hal-nb", "embedded-can"]
-## Implement the traits defined in `embedded-io` for certain peripherals.
-embedded-io = ["dep:embedded-io"]
-## Implement the `ufmt_write::uWrite` trait for certain peripherals.
-ufmt = ["dep:ufmt-write"]
-
-#! ### Embassy Feature Flags
-## Enable support for `embassy`, a modern asynchronous embedded framework.
-embassy = ["embassy-time-driver", "procmacros/embassy"]
-## Use the interrupt-mode embassy executor.
-embassy-executor-interrupt = ["embassy", "embassy-executor"]
-## Use the thread-mode embassy executor.
-embassy-executor-thread = ["embassy", "embassy-executor"]
-## Uses hardware timers as alarms for the executors. Using this feature
-## limits the number of executors to the number of hardware alarms provided
-## by the time driver.
-embassy-integrated-timers = ["embassy-executor?/integrated-timers"]
-## Enable the embassy time driver using the `SYSTIMER` peripheral. The
-## `SYSTIMER` peripheral has three alarams available for use. Do **not** 
-## use when targeting an `esp32s2`.
-embassy-time-systick-16mhz = ["embassy-time-driver/tick-hz-16_000_000"]
-## Enable the embassy time driver using the `SYSTIMER` peripheral. The
-## `SYSTIMER` peripheral has three alarams available for use. Must only 
-## be used when targeting an `esp32s2`.
-embassy-time-systick-80mhz = ["embassy-time-driver/tick-hz-80_000_000"]
-## Enable the embassy time driver using the `TIMG0` peripheral. The `TIMG0`
-## peripheral has two alarms available for use.
-embassy-time-timg0 = ["embassy-time-driver/tick-hz-1_000_000"]
 
 #! ### PSRAM Feature Flags
-## Use externally connected PSRAM (2MB).
-psram-2m = []
-## Use externally connected PSRAM (4MB).
-psram-4m = []
-## Use externally connected PSRAM (8MB).
-psram-8m = []
-## PSRAM 80Mhz frequency support
-psram-80mhz = []
+## Use externally connected Quad PSRAM
+quad-psram = []
 
-#! ### Octal RAM Feature Flags
-## Use externally connected Octal RAM (2MB).
-opsram-2m  = []
-## Use externally connected Octal RAM (4MB).
-opsram-4m  = []
-## Use externally connected Octal RAM (8MB).
-opsram-8m  = []
-## Use externally connected Octal RAM (16MB).
-opsram-16m = []
+## Use externally connected Octal RAM
+octal-psram = []
+
+# This feature is intended for testing; you probably don't want to enable it:
+ci = ["defmt", "bluetooth"]
+
+#! ### Unstable APIs
+#! Unstable APIs are drivers and features that are not yet ready for general use.
+#! They may be incomplete, have bugs, or be subject to change without notice.
+#! Unstable APIs are not covered by semver guarantees.
+
+## Enables APIs that are not stable and thus come with no stability guarantees.
+unstable = [
+    "dep:embassy-embedded-hal",
+    "dep:embedded-can",
+    "dep:embedded-io",
+    "dep:embedded-io-async",
+]
+
+[lints.clippy]
+mixed_attributes_style = "allow"
+
+[lints.rust]
+unexpected_cfgs = { level = "warn", check-cfg = ['cfg(host_os, values("windows"))'] }

esp-hal/MIGRATING-0.20.md

@@ -0,0 +1,349 @@
+# Migration Guide from 0.20.x to v0.21.x
+
+## Cargo Features
+
+A number of trait implementations which were previously feature-gated are now implemented by default. The following Cargo features have been removed:
+
+- `async`
+- `embedded-hal-02`
+- `embedded-hal`
+- `embedded-io`
+- `embedded-io-async`
+- `ufmt`
+
+If your project enables any of these features, simply remove them from your Cargo manifest and things should continue to work as expected.
+
+## HAL Initialization
+
+Instead of manually grabbing peripherals and setting up clocks, you should now call `esp_hal::init`.
+
+```diff
+ use esp_hal::{
+-    clock::ClockControl,
+-    peripherals::Peripherals,
+     prelude::*,
+-    system::SystemControl,
+ };
+
+ #[entry]
+ fn main() -> ! {
+-    let peripherals = Peripherals::take();
+-    let system = SystemControl::new(peripherals.SYSTEM);
+-    let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
++    let peripherals = esp_hal::init(esp_hal::Config::default());
+
+     // ...
+ }
+```
+
+## GPIO changes
+
+- The `GpioN` type aliasses are no longer available. You can use `GpioPin<N>` instead.
+- The `AnyInputOnlyPin` has been removed. Replace any use with `AnyPin`.
+- The `NoPinType` has been removed. You can use `DummyPin` in its place.
+
+### Type-erased GPIO drivers
+
+The `AnyInput`, `AnyOutput`, `AnyOutputOpenDrain` and `AnyFlex` structures have been removed.
+Instead, you can use the non-`Any` counterparts. By default, the structures will use `AnyPin` in
+their type names, which you don't have to specify.
+
+```diff
+-let pin = AnyInput::new(io.gpio0, Pull::Up);
++let pin = Input::new(io.gpio0, Pull::Up); // pin will have the type `Input<'some>` (or `Input<'some, AnyPin>` if you want to be explicit about it)
+```
+
+You can use `new_typed` if you want to keep using the typed form:
+
+```rust
+let pin = Input::new_typed(io.gpio0, Pull::Up); // pin will have the type `Input<'some, GpioPin<0>>`
+```
+
+### Creating an `AnyPin`
+
+Instead of `AnyPin::new`, you can now use the `Pin` trait's `degrade` method to obtain an `AnyPin`.
+You can now create an `AnyPin` out of input only pins (like ESP32's IO34), but trying to use such
+pins as output (or, generally, trying to use pins in ways they don't support) will panic.
+
+```diff
++ use esp_hal::gpio::Pin;
+
+-let pin = AnyPin::new(io.gpio0);
++let pin = io.gpio0.degrade();
+```
+
+### Wakeup using pin drivers
+
+You can now use pin drivers as wakeup sources.
+
+```rust
+use esp_hal::peripheral::Peripheral; // needed for `into_ref`
+
+let pin2 = Input::new(io.pins.gpio2, Pull::None);
+let mut pin3 = Input::new(io.pins.gpio3, Pull::None);
+// ... use pin2 as an input ..
+
+// Ext0
+let ext0 = Ext0WakeupSource::new(pin2, WakeupLevel::High);
+
+// Ext1
+let mut wakeup_pins: [&mut dyn RtcPin; 2] = [
+    &mut *pin_0.into_ref(),
+    &mut io.pins.gpio4, // unconfigured pins continue to work, too!
+];
+let ext1 = Ext1WakeupSource::new(&mut wakeup_pins, WakeupLevel::High);
+```
+
+## RX/TX Order
+
+Previously, our API was pretty inconsistent with the RX/TX ordering, and different peripherals had different order. Now, all
+the peripherals use rx-tx. Make sure your methods are expecting the right RX/TX order, for example an SPI DMA app should be updated to:
+
+```diff
+- let (tx_buffer, tx_descriptors, rx_buffer, rx_descriptors) = dma_buffers!(4);
++ let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(4);
+let mut dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
+let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
+
+...
+
+ let transfer = spi
+-    .dma_transfer(dma_tx_buf, dma_rx_buf)
++    .dma_transfer(dma_rx_buf, dma_tx_buf)
+    .map_err(|e| e.0)
+    .unwrap();
+```
+
+When using the asymmetric variant of the macro to create DMA buffers and descriptors make sure to swap the order of parameters
+
+```diff
+- let (tx_buffer, tx_descriptors, _, _) = dma_buffers!(32000, 0);
++ let (_, _, tx_buffer, tx_descriptors) = dma_buffers!(0, 32000);
+```
+
+## Removed constructors
+
+### UART
+
+The `Uart::new_with_default_pins` and `Uart::new_async_with_default_pins` constructors
+have been removed. Use `new` or `new_async` instead.
+
+### I2S1
+
+The `I2s::new_i2s1` constructor has been removed. Use `I2s::new` instead.
+
+## Timer changes
+
+### `ErasedTimer` rename
+
+The `ErasedTimer` has been renamed to `AnyTimer`.
+
+### `esp_hal::time::current_time` rename
+
+To avoid confusion with the `Rtc::current_time` wall clock time APIs, we've renamed `esp_hal::time::current_time` to `esp_hal::time::now()`.
+
+### RTC Wall Clock APIs
+
+Instead of the `get_time_ms`, `get_time_us`, and `get_time_raw` functions, the `Rtc` struct now provides the `current_time` function, using `chrono`'s `NaiveDateTime` struct.
+
+```diff
+let rtc = Rtc::new(peripherals.LPWR);
+- let current_time_ms = rtc.get_time_ms();
++ let current_time_ms = rtc.current_time().and_utc().timestamp_millis(); // assuming UTC
+```
+
+## PCNT input config
+
+The `PcntSource` and `PcntInputConfig` have been removed. You can use `Input` or `Flex` instead to
+configure an input pin, and pass it to `set_edge_signal` or `set_ctrl_signal`.
+
+```diff
+-   let mut pin_a = io.pins.gpio4;
+-   ch0.set_ctrl_signal(PcntSource::from_pin(
+-       &mut pin_a,
+-       PcntInputConfig { pull: Pull::Up },
+-   ));
++   ch0.set_ctrl_signal(Input::new(io.pins.gpio4, Pull::Up));
+
+-   let mut pin_b = io.pins.gpio5;
+-   ch0.set_edge_signal(PcntSource::from_pin(
+-       &mut pin_b,
+-       PcntInputConfig { pull: Pull::Down },
+-   ));
++   ch0.set_edge_signal(Input::new(io.pins.gpio5, Pull::Down));
+```
+
+## SPI pins and `NO_PIN`
+
+Use `NoPin` in place of the now-removed `NO_PIN` constant.
+
+SPI pins, when using the `with_pin` function, are no longer optional.
+You can pass `NoPin` or `Level` if you don't need a particular pin.
+
+```diff
+ let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
+-    .with_pins(Some(sclk), Some(mosi), NO_PIN, NO_PIN);
++    .with_pins(sclk, mosi, Level::Low, NoPin);
+```
+
+## I8080 type definition
+
+The I8080 driver no longer holds on to pins in its type definition.
+
+```diff
+- let _: I8080<'a, DmaChannel3, TxEightBits<AnyPin, AnyPin, AnyPin, ....>, Blocking>;
++ let _: I8080<'a, DmaChannel3, Blocking>;
+```
+
+## I8080 transfer API changes
+
+- The I8080 driver now decides bus width at transfer time, which means you don't get type inference anymore.
+- Starting a transfer moves the driver into the transfer object, allowing you to store it in a `static` or struct.
+- The transfer API no longer works with plain slices, it now works with `DmaTxBuffer`s which allow to bring your own DMA data structure and implement efficient queueing of transfers.
+- The three transfer methods (`send`, `send_dma`, `send_dma_async`) have been merged into one `send` method.
+
+```diff
+let (_, _, tx_buffer, tx_descriptors) = dma_buffers!(0, 32678);
++ let mut dma_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
+
+let mut i8080 = I8080::new(
+    lcd_cam.lcd,
+    channel.tx,
+-   tx_descriptors,
+    tx_pins,
+    20.MHz(),
+    Config::default(),
+)
+
+- i8080.send(0x12, 0, &[0, 1, 2, 3, 4]);
++ dma_buf.fill(&[0, 1, 2, 3, 4]);
++ let transfer = i8080.send(0x12u8, 0, dma_buf).unwrap();
++ // transfer.wait_for_done().await;
++ (_, i8080, dma_buf) = transfer.wait();
+```
+
+### Placing drivers in RAM is now done via esp-config
+
+We've replaced some usage of features with [esp-config](https://docs.rs/esp-config). Please remove any reference to `place-spi-driver-in-ram` in your `Cargo.toml` and migrate to the `[env]` section of `.cargo/config.toml`.
+
+```diff
+# feature in Cargo.toml
+- esp-hal = { version = "0.20", features = ["place-spi-driver-in-ram"] }
+# key in .cargo/config.toml [env] section
++ ESP_HAL_PLACE_SPI_DRIVER_IN_RAM="true"
+```
+
+## `Camera` driver now uses `DmaRxBuffer` and moves the driver into the transfer object.
+
+For one shot transfers.
+
+```diff
+let (rx_buffer, rx_descriptors, _, _) = dma_buffers!(32678, 0);
++ let dma_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
+
+let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
+let mut camera = Camera::new(
+     lcd_cam.cam,
+     channel.rx,
+-    rx_descriptors,
+     data_pins,
+     20u32.MHz(),
+);
+
+- let transfer = camera.read_dma(rx_buffer).unwrap();
+- transfer.wait();
++ let transfer = camera.receive(dma_buf).unwrap();
++ let (_, camera, buf) = transfer.wait();
+```
+
+For circular transfers.
+
+```diff
+- let (rx_buffer, rx_descriptors, _, _) = dma_buffers!(32678, 0);
++ let dma_buf = dma_rx_stream_buffer!(32678);
+
+let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
+let mut camera = Camera::new(
+     lcd_cam.cam,
+     channel.rx,
+-    rx_descriptors,
+     data_pins,
+     20u32.MHz(),
+);
+
+- let mut transfer = camera.read_dma_circular(rx_buffer).unwrap();
++ let mut transfer = camera.receive(dma_buf).unwrap();
+transfer.pop(&mut [.....]);
+transfer.pop(&mut [.....]);
+transfer.pop(&mut [.....]);
+```
+
+## PS-RAM
+
+Initializing PS-RAM now takes a chip specific config and returns start of the mapped memory and the size.
+
+Example
+
+```rust
+let (start, size) = psram::init_psram(peripherals.PSRAM, psram::PsramConfig::default());
+```
+
+If you don't specify the size of PS-RAM via `PsramConfig::size` the size of PS-RAM is derived from the RAM-chip id (or via probing in case of ESP32).
+
+`psram::psram_vaddr_start()` and `psram::PSRAM_BYTES` are removed.
+
+The features `psram-Xm` and `opsram-Xm` are removed and replaced by `quad-psram`/`octal-psram`.
+The feature `psram-80mhz` is removed and replaced by `PsramConfig`
+
+Diff of the `psram_quad.rs` example
+
+```diff
+-//% FEATURES: psram-2m
++//% FEATURES: esp-hal/quad-psram
+
+...
+
+-fn init_psram_heap() {
++fn init_psram_heap(start: *mut u8, size: usize) {
+     unsafe {
+         esp_alloc::HEAP.add_region(esp_alloc::HeapRegion::new(
+-            psram::psram_vaddr_start() as *mut u8,
+-            psram::PSRAM_BYTES,
++            start,
++            size,
+             esp_alloc::MemoryCapability::External.into(),
+         ));
+     }
+
+...
+
+-    psram::init_psram(peripherals.PSRAM);
+-    init_psram_heap();
++    let (start, size) = psram::init_psram(peripherals.PSRAM, psram::PsramConfig::default());
++    init_psram_heap(start, size);
+
+...
+
+```
+
+## eFuse
+
+Calling `Efuse::read_field_le::<bool>()` no longer compiles. Use `Efuse::read_bit()` instead.
+
+## DMA
+
+The DMA channel types have been removed from peripherals.
+
+A non-exhausitve list demonstrating this change:
+
+```diff
+-I2sTx<'static, I2S0, DmaChannel0, Async>
++I2sTx<'static, I2S0, Async>
+
+-SpiDma<'static, esp_hal::peripherals::SPI2, DmaChannel0, HalfDuplexMode, Blocking>
++SpiDma<'static, esp_hal::peripherals::SPI2, HalfDuplexMode, Blocking>
+```
+
+## `I2C` driver renamed to `I2c`
+
+To firstly match the naming in `embedded-hal`, but also because types should be `UpperCamelCase`.

esp-hal/MIGRATING-0.21.md

@@ -0,0 +1,471 @@
+# Migration Guide from 0.21.x to v0.22.x
+
+## IO changes
+
+### GPIO pins are now accessible via `Peripherals`
+
+```diff
+ let peripherals = esp_hal::init(Default::default());
+-let io = Io::new(peripherals.GPIO, peripherals.IOMUX);
+-let pin = io.pins.gpio5;
++let pin = peripherals.GPIO5;
+```
+
+### `Io` constructor changes
+
+- `new_with_priority` and `new_no_bind_interrupts` have been removed.
+  Use `set_priority` to configure the GPIO interrupt priority.
+  We no longer overwrite interrupt handlers set by user code during initialization.
+- `new` no longer takes `peripherals.GPIO`
+
+## Removed `async`-specific constructors
+
+The following async-specific constuctors have been removed:
+
+- `configure_for_async` DMA channel constructors
+- `TwaiConfiguration::new_async` and `TwaiConfiguration::new_async_no_transceiver`
+- `I2c::new_async`
+- `LcdCam::new_async`
+- `UsbSerialJtag::new_async`
+- `Rsa::new_async`
+- `Rmt::new_async`
+- `Uart::new_async`, `Uart::new_async_with_config`
+- `UartRx::new_async`, `UartRx::new_async_with_config`
+- `UartTx::new_async`, `UartTx::new_async_with_config`
+
+You can use the blocking counterparts, then call `into_async` on the returned peripheral instead.
+
+```diff
+-let mut config = twai::TwaiConfiguration::new_async(
++let mut config = twai::TwaiConfiguration::new(
+     peripherals.TWAI0,
+     loopback_pin.peripheral_input(),
+     loopback_pin,
+     twai::BaudRate::B1000K,
+     TwaiMode::SelfTest,
+-);
++).into_async();
+```
+
+Some drivers were implicitly configured to the asyncness of the DMA channel used to construct them.
+This is no longer the case, and the following drivers will always be created in blocking mode:
+
+- `i2s::master::I2s`
+- `spi::master::SpiDma` and `spi::master::SpiDmaBus`
+
+## Peripheral types are now optional
+
+You no longer have to specify the peripheral instance in the driver's type for the following
+peripherals:
+
+- SPI (both master and slave)
+- I2S
+- I2C
+- TWAI
+- UART
+
+```diff
+-Spi<'static, SPI2, FullDuplexMode>
++Spi<'static, FullDuplexMode>
+
+-SpiDma<'static, SPI2, HalfDuplexMode, Blocking>
++SpiDma<'static, HalfDuplexMode, Blocking>
+
+-I2sTx<'static, I2S0, Async>
++I2sTx<'static, Async>
+```
+
+Note that you may still specify the instance if you need to. To do this, we provide `_typed`
+versions of the constructors (for example: `new_typed`, `new_half_duplex_typed`). Please note that
+the peripheral instance has been moved to the last generic parameter position.
+
+```rust
+let spi: Spi<'static, FullDuplexMode, SPI2> = Spi::new_typed(peripherals.SPI2, 1.MHz(), SpiMode::Mode0);
+```
+
+## I2C changes
+
+The I2C master driver and related types have been moved to `esp_hal::i2c::master`.
+
+The `with_timeout` constructors have been removed. `new` and `new_typed` now take a `Config` struct
+with the available configuration options.
+
+- The default configuration is now:
+  - bus frequency: 100 kHz
+  - timeout: about 10 bus clock cycles
+
+The constructors no longer take pins. Use `with_sda` and `with_scl` instead.
+
+```diff
+-use esp_hal::i2c::I2c;
++use esp_hal::i2c::{Config, I2c};
+-let i2c = I2c::new_with_timeout(peripherals.I2C0, sda, scl, 100.kHz(), timeout);
++let i2c = I2c::new(
++    peripherals.I2C0,
++    {
++        let mut config = Config::default();
++        config.frequency = 100.kHz();
++        config.timeout = timeout;
++        config
++    },
++)
++.with_sda(sda)
++.with_scl(scl);
+```
+
+### The calculation of I2C timeout has changed
+
+Previously, I2C timeouts were counted in increments of I2C peripheral clock cycles. This meant that
+the configure value meant different lengths of time depending on the device. With this update, the
+I2C configuration now expects the timeout value in number of bus clock cycles, which is consistent
+between devices.
+
+ESP32 and ESP32-S2 use an exact number of clock cycles for its timeout. Other MCUs, however, use
+the `2^timeout` value internally, and the HAL rounds up the timeout to the next appropriate value.
+
+## Changes to half-duplex SPI
+
+The `HalfDuplexMode` and `FullDuplexMode` type parameters have been removed from SPI master and slave
+drivers. It is now possible to execute half-duplex and full-duplex operations on the same SPI bus.
+
+### Driver construction
+
+- The `Spi::new_half_duplex` constructor has been removed. Use `new` (or `new_typed`) instead.
+- The `with_pins` methods have been removed. Use the individual `with_*` functions instead.
+- The `with_mosi` and `with_miso` functions now take input-output peripheral signals to support half-duplex mode.
+
+```diff
+- let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
+-     .with_pins(sck, mosi, miso, sio2, sio3, cs);
++ let mut spi = Spi::new(peripherals.SPI2) // or new_with_config
++     .with_sck(sck)
++     .with_cs(cs)
++     .with_mosi(mosi)
++     .with_miso(miso)
++     .with_sio2(sio2)
++     .with_sio3(sio3);
+```
+
+### Transfer functions
+
+The `Spi<'_, SPI, HalfDuplexMode>::read` and `Spi<'_, SPI, HalfDuplexMode>::write` functions have been replaced by
+`half_duplex_read` and `half_duplex_write`.
+
+```diff
+ let mut data = [0u8; 2];
+ let transfer = spi
+-    .read(
++    .half_duplex_read(
+         SpiDataMode::Single,
+         Command::Command8(0x90, SpiDataMode::Single),
+         Address::Address24(0x000000, SpiDataMode::Single),
+         0,
+         &mut data,
+     )
+     .unwrap();
+
+ let transfer = spi
+-    .write(
++    .half_duplex_write(
+         SpiDataMode::Quad,
+         Command::Command8(write as u16, command_data_mode),
+         Address::Address24(
+             write as u32 | (write as u32) << 8 | (write as u32) << 16,
+             SpiDataMode::Quad,
+         ),
+         0,
+         dma_tx_buf,
+     )
+     .unwrap();
+```
+
+## Slave-mode SPI
+
+### Driver construction
+
+The constructors no longer accept pins. Use the `with_pin_name` setters instead.
+
+```diff
+ let mut spi = Spi::new(
+     peripherals.SPI2,
+-    sclk,
+-    mosi,
+-    miso,
+-    cs,
+     SpiMode::Mode0,
+-);
++)
++.with_sclk(sclk)
++.with_mosi(mosi)
++.with_miso(miso)
++.with_cs(cs);
+```
+
+## UART event listening
+
+The following functions have been removed:
+
+- `listen_at_cmd`
+- `unlisten_at_cmd`
+- `listen_tx_done`
+- `unlisten_tx_done`
+- `listen_rx_fifo_full`
+- `unlisten_rx_fifo_full`
+- `at_cmd_interrupt_set`
+- `tx_done_interrupt_set`
+- `rx_fifo_full_interrupt_set`
+- `reset_at_cmd_interrupt`
+- `reset_tx_done_interrupt`
+- `reset_rx_fifo_full_interrupt`
+
+You can now use the `UartInterrupt` enum and the corresponding `listen`, `unlisten`, `interrupts` and `clear_interrupts` functions.
+
+Use `interrupts` in place of `<INTERRUPT>_interrupt_set` and `clear_interrupts` in place of the old `reset_` functions.
+
+`UartInterrupt`:
+
+- `AtCmd`
+- `TxDone`
+- `RxFifoFull`
+
+Checking interrupt bits is now done using APIs provided by [enumset](https://docs.rs/enumset/1.1.5/enumset/index.html). For example, to see if
+a particular interrupt bit is set, use `contains`:
+
+```diff
+-serial.at_cmd_interrupt_set()
++serial.interupts().contains(UartInterrupt::AtCmd)
+```
+
+You can now listen/unlisten multiple interrupt bits at once:
+
+```diff
+-uart0.listen_at_cmd();
+-uart0.listen_rx_fifo_full();
++uart0.listen(UartInterrupt::AtCmd | UartConterrupt::RxFifoFull);
+```
+
+## I2S changes
+
+### The I2S driver has been moved to `i2s::master`
+
+```diff
+-use esp_hal::i2s::{DataFormat, I2s, Standard};
++use esp_hal::i2s::master::{DataFormat, I2s, Standard};
+```
+
+### Removed `i2s` traits
+
+The following traits have been removed:
+
+- `I2sWrite`
+- `I2sWriteDma`
+- `I2sRead`
+- `I2sReadDma`
+- `I2sWriteDmaAsync`
+- `I2sReadDmaAsync`
+
+You no longer have to import these to access their respective APIs. If you used these traits
+in your functions as generic parameters, you can use the `I2s` type directly instead.
+
+For example:
+
+```diff
+-fn foo(i2s: &mut impl I2sWrite) {
++fn foo(i2s: &mut I2s<'_, I2S0, Blocking>) {
+     // ...
+ }
+```
+
+## DMA related changes
+
+### Circular DMA transfer's `available` returns `Result<usize, DmaError>` now
+
+In case of any error you should drop the transfer and restart it.
+
+```diff
+     loop {
+-        let avail = transfer.available();
++        let avail = match transfer.available() {
++            Ok(avail) => avail,
++            Err(_) => {
++                core::mem::drop(transfer);
++                transfer = i2s_tx.write_dma_circular(&tx_buffer).unwrap();
++                continue;
++            },
++        };
+```
+
+### Channel, ChannelRx and ChannelTx types have changed
+
+- `Channel`'s `Async`/`Blocking` mode has been moved before the channel instance parameter.
+- `ChannelRx` and `ChannelTx` have gained a new `Async`/`Blocking` mode parameter.
+
+```diff
+-Channel<'d, DmaChannel0, Async>
++Channel<'d, Async, DmaChannel0>
+
+-ChannelRx<'d, DmaChannel0>
++ChannelRx<'d, Async, DmaChannel0>
+
+-ChannelTx<'d, DmaChannel0>
++ChannelTx<'d, Async, DmaChannel0>
+```
+
+## Removed `peripheral_input` and `into_peripheral_output` from GPIO pin types
+
+Creating peripheral interconnect signals now consume the GPIO pin used for the connection.
+
+The previous signal function have been replaced by `split`. This change affects the following APIs:
+
+- `GpioPin`
+- `AnyPin`
+
+```diff
+-let input_signal = gpioN.peripheral_input();
+-let output_signal = gpioN.into_peripheral_output();
++let (input_signal, output_signal) = gpioN.split();
+```
+
+`into_peripheral_output`, `split` (for output pins only) and `peripheral_input` have been added to
+the GPIO drivers (`Input`, `Output`, `OutputOpenDrain` and `Flex`) instead.
+
+## ETM changes
+
+- The types are no longer prefixed with `GpioEtm`, `TimerEtm` or `SysTimerEtm`. You can still use
+  import aliasses in case you need to differentiate due to name collisions
+  (e.g. `use esp_hal::gpio::etm::Event as GpioEtmEvent`).
+- The old task and event types have been replaced by `Task` and `Event`.
+- GPIO tasks and events are no longer generic.
+
+## Changes to peripheral configuration
+
+### The `uart::config` module has been removed
+
+The module's contents have been moved into `uart`.
+
+```diff
+-use esp_hal::uart::config::Config;
++use esp_hal::uart::Config;
+```
+
+If you work with multiple configurable peripherals, you may want to import the `uart` module and
+refer to the `Config` struct as `uart::Config`.
+
+### SPI drivers can now be configured using `spi::master::Config`
+
+- The old methods to change configuration have been removed.
+- The `new` and `new_typed` constructor no longer takes `frequency` and `mode`.
+- The default configuration is now:
+  - bus frequency: 1 MHz
+  - bit order: MSB first
+  - mode: SPI mode 0
+- There are new constructors (`new_with_config`, `new_typed_with_config`) and a new `apply_config` method to apply custom configuration.
+
+```diff
+-use esp_hal::spi::{master::Spi, SpiMode};
++use esp_hal::spi::{master::{Config, Spi}, SpiMode};
+-Spi::new(SPI2, 100.kHz(), SpiMode::Mode1);
++Spi::new_with_config(
++    SPI2,
++    Config {
++        frequency: 100.kHz(),
++        mode: SpiMode::Mode0,
++        ..Config::default()
++    },
++)
+```
+
+## LCD_CAM changes
+
+### I8080 driver split `set_byte_order()` into `set_8bits_order()` and `set_byte_order()`.
+
+If you were using an 8-bit bus.
+
+```diff
+- i8080.set_byte_order(ByteOrder::default());
++ i8080.set_8bits_order(ByteOrder::default());
+```
+
+If you were using an 16-bit bus, you don't need to change anything, `set_byte_order()` now works correctly.
+
+If you were sharing the bus between an 8-bit and 16-bit device, you will have to call the corresponding method when
+you switch between devices. Be sure to read the documentation of the new methods.
+
+### Mixed mode constructors
+
+It is no longer possible to construct `I8080` or `Camera` with an async-mode DMA channel.
+Convert the DMA channel into blocking before passing it to these constructors.
+
+```diff
+ let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
+ let channel = ctx
+     .dma
+     .channel0
+-    .configure(false, DmaPriority::Priority0)
+-    .into_async();
++    .configure(false, DmaPriority::Priority0);
+
+ let i8080 = I8080::new(
+     lcd_cam.lcd,
+     channel.tx,
+     pins,
+     20.MHz(),
+     Config::default(),
+ );
+```
+
+## `rmt::Channel::transmit` now returns `Result`, `PulseCode` is now `u32`
+
+When trying to send a one-shot transmission will fail if it doesn't end with an end-marker.
+
+```diff
+-    let mut data = [PulseCode {
+-        level1: true,
+-        length1: 200,
+-        level2: false,
+-        length2: 50,
+-    }; 20];
+-
+-    data[data.len() - 2] = PulseCode {
+-        level1: true,
+-        length1: 3000,
+-        level2: false,
+-        length2: 500,
+-    };
+-    data[data.len() - 1] = PulseCode::default();
++    let mut data = [PulseCode::new(true, 200, false, 50); 20];
++    data[data.len() - 2] = PulseCode::new(true, 3000, false, 500);
++    data[data.len() - 1] = PulseCode::empty();
+
+-        let transaction = channel.transmit(&data);
++        let transaction = channel.transmit(&data).unwrap();
+```
+
+
+## The `parl_io::NoClkPin` and `no_clk_pin()` have been removed
+
+You can use `gpio::NoPin` instead.
+
+```diff
+ use esp_hal:: {
+-   parl_io::no_clk_pin,
++   gpio::NoPin,
+ }
+
+-parl_io.rx.with_config(&mut rx_pins, no_clk_pin(), BitPackOrder::Msb, Some(0xfff))
++let mut rx_clk_pin = NoPin;
++parl_io.rx.with_config(&mut rx_pins, &mut rx_clk_pin, BitPackOrder::Msb, Some(0xfff))
+```
+
+## `get_` prefixes have been removed from functions
+
+In order to better comply with the Rust API Guidelines [getter names convention], we have removed the `get_` prefixes from all functions which previously had it. Due to the number of changes it's not practical to list all changes here, however if a function previous began with `get_`, you can simply remove this prefix.
+
+[getter names convention]: https://rust-lang.github.io/api-guidelines/naming.html#c-getter
+
+## The `get_core()` function has been removed in favour of `Cpu::current()`
+
+```diff
+- let core = esp_hal::get_core();
++ let core = esp_hal::Cpu::current();
+```

esp-hal/MIGRATING-0.22.md

@@ -0,0 +1,478 @@
+# Migration Guide from 0.22.x to v1.0.0-beta.0
+
+Starting with this release, unstable parts of esp-hal will be gated behind the `unstable` feature.
+The `unstable` feature itself is unstable, we might change the way we hide APIs without notice.
+Unstable APIs are not covered by semver guarantees, they may break even between patch releases.
+
+Please refer to the documentation to see which APIs are marked as unstable.
+
+## DMA changes
+
+### Accessing channel objects
+
+DMA channels are now available through the `Peripherals` struct, which is returned
+by `esp_hal::init()`. The channels themselves have been renamed to match other peripheral singletons.
+
+- ESP32-C2, C3, C6, H2 and S3: `channelX -> DMA_CHX`
+- ESP32 and S2: `spiXchannel -> DMA_SPIX`, `i2sXchannel -> DMA_I2SX`
+
+```diff
+-let dma = Dma::new(peripherals.DMA);
+-let channel = dma.channel2;
++let channel = peripherals.DMA_CH2;
+```
+
+### Channel configuration changes
+
+- `configure_for_async` and `configure` have been removed
+- PDMA devices (ESP32, ESP32-S2) provide no channel configurability
+- GDMA devices provide `set_priority` to change DMA in/out channel priority
+
+```diff
+ let mut spi = Spi::new_with_config(
+     peripherals.SPI2,
+     Config::default(),
+ )
+ // other setup
+-.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
++.with_dma(dma_channel);
+```
+
+```diff
++dma_channel.set_priority(DmaPriority::Priority1);
+ let mut spi = Spi::new_with_config(
+     peripherals.SPI2,
+     Config::default(),
+ )
+ // other setup
+-.with_dma(dma_channel.configure(false, DmaPriority::Priority1));
++.with_dma(dma_channel);
+```
+
+### Burst mode configuration
+
+Burst mode is now a property of buffers, instead of DMA channels. Configuration can be done by
+calling `set_burst_config` on buffers that support it. The configuration options and the
+corresponding `BurstConfig` type are device specfic.
+
+### Usability changes affecting applications
+
+Individual channels are no longer wrapped in `Channel`, but they implement the `DmaChannel` trait.
+This means that if you want to split them into an `rx` and a `tx` half (which is only supported on
+the H2, C6 and S3 currently), you can't move out of the channel but instead you need to call
+the `split` method.
+
+```diff
+-let tx = channel.tx;
++use esp_hal::dma::DmaChannel;
++let (rx, tx) = channel.split();
+```
+
+The `Channel` types remain available for use in peripheral drivers.
+
+It is now simpler to work with DMA channels in generic contexts. esp-hal now provides convenience
+traits and type aliasses to specify peripheral compatibility. The `ChannelCreator` types have been
+removed, further simplifying use.
+
+For example, previously you may have needed to write something like this to accept a DMA channel
+in a generic function:
+
+```rust
+fn new_foo<'d, T>(
+    dma_channel: ChannelCreator<2>, // It wasn't possible to accept a generic ChannelCreator.
+    peripheral: impl Peripheral<P = T> + 'd,
+)
+where
+    T: SomePeripheralInstance,
+    ChannelCreator<2>: DmaChannelConvert<<T as DmaEligible>::Dma>,
+{
+    let dma_channel = dma_channel.configure_for_async(false, DmaPriority::Priority0);
+
+    let driver = PeripheralDriver::new(peripheral, config).with_dma(dma_channel);
+
+    // ...
+}
+```
+
+From now on a similar, but more flexible implementation may look like:
+
+```rust
+fn new_foo<'d, T, CH>(
+    dma_channel: impl Peripheral<P = CH> + 'd,
+    peripheral: impl Peripheral<P = T> + 'd,
+)
+where
+    T: SomePeripheralInstance,
+    CH: DmaChannelFor<T>,
+{
+    // Optionally: dma_channel.set_priority(DmaPriority::Priority2);
+
+    let driver = PeripheralDriver::new(peripheral, config).with_dma(dma_channel);
+
+    // ...
+}
+```
+
+### Usability changes affecting third party peripheral drivers
+
+If you are writing a driver and need to store a channel in a structure, you can use one of the
+`ChannelFor` type aliasses.
+
+```diff
+ struct Aes<'d> {
+-    channel: ChannelTx<'d, Blocking, <AES as DmaEligible>::Dma>,
++    channel: ChannelTx<'d, Blocking, PeripheralTxChannel<AES>>,
+ }
+```
+
+## Timer changes
+
+The low level timers, `SystemTimer` and `TimerGroup` are now "dumb". They contain no logic for operating modes or trait implementations (except the low level `Timer` trait).
+
+### Timer drivers - `OneShotTimer` & `PeriodicTimer`
+
+Both drivers now have a `Mode` parameter. Both also type erase the underlying driver by default, call `new_typed` to retain the type.
+
+```diff
+- OneShotTimer<'static, systimer::Alarm>;
++ OneShotTimer<'static, Blocking>;
+- PeriodicTimer<'static, systimer::Alarm>;
++ PeriodicTimer<'static, Blocking>;
+```
+
+### SystemTimer
+
+```diff
+let systimer = SystemTimer::new(peripherals.SYSTIMER);
+- static UNIT0: StaticCell<SpecificUnit<'static, 0>> = StaticCell::new();
+- let unit0 = UNIT0.init(systimer.unit0);
+- let frozen_unit = FrozenUnit::new(unit0);
+- let alarm0 = Alarm::new(systimer.comparator0, &frozen_unit);
+- alarm0.set_period(1u32.secs());
++ let alarm0 = systimer.alarm0;
++ let mut timer = PeriodicTimer::new(alarm0);
++ timer.start(1u64.secs());
+```
+
+### TIMG
+
+Timer group timers have been type erased.
+
+```diff
+- timg::Timer<timg::Timer0<crate::peripherals::TIMG0>, Blocking>
++ timg::Timer
+```
+
+### ETM usage has changed
+
+Timer dependant ETM events should be created _prior_ to initializing the timer with the chosen driver.
+
+```diff
+let task = ...; // ETM task
+let syst = SystemTimer::new(peripherals.SYSTIMER);
+let alarm0 = syst.alarm0;
+- alarm0.load_value(1u64.millis()).unwrap();
+- alarm0.start();
+- let event = Event::new(&mut alarm0);
++ let event = Event::new(&alarm0);
++ let timer = OneShotTimer::new(alarm0);
++ timer.schedule(1u64.millis()).unwrap();
+let _configured_channel = channel0.setup(&event, &task);
+```
+
+## PSRAM is now initialized automatically
+
+Calling `esp_hal::initialize` will now configure PSRAM if either the `quad-psram` or `octal-psram`
+is enabled. To retrieve the address and size of the initialized external memory, use
+`esp_hal::psram::psram_raw_parts`, which returns a pointer and a length.
+
+```diff
+-let peripherals = esp_hal::init(esp_hal::Config::default());
+-let (start, size) = esp_hal::psram::init_psram(peripherals.PSRAM, psram_config);
++let peripherals = esp_hal::init({
++    let mut config = esp_hal::Config::default();
++    config.psram = psram_config;
++    config
++});
++let (start, size) = esp_hal::psram::psram_raw_parts(&peripherals.PSRAM, psram);
+```
+
+The usage of `esp_alloc::psram_allocator!` remains unchanged.
+
+## embedded-hal 0.2.\* is not supported anymore.
+
+As per https://github.com/rust-embedded/embedded-hal/pull/640, our driver no longer implements traits from `embedded-hal 0.2.x`.
+Analogs of all traits from the above mentioned version are available in `embedded-hal 1.x.x`
+
+```diff
+- use embedded_hal_02::can::Frame;
++ use embedded_can::Frame;
+```
+
+```diff
+- use embedded_hal_02::digital::v2::OutputPin;
+- use embedded_hal_02::digital::v2::ToggleableOutputPin;
++ use embedded_hal::digital::OutputPin;
++ use embedded_hal::digital::StatefulOutputPin;
+```
+
+```diff
+- use embedded_hal_02::serial::{Read, Write};
++ use embedded_hal_nb::serial::{Read, Write};
+```
+
+You might also want to check the full official `embedded-hal` migration guide:
+https://github.com/rust-embedded/embedded-hal/blob/master/docs/migrating-from-0.2-to-1.0.md
+
+## Interrupt related reshuffle
+
+```diff
+- use esp_hal::InterruptConfigurable;
+- use esp_hal::DEFAULT_INTERRUPT_HANDLER;
++ use esp_hal::interrupt::InterruptConfigurable;
++ use esp_hal::interrupt::DEFAULT_INTERRUPT_HANDLER;
+```
+
+## Driver constructors now take a configuration and are fallible
+
+The old `new_with_config` constructor have been removed, and `new` constructors now always take
+a configuration structure. They have also been updated to return a `ConfigError` if the configuration
+is not compatible with the hardware.
+
+```diff
+-let mut spi = Spi::new_with_config(
++let mut spi = Spi::new(
+     peripherals.SPI2,
+     Config {
+         frequency: 100.kHz(),
+         mode: SpiMode::_0,
+         ..Config::default()
+     },
+-);
++)
++.unwrap();
+```
+
+```diff
+ let mut spi = Spi::new(
+     peripherals.SPI2,
++    Config::default(),
+-);
++)
++.unwrap();
+```
+
+## Peripheral instance type parameters and `new_typed` constructors have been removed
+
+Call `new` instead and remove the type parameters if you've used them.
+
+```diff
+-let mut spi: Spi<'lt, SPI2> = Spi::new_typed(..).unwrap();
++let mut spi: Spi<'lt> = Spi::new(..).unwrap();
+```
+
+## LCD_CAM configuration changes
+
+- `cam` now has a `Config` strurct that contains frequency, bit/byte order, VSync filter options.
+- DPI, I8080: `frequency` has been moved into `Config`.
+
+```diff
++let mut cam_config = cam::Config::default();
++cam_config.frequency = 1u32.MHz();
+ cam::Camera::new(
+     lcd_cam.cam,
+     dma_rx_channel,
+     pins,
+-    1u32.MHz(),
++    cam_config,
+ )
+```
+
+## SpiDma now requires you specify the transfer length explicitly
+
+```diff
+  dma_tx_buf.set_length(5 /* or greater */);
+- spi_dma.write(dma_tx_buf);
++ spi_dma.write(5, dma_tx_buf);
+```
+
+```diff
+  dma_rx_buf.set_length(5 /* or greater */);
+- spi_dma.read(dma_rx_buf);
++ spi_dma.read(5, dma_rx_buf);
+```
+
+```diff
+  dma_rx_buf.set_length(5 /* or greater */);
+  dma_tx_buf.set_length(5 /* or greater */);
+- spi_dma.transfer(dma_rx_buf, dma_tx_buf);
++ spi_dma.transfer(5, dma_rx_buf, 5, dma_tx_buf);
+```
+
+## I2C Error changes
+
+To avoid abbreviations and contractions (as per the esp-hal guidelines), some error variants have changed
+
+```diff
+- Error::ExecIncomplete
++ Error::ExecutionIncomplete
+- Error::CommandNrExceeded
++ Error::CommandNumberExceeded
+- Error::ExceedingFifo
++ Error::FifoExceeded
+- Error::TimeOut
++ Error::Timeout
+- Error::InvalidZeroLength
++ Error::ZeroLengthInvalid
+```
+
+## The crate prelude has been removed
+
+The reexports that were previously part of the prelude are available through other paths:
+
+- `nb` is no longer re-exported. Please import the `nb` crate if you need it.
+- `ExtU64` and `RateExtU32` have been moved to `esp_hal::time`
+- `Clock` and `CpuClock`: `esp_hal::clock::{Clock, CpuClock}`
+- The following traits need to be individually imported when needed:
+  - `esp_hal::analog::dac::Instance`
+  - `esp_hal::gpio::Pin`
+  - `esp_hal::ledc::channel::ChannelHW`
+  - `esp_hal::ledc::channel::ChannelIFace`
+  - `esp_hal::ledc::timer::TimerHW`
+  - `esp_hal::ledc::timer::TimerIFace`
+  - `esp_hal::timer::timg::TimerGroupInstance`
+  - `esp_hal::timer::Timer`
+  - `esp_hal::interrupt::InterruptConfigurable`
+- The `entry` macro can be imported as `esp_hal::entry`, while other macros are found under `esp_hal::macros`
+
+## `AtCmdConfig` now uses builder-lite pattern
+
+```diff
+- uart0.set_at_cmd(AtCmdConfig::new(None, None, None, b'#', None));
++ uart0.set_at_cmd(AtCmdConfig::default().with_cmd_char(b'#'));
+```
+
+## Crate configuration changes
+
+To prevent ambiguity between configurations, we had to change the naming format of configuration
+keys. Before, we used `{prefix}_{key}`, which meant that esp-hal and esp-hal-\* configuration keys
+were impossible to tell apart. To fix this issue, we are changing the separator from one underscore
+character to `_CONFIG_`. This also means that users will have to change their `config.toml`
+configurations to match the new format.
+
+```diff
+ [env]
+-ESP_HAL_PLACE_SPI_DRIVER_IN_RAM="true"
++ESP_HAL_CONFIG_PLACE_SPI_DRIVER_IN_RAM="true"
+```
+
+## UART changes
+
+The `Config` struct's setters are now prefixed with `with_`. `parity_none`, `parity_even`,
+`parity_odd` have been replaced by `with_parity` that takes a `Parity` parameter.
+
+```diff
+ let config = Config::default()
+-    .rx_fifo_full_threshold(30)
++    .with_rx_fifo_full_threshold(30)
+-    .parity_even();
++    .with_parity(Parity::Even);
+```
+
+The `DataBits`, `Parity`, and `StopBits` enum variants are no longer prefixed with the name of the enum.
+
+e.g.
+
+```diff
+- DataBits::DataBits8
++ DataBits::_8
+- Parity::ParityNone
++ Parity::None
+- StopBits::Stop1
++ StopBits::_1
+```
+
+The previous blocking implementation of `read_bytes` has been removed, and the non-blocking `drain_fifo` has instead been renamed to `read_bytes` in its place.
+
+Any code which was previously using `read_bytes` to fill a buffer in a blocking manner will now need to implement the necessary logic to block until the buffer is filled in their application instead.
+
+The `Error` enum variant uses object+verb naming.
+
+e.g.
+
+```diff
+- RxGlichDetected
++ GlitchOccurred
+```
+
+RX/TX pin assignment moved from constructors to builder functions.
+
+e.g.
+
+```diff
+  let mut uart1 = Uart::new(
+      peripherals.UART1,
+-     Config::default(),
+-     peripherals.GPIO1,
+-     peripherals.GPIO2,
+- ).unwrap();
++     Config::default())
++     .unwrap()
++     .with_rx(peripherals.GPIO1)
++     .with_tx(peripherals.GPIO2);
+```
+
+## Spi `with_miso` has been split
+
+Previously, `with_miso` set up the provided pin as an input and output, which was necessary for half duplex.
+Full duplex does not require this, and it also creates an artificial restriction.
+
+If you were using half duplex SPI with `with_miso`,
+you should now use `with_sio1` instead to get the previous behavior.
+
+## CPU Clocks
+
+The specific CPU clock variants are renamed from e.g. `Clock80MHz` to `_80MHz`.
+
+```diff
+- CpuClock::Clock80MHz
++ CpuClock::_80MHz
+```
+
+Additionally the enum is marked as non-exhaustive.
+
+## SPI Changes
+
+The SPI mode variants are renamed from e.g. `Mode0` to `_0`.
+
+```diff
+- Mode::Mode0
++ Mode::_0
+```
+
+The Address and Command enums have similarly had their variants changed from e.g. `Address1` to `_1Bit` and `Command1` to `_1Bit` respectively:
+
+```diff
+- Address::Address1
++ Address::_1Bit
+- Command::Command1
++ Command::_1Bit
+```
+
+## GPIO Changes
+
+The GPIO drive strength variants are renamed from e.g. `I5mA` to `_5mA`.
+
+```diff
+-DriveStrength::I5mA
++DriveStrength::_5mA
+```
+
+## ADC Changes
+
+The ADC attenuation variants are renamed from e.g. `Attenuation0dB` to `_0dB`.
+
+```diff
+-Attenuation::Attenuation0dB
++Attenuation::_0dB
+```

esp-hal/README.md

@@ -1,55 +1,59 @@
 # esp-hal
 
 [![Crates.io](https://img.shields.io/crates/v/esp-hal?labelColor=1C2C2E&color=C96329&logo=Rust&style=flat-square)](https://crates.io/crates/esp-hal)
-[![docs.rs](https://img.shields.io/docsrs/esp-hal?labelColor=1C2C2E&color=C96329&logo=rust&style=flat-square)](https://docs.rs/esp-hal)
+[![docs.rs](https://img.shields.io/docsrs/esp-hal?labelColor=1C2C2E&color=C96329&logo=rust&style=flat-square)](https://docs.esp-rs.org/esp-hal)
+![MSRV](https://img.shields.io/badge/MSRV-1.83-blue?labelColor=1C2C2E&style=flat-square)
 ![Crates.io](https://img.shields.io/crates/l/esp-hal?labelColor=1C2C2E&style=flat-square)
 [![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&labelColor=1C2C2E&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
 
-The `esp-hal` package aims to provide a safe, idiomatic Hardware Abstraction Layer (HAL) for the entire family of ESP32 devices from Espressif.
+Bare-metal (`no_std`) hardware abstraction layer for Espressif devices.
 
-This package implements both blocking and, when able, asynchronous drivers for the various peripherals. At this time the blocking APIs are used by default, with all asynchronous functionality gated behind the `async` feature. See the package documentation for more information on its features.
+Implements a number of blocking and, where applicable, async traits from the various packages in the [embedded-hal] repository.
 
-Most traits defined by the [embedded-hal] family of packages are implemented as applicable.
+For help getting started with this HAL, please refer to [The Rust on ESP Book] and the [documentation].
 
 [embedded-hal]: https://github.com/rust-embedded/embedded-hal
+[the rust on esp book]: https://docs.esp-rs.org/book/
 
 ## [Documentation]
 
-[documentation]: https://docs.rs/esp-hal/
+[documentation]: https://docs.esp-rs.org/esp-hal/
 
-## Usage
+## Supported Devices
 
-Before using `esp-hal`, ensure that you have configured your [development environment] correctly, and the [required tooling] has been installed.
+|   Chip   |        Datasheet         | Technical Reference Manual |             Target             |
+| :------: | :----------------------: | :------------------------: | :----------------------------: |
+|  ESP32   |  [ESP32][32-datasheet]   |      [ESP32][32-trm]       |    `xtensa-esp32-none-elf`     |
+| ESP32-C2 | [ESP32-C2][c2-datasheet] |     [ESP32-C2][c2-trm]     | `riscv32imc-unknown-none-elf`  |
+| ESP32-C3 | [ESP32-C3][c3-datasheet] |     [ESP32-C3][c3-trm]     | `riscv32imc-unknown-none-elf`  |
+| ESP32-C6 | [ESP32-C6][c6-datasheet] |     [ESP32-C6][c6-trm]     | `riscv32imac-unknown-none-elf` |
+| ESP32-H2 | [ESP32-H2][h2-datasheet] |     [ESP32-H2][h2-trm]     | `riscv32imac-unknown-none-elf` |
+| ESP32-S2 | [ESP32-S2][s2-datasheet] |     [ESP32-S2][s2-trm]     |   `xtensa-esp32s2-none-elf`    |
+| ESP32-S3 | [ESP32-S3][s3-datasheet] |     [ESP32-S3][s3-trm]     |   `xtensa-esp32s3-none-elf`    |
 
-When starting a new project using `esp-hal`, we strongly recommend you generate a project skeleton using [cargo-generate] and [esp-template]. This will take much of the guesswork out of the process and give you a starting point to build an application from.
+[32-datasheet]: https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf
+[c2-datasheet]: https://www.espressif.com/sites/default/files/documentation/esp8684_datasheet_en.pdf
+[c3-datasheet]: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf
+[c6-datasheet]: https://www.espressif.com/sites/default/files/documentation/esp32-c6_datasheet_en.pdf
+[h2-datasheet]: https://www.espressif.com/sites/default/files/documentation/esp32-h2_datasheet_en.pdf
+[s2-datasheet]: https://www.espressif.com/sites/default/files/documentation/esp32-s2_datasheet_en.pdf
+[s3-datasheet]: https://www.espressif.com/sites/default/files/documentation/esp32-s3_datasheet_en.pdf
+[32-trm]: https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf
+[c2-trm]: https://www.espressif.com/sites/default/files/documentation/esp8684_technical_reference_manual_en.pdf
+[c3-trm]: https://www.espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf
+[c6-trm]: https://www.espressif.com/sites/default/files/documentation/esp32-c6_technical_reference_manual_en.pdf
+[h2-trm]: https://www.espressif.com/sites/default/files/documentation/esp32-h2_technical_reference_manual_en.pdf
+[s2-trm]: https://www.espressif.com/sites/default/files/documentation/esp32-s2_technical_reference_manual_en.pdf
+[s3-trm]: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf
 
-Much of the functionality available is feature-gated, so be sure to refer to the documentation to read about all available Cargo features.
+## `unstable` feature
 
-[development environment]: https://esp-rs.github.io/book/installation/index.html
-[required tooling]: https://esp-rs.github.io/book/tooling/espflash.html
-[cargo-generate]: https://github.com/cargo-generate/cargo-generate/
-[esp-template]: https://github.com/esp-rs/esp-template/
+The stable feature set is designed to remain consistent and reliable. Other parts guarded by the `unstable` feature, however, are still under active development and may undergo breaking changes and are disabled by default.
 
-### Supporting Packages
+## Minimum Supported Rust Version (MSRV)
 
-A number of additional packages are available which add additional functionality beyond the HAL.
-
-Within this repository, the [esp-lp-hal] package provides support for the (ultra-)low-power RISC-V coprocessors found aboard the ESP32-C6, ESP32-S2, and ESP32-S3.
-
-There is also the [esp-wifi] package, which provides support for Bluetooth and Wi-Fi.
-
-For additional libraries, you can check the [list of repositories] in the [esp-rs organization].
-
-[esp-lp-hal]: ../esp-lp-hal/
-[esp-wifi]: https://github.com/esp-rs/esp-wifi
-[list of repositories]: https://github.com/orgs/esp-rs/repositories
-[esp-rs organization]: https://github.com/esp-rs
-
-## Examples
-
-Examples demonstrating the use of various peripherals and features of the HAL are available in the [examples] package.
-
-[examples]: ../examples/
+This crate is guaranteed to compile on stable Rust 1.83 and up. It _might_
+compile with older versions but that may change in any new patch release.
 
 ## License
 

esp-hal/build.rs

@@ -2,131 +2,34 @@ use std::{
     env,
     error::Error,
     fs::{self, File},
-    io::{BufRead, BufReader, Write},
+    io::{BufRead, Write},
     path::{Path, PathBuf},
+    str::FromStr,
 };
 
-use serde::Deserialize;
-
-// Macros taken from:
-// https://github.com/TheDan64/inkwell/blob/36c3b10/src/lib.rs#L81-L110
-
-// Given some features, assert that AT MOST one of the features is enabled.
-macro_rules! assert_unique_features {
-    () => {};
-
-    ( $first:tt $(,$rest:tt)* ) => {
-        $(
-            #[cfg(all(feature = $first, feature = $rest))]
-            compile_error!(concat!("Features \"", $first, "\" and \"", $rest, "\" cannot be used together"));
-        )*
-        assert_unique_features!($($rest),*);
-    };
-}
-
-// Given some features, assert that AT LEAST one of the features is enabled.
-macro_rules! assert_used_features {
-    ( $all:tt ) => {
-        #[cfg(not(feature = $all))]
-        compile_error!(concat!("The feature flag must be provided: ", $all));
-    };
-
-    ( $($all:tt),+ ) => {
-        #[cfg(not(any($(feature = $all),*)))]
-        compile_error!(concat!("One of the feature flags must be provided: ", $($all, ", "),*));
-    };
-}
-
-// Given some features, assert that EXACTLY one of the features is enabled.
-macro_rules! assert_unique_used_features {
-    ( $($all:tt),* ) => {
-        assert_unique_features!($($all),*);
-        assert_used_features!($($all),*);
-    }
-}
-
-#[derive(Debug, Deserialize, PartialEq)]
-enum Arch {
-    #[serde(rename = "riscv")]
-    RiscV,
-    #[serde(rename = "xtensa")]
-    Xtensa,
-}
-
-impl std::fmt::Display for Arch {
-    fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result {
-        write!(
-            f,
-            "{}",
-            match self {
-                Arch::RiscV => "riscv",
-                Arch::Xtensa => "xtensa",
-            }
-        )
-    }
-}
-
-#[derive(Debug, Deserialize)]
-enum CoreCount {
-    #[serde(rename = "single_core")]
-    Single,
-    #[serde(rename = "multi_core")]
-    Multi,
-}
-
-impl std::fmt::Display for CoreCount {
-    fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result {
-        write!(
-            f,
-            "{}",
-            match self {
-                CoreCount::Single => "single_core",
-                CoreCount::Multi => "multi_core",
-            }
-        )
-    }
-}
-
-#[derive(Debug, Deserialize)]
-struct Device {
-    pub arch: Arch,
-    pub cores: CoreCount,
-    pub peripherals: Vec<String>,
-    pub symbols: Vec<String>,
-}
-
-#[derive(Debug, Deserialize)]
-struct Config {
-    pub device: Device,
-}
+use esp_build::assert_unique_used_features;
+use esp_config::{generate_config, Value};
+use esp_metadata::{Chip, Config};
 
 fn main() -> Result<(), Box<dyn Error>> {
-    // NOTE: update when adding new device support!
-    // Ensure that exactly one chip has been specified:
-    assert_unique_used_features!(
-        "esp32", "esp32c2", "esp32c3", "esp32c6", "esp32h2", "esp32p4", "esp32s2", "esp32s3"
-    );
-
-    // If the `embassy` feature is enabled, ensure that a time driver implementation
-    // is available:
-    #[cfg(feature = "embassy")]
-    {
-        cfg_if::cfg_if! {
-            if #[cfg(feature = "esp32")] {
-                assert_unique_used_features!("embassy-time-timg0");
-            } else if #[cfg(feature = "esp32s2")] {
-                assert_unique_used_features!("embassy-time-systick-80mhz", "embassy-time-timg0");
-            } else {
-                assert_unique_used_features!("embassy-time-systick-16mhz", "embassy-time-timg0");
-            }
+    println!("cargo:rustc-check-cfg=cfg(is_debug_build)");
+    if let Ok(level) = std::env::var("OPT_LEVEL") {
+        if level == "0" || level == "1" {
+            println!("cargo:rustc-cfg=is_debug_build");
         }
     }
 
-    #[cfg(feature = "flip-link")]
-    {
-        #[cfg(not(any(feature = "esp32c6", feature = "esp32h2")))]
-        panic!("flip-link is only available on ESP32-C6/ESP32-H2");
-    }
+    // NOTE: update when adding new device support!
+    // Ensure that exactly one chip has been specified:
+    assert_unique_used_features!(
+        "esp32", "esp32c2", "esp32c3", "esp32c6", "esp32h2", "esp32s2", "esp32s3"
+    );
+
+    #[cfg(all(
+        feature = "flip-link",
+        not(any(feature = "esp32c6", feature = "esp32h2"))
+    ))]
+    esp_build::error!("flip-link is only available on ESP32-C6/ESP32-H2");
 
     // NOTE: update when adding new device support!
     // Determine the name of the configured device:
@@ -140,8 +43,6 @@ fn main() -> Result<(), Box<dyn Error>> {
         "esp32c6"
     } else if cfg!(feature = "esp32h2") {
         "esp32h2"
-    } else if cfg!(feature = "esp32p4") {
-        "esp32p4"
     } else if cfg!(feature = "esp32s2") {
         "esp32s2"
     } else if cfg!(feature = "esp32s3") {
@@ -150,76 +51,78 @@ fn main() -> Result<(), Box<dyn Error>> {
         unreachable!() // We've confirmed exactly one known device was selected
     };
 
-    if detect_atomic_extension("a") || detect_atomic_extension("s32c1i") {
-        panic!(
-            "Atomic emulation flags detected in `.cargo/config.toml`, this is no longer supported!"
-        );
-    }
-
     // Load the configuration file for the configured device:
-    let chip_toml_path = PathBuf::from(env!("CARGO_MANIFEST_DIR"))
-        .join("devices")
-        .join(device_name)
-        .join("device.toml")
-        .canonicalize()?;
-
-    let config = fs::read_to_string(chip_toml_path)?;
-    let config: Config = basic_toml::from_str(&config)?;
-    let device = &config.device;
+    let chip = Chip::from_str(device_name)?;
+    let config = Config::for_chip(&chip);
 
     // Check PSRAM features are only given if the target supports PSRAM:
-    if !&device.symbols.contains(&String::from("psram"))
-        && (cfg!(feature = "psram-2m") || cfg!(feature = "psram-4m") || cfg!(feature = "psram-8m"))
-    {
+    if !config.contains(&String::from("psram")) && cfg!(feature = "quad-psram") {
         panic!("The target does not support PSRAM");
     }
 
-    // Don't support "interrupt-preemption" and "direct-vectoring" on Xtensa and
-    // RISC-V with CLIC:
-    if (device.symbols.contains(&String::from("clic")) || device.arch == Arch::Xtensa)
-        && (cfg!(feature = "direct-vectoring") || cfg!(feature = "interrupt-preemption"))
-    {
-        panic!("The target does not support interrupt-preemption and direct-vectoring");
+    if !config.contains(&String::from("octal_psram")) && cfg!(feature = "octal-psram") {
+        panic!("The target does not support Octal PSRAM");
     }
 
     // Define all necessary configuration symbols for the configured device:
-    println!("cargo:rustc-cfg={}", device_name);
-    println!("cargo:rustc-cfg={}", device.arch);
-    println!("cargo:rustc-cfg={}", device.cores);
-
-    for peripheral in &device.peripherals {
-        println!("cargo:rustc-cfg={peripheral}");
-    }
-
-    for symbol in &device.symbols {
-        println!("cargo:rustc-cfg={symbol}");
-    }
-
-    let mut config_symbols = Vec::new();
-    let arch = device.arch.to_string();
-    let cores = device.cores.to_string();
-    config_symbols.push(device_name);
-    config_symbols.push(&arch);
-    config_symbols.push(&cores);
-
-    for peripheral in &device.peripherals {
-        config_symbols.push(peripheral);
-    }
-
-    for symbol in &device.symbols {
-        config_symbols.push(symbol);
-    }
-
-    #[cfg(feature = "flip-link")]
-    config_symbols.push("flip-link");
+    config.define_symbols();
 
     // Place all linker scripts in `OUT_DIR`, and instruct Cargo how to find these
     // files:
     let out = PathBuf::from(env::var_os("OUT_DIR").unwrap());
     println!("cargo:rustc-link-search={}", out.display());
 
+    // emit config
+    let cfg = generate_config(
+        "esp_hal",
+        &[
+            (
+                "place-spi-driver-in-ram",
+                "Places the SPI driver in RAM for better performance",
+                Value::Bool(false),
+                None
+            ),
+            (
+                "spi-address-workaround",
+                "(ESP32 only) Enables a workaround for the issue where SPI in half-duplex mode incorrectly transmits the address on a single line if the data buffer is empty.",
+                Value::Bool(true),
+                None
+            ),
+            (
+                "place-switch-tables-in-ram",
+                "Places switch-tables, some lookup tables and constants related to interrupt handling into RAM - resulting in better performance but slightly more RAM consumption.",
+                Value::Bool(true),
+                None
+            ),
+            (
+                "place-anon-in-ram",
+                "Places anonymous symbols into RAM - resulting in better performance at the cost of significant more RAM consumption. Best to be combined with `place-switch-tables-in-ram`.",
+                Value::Bool(false),
+                None
+            ),
+        ],
+        true,
+    );
+
+    // RISC-V and Xtensa devices each require some special handling and processing
+    // of linker scripts:
+
+    #[allow(unused_mut)]
+    let mut config_symbols = config.all().collect::<Vec<_>>();
+    #[cfg(feature = "flip-link")]
+    config_symbols.push("flip-link");
+
+    for (key, value) in &cfg {
+        if let Value::Bool(true) = value {
+            config_symbols.push(key);
+        }
+    }
+
     if cfg!(feature = "esp32") || cfg!(feature = "esp32s2") || cfg!(feature = "esp32s3") {
-        fs::copy("ld/xtensa/hal-defaults.x", out.join("hal-defaults.x"))?;
+        // Xtensa devices:
+
+        #[cfg(any(feature = "esp32", feature = "esp32s2"))]
+        File::create(out.join("memory_extras.x"))?.write_all(&generate_memory_extras())?;
 
         let (irtc, drtc) = if cfg!(feature = "esp32s3") {
             ("rtc_fast_seg", "rtc_fast_seg")
@@ -240,30 +143,32 @@ fn main() -> Result<(), Box<dyn Error>> {
         );
 
         fs::write(out.join("alias.x"), alias)?;
+        fs::copy("ld/xtensa/hal-defaults.x", out.join("hal-defaults.x"))?;
     } else {
+        // RISC-V devices:
+
+        preprocess_file(&config_symbols, "ld/riscv/asserts.x", out.join("asserts.x"))?;
+        preprocess_file(&config_symbols, "ld/riscv/debug.x", out.join("debug.x"))?;
         preprocess_file(
             &config_symbols,
             "ld/riscv/hal-defaults.x",
             out.join("hal-defaults.x"),
         )?;
-        preprocess_file(&config_symbols, "ld/riscv/asserts.x", out.join("asserts.x"))?;
-        preprocess_file(&config_symbols, "ld/riscv/debug.x", out.join("debug.x"))?;
     }
 
+    // With the architecture-specific linker scripts taken care of, we can copy all
+    // remaining linker scripts which are common to all devices:
     copy_dir_all(&config_symbols, "ld/sections", &out)?;
     copy_dir_all(&config_symbols, format!("ld/{device_name}"), &out)?;
 
-    #[cfg(any(feature = "esp32", feature = "esp32s2"))]
-    File::create(out.join("memory_extras.x"))?.write_all(&generate_memory_extras())?;
-
-    // Generate the eFuse table from the selected device's CSV file:
-    gen_efuse_table(device_name, out)?;
-
     Ok(())
 }
 
+// ----------------------------------------------------------------------------
+// Helper Functions
+
 fn copy_dir_all(
-    config_symbols: &Vec<&str>,
+    config_symbols: &[&str],
     src: impl AsRef<Path>,
     dst: impl AsRef<Path>,
 ) -> std::io::Result<()> {
@@ -304,8 +209,7 @@ fn preprocess_file(
         let line = line?;
         let trimmed = line.trim();
 
-        if let Some(stripped) = trimmed.strip_prefix("#IF ") {
-            let condition = stripped;
+        if let Some(condition) = trimmed.strip_prefix("#IF ") {
             let should_take = take.iter().all(|v| *v);
             let should_take = should_take && config.contains(&condition);
             take.push(should_take);
@@ -329,97 +233,6 @@ fn preprocess_file(
     Ok(())
 }
 
-fn gen_efuse_table(device_name: &str, out_dir: impl AsRef<Path>) -> Result<(), Box<dyn Error>> {
-    let src_path = PathBuf::from(format!("devices/{device_name}/efuse.csv"));
-    let out_path = out_dir.as_ref().join("efuse_fields.rs");
-
-    println!("cargo:rerun-if-changed={}", src_path.display());
-
-    let mut writer = File::create(out_path)?;
-    let mut reader = BufReader::new(File::open(src_path)?);
-    let mut line = String::with_capacity(128);
-
-    while reader.read_line(&mut line)? > 0 {
-        if line.ends_with('\n') {
-            line.pop();
-            if line.ends_with('\r') {
-                line.pop();
-            }
-        }
-        // drop comment and trim
-        line.truncate(
-            if let Some((pfx, _cmt)) = line.split_once('#') {
-                pfx
-            } else {
-                &line
-            }
-            .trim()
-            .len(),
-        );
-        // skip empty
-        if line.is_empty() {
-            continue;
-        }
-
-        let mut fields = line.split(',');
-        match (
-            fields.next().map(|s| s.trim().replace('.', "_")),
-            fields
-                .next()
-                .map(|s| s.trim().replace(|c: char| !c.is_ascii_digit(), "")),
-            fields
-                .next()
-                .map(|s| s.trim())
-                .and_then(|s| s.parse::<u32>().ok()),
-            fields
-                .next()
-                .map(|s| s.trim())
-                .and_then(|s| s.parse::<u32>().ok()),
-            fields.next().map(|s| s.trim()),
-        ) {
-            (Some(name), Some(block), Some(bit_off), Some(bit_len), Some(desc)) => {
-                let desc = desc.replace('[', "`[").replace(']', "]`");
-                writeln!(writer, "/// {desc}")?;
-                writeln!(
-                    writer,
-                    "pub const {name}: EfuseField = EfuseField::new(EfuseBlock::Block{block}, {bit_off}, {bit_len});"
-                )?;
-            }
-            other => eprintln!("Invalid data: {other:?}"),
-        }
-
-        line.clear();
-    }
-
-    Ok(())
-}
-
-fn detect_atomic_extension(ext: &str) -> bool {
-    let rustflags = env::var_os("CARGO_ENCODED_RUSTFLAGS")
-        .unwrap()
-        .into_string()
-        .unwrap();
-
-    // Users can pass -Ctarget-feature to the compiler multiple times, so we have to
-    // handle that
-    let target_flags = rustflags
-        .split(0x1f as char)
-        .filter_map(|s| s.strip_prefix("target-feature="));
-    for tf in target_flags {
-        let tf = tf
-            .split(',')
-            .map(|s| s.trim())
-            .filter_map(|s| s.strip_prefix('+'));
-        for tf in tf {
-            if tf == ext {
-                return true;
-            }
-        }
-    }
-
-    false
-}
-
 #[cfg(feature = "esp32")]
 fn generate_memory_extras() -> Vec<u8> {
     let reserve_dram = if cfg!(feature = "bluetooth") {
@@ -440,11 +253,7 @@ fn generate_memory_extras() -> Vec<u8> {
 
 #[cfg(feature = "esp32s2")]
 fn generate_memory_extras() -> Vec<u8> {
-    let reserved_cache = if cfg!(any(
-        feature = "psram-2m",
-        feature = "psram-4m",
-        feature = "psram-8m"
-    )) {
+    let reserved_cache = if cfg!(feature = "quad-psram") {
         "0x4000"
     } else {
         "0x2000"

esp-hal/devices/esp32/efuse.csv

@@ -1,118 +0,0 @@
-
-# field_name,       |    efuse_block, | bit_start, | bit_count, |comment #
-#                   |    (EFUSE_BLK0  | (0..255)   | (1-256)    |        #
-#                   |     EFUSE_BLK1  |            |            |        #
-#                   |        ...)     |            |            |        #
-##########################################################################
-# !!!!!!!!!!! #
-# After editing this file, run the command manually "idf.py efuse-common-table"
-# this will generate new source files, next rebuild all the sources.
-# !!!!!!!!!!! #
-
-# This file was generated by regtools.py based on the efuses.yaml file with the version: 369d2d860d34e777c0f7d545a7dfc3c4
-
-WR_DIS,                                          EFUSE_BLK0,   0,  16, [] Efuse write disable mask
-WR_DIS.RD_DIS,                                   EFUSE_BLK0,   0,   1, [WR_DIS.EFUSE_RD_DISABLE] wr_dis of RD_DIS
-WR_DIS.WR_DIS,                                   EFUSE_BLK0,   1,   1, [] wr_dis of WR_DIS
-WR_DIS.FLASH_CRYPT_CNT,                          EFUSE_BLK0,   2,   1, [] wr_dis of FLASH_CRYPT_CNT
-WR_DIS.UART_DOWNLOAD_DIS,                        EFUSE_BLK0,   2,   1, [] wr_dis of UART_DOWNLOAD_DIS
-WR_DIS.MAC,                                      EFUSE_BLK0,   3,   1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
-WR_DIS.MAC_CRC,                                  EFUSE_BLK0,   3,   1, [WR_DIS.MAC_FACTORY_CRC] wr_dis of MAC_CRC
-WR_DIS.DISABLE_APP_CPU,                          EFUSE_BLK0,   3,   1, [WR_DIS.CHIP_VER_DIS_APP_CPU] wr_dis of DISABLE_APP_CPU
-WR_DIS.DISABLE_BT,                               EFUSE_BLK0,   3,   1, [WR_DIS.CHIP_VER_DIS_BT] wr_dis of DISABLE_BT
-WR_DIS.DIS_CACHE,                                EFUSE_BLK0,   3,   1, [WR_DIS.CHIP_VER_DIS_CACHE] wr_dis of DIS_CACHE
-WR_DIS.VOL_LEVEL_HP_INV,                         EFUSE_BLK0,   3,   1, [] wr_dis of VOL_LEVEL_HP_INV
-WR_DIS.CLK8M_FREQ,                               EFUSE_BLK0,   4,   1, [WR_DIS.CK8M_FREQ] wr_dis of CLK8M_FREQ
-WR_DIS.ADC_VREF,                                 EFUSE_BLK0,   4,   1, [] wr_dis of ADC_VREF
-WR_DIS.XPD_SDIO_REG,                             EFUSE_BLK0,   5,   1, [] wr_dis of XPD_SDIO_REG
-WR_DIS.XPD_SDIO_TIEH,                            EFUSE_BLK0,   5,   1, [WR_DIS.SDIO_TIEH] wr_dis of XPD_SDIO_TIEH
-WR_DIS.XPD_SDIO_FORCE,                           EFUSE_BLK0,   5,   1, [WR_DIS.SDIO_FORCE] wr_dis of XPD_SDIO_FORCE
-WR_DIS.SPI_PAD_CONFIG_CLK,                       EFUSE_BLK0,   6,   1, [] wr_dis of SPI_PAD_CONFIG_CLK
-WR_DIS.SPI_PAD_CONFIG_Q,                         EFUSE_BLK0,   6,   1, [] wr_dis of SPI_PAD_CONFIG_Q
-WR_DIS.SPI_PAD_CONFIG_D,                         EFUSE_BLK0,   6,   1, [] wr_dis of SPI_PAD_CONFIG_D
-WR_DIS.SPI_PAD_CONFIG_CS0,                       EFUSE_BLK0,   6,   1, [] wr_dis of SPI_PAD_CONFIG_CS0
-WR_DIS.BLOCK1,                                   EFUSE_BLK0,   7,   1, [WR_DIS.ENCRYPT_FLASH_KEY WR_DIS.BLK1] wr_dis of BLOCK1
-WR_DIS.BLOCK2,                                   EFUSE_BLK0,   8,   1, [WR_DIS.SECURE_BOOT_KEY WR_DIS.BLK2] wr_dis of BLOCK2
-WR_DIS.BLOCK3,                                   EFUSE_BLK0,   9,   1, [WR_DIS.BLK3] wr_dis of BLOCK3
-WR_DIS.CUSTOM_MAC_CRC,                           EFUSE_BLK0,   9,   1, [WR_DIS.MAC_CUSTOM_CRC] wr_dis of CUSTOM_MAC_CRC
-WR_DIS.CUSTOM_MAC,                               EFUSE_BLK0,   9,   1, [WR_DIS.MAC_CUSTOM] wr_dis of CUSTOM_MAC
-WR_DIS.ADC1_TP_LOW,                              EFUSE_BLK0,   9,   1, [] wr_dis of ADC1_TP_LOW
-WR_DIS.ADC1_TP_HIGH,                             EFUSE_BLK0,   9,   1, [] wr_dis of ADC1_TP_HIGH
-WR_DIS.ADC2_TP_LOW,                              EFUSE_BLK0,   9,   1, [] wr_dis of ADC2_TP_LOW
-WR_DIS.ADC2_TP_HIGH,                             EFUSE_BLK0,   9,   1, [] wr_dis of ADC2_TP_HIGH
-WR_DIS.SECURE_VERSION,                           EFUSE_BLK0,   9,   1, [] wr_dis of SECURE_VERSION
-WR_DIS.MAC_VERSION,                              EFUSE_BLK0,   9,   1, [WR_DIS.MAC_CUSTOM_VER] wr_dis of MAC_VERSION
-WR_DIS.BLK3_PART_RESERVE,                        EFUSE_BLK0,  10,   1, [] wr_dis of BLK3_PART_RESERVE
-WR_DIS.FLASH_CRYPT_CONFIG,                       EFUSE_BLK0,  10,   1, [WR_DIS.ENCRYPT_CONFIG] wr_dis of FLASH_CRYPT_CONFIG
-WR_DIS.CODING_SCHEME,                            EFUSE_BLK0,  10,   1, [] wr_dis of CODING_SCHEME
-WR_DIS.KEY_STATUS,                               EFUSE_BLK0,  10,   1, [] wr_dis of KEY_STATUS
-WR_DIS.ABS_DONE_0,                               EFUSE_BLK0,  12,   1, [] wr_dis of ABS_DONE_0
-WR_DIS.ABS_DONE_1,                               EFUSE_BLK0,  13,   1, [] wr_dis of ABS_DONE_1
-WR_DIS.JTAG_DISABLE,                             EFUSE_BLK0,  14,   1, [WR_DIS.DISABLE_JTAG] wr_dis of JTAG_DISABLE
-WR_DIS.CONSOLE_DEBUG_DISABLE,                    EFUSE_BLK0,  15,   1, [] wr_dis of CONSOLE_DEBUG_DISABLE
-WR_DIS.DISABLE_DL_ENCRYPT,                       EFUSE_BLK0,  15,   1, [] wr_dis of DISABLE_DL_ENCRYPT
-WR_DIS.DISABLE_DL_DECRYPT,                       EFUSE_BLK0,  15,   1, [] wr_dis of DISABLE_DL_DECRYPT
-WR_DIS.DISABLE_DL_CACHE,                         EFUSE_BLK0,  15,   1, [] wr_dis of DISABLE_DL_CACHE
-RD_DIS,                                          EFUSE_BLK0,  16,   4, [] Disable reading from BlOCK1-3
-RD_DIS.BLOCK1,                                   EFUSE_BLK0,  16,   1, [RD_DIS.ENCRYPT_FLASH_KEY RD_DIS.BLK1] rd_dis of BLOCK1
-RD_DIS.BLOCK2,                                   EFUSE_BLK0,  17,   1, [RD_DIS.SECURE_BOOT_KEY RD_DIS.BLK2] rd_dis of BLOCK2
-RD_DIS.BLOCK3,                                   EFUSE_BLK0,  18,   1, [RD_DIS.BLK3] rd_dis of BLOCK3
-RD_DIS.CUSTOM_MAC_CRC,                           EFUSE_BLK0,  18,   1, [RD_DIS.MAC_CUSTOM_CRC] rd_dis of CUSTOM_MAC_CRC
-RD_DIS.CUSTOM_MAC,                               EFUSE_BLK0,  18,   1, [RD_DIS.MAC_CUSTOM] rd_dis of CUSTOM_MAC
-RD_DIS.ADC1_TP_LOW,                              EFUSE_BLK0,  18,   1, [] rd_dis of ADC1_TP_LOW
-RD_DIS.ADC1_TP_HIGH,                             EFUSE_BLK0,  18,   1, [] rd_dis of ADC1_TP_HIGH
-RD_DIS.ADC2_TP_LOW,                              EFUSE_BLK0,  18,   1, [] rd_dis of ADC2_TP_LOW
-RD_DIS.ADC2_TP_HIGH,                             EFUSE_BLK0,  18,   1, [] rd_dis of ADC2_TP_HIGH
-RD_DIS.SECURE_VERSION,                           EFUSE_BLK0,  18,   1, [] rd_dis of SECURE_VERSION
-RD_DIS.MAC_VERSION,                              EFUSE_BLK0,  18,   1, [RD_DIS.MAC_CUSTOM_VER] rd_dis of MAC_VERSION
-RD_DIS.BLK3_PART_RESERVE,                        EFUSE_BLK0,  19,   1, [] rd_dis of BLK3_PART_RESERVE
-RD_DIS.FLASH_CRYPT_CONFIG,                       EFUSE_BLK0,  19,   1, [RD_DIS.ENCRYPT_CONFIG] rd_dis of FLASH_CRYPT_CONFIG
-RD_DIS.CODING_SCHEME,                            EFUSE_BLK0,  19,   1, [] rd_dis of CODING_SCHEME
-RD_DIS.KEY_STATUS,                               EFUSE_BLK0,  19,   1, [] rd_dis of KEY_STATUS
-FLASH_CRYPT_CNT,                                 EFUSE_BLK0,  20,   7, [] Flash encryption is enabled if this field has an odd number of bits set
-UART_DOWNLOAD_DIS,                               EFUSE_BLK0,  27,   1, [] Disable UART download mode. Valid for ESP32 V3 and newer; only
-MAC_FACTORY,                                     EFUSE_BLK0,  32,   48, [MAC_FACTORY] MAC address
-MAC_CRC,                                         EFUSE_BLK0,  80,   8, [MAC_FACTORY_CRC] CRC8 for MAC address
-DISABLE_APP_CPU,                                 EFUSE_BLK0,  96,   1, [CHIP_VER_DIS_APP_CPU] Disables APP CPU
-DISABLE_BT,                                      EFUSE_BLK0,  97,   1, [CHIP_VER_DIS_BT] Disables Bluetooth
-CHIP_PACKAGE_4BIT,                               EFUSE_BLK0,  98,   1, [CHIP_VER_PKG_4BIT] Chip package identifier #4bit
-DIS_CACHE,                                       EFUSE_BLK0,  99,   1, [CHIP_VER_DIS_CACHE] Disables cache
-SPI_PAD_CONFIG_HD,                               EFUSE_BLK0, 100,   5, [] read for SPI_pad_config_hd
-CHIP_PACKAGE,                                    EFUSE_BLK0, 105,   3, [CHIP_VER_PKG] Chip package identifier
-CHIP_CPU_FREQ_LOW,                               EFUSE_BLK0, 108,   1, [] If set alongside EFUSE_RD_CHIP_CPU_FREQ_RATED; the ESP32's max CPU frequency is rated for 160MHz. 240MHz otherwise
-CHIP_CPU_FREQ_RATED,                             EFUSE_BLK0, 109,   1, [] If set; the ESP32's maximum CPU frequency has been rated
-BLK3_PART_RESERVE,                               EFUSE_BLK0, 110,   1, [] BLOCK3 partially served for ADC calibration data
-CHIP_VER_REV1,                                   EFUSE_BLK0, 111,   1, [] bit is set to 1 for rev1 silicon
-CLK8M_FREQ,                                      EFUSE_BLK0, 128,   8, [CK8M_FREQ] 8MHz clock freq override
-ADC_VREF,                                        EFUSE_BLK0, 136,   5, [] True ADC reference voltage
-XPD_SDIO_REG,                                    EFUSE_BLK0, 142,   1, [] read for XPD_SDIO_REG
-XPD_SDIO_TIEH,                                   EFUSE_BLK0, 143,   1, [SDIO_TIEH] If XPD_SDIO_FORCE & XPD_SDIO_REG {1: "3.3V"; 0: "1.8V"}
-XPD_SDIO_FORCE,                                  EFUSE_BLK0, 144,   1, [SDIO_FORCE] Ignore MTDI pin (GPIO12) for VDD_SDIO on reset
-SPI_PAD_CONFIG_CLK,                              EFUSE_BLK0, 160,   5, [] Override SD_CLK pad (GPIO6/SPICLK)
-SPI_PAD_CONFIG_Q,                                EFUSE_BLK0, 165,   5, [] Override SD_DATA_0 pad (GPIO7/SPIQ)
-SPI_PAD_CONFIG_D,                                EFUSE_BLK0, 170,   5, [] Override SD_DATA_1 pad (GPIO8/SPID)
-SPI_PAD_CONFIG_CS0,                              EFUSE_BLK0, 175,   5, [] Override SD_CMD pad (GPIO11/SPICS0)
-CHIP_VER_REV2,                                   EFUSE_BLK0, 180,   1, []
-VOL_LEVEL_HP_INV,                                EFUSE_BLK0, 182,   2, [] This field stores the voltage level for CPU to run at 240 MHz; or for flash/PSRAM to run at 80 MHz.0x0: level 7; 0x1: level 6; 0x2: level 5; 0x3: level 4. (RO)
-WAFER_VERSION_MINOR,                             EFUSE_BLK0, 184,   2, []
-FLASH_CRYPT_CONFIG,                              EFUSE_BLK0, 188,   4, [ENCRYPT_CONFIG] Flash encryption config (key tweak bits)
-CODING_SCHEME,                                   EFUSE_BLK0, 192,   2, [] Efuse variable block length scheme {0: "NONE (BLK1-3 len=256 bits)"; 1: "3/4 (BLK1-3 len=192 bits)"; 2: "REPEAT (BLK1-3 len=128 bits) not supported"; 3: "NONE (BLK1-3 len=256 bits)"}
-CONSOLE_DEBUG_DISABLE,                           EFUSE_BLK0, 194,   1, [] Disable ROM BASIC interpreter fallback
-DISABLE_SDIO_HOST,                               EFUSE_BLK0, 195,   1, []
-ABS_DONE_0,                                      EFUSE_BLK0, 196,   1, [] Secure boot V1 is enabled for bootloader image
-ABS_DONE_1,                                      EFUSE_BLK0, 197,   1, [] Secure boot V2 is enabled for bootloader image
-JTAG_DISABLE,                                    EFUSE_BLK0, 198,   1, [DISABLE_JTAG] Disable JTAG
-DISABLE_DL_ENCRYPT,                              EFUSE_BLK0, 199,   1, [] Disable flash encryption in UART bootloader
-DISABLE_DL_DECRYPT,                              EFUSE_BLK0, 200,   1, [] Disable flash decryption in UART bootloader
-DISABLE_DL_CACHE,                                EFUSE_BLK0, 201,   1, [] Disable flash cache in UART bootloader
-KEY_STATUS,                                      EFUSE_BLK0, 202,   1, [] Usage of efuse block 3 (reserved)
-BLOCK1,                                          EFUSE_BLK1,   0, MAX_BLK_LEN, [ENCRYPT_FLASH_KEY] Flash encryption key
-BLOCK2,                                          EFUSE_BLK2,   0, MAX_BLK_LEN, [SECURE_BOOT_KEY] Security boot key
-CUSTOM_MAC_CRC,                                  EFUSE_BLK3,   0,   8, [MAC_CUSTOM_CRC] CRC8 for custom MAC address
-MAC_CUSTOM,                                      EFUSE_BLK3,   8,  48, [MAC_CUSTOM] Custom MAC address
-ADC1_TP_LOW,                                     EFUSE_BLK3,  96,   7, [] ADC1 Two Point calibration low point. Only valid if EFUSE_RD_BLK3_PART_RESERVE
-ADC1_TP_HIGH,                                    EFUSE_BLK3, 103,   9, [] ADC1 Two Point calibration high point. Only valid if EFUSE_RD_BLK3_PART_RESERVE
-ADC2_TP_LOW,                                     EFUSE_BLK3, 112,   7, [] ADC2 Two Point calibration low point. Only valid if EFUSE_RD_BLK3_PART_RESERVE
-ADC2_TP_HIGH,                                    EFUSE_BLK3, 119,   9, [] ADC2 Two Point calibration high point. Only valid if EFUSE_RD_BLK3_PART_RESERVE
-SECURE_VERSION,                                  EFUSE_BLK3, 128,  32, [] Secure version for anti-rollback
-MAC_VERSION,                                     EFUSE_BLK3, 184,   8, [MAC_CUSTOM_VER] Version of the MAC field {1: "Custom MAC in BLOCK3"}

esp-hal/devices/esp32c2/efuse.csv

@@ -1,107 +0,0 @@
-
-# field_name,       |    efuse_block, | bit_start, | bit_count, |comment #
-#                   |    (EFUSE_BLK0  | (0..255)   | (1-256)    |        #
-#                   |     EFUSE_BLK1  |            |            |        #
-#                   |        ...)     |            |            |        #
-##########################################################################
-# !!!!!!!!!!! #
-# After editing this file, run the command manually "idf.py efuse-common-table"
-# this will generate new source files, next rebuild all the sources.
-# !!!!!!!!!!! #
-
-# This file was generated by regtools.py based on the efuses.yaml file with the version: 897499b0349a608b895d467abbcf006b
-
-WR_DIS,                                          EFUSE_BLK0,   0,   8, [] Disable programming of individual eFuses
-WR_DIS.RD_DIS,                                   EFUSE_BLK0,   0,   1, [] wr_dis of RD_DIS
-WR_DIS.WDT_DELAY_SEL,                            EFUSE_BLK0,   1,   1, [] wr_dis of WDT_DELAY_SEL
-WR_DIS.DIS_PAD_JTAG,                             EFUSE_BLK0,   1,   1, [] wr_dis of DIS_PAD_JTAG
-WR_DIS.DIS_DOWNLOAD_ICACHE,                      EFUSE_BLK0,   1,   1, [] wr_dis of DIS_DOWNLOAD_ICACHE
-WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT,              EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
-WR_DIS.SPI_BOOT_CRYPT_CNT,                       EFUSE_BLK0,   2,   1, [] wr_dis of SPI_BOOT_CRYPT_CNT
-WR_DIS.XTS_KEY_LENGTH_256,                       EFUSE_BLK0,   2,   1, [] wr_dis of XTS_KEY_LENGTH_256
-WR_DIS.SECURE_BOOT_EN,                           EFUSE_BLK0,   2,   1, [] wr_dis of SECURE_BOOT_EN
-WR_DIS.UART_PRINT_CONTROL,                       EFUSE_BLK0,   3,   1, [] wr_dis of UART_PRINT_CONTROL
-WR_DIS.FORCE_SEND_RESUME,                        EFUSE_BLK0,   3,   1, [] wr_dis of FORCE_SEND_RESUME
-WR_DIS.DIS_DOWNLOAD_MODE,                        EFUSE_BLK0,   3,   1, [] wr_dis of DIS_DOWNLOAD_MODE
-WR_DIS.DIS_DIRECT_BOOT,                          EFUSE_BLK0,   3,   1, [] wr_dis of DIS_DIRECT_BOOT
-WR_DIS.ENABLE_SECURITY_DOWNLOAD,                 EFUSE_BLK0,   3,   1, [] wr_dis of ENABLE_SECURITY_DOWNLOAD
-WR_DIS.FLASH_TPUW,                               EFUSE_BLK0,   3,   1, [] wr_dis of FLASH_TPUW
-WR_DIS.SECURE_VERSION,                           EFUSE_BLK0,   4,   1, [] wr_dis of SECURE_VERSION
-WR_DIS.CUSTOM_MAC_USED,                          EFUSE_BLK0,   4,   1, [WR_DIS.ENABLE_CUSTOM_MAC] wr_dis of CUSTOM_MAC_USED
-WR_DIS.DISABLE_WAFER_VERSION_MAJOR,              EFUSE_BLK0,   4,   1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
-WR_DIS.DISABLE_BLK_VERSION_MAJOR,                EFUSE_BLK0,   4,   1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR
-WR_DIS.CUSTOM_MAC,                               EFUSE_BLK0,   5,   1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
-WR_DIS.MAC,                                      EFUSE_BLK0,   6,   1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
-WR_DIS.WAFER_VERSION_MINOR,                      EFUSE_BLK0,   6,   1, [] wr_dis of WAFER_VERSION_MINOR
-WR_DIS.WAFER_VERSION_MAJOR,                      EFUSE_BLK0,   6,   1, [] wr_dis of WAFER_VERSION_MAJOR
-WR_DIS.PKG_VERSION,                              EFUSE_BLK0,   6,   1, [] wr_dis of PKG_VERSION
-WR_DIS.BLK_VERSION_MINOR,                        EFUSE_BLK0,   6,   1, [] wr_dis of BLK_VERSION_MINOR
-WR_DIS.BLK_VERSION_MAJOR,                        EFUSE_BLK0,   6,   1, [] wr_dis of BLK_VERSION_MAJOR
-WR_DIS.OCODE,                                    EFUSE_BLK0,   6,   1, [] wr_dis of OCODE
-WR_DIS.TEMP_CALIB,                               EFUSE_BLK0,   6,   1, [] wr_dis of TEMP_CALIB
-WR_DIS.ADC1_INIT_CODE_ATTEN0,                    EFUSE_BLK0,   6,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN0
-WR_DIS.ADC1_INIT_CODE_ATTEN3,                    EFUSE_BLK0,   6,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN3
-WR_DIS.ADC1_CAL_VOL_ATTEN0,                      EFUSE_BLK0,   6,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN0
-WR_DIS.ADC1_CAL_VOL_ATTEN3,                      EFUSE_BLK0,   6,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN3
-WR_DIS.DIG_DBIAS_HVT,                            EFUSE_BLK0,   6,   1, [] wr_dis of DIG_DBIAS_HVT
-WR_DIS.DIG_LDO_SLP_DBIAS2,                       EFUSE_BLK0,   6,   1, [] wr_dis of DIG_LDO_SLP_DBIAS2
-WR_DIS.DIG_LDO_SLP_DBIAS26,                      EFUSE_BLK0,   6,   1, [] wr_dis of DIG_LDO_SLP_DBIAS26
-WR_DIS.DIG_LDO_ACT_DBIAS26,                      EFUSE_BLK0,   6,   1, [] wr_dis of DIG_LDO_ACT_DBIAS26
-WR_DIS.DIG_LDO_ACT_STEPD10,                      EFUSE_BLK0,   6,   1, [] wr_dis of DIG_LDO_ACT_STEPD10
-WR_DIS.RTC_LDO_SLP_DBIAS13,                      EFUSE_BLK0,   6,   1, [] wr_dis of RTC_LDO_SLP_DBIAS13
-WR_DIS.RTC_LDO_SLP_DBIAS29,                      EFUSE_BLK0,   6,   1, [] wr_dis of RTC_LDO_SLP_DBIAS29
-WR_DIS.RTC_LDO_SLP_DBIAS31,                      EFUSE_BLK0,   6,   1, [] wr_dis of RTC_LDO_SLP_DBIAS31
-WR_DIS.RTC_LDO_ACT_DBIAS31,                      EFUSE_BLK0,   6,   1, [] wr_dis of RTC_LDO_ACT_DBIAS31
-WR_DIS.RTC_LDO_ACT_DBIAS13,                      EFUSE_BLK0,   6,   1, [] wr_dis of RTC_LDO_ACT_DBIAS13
-WR_DIS.ADC_CALIBRATION_3,                        EFUSE_BLK0,   6,   1, [] wr_dis of ADC_CALIBRATION_3
-WR_DIS.BLOCK_KEY0,                               EFUSE_BLK0,   7,   1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
-RD_DIS,                                          EFUSE_BLK0,  32,   2, [] Disable reading from BlOCK3
-RD_DIS.KEY0,                                     EFUSE_BLK0,  32,   2, [] Read protection for EFUSE_BLK3. KEY0
-RD_DIS.KEY0.LOW,                                 EFUSE_BLK0,  32,   1, [] Read protection for EFUSE_BLK3. KEY0 lower 128-bit key
-RD_DIS.KEY0.HI,                                  EFUSE_BLK0,  33,   1, [] Read protection for EFUSE_BLK3. KEY0 higher 128-bit key
-WDT_DELAY_SEL,                                   EFUSE_BLK0,  34,   2, [] RTC watchdog timeout threshold; in unit of slow clock cycle {0: "40000"; 1: "80000"; 2: "160000"; 3: "320000"}
-DIS_PAD_JTAG,                                    EFUSE_BLK0,  36,   1, [] Set this bit to disable pad jtag
-DIS_DOWNLOAD_ICACHE,                             EFUSE_BLK0,  37,   1, [] The bit be set to disable icache in download mode
-DIS_DOWNLOAD_MANUAL_ENCRYPT,                     EFUSE_BLK0,  38,   1, [] The bit be set to disable manual encryption
-SPI_BOOT_CRYPT_CNT,                              EFUSE_BLK0,  39,   3, [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
-XTS_KEY_LENGTH_256,                              EFUSE_BLK0,  42,   1, [] Flash encryption key length {0: "128 bits key"; 1: "256 bits key"}
-UART_PRINT_CONTROL,                              EFUSE_BLK0,  43,   2, [] Set the default UARTboot message output mode {0: "Enable"; 1: "Enable when GPIO8 is low at reset"; 2: "Enable when GPIO8 is high at reset"; 3: "Disable"}
-FORCE_SEND_RESUME,                               EFUSE_BLK0,  45,   1, [] Set this bit to force ROM code to send a resume command during SPI boot
-DIS_DOWNLOAD_MODE,                               EFUSE_BLK0,  46,   1, [] Set this bit to disable download mode (boot_mode[3:0] = 0; 1; 2; 4; 5; 6; 7)
-DIS_DIRECT_BOOT,                                 EFUSE_BLK0,  47,   1, [] This bit set means disable direct_boot mode
-ENABLE_SECURITY_DOWNLOAD,                        EFUSE_BLK0,  48,   1, [] Set this bit to enable secure UART download mode
-FLASH_TPUW,                                      EFUSE_BLK0,  49,   4, [] Configures flash waiting time after power-up; in unit of ms. If the value is less than 15; the waiting time is the configurable value.  Otherwise; the waiting time is twice the configurable value
-SECURE_BOOT_EN,                                  EFUSE_BLK0,  53,   1, [] The bit be set to enable secure boot
-SECURE_VERSION,                                  EFUSE_BLK0,  54,   4, [] Secure version for anti-rollback
-CUSTOM_MAC_USED,                                 EFUSE_BLK0,  58,   1, [ENABLE_CUSTOM_MAC] True if MAC_CUSTOM is burned
-DISABLE_WAFER_VERSION_MAJOR,                     EFUSE_BLK0,  59,   1, [] Disables check of wafer version major
-DISABLE_BLK_VERSION_MAJOR,                       EFUSE_BLK0,  60,   1, [] Disables check of blk version major
-USER_DATA,                                       EFUSE_BLK1,   0,  88, [] User data block
-USER_DATA.MAC_CUSTOM,                            EFUSE_BLK1,   0,  48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC address
-MAC_FACTORY,                                     EFUSE_BLK2,   0,  48, [MAC_FACTORY] MAC address
-WAFER_VERSION_MINOR,                             EFUSE_BLK2,  48,   4, [] WAFER_VERSION_MINOR
-WAFER_VERSION_MAJOR,                             EFUSE_BLK2,  52,   2, [] WAFER_VERSION_MAJOR
-PKG_VERSION,                                     EFUSE_BLK2,  54,   3, [] EFUSE_PKG_VERSION
-BLK_VERSION_MINOR,                               EFUSE_BLK2,  57,   3, [] Minor version of BLOCK2 {0: "No calib"; 1: "With calib"}
-BLK_VERSION_MAJOR,                               EFUSE_BLK2,  60,   2, [] Major version of BLOCK2
-OCODE,                                           EFUSE_BLK2,  62,   7, [] OCode
-TEMP_CALIB,                                      EFUSE_BLK2,  69,   9, [] Temperature calibration data
-ADC1_INIT_CODE_ATTEN0,                           EFUSE_BLK2,  78,   8, [] ADC1 init code at atten0
-ADC1_INIT_CODE_ATTEN3,                           EFUSE_BLK2,  86,   5, [] ADC1 init code at atten3
-ADC1_CAL_VOL_ATTEN0,                             EFUSE_BLK2,  91,   8, [] ADC1 calibration voltage at atten0
-ADC1_CAL_VOL_ATTEN3,                             EFUSE_BLK2,  99,   6, [] ADC1 calibration voltage at atten3
-DIG_DBIAS_HVT,                                   EFUSE_BLK2, 105,   5, [] BLOCK2 digital dbias when hvt
-DIG_LDO_SLP_DBIAS2,                              EFUSE_BLK2, 110,   7, [] BLOCK2 DIG_LDO_DBG0_DBIAS2
-DIG_LDO_SLP_DBIAS26,                             EFUSE_BLK2, 117,   8, [] BLOCK2 DIG_LDO_DBG0_DBIAS26
-DIG_LDO_ACT_DBIAS26,                             EFUSE_BLK2, 125,   6, [] BLOCK2 DIG_LDO_ACT_DBIAS26
-DIG_LDO_ACT_STEPD10,                             EFUSE_BLK2, 131,   4, [] BLOCK2 DIG_LDO_ACT_STEPD10
-RTC_LDO_SLP_DBIAS13,                             EFUSE_BLK2, 135,   7, [] BLOCK2 DIG_LDO_SLP_DBIAS13
-RTC_LDO_SLP_DBIAS29,                             EFUSE_BLK2, 142,   9, [] BLOCK2 DIG_LDO_SLP_DBIAS29
-RTC_LDO_SLP_DBIAS31,                             EFUSE_BLK2, 151,   6, [] BLOCK2 DIG_LDO_SLP_DBIAS31
-RTC_LDO_ACT_DBIAS31,                             EFUSE_BLK2, 157,   6, [] BLOCK2 DIG_LDO_ACT_DBIAS31
-RTC_LDO_ACT_DBIAS13,                             EFUSE_BLK2, 163,   8, [] BLOCK2 DIG_LDO_ACT_DBIAS13
-ADC_CALIBRATION_3,                               EFUSE_BLK2, 192,  11, [] Store the bit [86:96] of ADC calibration data
-KEY0,                                            EFUSE_BLK3,   0, 256, [BLOCK_KEY0] BLOCK_BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryption
-KEY0.FE_256BIT,                                  EFUSE_BLK3,   0, 256, [] 256bit FE key
-KEY0.FE_128BIT,                                  EFUSE_BLK3,   0, 128, [] 128bit FE key
-KEY0.SB_128BIT,                                  EFUSE_BLK3, 128, 128, [] 128bit SB key

esp-hal/devices/esp32c3/efuse.csv

@@ -1,187 +0,0 @@
-
-# field_name,       |    efuse_block, | bit_start, | bit_count, |comment #
-#                   |    (EFUSE_BLK0  | (0..255)   | (1-256)    |        #
-#                   |     EFUSE_BLK1  |            |            |        #
-#                   |        ...)     |            |            |        #
-##########################################################################
-# !!!!!!!!!!! #
-# After editing this file, run the command manually "idf.py efuse-common-table"
-# this will generate new source files, next rebuild all the sources.
-# !!!!!!!!!!! #
-
-# This file was generated by regtools.py based on the efuses.yaml file with the version: a85f874ae2b6538ca48b7c3db4a79531
-
-WR_DIS,                                          EFUSE_BLK0,   0,  32, [] Disable programming of individual eFuses
-WR_DIS.RD_DIS,                                   EFUSE_BLK0,   0,   1, [] wr_dis of RD_DIS
-WR_DIS.DIS_ICACHE,                               EFUSE_BLK0,   2,   1, [] wr_dis of DIS_ICACHE
-WR_DIS.DIS_USB_JTAG,                             EFUSE_BLK0,   2,   1, [] wr_dis of DIS_USB_JTAG
-WR_DIS.DIS_DOWNLOAD_ICACHE,                      EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DOWNLOAD_ICACHE
-WR_DIS.DIS_USB_SERIAL_JTAG,                      EFUSE_BLK0,   2,   1, [WR_DIS.DIS_USB_DEVICE] wr_dis of DIS_USB_SERIAL_JTAG
-WR_DIS.DIS_FORCE_DOWNLOAD,                       EFUSE_BLK0,   2,   1, [] wr_dis of DIS_FORCE_DOWNLOAD
-WR_DIS.DIS_TWAI,                                 EFUSE_BLK0,   2,   1, [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI
-WR_DIS.JTAG_SEL_ENABLE,                          EFUSE_BLK0,   2,   1, [] wr_dis of JTAG_SEL_ENABLE
-WR_DIS.DIS_PAD_JTAG,                             EFUSE_BLK0,   2,   1, [] wr_dis of DIS_PAD_JTAG
-WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT,              EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
-WR_DIS.WDT_DELAY_SEL,                            EFUSE_BLK0,   3,   1, [] wr_dis of WDT_DELAY_SEL
-WR_DIS.SPI_BOOT_CRYPT_CNT,                       EFUSE_BLK0,   4,   1, [] wr_dis of SPI_BOOT_CRYPT_CNT
-WR_DIS.SECURE_BOOT_KEY_REVOKE0,                  EFUSE_BLK0,   5,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE0
-WR_DIS.SECURE_BOOT_KEY_REVOKE1,                  EFUSE_BLK0,   6,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE1
-WR_DIS.SECURE_BOOT_KEY_REVOKE2,                  EFUSE_BLK0,   7,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE2
-WR_DIS.KEY_PURPOSE_0,                            EFUSE_BLK0,   8,   1, [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0
-WR_DIS.KEY_PURPOSE_1,                            EFUSE_BLK0,   9,   1, [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1
-WR_DIS.KEY_PURPOSE_2,                            EFUSE_BLK0,  10,   1, [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2
-WR_DIS.KEY_PURPOSE_3,                            EFUSE_BLK0,  11,   1, [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3
-WR_DIS.KEY_PURPOSE_4,                            EFUSE_BLK0,  12,   1, [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4
-WR_DIS.KEY_PURPOSE_5,                            EFUSE_BLK0,  13,   1, [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5
-WR_DIS.SECURE_BOOT_EN,                           EFUSE_BLK0,  15,   1, [] wr_dis of SECURE_BOOT_EN
-WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE,            EFUSE_BLK0,  16,   1, [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
-WR_DIS.FLASH_TPUW,                               EFUSE_BLK0,  18,   1, [] wr_dis of FLASH_TPUW
-WR_DIS.DIS_DOWNLOAD_MODE,                        EFUSE_BLK0,  18,   1, [] wr_dis of DIS_DOWNLOAD_MODE
-WR_DIS.DIS_DIRECT_BOOT,                          EFUSE_BLK0,  18,   1, [WR_DIS.DIS_LEGACY_SPI_BOOT] wr_dis of DIS_DIRECT_BOOT
-WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT,            EFUSE_BLK0,  18,   1, [WR_DIS.UART_PRINT_CHANNEL] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT
-WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,        EFUSE_BLK0,  18,   1, [WR_DIS.DIS_USB_DOWNLOAD_MODE] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE
-WR_DIS.ENABLE_SECURITY_DOWNLOAD,                 EFUSE_BLK0,  18,   1, [] wr_dis of ENABLE_SECURITY_DOWNLOAD
-WR_DIS.UART_PRINT_CONTROL,                       EFUSE_BLK0,  18,   1, [] wr_dis of UART_PRINT_CONTROL
-WR_DIS.FORCE_SEND_RESUME,                        EFUSE_BLK0,  18,   1, [] wr_dis of FORCE_SEND_RESUME
-WR_DIS.SECURE_VERSION,                           EFUSE_BLK0,  18,   1, [] wr_dis of SECURE_VERSION
-WR_DIS.ERR_RST_ENABLE,                           EFUSE_BLK0,  19,   1, [] wr_dis of ERR_RST_ENABLE
-WR_DIS.DISABLE_WAFER_VERSION_MAJOR,              EFUSE_BLK0,  19,   1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
-WR_DIS.DISABLE_BLK_VERSION_MAJOR,                EFUSE_BLK0,  19,   1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR
-WR_DIS.BLK1,                                     EFUSE_BLK0,  20,   1, [] wr_dis of BLOCK1
-WR_DIS.MAC,                                      EFUSE_BLK0,  20,   1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
-WR_DIS.SPI_PAD_CONFIG_CLK,                       EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_CLK
-WR_DIS.SPI_PAD_CONFIG_Q,                         EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_Q
-WR_DIS.SPI_PAD_CONFIG_D,                         EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D
-WR_DIS.SPI_PAD_CONFIG_CS,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_CS
-WR_DIS.SPI_PAD_CONFIG_HD,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_HD
-WR_DIS.SPI_PAD_CONFIG_WP,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_WP
-WR_DIS.SPI_PAD_CONFIG_DQS,                       EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_DQS
-WR_DIS.SPI_PAD_CONFIG_D4,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D4
-WR_DIS.SPI_PAD_CONFIG_D5,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D5
-WR_DIS.SPI_PAD_CONFIG_D6,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D6
-WR_DIS.SPI_PAD_CONFIG_D7,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D7
-WR_DIS.WAFER_VERSION_MINOR_LO,                   EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MINOR_LO
-WR_DIS.PKG_VERSION,                              EFUSE_BLK0,  20,   1, [] wr_dis of PKG_VERSION
-WR_DIS.BLK_VERSION_MINOR,                        EFUSE_BLK0,  20,   1, [] wr_dis of BLK_VERSION_MINOR
-WR_DIS.K_RTC_LDO,                                EFUSE_BLK0,  20,   1, [] wr_dis of K_RTC_LDO
-WR_DIS.K_DIG_LDO,                                EFUSE_BLK0,  20,   1, [] wr_dis of K_DIG_LDO
-WR_DIS.V_RTC_DBIAS20,                            EFUSE_BLK0,  20,   1, [] wr_dis of V_RTC_DBIAS20
-WR_DIS.V_DIG_DBIAS20,                            EFUSE_BLK0,  20,   1, [] wr_dis of V_DIG_DBIAS20
-WR_DIS.DIG_DBIAS_HVT,                            EFUSE_BLK0,  20,   1, [] wr_dis of DIG_DBIAS_HVT
-WR_DIS.THRES_HVT,                                EFUSE_BLK0,  20,   1, [] wr_dis of THRES_HVT
-WR_DIS.WAFER_VERSION_MINOR_HI,                   EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MINOR_HI
-WR_DIS.WAFER_VERSION_MAJOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MAJOR
-WR_DIS.SYS_DATA_PART1,                           EFUSE_BLK0,  21,   1, [] wr_dis of BLOCK2
-WR_DIS.OPTIONAL_UNIQUE_ID,                       EFUSE_BLK0,  21,   1, [] wr_dis of OPTIONAL_UNIQUE_ID
-WR_DIS.BLK_VERSION_MAJOR,                        EFUSE_BLK0,  21,   1, [] wr_dis of BLK_VERSION_MAJOR
-WR_DIS.TEMP_CALIB,                               EFUSE_BLK0,  21,   1, [] wr_dis of TEMP_CALIB
-WR_DIS.OCODE,                                    EFUSE_BLK0,  21,   1, [] wr_dis of OCODE
-WR_DIS.ADC1_INIT_CODE_ATTEN0,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN0
-WR_DIS.ADC1_INIT_CODE_ATTEN1,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN1
-WR_DIS.ADC1_INIT_CODE_ATTEN2,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN2
-WR_DIS.ADC1_INIT_CODE_ATTEN3,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN3
-WR_DIS.ADC1_CAL_VOL_ATTEN0,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN0
-WR_DIS.ADC1_CAL_VOL_ATTEN1,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN1
-WR_DIS.ADC1_CAL_VOL_ATTEN2,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN2
-WR_DIS.ADC1_CAL_VOL_ATTEN3,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN3
-WR_DIS.BLOCK_USR_DATA,                           EFUSE_BLK0,  22,   1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
-WR_DIS.CUSTOM_MAC,                               EFUSE_BLK0,  22,   1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
-WR_DIS.BLOCK_KEY0,                               EFUSE_BLK0,  23,   1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
-WR_DIS.BLOCK_KEY1,                               EFUSE_BLK0,  24,   1, [WR_DIS.KEY1] wr_dis of BLOCK_KEY1
-WR_DIS.BLOCK_KEY2,                               EFUSE_BLK0,  25,   1, [WR_DIS.KEY2] wr_dis of BLOCK_KEY2
-WR_DIS.BLOCK_KEY3,                               EFUSE_BLK0,  26,   1, [WR_DIS.KEY3] wr_dis of BLOCK_KEY3
-WR_DIS.BLOCK_KEY4,                               EFUSE_BLK0,  27,   1, [WR_DIS.KEY4] wr_dis of BLOCK_KEY4
-WR_DIS.BLOCK_KEY5,                               EFUSE_BLK0,  28,   1, [WR_DIS.KEY5] wr_dis of BLOCK_KEY5
-WR_DIS.BLOCK_SYS_DATA2,                          EFUSE_BLK0,  29,   1, [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
-WR_DIS.USB_EXCHG_PINS,                           EFUSE_BLK0,  30,   1, [] wr_dis of USB_EXCHG_PINS
-WR_DIS.VDD_SPI_AS_GPIO,                          EFUSE_BLK0,  30,   1, [] wr_dis of VDD_SPI_AS_GPIO
-WR_DIS.SOFT_DIS_JTAG,                            EFUSE_BLK0,  31,   1, [] wr_dis of SOFT_DIS_JTAG
-RD_DIS,                                          EFUSE_BLK0,  32,   7, [] Disable reading from BlOCK4-10
-RD_DIS.BLOCK_KEY0,                               EFUSE_BLK0,  32,   1, [RD_DIS.KEY0] rd_dis of BLOCK_KEY0
-RD_DIS.BLOCK_KEY1,                               EFUSE_BLK0,  33,   1, [RD_DIS.KEY1] rd_dis of BLOCK_KEY1
-RD_DIS.BLOCK_KEY2,                               EFUSE_BLK0,  34,   1, [RD_DIS.KEY2] rd_dis of BLOCK_KEY2
-RD_DIS.BLOCK_KEY3,                               EFUSE_BLK0,  35,   1, [RD_DIS.KEY3] rd_dis of BLOCK_KEY3
-RD_DIS.BLOCK_KEY4,                               EFUSE_BLK0,  36,   1, [RD_DIS.KEY4] rd_dis of BLOCK_KEY4
-RD_DIS.BLOCK_KEY5,                               EFUSE_BLK0,  37,   1, [RD_DIS.KEY5] rd_dis of BLOCK_KEY5
-RD_DIS.BLOCK_SYS_DATA2,                          EFUSE_BLK0,  38,   1, [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2
-DIS_ICACHE,                                      EFUSE_BLK0,  40,   1, [] Set this bit to disable Icache
-DIS_USB_JTAG,                                    EFUSE_BLK0,  41,   1, [] Set this bit to disable function of usb switch to jtag in module of usb device
-DIS_DOWNLOAD_ICACHE,                             EFUSE_BLK0,  42,   1, [] Set this bit to disable Icache in download mode (boot_mode[3:0] is 0; 1; 2; 3; 6; 7)
-DIS_USB_SERIAL_JTAG,                             EFUSE_BLK0,  43,   1, [DIS_USB_DEVICE] USB-Serial-JTAG {0: "Enable"; 1: "Disable"}
-DIS_FORCE_DOWNLOAD,                              EFUSE_BLK0,  44,   1, [] Set this bit to disable the function that forces chip into download mode
-DIS_TWAI,                                        EFUSE_BLK0,  46,   1, [DIS_CAN] Set this bit to disable CAN function
-JTAG_SEL_ENABLE,                                 EFUSE_BLK0,  47,   1, [] Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0
-SOFT_DIS_JTAG,                                   EFUSE_BLK0,  48,   3, [] Set these bits to disable JTAG in the soft way (odd number 1 means disable ). JTAG can be enabled in HMAC module
-DIS_PAD_JTAG,                                    EFUSE_BLK0,  51,   1, [] Set this bit to disable JTAG in the hard way. JTAG is disabled permanently
-DIS_DOWNLOAD_MANUAL_ENCRYPT,                     EFUSE_BLK0,  52,   1, [] Set this bit to disable flash encryption when in download boot modes
-USB_EXCHG_PINS,                                  EFUSE_BLK0,  57,   1, [] Set this bit to exchange USB D+ and D- pins
-VDD_SPI_AS_GPIO,                                 EFUSE_BLK0,  58,   1, [] Set this bit to vdd spi pin function as gpio
-WDT_DELAY_SEL,                                   EFUSE_BLK0,  80,   2, [] RTC watchdog timeout threshold; in unit of slow clock cycle {0: "40000"; 1: "80000"; 2: "160000"; 3: "320000"}
-SPI_BOOT_CRYPT_CNT,                              EFUSE_BLK0,  82,   3, [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
-SECURE_BOOT_KEY_REVOKE0,                         EFUSE_BLK0,  85,   1, [] Revoke 1st secure boot key
-SECURE_BOOT_KEY_REVOKE1,                         EFUSE_BLK0,  86,   1, [] Revoke 2nd secure boot key
-SECURE_BOOT_KEY_REVOKE2,                         EFUSE_BLK0,  87,   1, [] Revoke 3rd secure boot key
-KEY_PURPOSE_0,                                   EFUSE_BLK0,  88,   4, [KEY0_PURPOSE] Purpose of Key0
-KEY_PURPOSE_1,                                   EFUSE_BLK0,  92,   4, [KEY1_PURPOSE] Purpose of Key1
-KEY_PURPOSE_2,                                   EFUSE_BLK0,  96,   4, [KEY2_PURPOSE] Purpose of Key2
-KEY_PURPOSE_3,                                   EFUSE_BLK0, 100,   4, [KEY3_PURPOSE] Purpose of Key3
-KEY_PURPOSE_4,                                   EFUSE_BLK0, 104,   4, [KEY4_PURPOSE] Purpose of Key4
-KEY_PURPOSE_5,                                   EFUSE_BLK0, 108,   4, [KEY5_PURPOSE] Purpose of Key5
-SECURE_BOOT_EN,                                  EFUSE_BLK0, 116,   1, [] Set this bit to enable secure boot
-SECURE_BOOT_AGGRESSIVE_REVOKE,                   EFUSE_BLK0, 117,   1, [] Set this bit to enable revoking aggressive secure boot
-FLASH_TPUW,                                      EFUSE_BLK0, 124,   4, [] Configures flash waiting time after power-up; in unit of ms. If the value is less than 15; the waiting time is the configurable value; Otherwise; the waiting time is twice the configurable value
-DIS_DOWNLOAD_MODE,                               EFUSE_BLK0, 128,   1, [] Set this bit to disable download mode (boot_mode[3:0] = 0; 1; 2; 3; 6; 7)
-DIS_DIRECT_BOOT,                                 EFUSE_BLK0, 129,   1, [DIS_LEGACY_SPI_BOOT] Disable direct boot mode
-DIS_USB_SERIAL_JTAG_ROM_PRINT,                   EFUSE_BLK0, 130,   1, [UART_PRINT_CHANNEL] USB printing {0: "Enable"; 1: "Disable"}
-DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,               EFUSE_BLK0, 132,   1, [DIS_USB_DOWNLOAD_MODE] Disable UART download mode through USB-Serial-JTAG
-ENABLE_SECURITY_DOWNLOAD,                        EFUSE_BLK0, 133,   1, [] Set this bit to enable secure UART download mode
-UART_PRINT_CONTROL,                              EFUSE_BLK0, 134,   2, [] Set the default UARTboot message output mode {0: "Enable"; 1: "Enable when GPIO8 is low at reset"; 2: "Enable when GPIO8 is high at reset"; 3: "Disable"}
-FORCE_SEND_RESUME,                               EFUSE_BLK0, 141,   1, [] Set this bit to force ROM code to send a resume command during SPI boot
-SECURE_VERSION,                                  EFUSE_BLK0, 142,  16, [] Secure version (used by ESP-IDF anti-rollback feature)
-ERR_RST_ENABLE,                                  EFUSE_BLK0, 159,   1, [] Use BLOCK0 to check error record registers {0: "without check"; 1: "with check"}
-DISABLE_WAFER_VERSION_MAJOR,                     EFUSE_BLK0, 160,   1, [] Disables check of wafer version major
-DISABLE_BLK_VERSION_MAJOR,                       EFUSE_BLK0, 161,   1, [] Disables check of blk version major
-MAC_FACTORY,                                     EFUSE_BLK1,   0,  48, [MAC_FACTORY] MAC address
-SPI_PAD_CONFIG_CLK,                              EFUSE_BLK1,  48,   6, [] SPI PAD CLK
-SPI_PAD_CONFIG_Q,                                EFUSE_BLK1,  54,   6, [] SPI PAD Q(D1)
-SPI_PAD_CONFIG_D,                                EFUSE_BLK1,  60,   6, [] SPI PAD D(D0)
-SPI_PAD_CONFIG_CS,                               EFUSE_BLK1,  66,   6, [] SPI PAD CS
-SPI_PAD_CONFIG_HD,                               EFUSE_BLK1,  72,   6, [] SPI PAD HD(D3)
-SPI_PAD_CONFIG_WP,                               EFUSE_BLK1,  78,   6, [] SPI PAD WP(D2)
-SPI_PAD_CONFIG_DQS,                              EFUSE_BLK1,  84,   6, [] SPI PAD DQS
-SPI_PAD_CONFIG_D4,                               EFUSE_BLK1,  90,   6, [] SPI PAD D4
-SPI_PAD_CONFIG_D5,                               EFUSE_BLK1,  96,   6, [] SPI PAD D5
-SPI_PAD_CONFIG_D6,                               EFUSE_BLK1, 102,   6, [] SPI PAD D6
-SPI_PAD_CONFIG_D7,                               EFUSE_BLK1, 108,   6, [] SPI PAD D7
-WAFER_VERSION_MINOR_LO,                          EFUSE_BLK1, 114,   3, [] WAFER_VERSION_MINOR least significant bits
-PKG_VERSION,                                     EFUSE_BLK1, 117,   3, [] Package version
-BLK_VERSION_MINOR,                               EFUSE_BLK1, 120,   3, [] BLK_VERSION_MINOR
-K_RTC_LDO,                                       EFUSE_BLK1, 135,   7, [] BLOCK1 K_RTC_LDO
-K_DIG_LDO,                                       EFUSE_BLK1, 142,   7, [] BLOCK1 K_DIG_LDO
-V_RTC_DBIAS20,                                   EFUSE_BLK1, 149,   8, [] BLOCK1 voltage of rtc dbias20
-V_DIG_DBIAS20,                                   EFUSE_BLK1, 157,   8, [] BLOCK1 voltage of digital dbias20
-DIG_DBIAS_HVT,                                   EFUSE_BLK1, 165,   5, [] BLOCK1 digital dbias when hvt
-THRES_HVT,                                       EFUSE_BLK1, 170,  10, [] BLOCK1 pvt threshold when hvt
-WAFER_VERSION_MINOR_HI,                          EFUSE_BLK1, 183,   1, [] WAFER_VERSION_MINOR most significant bit
-WAFER_VERSION_MAJOR,                             EFUSE_BLK1, 184,   2, [] WAFER_VERSION_MAJOR
-OPTIONAL_UNIQUE_ID,                              EFUSE_BLK2,   0, 128, [] Optional unique 128-bit ID
-BLK_VERSION_MAJOR,                               EFUSE_BLK2, 128,   2, [] BLK_VERSION_MAJOR of BLOCK2 {0: "No calibration"; 1: "With calibration"}
-TEMP_CALIB,                                      EFUSE_BLK2, 131,   9, [] Temperature calibration data
-OCODE,                                           EFUSE_BLK2, 140,   8, [] ADC OCode
-ADC1_INIT_CODE_ATTEN0,                           EFUSE_BLK2, 148,  10, [] ADC1 init code at atten0
-ADC1_INIT_CODE_ATTEN1,                           EFUSE_BLK2, 158,  10, [] ADC1 init code at atten1
-ADC1_INIT_CODE_ATTEN2,                           EFUSE_BLK2, 168,  10, [] ADC1 init code at atten2
-ADC1_INIT_CODE_ATTEN3,                           EFUSE_BLK2, 178,  10, [] ADC1 init code at atten3
-ADC1_CAL_VOL_ATTEN0,                             EFUSE_BLK2, 188,  10, [] ADC1 calibration voltage at atten0
-ADC1_CAL_VOL_ATTEN1,                             EFUSE_BLK2, 198,  10, [] ADC1 calibration voltage at atten1
-ADC1_CAL_VOL_ATTEN2,                             EFUSE_BLK2, 208,  10, [] ADC1 calibration voltage at atten2
-ADC1_CAL_VOL_ATTEN3,                             EFUSE_BLK2, 218,  10, [] ADC1 calibration voltage at atten3
-USER_DATA,                                       EFUSE_BLK3,   0, 256, [BLOCK_USR_DATA] User data
-USER_DATA.MAC_CUSTOM,                            EFUSE_BLK3, 200,  48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC address
-KEY0,                                            EFUSE_BLK4,   0, 256, [BLOCK_KEY0] Key0 or user data
-KEY1,                                            EFUSE_BLK5,   0, 256, [BLOCK_KEY1] Key1 or user data
-KEY2,                                            EFUSE_BLK6,   0, 256, [BLOCK_KEY2] Key2 or user data
-KEY3,                                            EFUSE_BLK7,   0, 256, [BLOCK_KEY3] Key3 or user data
-KEY4,                                            EFUSE_BLK8,   0, 256, [BLOCK_KEY4] Key4 or user data
-KEY5,                                            EFUSE_BLK9,   0, 256, [BLOCK_KEY5] Key5 or user data
-SYS_DATA_PART2,                                  EFUSE_BLK10,   0, 256, [BLOCK_SYS_DATA2] System data part 2 (reserved)

esp-hal/devices/esp32c6/efuse.csv

@@ -1,181 +0,0 @@
-
-# field_name,       |    efuse_block, | bit_start, | bit_count, |comment #
-#                   |    (EFUSE_BLK0  | (0..255)   | (1-256)    |        #
-#                   |     EFUSE_BLK1  |            |            |        #
-#                   |        ...)     |            |            |        #
-##########################################################################
-# !!!!!!!!!!! #
-# After editing this file, run the command manually "idf.py efuse-common-table"
-# this will generate new source files, next rebuild all the sources.
-# !!!!!!!!!!! #
-
-# This file was generated by regtools.py based on the efuses.yaml file with the version: 709e8ea096e8a03a10006d40d5451a49
-
-WR_DIS,                                          EFUSE_BLK0,   0,  32, [] Disable programming of individual eFuses
-WR_DIS.RD_DIS,                                   EFUSE_BLK0,   0,   1, [] wr_dis of RD_DIS
-WR_DIS.CRYPT_DPA_ENABLE,                         EFUSE_BLK0,   1,   1, [] wr_dis of CRYPT_DPA_ENABLE
-WR_DIS.SWAP_UART_SDIO_EN,                        EFUSE_BLK0,   2,   1, [] wr_dis of SWAP_UART_SDIO_EN
-WR_DIS.DIS_ICACHE,                               EFUSE_BLK0,   2,   1, [] wr_dis of DIS_ICACHE
-WR_DIS.DIS_USB_JTAG,                             EFUSE_BLK0,   2,   1, [] wr_dis of DIS_USB_JTAG
-WR_DIS.DIS_DOWNLOAD_ICACHE,                      EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DOWNLOAD_ICACHE
-WR_DIS.DIS_USB_SERIAL_JTAG,                      EFUSE_BLK0,   2,   1, [] wr_dis of DIS_USB_SERIAL_JTAG
-WR_DIS.DIS_FORCE_DOWNLOAD,                       EFUSE_BLK0,   2,   1, [] wr_dis of DIS_FORCE_DOWNLOAD
-WR_DIS.DIS_TWAI,                                 EFUSE_BLK0,   2,   1, [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI
-WR_DIS.JTAG_SEL_ENABLE,                          EFUSE_BLK0,   2,   1, [] wr_dis of JTAG_SEL_ENABLE
-WR_DIS.DIS_PAD_JTAG,                             EFUSE_BLK0,   2,   1, [] wr_dis of DIS_PAD_JTAG
-WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT,              EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
-WR_DIS.WDT_DELAY_SEL,                            EFUSE_BLK0,   3,   1, [] wr_dis of WDT_DELAY_SEL
-WR_DIS.SPI_BOOT_CRYPT_CNT,                       EFUSE_BLK0,   4,   1, [] wr_dis of SPI_BOOT_CRYPT_CNT
-WR_DIS.SECURE_BOOT_KEY_REVOKE0,                  EFUSE_BLK0,   5,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE0
-WR_DIS.SECURE_BOOT_KEY_REVOKE1,                  EFUSE_BLK0,   6,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE1
-WR_DIS.SECURE_BOOT_KEY_REVOKE2,                  EFUSE_BLK0,   7,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE2
-WR_DIS.KEY_PURPOSE_0,                            EFUSE_BLK0,   8,   1, [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0
-WR_DIS.KEY_PURPOSE_1,                            EFUSE_BLK0,   9,   1, [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1
-WR_DIS.KEY_PURPOSE_2,                            EFUSE_BLK0,  10,   1, [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2
-WR_DIS.KEY_PURPOSE_3,                            EFUSE_BLK0,  11,   1, [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3
-WR_DIS.KEY_PURPOSE_4,                            EFUSE_BLK0,  12,   1, [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4
-WR_DIS.KEY_PURPOSE_5,                            EFUSE_BLK0,  13,   1, [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5
-WR_DIS.SEC_DPA_LEVEL,                            EFUSE_BLK0,  14,   1, [WR_DIS.DPA_SEC_LEVEL] wr_dis of SEC_DPA_LEVEL
-WR_DIS.SECURE_BOOT_EN,                           EFUSE_BLK0,  15,   1, [] wr_dis of SECURE_BOOT_EN
-WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE,            EFUSE_BLK0,  16,   1, [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
-WR_DIS.SPI_DOWNLOAD_MSPI_DIS,                    EFUSE_BLK0,  17,   1, [] wr_dis of SPI_DOWNLOAD_MSPI_DIS
-WR_DIS.FLASH_TPUW,                               EFUSE_BLK0,  18,   1, [] wr_dis of FLASH_TPUW
-WR_DIS.DIS_DOWNLOAD_MODE,                        EFUSE_BLK0,  18,   1, [] wr_dis of DIS_DOWNLOAD_MODE
-WR_DIS.DIS_DIRECT_BOOT,                          EFUSE_BLK0,  18,   1, [] wr_dis of DIS_DIRECT_BOOT
-WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT,            EFUSE_BLK0,  18,   1, [WR_DIS.DIS_USB_PRINT] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT
-WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,        EFUSE_BLK0,  18,   1, [] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE
-WR_DIS.ENABLE_SECURITY_DOWNLOAD,                 EFUSE_BLK0,  18,   1, [] wr_dis of ENABLE_SECURITY_DOWNLOAD
-WR_DIS.UART_PRINT_CONTROL,                       EFUSE_BLK0,  18,   1, [] wr_dis of UART_PRINT_CONTROL
-WR_DIS.FORCE_SEND_RESUME,                        EFUSE_BLK0,  18,   1, [] wr_dis of FORCE_SEND_RESUME
-WR_DIS.SECURE_VERSION,                           EFUSE_BLK0,  18,   1, [] wr_dis of SECURE_VERSION
-WR_DIS.SECURE_BOOT_DISABLE_FAST_WAKE,            EFUSE_BLK0,  19,   1, [] wr_dis of SECURE_BOOT_DISABLE_FAST_WAKE
-WR_DIS.DISABLE_WAFER_VERSION_MAJOR,              EFUSE_BLK0,  19,   1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
-WR_DIS.DISABLE_BLK_VERSION_MAJOR,                EFUSE_BLK0,  19,   1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR
-WR_DIS.BLK1,                                     EFUSE_BLK0,  20,   1, [] wr_dis of BLOCK1
-WR_DIS.MAC,                                      EFUSE_BLK0,  20,   1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
-WR_DIS.MAC_EXT,                                  EFUSE_BLK0,  20,   1, [] wr_dis of MAC_EXT
-WR_DIS.WAFER_VERSION_MINOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MINOR
-WR_DIS.WAFER_VERSION_MAJOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MAJOR
-WR_DIS.PKG_VERSION,                              EFUSE_BLK0,  20,   1, [] wr_dis of PKG_VERSION
-WR_DIS.BLK_VERSION_MINOR,                        EFUSE_BLK0,  20,   1, [] wr_dis of BLK_VERSION_MINOR
-WR_DIS.BLK_VERSION_MAJOR,                        EFUSE_BLK0,  20,   1, [] wr_dis of BLK_VERSION_MAJOR
-WR_DIS.FLASH_CAP,                                EFUSE_BLK0,  20,   1, [] wr_dis of FLASH_CAP
-WR_DIS.FLASH_TEMP,                               EFUSE_BLK0,  20,   1, [] wr_dis of FLASH_TEMP
-WR_DIS.FLASH_VENDOR,                             EFUSE_BLK0,  20,   1, [] wr_dis of FLASH_VENDOR
-WR_DIS.SYS_DATA_PART1,                           EFUSE_BLK0,  21,   1, [] wr_dis of BLOCK2
-WR_DIS.OPTIONAL_UNIQUE_ID,                       EFUSE_BLK0,  21,   1, [] wr_dis of OPTIONAL_UNIQUE_ID
-WR_DIS.TEMP_CALIB,                               EFUSE_BLK0,  21,   1, [] wr_dis of TEMP_CALIB
-WR_DIS.OCODE,                                    EFUSE_BLK0,  21,   1, [] wr_dis of OCODE
-WR_DIS.ADC1_INIT_CODE_ATTEN0,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN0
-WR_DIS.ADC1_INIT_CODE_ATTEN1,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN1
-WR_DIS.ADC1_INIT_CODE_ATTEN2,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN2
-WR_DIS.ADC1_INIT_CODE_ATTEN3,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN3
-WR_DIS.ADC1_CAL_VOL_ATTEN0,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN0
-WR_DIS.ADC1_CAL_VOL_ATTEN1,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN1
-WR_DIS.ADC1_CAL_VOL_ATTEN2,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN2
-WR_DIS.ADC1_CAL_VOL_ATTEN3,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN3
-WR_DIS.ADC1_INIT_CODE_ATTEN0_CH0,                EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH0
-WR_DIS.ADC1_INIT_CODE_ATTEN0_CH1,                EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH1
-WR_DIS.ADC1_INIT_CODE_ATTEN0_CH2,                EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH2
-WR_DIS.ADC1_INIT_CODE_ATTEN0_CH3,                EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH3
-WR_DIS.ADC1_INIT_CODE_ATTEN0_CH4,                EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH4
-WR_DIS.ADC1_INIT_CODE_ATTEN0_CH5,                EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH5
-WR_DIS.ADC1_INIT_CODE_ATTEN0_CH6,                EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH6
-WR_DIS.BLOCK_USR_DATA,                           EFUSE_BLK0,  22,   1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
-WR_DIS.CUSTOM_MAC,                               EFUSE_BLK0,  22,   1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
-WR_DIS.BLOCK_KEY0,                               EFUSE_BLK0,  23,   1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
-WR_DIS.BLOCK_KEY1,                               EFUSE_BLK0,  24,   1, [WR_DIS.KEY1] wr_dis of BLOCK_KEY1
-WR_DIS.BLOCK_KEY2,                               EFUSE_BLK0,  25,   1, [WR_DIS.KEY2] wr_dis of BLOCK_KEY2
-WR_DIS.BLOCK_KEY3,                               EFUSE_BLK0,  26,   1, [WR_DIS.KEY3] wr_dis of BLOCK_KEY3
-WR_DIS.BLOCK_KEY4,                               EFUSE_BLK0,  27,   1, [WR_DIS.KEY4] wr_dis of BLOCK_KEY4
-WR_DIS.BLOCK_KEY5,                               EFUSE_BLK0,  28,   1, [WR_DIS.KEY5] wr_dis of BLOCK_KEY5
-WR_DIS.BLOCK_SYS_DATA2,                          EFUSE_BLK0,  29,   1, [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
-WR_DIS.USB_EXCHG_PINS,                           EFUSE_BLK0,  30,   1, [] wr_dis of USB_EXCHG_PINS
-WR_DIS.VDD_SPI_AS_GPIO,                          EFUSE_BLK0,  30,   1, [] wr_dis of VDD_SPI_AS_GPIO
-WR_DIS.SOFT_DIS_JTAG,                            EFUSE_BLK0,  31,   1, [] wr_dis of SOFT_DIS_JTAG
-RD_DIS,                                          EFUSE_BLK0,  32,   7, [] Disable reading from BlOCK4-10
-RD_DIS.BLOCK_KEY0,                               EFUSE_BLK0,  32,   1, [RD_DIS.KEY0] rd_dis of BLOCK_KEY0
-RD_DIS.BLOCK_KEY1,                               EFUSE_BLK0,  33,   1, [RD_DIS.KEY1] rd_dis of BLOCK_KEY1
-RD_DIS.BLOCK_KEY2,                               EFUSE_BLK0,  34,   1, [RD_DIS.KEY2] rd_dis of BLOCK_KEY2
-RD_DIS.BLOCK_KEY3,                               EFUSE_BLK0,  35,   1, [RD_DIS.KEY3] rd_dis of BLOCK_KEY3
-RD_DIS.BLOCK_KEY4,                               EFUSE_BLK0,  36,   1, [RD_DIS.KEY4] rd_dis of BLOCK_KEY4
-RD_DIS.BLOCK_KEY5,                               EFUSE_BLK0,  37,   1, [RD_DIS.KEY5] rd_dis of BLOCK_KEY5
-RD_DIS.BLOCK_SYS_DATA2,                          EFUSE_BLK0,  38,   1, [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2
-SWAP_UART_SDIO_EN,                               EFUSE_BLK0,  39,   1, [] Represents whether pad of uart and sdio is swapped or not. 1: swapped. 0: not swapped
-DIS_ICACHE,                                      EFUSE_BLK0,  40,   1, [] Represents whether icache is disabled or enabled. 1: disabled. 0: enabled
-DIS_USB_JTAG,                                    EFUSE_BLK0,  41,   1, [] Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled. 0: enabled
-DIS_DOWNLOAD_ICACHE,                             EFUSE_BLK0,  42,   1, [] Represents whether icache is disabled or enabled in Download mode. 1: disabled. 0: enabled
-DIS_USB_SERIAL_JTAG,                             EFUSE_BLK0,  43,   1, [] Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled
-DIS_FORCE_DOWNLOAD,                              EFUSE_BLK0,  44,   1, [] Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled. 0: enabled
-SPI_DOWNLOAD_MSPI_DIS,                           EFUSE_BLK0,  45,   1, [] Represents whether SPI0 controller during boot_mode_download is disabled or enabled. 1: disabled. 0: enabled
-DIS_TWAI,                                        EFUSE_BLK0,  46,   1, [DIS_CAN] Represents whether TWAI function is disabled or enabled. 1: disabled. 0: enabled
-JTAG_SEL_ENABLE,                                 EFUSE_BLK0,  47,   1, [] Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled. 0: disabled
-SOFT_DIS_JTAG,                                   EFUSE_BLK0,  48,   3, [] Represents whether JTAG is disabled in soft way. Odd number: disabled. Even number: enabled
-DIS_PAD_JTAG,                                    EFUSE_BLK0,  51,   1, [] Represents whether JTAG is disabled in the hard way(permanently). 1: disabled. 0: enabled
-DIS_DOWNLOAD_MANUAL_ENCRYPT,                     EFUSE_BLK0,  52,   1, [] Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled. 0: enabled
-USB_EXCHG_PINS,                                  EFUSE_BLK0,  57,   1, [] Represents whether the D+ and D- pins is exchanged. 1: exchanged. 0: not exchanged
-VDD_SPI_AS_GPIO,                                 EFUSE_BLK0,  58,   1, [] Represents whether vdd spi pin is functioned as gpio. 1: functioned. 0: not functioned
-WDT_DELAY_SEL,                                   EFUSE_BLK0,  80,   2, [] Represents whether RTC watchdog timeout threshold is selected at startup. 1: selected. 0: not selected
-SPI_BOOT_CRYPT_CNT,                              EFUSE_BLK0,  82,   3, [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
-SECURE_BOOT_KEY_REVOKE0,                         EFUSE_BLK0,  85,   1, [] Revoke 1st secure boot key
-SECURE_BOOT_KEY_REVOKE1,                         EFUSE_BLK0,  86,   1, [] Revoke 2nd secure boot key
-SECURE_BOOT_KEY_REVOKE2,                         EFUSE_BLK0,  87,   1, [] Revoke 3rd secure boot key
-KEY_PURPOSE_0,                                   EFUSE_BLK0,  88,   4, [KEY0_PURPOSE] Represents the purpose of Key0
-KEY_PURPOSE_1,                                   EFUSE_BLK0,  92,   4, [KEY1_PURPOSE] Represents the purpose of Key1
-KEY_PURPOSE_2,                                   EFUSE_BLK0,  96,   4, [KEY2_PURPOSE] Represents the purpose of Key2
-KEY_PURPOSE_3,                                   EFUSE_BLK0, 100,   4, [KEY3_PURPOSE] Represents the purpose of Key3
-KEY_PURPOSE_4,                                   EFUSE_BLK0, 104,   4, [KEY4_PURPOSE] Represents the purpose of Key4
-KEY_PURPOSE_5,                                   EFUSE_BLK0, 108,   4, [KEY5_PURPOSE] Represents the purpose of Key5
-SEC_DPA_LEVEL,                                   EFUSE_BLK0, 112,   2, [DPA_SEC_LEVEL] Represents the spa secure level by configuring the clock random divide mode
-CRYPT_DPA_ENABLE,                                EFUSE_BLK0, 114,   1, [] Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled
-SECURE_BOOT_EN,                                  EFUSE_BLK0, 116,   1, [] Represents whether secure boot is enabled or disabled. 1: enabled. 0: disabled
-SECURE_BOOT_AGGRESSIVE_REVOKE,                   EFUSE_BLK0, 117,   1, [] Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled
-FLASH_TPUW,                                      EFUSE_BLK0, 124,   4, [] Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value
-DIS_DOWNLOAD_MODE,                               EFUSE_BLK0, 128,   1, [] Represents whether Download mode is disabled or enabled. 1: disabled. 0: enabled
-DIS_DIRECT_BOOT,                                 EFUSE_BLK0, 129,   1, [] Represents whether direct boot mode is disabled or enabled. 1: disabled. 0: enabled
-DIS_USB_SERIAL_JTAG_ROM_PRINT,                   EFUSE_BLK0, 130,   1, [DIS_USB_PRINT] Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled
-DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,               EFUSE_BLK0, 132,   1, [] Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: disabled. 0: enabled
-ENABLE_SECURITY_DOWNLOAD,                        EFUSE_BLK0, 133,   1, [] Represents whether security download is enabled or disabled. 1: enabled. 0: disabled
-UART_PRINT_CONTROL,                              EFUSE_BLK0, 134,   2, [] Set the default UARTboot message output mode {0: "Enable"; 1: "Enable when GPIO8 is low at reset"; 2: "Enable when GPIO8 is high at reset"; 3: "Disable"}
-FORCE_SEND_RESUME,                               EFUSE_BLK0, 141,   1, [] Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced. 0:not forced
-SECURE_VERSION,                                  EFUSE_BLK0, 142,  16, [] Represents the version used by ESP-IDF anti-rollback feature
-SECURE_BOOT_DISABLE_FAST_WAKE,                   EFUSE_BLK0, 158,   1, [] Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled. 1: disabled. 0: enabled
-DISABLE_WAFER_VERSION_MAJOR,                     EFUSE_BLK0, 160,   1, [] Disables check of wafer version major
-DISABLE_BLK_VERSION_MAJOR,                       EFUSE_BLK0, 161,   1, [] Disables check of blk version major
-MAC_FACTORY,                                     EFUSE_BLK1,   0,  48, [MAC_FACTORY] MAC address
-MAC_EXT,                                         EFUSE_BLK1,  48,  16, [] Stores the extended bits of MAC address
-WAFER_VERSION_MINOR,                             EFUSE_BLK1, 114,   4, []
-WAFER_VERSION_MAJOR,                             EFUSE_BLK1, 118,   2, []
-PKG_VERSION,                                     EFUSE_BLK1, 120,   3, [] Package version
-BLK_VERSION_MINOR,                               EFUSE_BLK1, 123,   3, [] BLK_VERSION_MINOR of BLOCK2
-BLK_VERSION_MAJOR,                               EFUSE_BLK1, 126,   2, [] BLK_VERSION_MAJOR of BLOCK2
-FLASH_CAP,                                       EFUSE_BLK1, 128,   3, []
-FLASH_TEMP,                                      EFUSE_BLK1, 131,   2, []
-FLASH_VENDOR,                                    EFUSE_BLK1, 133,   3, []
-OPTIONAL_UNIQUE_ID,                              EFUSE_BLK2,   0, 128, [] Optional unique 128-bit ID
-TEMP_CALIB,                                      EFUSE_BLK2, 128,   9, [] Temperature calibration data
-OCODE,                                           EFUSE_BLK2, 137,   8, [] ADC OCode
-ADC1_INIT_CODE_ATTEN0,                           EFUSE_BLK2, 145,  10, [] ADC1 init code at atten0
-ADC1_INIT_CODE_ATTEN1,                           EFUSE_BLK2, 155,  10, [] ADC1 init code at atten1
-ADC1_INIT_CODE_ATTEN2,                           EFUSE_BLK2, 165,  10, [] ADC1 init code at atten2
-ADC1_INIT_CODE_ATTEN3,                           EFUSE_BLK2, 175,  10, [] ADC1 init code at atten3
-ADC1_CAL_VOL_ATTEN0,                             EFUSE_BLK2, 185,  10, [] ADC1 calibration voltage at atten0
-ADC1_CAL_VOL_ATTEN1,                             EFUSE_BLK2, 195,  10, [] ADC1 calibration voltage at atten1
-ADC1_CAL_VOL_ATTEN2,                             EFUSE_BLK2, 205,  10, [] ADC1 calibration voltage at atten2
-ADC1_CAL_VOL_ATTEN3,                             EFUSE_BLK2, 215,  10, [] ADC1 calibration voltage at atten3
-ADC1_INIT_CODE_ATTEN0_CH0,                       EFUSE_BLK2, 225,   4, [] ADC1 init code at atten0 ch0
-ADC1_INIT_CODE_ATTEN0_CH1,                       EFUSE_BLK2, 229,   4, [] ADC1 init code at atten0 ch1
-ADC1_INIT_CODE_ATTEN0_CH2,                       EFUSE_BLK2, 233,   4, [] ADC1 init code at atten0 ch2
-ADC1_INIT_CODE_ATTEN0_CH3,                       EFUSE_BLK2, 237,   4, [] ADC1 init code at atten0 ch3
-ADC1_INIT_CODE_ATTEN0_CH4,                       EFUSE_BLK2, 241,   4, [] ADC1 init code at atten0 ch4
-ADC1_INIT_CODE_ATTEN0_CH5,                       EFUSE_BLK2, 245,   4, [] ADC1 init code at atten0 ch5
-ADC1_INIT_CODE_ATTEN0_CH6,                       EFUSE_BLK2, 249,   4, [] ADC1 init code at atten0 ch6
-USER_DATA,                                       EFUSE_BLK3,   0, 256, [BLOCK_USR_DATA] User data
-USER_DATA.MAC_CUSTOM,                            EFUSE_BLK3, 200,  48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC
-KEY0,                                            EFUSE_BLK4,   0, 256, [BLOCK_KEY0] Key0 or user data
-KEY1,                                            EFUSE_BLK5,   0, 256, [BLOCK_KEY1] Key1 or user data
-KEY2,                                            EFUSE_BLK6,   0, 256, [BLOCK_KEY2] Key2 or user data
-KEY3,                                            EFUSE_BLK7,   0, 256, [BLOCK_KEY3] Key3 or user data
-KEY4,                                            EFUSE_BLK8,   0, 256, [BLOCK_KEY4] Key4 or user data
-KEY5,                                            EFUSE_BLK9,   0, 256, [BLOCK_KEY5] Key5 or user data
-SYS_DATA_PART2,                                  EFUSE_BLK10,   0, 256, [BLOCK_SYS_DATA2] System data part 2 (reserved)

esp-hal/devices/esp32h2/efuse.csv

@@ -1,155 +0,0 @@
-
-# field_name,       |    efuse_block, | bit_start, | bit_count, |comment #
-#                   |    (EFUSE_BLK0  | (0..255)   | (1-256)    |        #
-#                   |     EFUSE_BLK1  |            |            |        #
-#                   |        ...)     |            |            |        #
-##########################################################################
-# !!!!!!!!!!! #
-# After editing this file, run the command manually "idf.py efuse-common-table"
-# this will generate new source files, next rebuild all the sources.
-# !!!!!!!!!!! #
-
-# This file was generated by regtools.py based on the efuses.yaml file with the version: 4df10f83de85f2d830b7c466aabb28e7
-
-WR_DIS,                                          EFUSE_BLK0,   0,  32, [] Disable programming of individual eFuses
-WR_DIS.RD_DIS,                                   EFUSE_BLK0,   0,   1, [] wr_dis of RD_DIS
-WR_DIS.DIS_ICACHE,                               EFUSE_BLK0,   2,   1, [] wr_dis of DIS_ICACHE
-WR_DIS.DIS_USB_JTAG,                             EFUSE_BLK0,   2,   1, [] wr_dis of DIS_USB_JTAG
-WR_DIS.POWERGLITCH_EN,                           EFUSE_BLK0,   2,   1, [] wr_dis of POWERGLITCH_EN
-WR_DIS.DIS_FORCE_DOWNLOAD,                       EFUSE_BLK0,   2,   1, [] wr_dis of DIS_FORCE_DOWNLOAD
-WR_DIS.SPI_DOWNLOAD_MSPI_DIS,                    EFUSE_BLK0,   2,   1, [] wr_dis of SPI_DOWNLOAD_MSPI_DIS
-WR_DIS.DIS_TWAI,                                 EFUSE_BLK0,   2,   1, [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI
-WR_DIS.JTAG_SEL_ENABLE,                          EFUSE_BLK0,   2,   1, [] wr_dis of JTAG_SEL_ENABLE
-WR_DIS.DIS_PAD_JTAG,                             EFUSE_BLK0,   2,   1, [] wr_dis of DIS_PAD_JTAG
-WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT,              EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
-WR_DIS.WDT_DELAY_SEL,                            EFUSE_BLK0,   3,   1, [] wr_dis of WDT_DELAY_SEL
-WR_DIS.SPI_BOOT_CRYPT_CNT,                       EFUSE_BLK0,   4,   1, [] wr_dis of SPI_BOOT_CRYPT_CNT
-WR_DIS.SECURE_BOOT_KEY_REVOKE0,                  EFUSE_BLK0,   5,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE0
-WR_DIS.SECURE_BOOT_KEY_REVOKE1,                  EFUSE_BLK0,   6,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE1
-WR_DIS.SECURE_BOOT_KEY_REVOKE2,                  EFUSE_BLK0,   7,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE2
-WR_DIS.KEY_PURPOSE_0,                            EFUSE_BLK0,   8,   1, [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0
-WR_DIS.KEY_PURPOSE_1,                            EFUSE_BLK0,   9,   1, [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1
-WR_DIS.KEY_PURPOSE_2,                            EFUSE_BLK0,  10,   1, [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2
-WR_DIS.KEY_PURPOSE_3,                            EFUSE_BLK0,  11,   1, [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3
-WR_DIS.KEY_PURPOSE_4,                            EFUSE_BLK0,  12,   1, [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4
-WR_DIS.KEY_PURPOSE_5,                            EFUSE_BLK0,  13,   1, [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5
-WR_DIS.SEC_DPA_LEVEL,                            EFUSE_BLK0,  14,   1, [] wr_dis of SEC_DPA_LEVEL
-WR_DIS.CRYPT_DPA_ENABLE,                         EFUSE_BLK0,  14,   1, [] wr_dis of CRYPT_DPA_ENABLE
-WR_DIS.SECURE_BOOT_EN,                           EFUSE_BLK0,  15,   1, [] wr_dis of SECURE_BOOT_EN
-WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE,            EFUSE_BLK0,  16,   1, [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
-WR_DIS.ECDSA_FORCE_USE_HARDWARE_K,               EFUSE_BLK0,  17,   1, [] wr_dis of ECDSA_FORCE_USE_HARDWARE_K
-WR_DIS.FLASH_TPUW,                               EFUSE_BLK0,  18,   1, [] wr_dis of FLASH_TPUW
-WR_DIS.DIS_DOWNLOAD_MODE,                        EFUSE_BLK0,  18,   1, [] wr_dis of DIS_DOWNLOAD_MODE
-WR_DIS.DIS_DIRECT_BOOT,                          EFUSE_BLK0,  18,   1, [] wr_dis of DIS_DIRECT_BOOT
-WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT,            EFUSE_BLK0,  18,   1, [WR_DIS.DIS_USB_PRINT] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT
-WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,        EFUSE_BLK0,  18,   1, [] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE
-WR_DIS.ENABLE_SECURITY_DOWNLOAD,                 EFUSE_BLK0,  18,   1, [] wr_dis of ENABLE_SECURITY_DOWNLOAD
-WR_DIS.UART_PRINT_CONTROL,                       EFUSE_BLK0,  18,   1, [] wr_dis of UART_PRINT_CONTROL
-WR_DIS.FORCE_SEND_RESUME,                        EFUSE_BLK0,  18,   1, [] wr_dis of FORCE_SEND_RESUME
-WR_DIS.SECURE_VERSION,                           EFUSE_BLK0,  18,   1, [] wr_dis of SECURE_VERSION
-WR_DIS.SECURE_BOOT_DISABLE_FAST_WAKE,            EFUSE_BLK0,  18,   1, [] wr_dis of SECURE_BOOT_DISABLE_FAST_WAKE
-WR_DIS.HYS_EN_PAD0,                              EFUSE_BLK0,  19,   1, [] wr_dis of HYS_EN_PAD0
-WR_DIS.HYS_EN_PAD1,                              EFUSE_BLK0,  19,   1, [] wr_dis of HYS_EN_PAD1
-WR_DIS.BLK1,                                     EFUSE_BLK0,  20,   1, [] wr_dis of BLOCK1
-WR_DIS.MAC,                                      EFUSE_BLK0,  20,   1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
-WR_DIS.MAC_EXT,                                  EFUSE_BLK0,  20,   1, [] wr_dis of MAC_EXT
-WR_DIS.RXIQ_VERSION,                             EFUSE_BLK0,  20,   1, [] wr_dis of RXIQ_VERSION
-WR_DIS.RXIQ_0,                                   EFUSE_BLK0,  20,   1, [] wr_dis of RXIQ_0
-WR_DIS.RXIQ_1,                                   EFUSE_BLK0,  20,   1, [] wr_dis of RXIQ_1
-WR_DIS.WAFER_VERSION_MINOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MINOR
-WR_DIS.WAFER_VERSION_MAJOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MAJOR
-WR_DIS.DISABLE_WAFER_VERSION_MAJOR,              EFUSE_BLK0,  20,   1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
-WR_DIS.FLASH_CAP,                                EFUSE_BLK0,  20,   1, [] wr_dis of FLASH_CAP
-WR_DIS.FLASH_TEMP,                               EFUSE_BLK0,  20,   1, [] wr_dis of FLASH_TEMP
-WR_DIS.FLASH_VENDOR,                             EFUSE_BLK0,  20,   1, [] wr_dis of FLASH_VENDOR
-WR_DIS.PKG_VERSION,                              EFUSE_BLK0,  20,   1, [] wr_dis of PKG_VERSION
-WR_DIS.SYS_DATA_PART1,                           EFUSE_BLK0,  21,   1, [] wr_dis of BLOCK2
-WR_DIS.OPTIONAL_UNIQUE_ID,                       EFUSE_BLK0,  21,   1, [] wr_dis of OPTIONAL_UNIQUE_ID
-WR_DIS.BLK_VERSION_MINOR,                        EFUSE_BLK0,  21,   1, [] wr_dis of BLK_VERSION_MINOR
-WR_DIS.BLK_VERSION_MAJOR,                        EFUSE_BLK0,  21,   1, [] wr_dis of BLK_VERSION_MAJOR
-WR_DIS.DISABLE_BLK_VERSION_MAJOR,                EFUSE_BLK0,  21,   1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR
-WR_DIS.BLOCK_USR_DATA,                           EFUSE_BLK0,  22,   1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
-WR_DIS.CUSTOM_MAC,                               EFUSE_BLK0,  22,   1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
-WR_DIS.BLOCK_KEY0,                               EFUSE_BLK0,  23,   1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
-WR_DIS.BLOCK_KEY1,                               EFUSE_BLK0,  24,   1, [WR_DIS.KEY1] wr_dis of BLOCK_KEY1
-WR_DIS.BLOCK_KEY2,                               EFUSE_BLK0,  25,   1, [WR_DIS.KEY2] wr_dis of BLOCK_KEY2
-WR_DIS.BLOCK_KEY3,                               EFUSE_BLK0,  26,   1, [WR_DIS.KEY3] wr_dis of BLOCK_KEY3
-WR_DIS.BLOCK_KEY4,                               EFUSE_BLK0,  27,   1, [WR_DIS.KEY4] wr_dis of BLOCK_KEY4
-WR_DIS.BLOCK_KEY5,                               EFUSE_BLK0,  28,   1, [WR_DIS.KEY5] wr_dis of BLOCK_KEY5
-WR_DIS.BLOCK_SYS_DATA2,                          EFUSE_BLK0,  29,   1, [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
-WR_DIS.USB_EXCHG_PINS,                           EFUSE_BLK0,  30,   1, [] wr_dis of USB_EXCHG_PINS
-WR_DIS.VDD_SPI_AS_GPIO,                          EFUSE_BLK0,  30,   1, [] wr_dis of VDD_SPI_AS_GPIO
-WR_DIS.SOFT_DIS_JTAG,                            EFUSE_BLK0,  31,   1, [] wr_dis of SOFT_DIS_JTAG
-RD_DIS,                                          EFUSE_BLK0,  32,   7, [] Disable reading from BlOCK4-10
-RD_DIS.BLOCK_KEY0,                               EFUSE_BLK0,  32,   1, [RD_DIS.KEY0] rd_dis of BLOCK_KEY0
-RD_DIS.BLOCK_KEY1,                               EFUSE_BLK0,  33,   1, [RD_DIS.KEY1] rd_dis of BLOCK_KEY1
-RD_DIS.BLOCK_KEY2,                               EFUSE_BLK0,  34,   1, [RD_DIS.KEY2] rd_dis of BLOCK_KEY2
-RD_DIS.BLOCK_KEY3,                               EFUSE_BLK0,  35,   1, [RD_DIS.KEY3] rd_dis of BLOCK_KEY3
-RD_DIS.BLOCK_KEY4,                               EFUSE_BLK0,  36,   1, [RD_DIS.KEY4] rd_dis of BLOCK_KEY4
-RD_DIS.BLOCK_KEY5,                               EFUSE_BLK0,  37,   1, [RD_DIS.KEY5] rd_dis of BLOCK_KEY5
-RD_DIS.BLOCK_SYS_DATA2,                          EFUSE_BLK0,  38,   1, [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2
-DIS_ICACHE,                                      EFUSE_BLK0,  40,   1, [] Represents whether icache is disabled or enabled. 1: disabled. 0: enabled
-DIS_USB_JTAG,                                    EFUSE_BLK0,  41,   1, [] Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled. 0: enabled
-POWERGLITCH_EN,                                  EFUSE_BLK0,  42,   1, [] Represents whether power glitch function is enabled. 1: enabled. 0: disabled
-DIS_FORCE_DOWNLOAD,                              EFUSE_BLK0,  44,   1, [] Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled. 0: enabled
-SPI_DOWNLOAD_MSPI_DIS,                           EFUSE_BLK0,  45,   1, [] Represents whether SPI0 controller during boot_mode_download is disabled or enabled. 1: disabled. 0: enabled
-DIS_TWAI,                                        EFUSE_BLK0,  46,   1, [DIS_CAN] Represents whether TWAI function is disabled or enabled. 1: disabled. 0: enabled
-JTAG_SEL_ENABLE,                                 EFUSE_BLK0,  47,   1, [] Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio25 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0
-SOFT_DIS_JTAG,                                   EFUSE_BLK0,  48,   3, [] Represents whether JTAG is disabled in soft way. Odd number: disabled. Even number: enabled
-DIS_PAD_JTAG,                                    EFUSE_BLK0,  51,   1, [] Represents whether JTAG is disabled in the hard way(permanently). 1: disabled. 0: enabled
-DIS_DOWNLOAD_MANUAL_ENCRYPT,                     EFUSE_BLK0,  52,   1, [] Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled. 0: enabled
-USB_EXCHG_PINS,                                  EFUSE_BLK0,  57,   1, [] Represents whether the D+ and D- pins is exchanged. 1: exchanged. 0: not exchanged
-VDD_SPI_AS_GPIO,                                 EFUSE_BLK0,  58,   1, [] Represents whether vdd spi pin is functioned as gpio. 1: functioned. 0: not functioned
-WDT_DELAY_SEL,                                   EFUSE_BLK0,  80,   2, [] Represents whether RTC watchdog timeout threshold is selected at startup. 1: selected. 0: not selected
-SPI_BOOT_CRYPT_CNT,                              EFUSE_BLK0,  82,   3, [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
-SECURE_BOOT_KEY_REVOKE0,                         EFUSE_BLK0,  85,   1, [] Revoke 1st secure boot key
-SECURE_BOOT_KEY_REVOKE1,                         EFUSE_BLK0,  86,   1, [] Revoke 2nd secure boot key
-SECURE_BOOT_KEY_REVOKE2,                         EFUSE_BLK0,  87,   1, [] Revoke 3rd secure boot key
-KEY_PURPOSE_0,                                   EFUSE_BLK0,  88,   4, [KEY0_PURPOSE] Represents the purpose of Key0
-KEY_PURPOSE_1,                                   EFUSE_BLK0,  92,   4, [KEY1_PURPOSE] Represents the purpose of Key1
-KEY_PURPOSE_2,                                   EFUSE_BLK0,  96,   4, [KEY2_PURPOSE] Represents the purpose of Key2
-KEY_PURPOSE_3,                                   EFUSE_BLK0, 100,   4, [KEY3_PURPOSE] Represents the purpose of Key3
-KEY_PURPOSE_4,                                   EFUSE_BLK0, 104,   4, [KEY4_PURPOSE] Represents the purpose of Key4
-KEY_PURPOSE_5,                                   EFUSE_BLK0, 108,   4, [KEY5_PURPOSE] Represents the purpose of Key5
-SEC_DPA_LEVEL,                                   EFUSE_BLK0, 112,   2, [] Represents the spa secure level by configuring the clock random divide mode
-ECDSA_FORCE_USE_HARDWARE_K,                      EFUSE_BLK0, 114,   1, [] Represents whether hardware random number k is forced used in ESDCA. 1: force used. 0: not force used
-CRYPT_DPA_ENABLE,                                EFUSE_BLK0, 115,   1, [] Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled
-SECURE_BOOT_EN,                                  EFUSE_BLK0, 116,   1, [] Represents whether secure boot is enabled or disabled. 1: enabled. 0: disabled
-SECURE_BOOT_AGGRESSIVE_REVOKE,                   EFUSE_BLK0, 117,   1, [] Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled
-FLASH_TPUW,                                      EFUSE_BLK0, 124,   4, [] Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value
-DIS_DOWNLOAD_MODE,                               EFUSE_BLK0, 128,   1, [] Represents whether Download mode is disabled or enabled. 1: disabled. 0: enabled
-DIS_DIRECT_BOOT,                                 EFUSE_BLK0, 129,   1, [] Represents whether direct boot mode is disabled or enabled. 1: disabled. 0: enabled
-DIS_USB_SERIAL_JTAG_ROM_PRINT,                   EFUSE_BLK0, 130,   1, [DIS_USB_PRINT] Set this bit to disable USB-Serial-JTAG print during rom boot
-DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,               EFUSE_BLK0, 132,   1, [] Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: disabled. 0: enabled
-ENABLE_SECURITY_DOWNLOAD,                        EFUSE_BLK0, 133,   1, [] Represents whether security download is enabled or disabled. 1: enabled. 0: disabled
-UART_PRINT_CONTROL,                              EFUSE_BLK0, 134,   2, [] Set the default UARTboot message output mode {0: "Enable"; 1: "Enable when GPIO8 is low at reset"; 2: "Enable when GPIO8 is high at reset"; 3: "Disable"}
-FORCE_SEND_RESUME,                               EFUSE_BLK0, 136,   1, [] Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced. 0:not forced
-SECURE_VERSION,                                  EFUSE_BLK0, 137,  16, [] Represents the version used by ESP-IDF anti-rollback feature
-SECURE_BOOT_DISABLE_FAST_WAKE,                   EFUSE_BLK0, 153,   1, [] Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled. 1: disabled. 0: enabled
-HYS_EN_PAD0,                                     EFUSE_BLK0, 154,   6, [] Set bits to enable hysteresis function of PAD0~5
-HYS_EN_PAD1,                                     EFUSE_BLK0, 160,  22, [] Set bits to enable hysteresis function of PAD6~27
-MAC_FACTORY,                                     EFUSE_BLK1,   0,  48, [MAC_FACTORY] MAC address
-MAC_EXT,                                         EFUSE_BLK1,  48,  16, [] Stores the extended bits of MAC address
-RXIQ_VERSION,                                    EFUSE_BLK1,  64,   3, [] RF Calibration data. RXIQ version
-RXIQ_0,                                          EFUSE_BLK1,  67,   7, [] RF Calibration data. RXIQ data 0
-RXIQ_1,                                          EFUSE_BLK1,  74,   7, [] RF Calibration data. RXIQ data 1
-WAFER_VERSION_MINOR,                             EFUSE_BLK1, 114,   3, []
-WAFER_VERSION_MAJOR,                             EFUSE_BLK1, 117,   2, []
-DISABLE_WAFER_VERSION_MAJOR,                     EFUSE_BLK1, 119,   1, [] Disables check of wafer version major
-FLASH_CAP,                                       EFUSE_BLK1, 120,   3, []
-FLASH_TEMP,                                      EFUSE_BLK1, 123,   2, []
-FLASH_VENDOR,                                    EFUSE_BLK1, 125,   3, []
-PKG_VERSION,                                     EFUSE_BLK1, 128,   3, [] Package version
-OPTIONAL_UNIQUE_ID,                              EFUSE_BLK2,   0, 128, [] Optional unique 128-bit ID
-BLK_VERSION_MINOR,                               EFUSE_BLK2, 130,   3, [] BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1
-BLK_VERSION_MAJOR,                               EFUSE_BLK2, 133,   2, [] BLK_VERSION_MAJOR of BLOCK2
-DISABLE_BLK_VERSION_MAJOR,                       EFUSE_BLK2, 135,   1, [] Disables check of blk version major
-USER_DATA,                                       EFUSE_BLK3,   0, 256, [BLOCK_USR_DATA] User data
-USER_DATA.MAC_CUSTOM,                            EFUSE_BLK3, 200,  48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC
-KEY0,                                            EFUSE_BLK4,   0, 256, [BLOCK_KEY0] Key0 or user data
-KEY1,                                            EFUSE_BLK5,   0, 256, [BLOCK_KEY1] Key1 or user data
-KEY2,                                            EFUSE_BLK6,   0, 256, [BLOCK_KEY2] Key2 or user data
-KEY3,                                            EFUSE_BLK7,   0, 256, [BLOCK_KEY3] Key3 or user data
-KEY4,                                            EFUSE_BLK8,   0, 256, [BLOCK_KEY4] Key4 or user data
-KEY5,                                            EFUSE_BLK9,   0, 256, [BLOCK_KEY5] Key5 or user data
-SYS_DATA_PART2,                                  EFUSE_BLK10,   0, 256, [BLOCK_SYS_DATA2] System data part 2 (reserved)

esp-hal/devices/esp32p4/efuse.csv

@@ -1,119 +0,0 @@
-
-# field_name,       |    efuse_block, | bit_start, | bit_count, |comment #
-#                   |    (EFUSE_BLK0  | (0..255)   | (1-256)    |        #
-#                   |     EFUSE_BLK1  |            |            |        #
-#                   |        ...)     |            |            |        #
-##########################################################################
-# !!!!!!!!!!! #
-# After editing this file, run the command manually "idf.py efuse-common-table"
-# this will generate new source files, next rebuild all the sources.
-# !!!!!!!!!!! #
-
-# This file was generated by regtools.py based on the efuses.yaml file with the version: 552d7a824581925566213ca4f4d488dc
-
-WR_DIS,                                          EFUSE_BLK0,   0,  32, [] Disable programming of individual eFuses
-WR_DIS.RD_DIS,                                   EFUSE_BLK0,   0,   1, [] wr_dis of RD_DIS
-WR_DIS.SPI_BOOT_CRYPT_CNT,                       EFUSE_BLK0,   4,   1, [] wr_dis of SPI_BOOT_CRYPT_CNT
-WR_DIS.SECURE_BOOT_KEY_REVOKE0,                  EFUSE_BLK0,   5,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE0
-WR_DIS.SECURE_BOOT_KEY_REVOKE1,                  EFUSE_BLK0,   6,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE1
-WR_DIS.SECURE_BOOT_KEY_REVOKE2,                  EFUSE_BLK0,   7,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE2
-WR_DIS.KEY_PURPOSE_0,                            EFUSE_BLK0,   8,   1, [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0
-WR_DIS.KEY_PURPOSE_1,                            EFUSE_BLK0,   9,   1, [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1
-WR_DIS.KEY_PURPOSE_2,                            EFUSE_BLK0,  10,   1, [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2
-WR_DIS.KEY_PURPOSE_3,                            EFUSE_BLK0,  11,   1, [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3
-WR_DIS.KEY_PURPOSE_4,                            EFUSE_BLK0,  12,   1, [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4
-WR_DIS.KEY_PURPOSE_5,                            EFUSE_BLK0,  13,   1, [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5
-WR_DIS.SECURE_BOOT_EN,                           EFUSE_BLK0,  15,   1, [] wr_dis of SECURE_BOOT_EN
-WR_DIS.BLK1,                                     EFUSE_BLK0,  20,   1, [] wr_dis of BLOCK1
-WR_DIS.MAC,                                      EFUSE_BLK0,  20,   1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
-WR_DIS.MAC_EXT,                                  EFUSE_BLK0,  20,   1, [] wr_dis of MAC_EXT
-WR_DIS.BLOCK_SYS_DATA1,                          EFUSE_BLK0,  21,   1, [WR_DIS.SYS_DATA_PART1] wr_dis of BLOCK_SYS_DATA1
-WR_DIS.BLOCK_USR_DATA,                           EFUSE_BLK0,  22,   1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
-WR_DIS.BLOCK_KEY0,                               EFUSE_BLK0,  23,   1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
-WR_DIS.BLOCK_KEY1,                               EFUSE_BLK0,  24,   1, [WR_DIS.KEY1] wr_dis of BLOCK_KEY1
-WR_DIS.BLOCK_KEY2,                               EFUSE_BLK0,  25,   1, [WR_DIS.KEY2] wr_dis of BLOCK_KEY2
-WR_DIS.BLOCK_KEY3,                               EFUSE_BLK0,  26,   1, [WR_DIS.KEY3] wr_dis of BLOCK_KEY3
-WR_DIS.BLOCK_KEY4,                               EFUSE_BLK0,  27,   1, [WR_DIS.KEY4] wr_dis of BLOCK_KEY4
-WR_DIS.BLOCK_KEY5,                               EFUSE_BLK0,  28,   1, [WR_DIS.KEY5] wr_dis of BLOCK_KEY5
-WR_DIS.BLOCK_SYS_DATA2,                          EFUSE_BLK0,  29,   1, [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
-RD_DIS,                                          EFUSE_BLK0,  32,   7, [] Disable reading from BlOCK4-10
-RD_DIS.BLOCK_KEY0,                               EFUSE_BLK0,  32,   1, [RD_DIS.KEY0] rd_dis of BLOCK_KEY0
-RD_DIS.BLOCK_KEY1,                               EFUSE_BLK0,  33,   1, [RD_DIS.KEY1] rd_dis of BLOCK_KEY1
-RD_DIS.BLOCK_KEY2,                               EFUSE_BLK0,  34,   1, [RD_DIS.KEY2] rd_dis of BLOCK_KEY2
-RD_DIS.BLOCK_KEY3,                               EFUSE_BLK0,  35,   1, [RD_DIS.KEY3] rd_dis of BLOCK_KEY3
-RD_DIS.BLOCK_KEY4,                               EFUSE_BLK0,  36,   1, [RD_DIS.KEY4] rd_dis of BLOCK_KEY4
-RD_DIS.BLOCK_KEY5,                               EFUSE_BLK0,  37,   1, [RD_DIS.KEY5] rd_dis of BLOCK_KEY5
-RD_DIS.BLOCK_SYS_DATA2,                          EFUSE_BLK0,  38,   1, [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2
-USB_DEVICE_EXCHG_PINS,                           EFUSE_BLK0,  39,   1, [] Enable usb device exchange pins of D+ and D-
-USB_OTG11_EXCHG_PINS,                            EFUSE_BLK0,  40,   1, [] Enable usb otg11 exchange pins of D+ and D-
-DIS_USB_JTAG,                                    EFUSE_BLK0,  41,   1, [] Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled. 0: enabled
-POWERGLITCH_EN,                                  EFUSE_BLK0,  42,   1, [] Represents whether power glitch function is enabled. 1: enabled. 0: disabled
-DIS_FORCE_DOWNLOAD,                              EFUSE_BLK0,  44,   1, [] Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled. 0: enabled
-SPI_DOWNLOAD_MSPI_DIS,                           EFUSE_BLK0,  45,   1, [] Set this bit to disable accessing MSPI flash/MSPI ram by SYS AXI matrix during boot_mode_download
-DIS_TWAI,                                        EFUSE_BLK0,  46,   1, [] Represents whether TWAI function is disabled or enabled. 1: disabled. 0: enabled
-JTAG_SEL_ENABLE,                                 EFUSE_BLK0,  47,   1, [] Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled. 0: disabled
-SOFT_DIS_JTAG,                                   EFUSE_BLK0,  48,   3, [] Represents whether JTAG is disabled in soft way. Odd number: disabled. Even number: enabled
-DIS_PAD_JTAG,                                    EFUSE_BLK0,  51,   1, [] Represents whether JTAG is disabled in the hard way(permanently). 1: disabled. 0: enabled
-DIS_DOWNLOAD_MANUAL_ENCRYPT,                     EFUSE_BLK0,  52,   1, [] Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled. 0: enabled
-USB_PHY_SEL,                                     EFUSE_BLK0,  57,   1, [] TBD
-KM_HUK_GEN_STATE_LOW,                            EFUSE_BLK0,  58,   6, [] Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid
-KM_HUK_GEN_STATE_HIGH,                           EFUSE_BLK0,  64,   3, [] Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid
-KM_RND_SWITCH_CYCLE,                             EFUSE_BLK0,  67,   2, [] Set bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles
-KM_DEPLOY_ONLY_ONCE,                             EFUSE_BLK0,  69,   4, [] Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds
-FORCE_USE_KEY_MANAGER_KEY,                       EFUSE_BLK0,  73,   4, [] Set each bit to control whether corresponding key must come from key manager.. 1 is true; 0 is false. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds
-FORCE_DISABLE_SW_INIT_KEY,                       EFUSE_BLK0,  77,   1, [] Set this bit to disable software written init key; and force use efuse_init_key
-XTS_KEY_LENGTH_256,                              EFUSE_BLK0,  78,   1, [] Set this bit to configure flash encryption use xts-128 key; else use xts-256 key
-WDT_DELAY_SEL,                                   EFUSE_BLK0,  80,   2, [] Represents whether RTC watchdog timeout threshold is selected at startup. 1: selected. 0: not selected
-SPI_BOOT_CRYPT_CNT,                              EFUSE_BLK0,  82,   3, [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
-SECURE_BOOT_KEY_REVOKE0,                         EFUSE_BLK0,  85,   1, [] Revoke 1st secure boot key
-SECURE_BOOT_KEY_REVOKE1,                         EFUSE_BLK0,  86,   1, [] Revoke 2nd secure boot key
-SECURE_BOOT_KEY_REVOKE2,                         EFUSE_BLK0,  87,   1, [] Revoke 3rd secure boot key
-KEY_PURPOSE_0,                                   EFUSE_BLK0,  88,   4, [KEY0_PURPOSE] Represents the purpose of Key0
-KEY_PURPOSE_1,                                   EFUSE_BLK0,  92,   4, [KEY1_PURPOSE] Represents the purpose of Key1
-KEY_PURPOSE_2,                                   EFUSE_BLK0,  96,   4, [KEY2_PURPOSE] Represents the purpose of Key2
-KEY_PURPOSE_3,                                   EFUSE_BLK0, 100,   4, [KEY3_PURPOSE] Represents the purpose of Key3
-KEY_PURPOSE_4,                                   EFUSE_BLK0, 104,   4, [KEY4_PURPOSE] Represents the purpose of Key4
-KEY_PURPOSE_5,                                   EFUSE_BLK0, 108,   4, [KEY5_PURPOSE] Represents the purpose of Key5
-SEC_DPA_LEVEL,                                   EFUSE_BLK0, 112,   2, [] Represents the spa secure level by configuring the clock random divide mode
-ECDSA_ENABLE_SOFT_K,                             EFUSE_BLK0, 114,   1, [] Represents whether hardware random number k is forced used in ESDCA. 1: force used. 0: not force used
-CRYPT_DPA_ENABLE,                                EFUSE_BLK0, 115,   1, [] Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled
-SECURE_BOOT_EN,                                  EFUSE_BLK0, 116,   1, [] Represents whether secure boot is enabled or disabled. 1: enabled. 0: disabled
-SECURE_BOOT_AGGRESSIVE_REVOKE,                   EFUSE_BLK0, 117,   1, [] Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled
-FLASH_TYPE,                                      EFUSE_BLK0, 119,   1, [] The type of interfaced flash. 0: four data lines; 1: eight data lines
-FLASH_PAGE_SIZE,                                 EFUSE_BLK0, 120,   2, [] Set flash page size
-FLASH_ECC_EN,                                    EFUSE_BLK0, 122,   1, [] Set this bit to enable ecc for flash boot
-DIS_USB_OTG_DOWNLOAD_MODE,                       EFUSE_BLK0, 123,   1, [] Set this bit to disable download via USB-OTG
-FLASH_TPUW,                                      EFUSE_BLK0, 124,   4, [] Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value
-DIS_DOWNLOAD_MODE,                               EFUSE_BLK0, 128,   1, [] Represents whether Download mode is disabled or enabled. 1: disabled. 0: enabled
-DIS_DIRECT_BOOT,                                 EFUSE_BLK0, 129,   1, [] Represents whether direct boot mode is disabled or enabled. 1: disabled. 0: enabled
-DIS_USB_SERIAL_JTAG_ROM_PRINT,                   EFUSE_BLK0, 130,   1, [] Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled
-LOCK_KM_KEY,                                     EFUSE_BLK0, 131,   1, [] TBD
-DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,               EFUSE_BLK0, 132,   1, [] Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: disabled. 0: enabled
-ENABLE_SECURITY_DOWNLOAD,                        EFUSE_BLK0, 133,   1, [] Represents whether security download is enabled or disabled. 1: enabled. 0: disabled
-UART_PRINT_CONTROL,                              EFUSE_BLK0, 134,   2, [] Represents the type of UART printing. 00: force enable printing. 01: enable printing when GPIO8 is reset at low level. 10: enable printing when GPIO8 is reset at high level. 11: force disable printing
-FORCE_SEND_RESUME,                               EFUSE_BLK0, 136,   1, [] Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced. 0:not forced
-SECURE_VERSION,                                  EFUSE_BLK0, 137,  16, [] Represents the version used by ESP-IDF anti-rollback feature
-SECURE_BOOT_DISABLE_FAST_WAKE,                   EFUSE_BLK0, 153,   1, [] Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled. 1: disabled. 0: enabled
-HYS_EN_PAD,                                      EFUSE_BLK0, 154,   1, [] Represents whether the hysteresis function of corresponding PAD is enabled. 1: enabled. 0:disabled
-DCDC_VSET,                                       EFUSE_BLK0, 155,   5, [] Set the dcdc voltage default
-PXA0_TIEH_SEL_0,                                 EFUSE_BLK0, 160,   2, [] TBD
-PXA0_TIEH_SEL_1,                                 EFUSE_BLK0, 162,   2, [] TBD
-PXA0_TIEH_SEL_2,                                 EFUSE_BLK0, 164,   2, [] TBD
-PXA0_TIEH_SEL_3,                                 EFUSE_BLK0, 166,   2, [] TBD
-KM_DISABLE_DEPLOY_MODE,                          EFUSE_BLK0, 168,   4, [] TBD
-HP_PWR_SRC_SEL,                                  EFUSE_BLK0, 178,   1, [] HP system power source select. 0:LDO. 1: DCDC
-DCDC_VSET_EN,                                    EFUSE_BLK0, 179,   1, [] Select dcdc vset use efuse_dcdc_vset
-DIS_WDT,                                         EFUSE_BLK0, 180,   1, [] Set this bit to disable watch dog
-DIS_SWD,                                         EFUSE_BLK0, 181,   1, [] Set this bit to disable super-watchdog
-MAC,                                             EFUSE_BLK1,   0,  48, [MAC_FACTORY] MAC address
-MAC_EXT,                                         EFUSE_BLK1,  48,  16, [] Stores the extended bits of MAC address [0]
-BLOCK_SYS_DATA1,                                 EFUSE_BLK2,   0, 256, [SYS_DATA_PART1] System data part 1
-USER_DATA,                                       EFUSE_BLK3,   0, 256, [BLOCK_USR_DATA] User data
-USER_DATA.MAC_CUSTOM,                            EFUSE_BLK3, 200,  48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC (TODO, not defined yet)
-KEY0,                                            EFUSE_BLK4,   0, 256, [BLOCK_KEY0] Key0 or user data
-KEY1,                                            EFUSE_BLK5,   0, 256, [BLOCK_KEY1] Key1 or user data
-KEY2,                                            EFUSE_BLK6,   0, 256, [BLOCK_KEY2] Key2 or user data
-KEY3,                                            EFUSE_BLK7,   0, 256, [BLOCK_KEY3] Key3 or user data
-KEY4,                                            EFUSE_BLK8,   0, 256, [BLOCK_KEY4] Key4 or user data
-KEY5,                                            EFUSE_BLK9,   0, 256, [BLOCK_KEY5] Key5 or user data
-SYS_DATA_PART2,                                  EFUSE_BLK10,   0, 256, [BLOCK_SYS_DATA2] System data part 2 (reserved)

esp-hal/devices/esp32s2/efuse.csv

@@ -1,207 +0,0 @@
-
-# field_name,       |    efuse_block, | bit_start, | bit_count, |comment #
-#                   |    (EFUSE_BLK0  | (0..255)   | (1-256)    |        #
-#                   |     EFUSE_BLK1  |            |            |        #
-#                   |        ...)     |            |            |        #
-##########################################################################
-# !!!!!!!!!!! #
-# After editing this file, run the command manually "idf.py efuse-common-table"
-# this will generate new source files, next rebuild all the sources.
-# !!!!!!!!!!! #
-
-# This file was generated by regtools.py based on the efuses.yaml file with the version: 888a61f6f500d9c7ee0aa32016b0bee7
-
-WR_DIS,                                          EFUSE_BLK0,   0,  32, [] Disable programming of individual eFuses
-WR_DIS.RD_DIS,                                   EFUSE_BLK0,   0,   1, [] wr_dis of RD_DIS
-WR_DIS.DIS_ICACHE,                               EFUSE_BLK0,   2,   1, [] wr_dis of DIS_ICACHE
-WR_DIS.DIS_DCACHE,                               EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DCACHE
-WR_DIS.DIS_DOWNLOAD_ICACHE,                      EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DOWNLOAD_ICACHE
-WR_DIS.DIS_DOWNLOAD_DCACHE,                      EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DOWNLOAD_DCACHE
-WR_DIS.DIS_FORCE_DOWNLOAD,                       EFUSE_BLK0,   2,   1, [] wr_dis of DIS_FORCE_DOWNLOAD
-WR_DIS.DIS_USB,                                  EFUSE_BLK0,   2,   1, [] wr_dis of DIS_USB
-WR_DIS.DIS_TWAI,                                 EFUSE_BLK0,   2,   1, [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI
-WR_DIS.DIS_BOOT_REMAP,                           EFUSE_BLK0,   2,   1, [] wr_dis of DIS_BOOT_REMAP
-WR_DIS.SOFT_DIS_JTAG,                            EFUSE_BLK0,   2,   1, [] wr_dis of SOFT_DIS_JTAG
-WR_DIS.HARD_DIS_JTAG,                            EFUSE_BLK0,   2,   1, [] wr_dis of HARD_DIS_JTAG
-WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT,              EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
-WR_DIS.VDD_SPI_XPD,                              EFUSE_BLK0,   3,   1, [] wr_dis of VDD_SPI_XPD
-WR_DIS.VDD_SPI_TIEH,                             EFUSE_BLK0,   3,   1, [] wr_dis of VDD_SPI_TIEH
-WR_DIS.VDD_SPI_FORCE,                            EFUSE_BLK0,   3,   1, [] wr_dis of VDD_SPI_FORCE
-WR_DIS.WDT_DELAY_SEL,                            EFUSE_BLK0,   3,   1, [] wr_dis of WDT_DELAY_SEL
-WR_DIS.SPI_BOOT_CRYPT_CNT,                       EFUSE_BLK0,   4,   1, [] wr_dis of SPI_BOOT_CRYPT_CNT
-WR_DIS.SECURE_BOOT_KEY_REVOKE0,                  EFUSE_BLK0,   5,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE0
-WR_DIS.SECURE_BOOT_KEY_REVOKE1,                  EFUSE_BLK0,   6,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE1
-WR_DIS.SECURE_BOOT_KEY_REVOKE2,                  EFUSE_BLK0,   7,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE2
-WR_DIS.KEY_PURPOSE_0,                            EFUSE_BLK0,   8,   1, [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0
-WR_DIS.KEY_PURPOSE_1,                            EFUSE_BLK0,   9,   1, [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1
-WR_DIS.KEY_PURPOSE_2,                            EFUSE_BLK0,  10,   1, [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2
-WR_DIS.KEY_PURPOSE_3,                            EFUSE_BLK0,  11,   1, [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3
-WR_DIS.KEY_PURPOSE_4,                            EFUSE_BLK0,  12,   1, [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4
-WR_DIS.KEY_PURPOSE_5,                            EFUSE_BLK0,  13,   1, [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5
-WR_DIS.SECURE_BOOT_EN,                           EFUSE_BLK0,  15,   1, [] wr_dis of SECURE_BOOT_EN
-WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE,            EFUSE_BLK0,  16,   1, [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
-WR_DIS.FLASH_TPUW,                               EFUSE_BLK0,  18,   1, [] wr_dis of FLASH_TPUW
-WR_DIS.DIS_DOWNLOAD_MODE,                        EFUSE_BLK0,  18,   1, [] wr_dis of DIS_DOWNLOAD_MODE
-WR_DIS.DIS_LEGACY_SPI_BOOT,                      EFUSE_BLK0,  18,   1, [] wr_dis of DIS_LEGACY_SPI_BOOT
-WR_DIS.UART_PRINT_CHANNEL,                       EFUSE_BLK0,  18,   1, [] wr_dis of UART_PRINT_CHANNEL
-WR_DIS.DIS_USB_DOWNLOAD_MODE,                    EFUSE_BLK0,  18,   1, [] wr_dis of DIS_USB_DOWNLOAD_MODE
-WR_DIS.ENABLE_SECURITY_DOWNLOAD,                 EFUSE_BLK0,  18,   1, [] wr_dis of ENABLE_SECURITY_DOWNLOAD
-WR_DIS.UART_PRINT_CONTROL,                       EFUSE_BLK0,  18,   1, [] wr_dis of UART_PRINT_CONTROL
-WR_DIS.PIN_POWER_SELECTION,                      EFUSE_BLK0,  18,   1, [] wr_dis of PIN_POWER_SELECTION
-WR_DIS.FLASH_TYPE,                               EFUSE_BLK0,  18,   1, [] wr_dis of FLASH_TYPE
-WR_DIS.FORCE_SEND_RESUME,                        EFUSE_BLK0,  18,   1, [] wr_dis of FORCE_SEND_RESUME
-WR_DIS.SECURE_VERSION,                           EFUSE_BLK0,  18,   1, [] wr_dis of SECURE_VERSION
-WR_DIS.BLK1,                                     EFUSE_BLK0,  20,   1, [] wr_dis of BLOCK1
-WR_DIS.MAC,                                      EFUSE_BLK0,  20,   1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
-WR_DIS.SPI_PAD_CONFIG_CLK,                       EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_CLK
-WR_DIS.SPI_PAD_CONFIG_Q,                         EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_Q
-WR_DIS.SPI_PAD_CONFIG_D,                         EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D
-WR_DIS.SPI_PAD_CONFIG_CS,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_CS
-WR_DIS.SPI_PAD_CONFIG_HD,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_HD
-WR_DIS.SPI_PAD_CONFIG_WP,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_WP
-WR_DIS.SPI_PAD_CONFIG_DQS,                       EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_DQS
-WR_DIS.SPI_PAD_CONFIG_D4,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D4
-WR_DIS.SPI_PAD_CONFIG_D5,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D5
-WR_DIS.SPI_PAD_CONFIG_D6,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D6
-WR_DIS.SPI_PAD_CONFIG_D7,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D7
-WR_DIS.WAFER_VERSION_MAJOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MAJOR
-WR_DIS.WAFER_VERSION_MINOR_HI,                   EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MINOR_HI
-WR_DIS.FLASH_VERSION,                            EFUSE_BLK0,  20,   1, [] wr_dis of FLASH_VERSION
-WR_DIS.BLK_VERSION_MAJOR,                        EFUSE_BLK0,  20,   1, [] wr_dis of BLK_VERSION_MAJOR
-WR_DIS.PSRAM_VERSION,                            EFUSE_BLK0,  20,   1, [] wr_dis of PSRAM_VERSION
-WR_DIS.PKG_VERSION,                              EFUSE_BLK0,  20,   1, [] wr_dis of PKG_VERSION
-WR_DIS.WAFER_VERSION_MINOR_LO,                   EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MINOR_LO
-WR_DIS.SYS_DATA_PART1,                           EFUSE_BLK0,  21,   1, [] wr_dis of BLOCK2
-WR_DIS.OPTIONAL_UNIQUE_ID,                       EFUSE_BLK0,  21,   1, [] wr_dis of OPTIONAL_UNIQUE_ID
-WR_DIS.ADC_CALIB,                                EFUSE_BLK0,  21,   1, [] wr_dis of ADC_CALIB
-WR_DIS.BLK_VERSION_MINOR,                        EFUSE_BLK0,  21,   1, [] wr_dis of BLK_VERSION_MINOR
-WR_DIS.TEMP_CALIB,                               EFUSE_BLK0,  21,   1, [] wr_dis of TEMP_CALIB
-WR_DIS.RTCCALIB_V1IDX_A10H,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A10H
-WR_DIS.RTCCALIB_V1IDX_A11H,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A11H
-WR_DIS.RTCCALIB_V1IDX_A12H,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A12H
-WR_DIS.RTCCALIB_V1IDX_A13H,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A13H
-WR_DIS.RTCCALIB_V1IDX_A20H,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A20H
-WR_DIS.RTCCALIB_V1IDX_A21H,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A21H
-WR_DIS.RTCCALIB_V1IDX_A22H,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A22H
-WR_DIS.RTCCALIB_V1IDX_A23H,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A23H
-WR_DIS.RTCCALIB_V1IDX_A10L,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A10L
-WR_DIS.RTCCALIB_V1IDX_A11L,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A11L
-WR_DIS.RTCCALIB_V1IDX_A12L,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A12L
-WR_DIS.RTCCALIB_V1IDX_A13L,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A13L
-WR_DIS.RTCCALIB_V1IDX_A20L,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A20L
-WR_DIS.RTCCALIB_V1IDX_A21L,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A21L
-WR_DIS.RTCCALIB_V1IDX_A22L,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A22L
-WR_DIS.RTCCALIB_V1IDX_A23L,                      EFUSE_BLK0,  21,   1, [] wr_dis of RTCCALIB_V1IDX_A23L
-WR_DIS.BLOCK_USR_DATA,                           EFUSE_BLK0,  22,   1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
-WR_DIS.CUSTOM_MAC,                               EFUSE_BLK0,  22,   1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
-WR_DIS.BLOCK_KEY0,                               EFUSE_BLK0,  23,   1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
-WR_DIS.BLOCK_KEY1,                               EFUSE_BLK0,  24,   1, [WR_DIS.KEY1] wr_dis of BLOCK_KEY1
-WR_DIS.BLOCK_KEY2,                               EFUSE_BLK0,  25,   1, [WR_DIS.KEY2] wr_dis of BLOCK_KEY2
-WR_DIS.BLOCK_KEY3,                               EFUSE_BLK0,  26,   1, [WR_DIS.KEY3] wr_dis of BLOCK_KEY3
-WR_DIS.BLOCK_KEY4,                               EFUSE_BLK0,  27,   1, [WR_DIS.KEY4] wr_dis of BLOCK_KEY4
-WR_DIS.BLOCK_KEY5,                               EFUSE_BLK0,  28,   1, [WR_DIS.KEY5] wr_dis of BLOCK_KEY5
-WR_DIS.BLOCK_SYS_DATA2,                          EFUSE_BLK0,  29,   1, [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
-WR_DIS.USB_EXCHG_PINS,                           EFUSE_BLK0,  30,   1, [] wr_dis of USB_EXCHG_PINS
-WR_DIS.USB_EXT_PHY_ENABLE,                       EFUSE_BLK0,  30,   1, [WR_DIS.EXT_PHY_ENABLE] wr_dis of USB_EXT_PHY_ENABLE
-WR_DIS.USB_FORCE_NOPERSIST,                      EFUSE_BLK0,  30,   1, [] wr_dis of USB_FORCE_NOPERSIST
-WR_DIS.BLOCK0_VERSION,                           EFUSE_BLK0,  30,   1, [] wr_dis of BLOCK0_VERSION
-RD_DIS,                                          EFUSE_BLK0,  32,   7, [] Disable reading from BlOCK4-10
-RD_DIS.BLOCK_KEY0,                               EFUSE_BLK0,  32,   1, [RD_DIS.KEY0] rd_dis of BLOCK_KEY0
-RD_DIS.BLOCK_KEY1,                               EFUSE_BLK0,  33,   1, [RD_DIS.KEY1] rd_dis of BLOCK_KEY1
-RD_DIS.BLOCK_KEY2,                               EFUSE_BLK0,  34,   1, [RD_DIS.KEY2] rd_dis of BLOCK_KEY2
-RD_DIS.BLOCK_KEY3,                               EFUSE_BLK0,  35,   1, [RD_DIS.KEY3] rd_dis of BLOCK_KEY3
-RD_DIS.BLOCK_KEY4,                               EFUSE_BLK0,  36,   1, [RD_DIS.KEY4] rd_dis of BLOCK_KEY4
-RD_DIS.BLOCK_KEY5,                               EFUSE_BLK0,  37,   1, [RD_DIS.KEY5] rd_dis of BLOCK_KEY5
-RD_DIS.BLOCK_SYS_DATA2,                          EFUSE_BLK0,  38,   1, [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2
-DIS_ICACHE,                                      EFUSE_BLK0,  40,   1, [] Set this bit to disable Icache
-DIS_DCACHE,                                      EFUSE_BLK0,  41,   1, [] Set this bit to disable Dcache
-DIS_DOWNLOAD_ICACHE,                             EFUSE_BLK0,  42,   1, [] Disables Icache when SoC is in Download mode
-DIS_DOWNLOAD_DCACHE,                             EFUSE_BLK0,  43,   1, [] Disables Dcache when SoC is in Download mode
-DIS_FORCE_DOWNLOAD,                              EFUSE_BLK0,  44,   1, [] Set this bit to disable the function that forces chip into download mode
-DIS_USB,                                         EFUSE_BLK0,  45,   1, [] Set this bit to disable USB OTG function
-DIS_TWAI,                                        EFUSE_BLK0,  46,   1, [DIS_CAN] Set this bit to disable the TWAI Controller function
-DIS_BOOT_REMAP,                                  EFUSE_BLK0,  47,   1, [] Disables capability to Remap RAM to ROM address space
-SOFT_DIS_JTAG,                                   EFUSE_BLK0,  49,   1, [] Software disables JTAG. When software disabled; JTAG can be activated temporarily by HMAC peripheral
-HARD_DIS_JTAG,                                   EFUSE_BLK0,  50,   1, [] Hardware disables JTAG permanently
-DIS_DOWNLOAD_MANUAL_ENCRYPT,                     EFUSE_BLK0,  51,   1, [] Disables flash encryption when in download boot modes
-USB_EXCHG_PINS,                                  EFUSE_BLK0,  56,   1, [] Set this bit to exchange USB D+ and D- pins
-USB_EXT_PHY_ENABLE,                              EFUSE_BLK0,  57,   1, [EXT_PHY_ENABLE] Set this bit to enable external USB PHY
-USB_FORCE_NOPERSIST,                             EFUSE_BLK0,  58,   1, [] If set; forces USB BVALID to 1
-BLOCK0_VERSION,                                  EFUSE_BLK0,  59,   2, [] BLOCK0 efuse version
-VDD_SPI_XPD,                                     EFUSE_BLK0,  68,   1, [] If VDD_SPI_FORCE is 1; this value determines if the VDD_SPI regulator is powered on
-VDD_SPI_TIEH,                                    EFUSE_BLK0,  69,   1, [] If VDD_SPI_FORCE is 1; determines VDD_SPI voltage {0: "VDD_SPI connects to 1.8 V LDO"; 1: "VDD_SPI connects to VDD3P3_RTC_IO"}
-VDD_SPI_FORCE,                                   EFUSE_BLK0,  70,   1, [] Set this bit to use XPD_VDD_PSI_REG and VDD_SPI_TIEH to configure VDD_SPI LDO
-WDT_DELAY_SEL,                                   EFUSE_BLK0,  80,   2, [] RTC watchdog timeout threshold; in unit of slow clock cycle {0: "40000"; 1: "80000"; 2: "160000"; 3: "320000"}
-SPI_BOOT_CRYPT_CNT,                              EFUSE_BLK0,  82,   3, [] Enables flash encryption when 1 or 3 bits are set and disabled otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
-SECURE_BOOT_KEY_REVOKE0,                         EFUSE_BLK0,  85,   1, [] Revoke 1st secure boot key
-SECURE_BOOT_KEY_REVOKE1,                         EFUSE_BLK0,  86,   1, [] Revoke 2nd secure boot key
-SECURE_BOOT_KEY_REVOKE2,                         EFUSE_BLK0,  87,   1, [] Revoke 3rd secure boot key
-KEY_PURPOSE_0,                                   EFUSE_BLK0,  88,   4, [KEY0_PURPOSE] Purpose of KEY0
-KEY_PURPOSE_1,                                   EFUSE_BLK0,  92,   4, [KEY1_PURPOSE] Purpose of KEY1
-KEY_PURPOSE_2,                                   EFUSE_BLK0,  96,   4, [KEY2_PURPOSE] Purpose of KEY2
-KEY_PURPOSE_3,                                   EFUSE_BLK0, 100,   4, [KEY3_PURPOSE] Purpose of KEY3
-KEY_PURPOSE_4,                                   EFUSE_BLK0, 104,   4, [KEY4_PURPOSE] Purpose of KEY4
-KEY_PURPOSE_5,                                   EFUSE_BLK0, 108,   4, [KEY5_PURPOSE] Purpose of KEY5
-SECURE_BOOT_EN,                                  EFUSE_BLK0, 116,   1, [] Set this bit to enable secure boot
-SECURE_BOOT_AGGRESSIVE_REVOKE,                   EFUSE_BLK0, 117,   1, [] Set this bit to enable aggressive secure boot key revocation mode
-FLASH_TPUW,                                      EFUSE_BLK0, 124,   4, [] Configures flash startup delay after SoC power-up; in unit of (ms/2). When the value is 15; delay is 7.5 ms
-DIS_DOWNLOAD_MODE,                               EFUSE_BLK0, 128,   1, [] Set this bit to disable all download boot modes
-DIS_LEGACY_SPI_BOOT,                             EFUSE_BLK0, 129,   1, [] Set this bit to disable Legacy SPI boot mode
-UART_PRINT_CHANNEL,                              EFUSE_BLK0, 130,   1, [] Selects the default UART for printing boot messages {0: "UART0"; 1: "UART1"}
-DIS_USB_DOWNLOAD_MODE,                           EFUSE_BLK0, 132,   1, [] Set this bit to disable use of USB OTG in UART download boot mode
-ENABLE_SECURITY_DOWNLOAD,                        EFUSE_BLK0, 133,   1, [] Set this bit to enable secure UART download mode (read/write flash only)
-UART_PRINT_CONTROL,                              EFUSE_BLK0, 134,   2, [] Set the default UART boot message output mode {0: "Enable"; 1: "Enable when GPIO46 is low at reset"; 2: "Enable when GPIO46 is high at reset"; 3: "Disable"}
-PIN_POWER_SELECTION,                             EFUSE_BLK0, 136,   1, [] Set default power supply for GPIO33-GPIO37; set when SPI flash is initialized {0: "VDD3P3_CPU"; 1: "VDD_SPI"}
-FLASH_TYPE,                                      EFUSE_BLK0, 137,   1, [] SPI flash type {0: "4 data lines"; 1: "8 data lines"}
-FORCE_SEND_RESUME,                               EFUSE_BLK0, 138,   1, [] If set; forces ROM code to send an SPI flash resume command during SPI boot
-SECURE_VERSION,                                  EFUSE_BLK0, 139,  16, [] Secure version (used by ESP-IDF anti-rollback feature)
-DISABLE_WAFER_VERSION_MAJOR,                     EFUSE_BLK0, 160,   1, [] Disables check of wafer version major
-DISABLE_BLK_VERSION_MAJOR,                       EFUSE_BLK0, 161,   1, [] Disables check of blk version major
-MAC_FACTORY,                                     EFUSE_BLK1,   0,  48, [MAC_FACTORY] MAC address
-SPI_PAD_CONFIG_CLK,                              EFUSE_BLK1,  48,   6, [] SPI_PAD_configure CLK
-SPI_PAD_CONFIG_Q,                                EFUSE_BLK1,  54,   6, [] SPI_PAD_configure Q(D1)
-SPI_PAD_CONFIG_D,                                EFUSE_BLK1,  60,   6, [] SPI_PAD_configure D(D0)
-SPI_PAD_CONFIG_CS,                               EFUSE_BLK1,  66,   6, [] SPI_PAD_configure CS
-SPI_PAD_CONFIG_HD,                               EFUSE_BLK1,  72,   6, [] SPI_PAD_configure HD(D3)
-SPI_PAD_CONFIG_WP,                               EFUSE_BLK1,  78,   6, [] SPI_PAD_configure WP(D2)
-SPI_PAD_CONFIG_DQS,                              EFUSE_BLK1,  84,   6, [] SPI_PAD_configure DQS
-SPI_PAD_CONFIG_D4,                               EFUSE_BLK1,  90,   6, [] SPI_PAD_configure D4
-SPI_PAD_CONFIG_D5,                               EFUSE_BLK1,  96,   6, [] SPI_PAD_configure D5
-SPI_PAD_CONFIG_D6,                               EFUSE_BLK1, 102,   6, [] SPI_PAD_configure D6
-SPI_PAD_CONFIG_D7,                               EFUSE_BLK1, 108,   6, [] SPI_PAD_configure D7
-WAFER_VERSION_MAJOR,                             EFUSE_BLK1, 114,   2, [] WAFER_VERSION_MAJOR
-WAFER_VERSION_MINOR_HI,                          EFUSE_BLK1, 116,   1, [] WAFER_VERSION_MINOR most significant bit
-FLASH_VERSION,                                   EFUSE_BLK1, 117,   4, [] Flash version
-BLK_VERSION_MAJOR,                               EFUSE_BLK1, 121,   2, [] BLK_VERSION_MAJOR
-PSRAM_VERSION,                                   EFUSE_BLK1, 124,   4, [] PSRAM version
-PKG_VERSION,                                     EFUSE_BLK1, 128,   4, [] Package version
-WAFER_VERSION_MINOR_LO,                          EFUSE_BLK1, 132,   3, [] WAFER_VERSION_MINOR least significant bits
-OPTIONAL_UNIQUE_ID,                              EFUSE_BLK2,   0, 128, [] Optional unique 128-bit ID
-ADC_CALIB,                                       EFUSE_BLK2, 128,   4, [] 4 bit of ADC calibration
-BLK_VERSION_MINOR,                               EFUSE_BLK2, 132,   3, [] BLK_VERSION_MINOR of BLOCK2 {0: "No calib"; 1: "ADC calib V1"; 2: "ADC calib V2"}
-TEMP_CALIB,                                      EFUSE_BLK2, 135,   9, [] Temperature calibration data
-RTCCALIB_V1IDX_A10H,                             EFUSE_BLK2, 144,   8, []
-RTCCALIB_V1IDX_A11H,                             EFUSE_BLK2, 152,   8, []
-RTCCALIB_V1IDX_A12H,                             EFUSE_BLK2, 160,   8, []
-RTCCALIB_V1IDX_A13H,                             EFUSE_BLK2, 168,   8, []
-RTCCALIB_V1IDX_A20H,                             EFUSE_BLK2, 176,   8, []
-RTCCALIB_V1IDX_A21H,                             EFUSE_BLK2, 184,   8, []
-RTCCALIB_V1IDX_A22H,                             EFUSE_BLK2, 192,   8, []
-RTCCALIB_V1IDX_A23H,                             EFUSE_BLK2, 200,   8, []
-RTCCALIB_V1IDX_A10L,                             EFUSE_BLK2, 208,   6, []
-RTCCALIB_V1IDX_A11L,                             EFUSE_BLK2, 214,   6, []
-RTCCALIB_V1IDX_A12L,                             EFUSE_BLK2, 220,   6, []
-RTCCALIB_V1IDX_A13L,                             EFUSE_BLK2, 226,   6, []
-RTCCALIB_V1IDX_A20L,                             EFUSE_BLK2, 232,   6, []
-RTCCALIB_V1IDX_A21L,                             EFUSE_BLK2, 238,   6, []
-RTCCALIB_V1IDX_A22L,                             EFUSE_BLK2, 244,   6, []
-RTCCALIB_V1IDX_A23L,                             EFUSE_BLK2, 250,   6, []
-USER_DATA,                                       EFUSE_BLK3,   0, 256, [BLOCK_USR_DATA] User data
-USER_DATA.MAC_CUSTOM,                            EFUSE_BLK3, 200,  48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC
-KEY0,                                            EFUSE_BLK4,   0, 256, [BLOCK_KEY0] Key0 or user data
-KEY1,                                            EFUSE_BLK5,   0, 256, [BLOCK_KEY1] Key1 or user data
-KEY2,                                            EFUSE_BLK6,   0, 256, [BLOCK_KEY2] Key2 or user data
-KEY3,                                            EFUSE_BLK7,   0, 256, [BLOCK_KEY3] Key3 or user data
-KEY4,                                            EFUSE_BLK8,   0, 256, [BLOCK_KEY4] Key4 or user data
-KEY5,                                            EFUSE_BLK9,   0, 256, [BLOCK_KEY5] Key5 or user data
-SYS_DATA_PART2,                                  EFUSE_BLK10,   0, 256, [BLOCK_SYS_DATA2] System data part 2 (reserved)

esp-hal/devices/esp32s3/efuse.csv

@@ -1,227 +0,0 @@
-
-# field_name,       |    efuse_block, | bit_start, | bit_count, |comment #
-#                   |    (EFUSE_BLK0  | (0..255)   | (1-256)    |        #
-#                   |     EFUSE_BLK1  |            |            |        #
-#                   |        ...)     |            |            |        #
-##########################################################################
-# !!!!!!!!!!! #
-# After editing this file, run the command manually "idf.py efuse-common-table"
-# this will generate new source files, next rebuild all the sources.
-# !!!!!!!!!!! #
-
-# This file was generated by regtools.py based on the efuses.yaml file with the version: 6925129eca795b8b087d31be539740ec
-
-WR_DIS,                                          EFUSE_BLK0,   0,  32, [] Disable programming of individual eFuses
-WR_DIS.RD_DIS,                                   EFUSE_BLK0,   0,   1, [] wr_dis of RD_DIS
-WR_DIS.DIS_ICACHE,                               EFUSE_BLK0,   2,   1, [] wr_dis of DIS_ICACHE
-WR_DIS.DIS_DCACHE,                               EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DCACHE
-WR_DIS.DIS_DOWNLOAD_ICACHE,                      EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DOWNLOAD_ICACHE
-WR_DIS.DIS_DOWNLOAD_DCACHE,                      EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DOWNLOAD_DCACHE
-WR_DIS.DIS_FORCE_DOWNLOAD,                       EFUSE_BLK0,   2,   1, [] wr_dis of DIS_FORCE_DOWNLOAD
-WR_DIS.DIS_USB_OTG,                              EFUSE_BLK0,   2,   1, [WR_DIS.DIS_USB] wr_dis of DIS_USB_OTG
-WR_DIS.DIS_TWAI,                                 EFUSE_BLK0,   2,   1, [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI
-WR_DIS.DIS_APP_CPU,                              EFUSE_BLK0,   2,   1, [] wr_dis of DIS_APP_CPU
-WR_DIS.DIS_PAD_JTAG,                             EFUSE_BLK0,   2,   1, [WR_DIS.HARD_DIS_JTAG] wr_dis of DIS_PAD_JTAG
-WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT,              EFUSE_BLK0,   2,   1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
-WR_DIS.DIS_USB_JTAG,                             EFUSE_BLK0,   2,   1, [] wr_dis of DIS_USB_JTAG
-WR_DIS.DIS_USB_SERIAL_JTAG,                      EFUSE_BLK0,   2,   1, [WR_DIS.DIS_USB_DEVICE] wr_dis of DIS_USB_SERIAL_JTAG
-WR_DIS.STRAP_JTAG_SEL,                           EFUSE_BLK0,   2,   1, [] wr_dis of STRAP_JTAG_SEL
-WR_DIS.USB_PHY_SEL,                              EFUSE_BLK0,   2,   1, [] wr_dis of USB_PHY_SEL
-WR_DIS.VDD_SPI_XPD,                              EFUSE_BLK0,   3,   1, [] wr_dis of VDD_SPI_XPD
-WR_DIS.VDD_SPI_TIEH,                             EFUSE_BLK0,   3,   1, [] wr_dis of VDD_SPI_TIEH
-WR_DIS.VDD_SPI_FORCE,                            EFUSE_BLK0,   3,   1, [] wr_dis of VDD_SPI_FORCE
-WR_DIS.WDT_DELAY_SEL,                            EFUSE_BLK0,   3,   1, [] wr_dis of WDT_DELAY_SEL
-WR_DIS.SPI_BOOT_CRYPT_CNT,                       EFUSE_BLK0,   4,   1, [] wr_dis of SPI_BOOT_CRYPT_CNT
-WR_DIS.SECURE_BOOT_KEY_REVOKE0,                  EFUSE_BLK0,   5,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE0
-WR_DIS.SECURE_BOOT_KEY_REVOKE1,                  EFUSE_BLK0,   6,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE1
-WR_DIS.SECURE_BOOT_KEY_REVOKE2,                  EFUSE_BLK0,   7,   1, [] wr_dis of SECURE_BOOT_KEY_REVOKE2
-WR_DIS.KEY_PURPOSE_0,                            EFUSE_BLK0,   8,   1, [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0
-WR_DIS.KEY_PURPOSE_1,                            EFUSE_BLK0,   9,   1, [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1
-WR_DIS.KEY_PURPOSE_2,                            EFUSE_BLK0,  10,   1, [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2
-WR_DIS.KEY_PURPOSE_3,                            EFUSE_BLK0,  11,   1, [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3
-WR_DIS.KEY_PURPOSE_4,                            EFUSE_BLK0,  12,   1, [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4
-WR_DIS.KEY_PURPOSE_5,                            EFUSE_BLK0,  13,   1, [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5
-WR_DIS.SECURE_BOOT_EN,                           EFUSE_BLK0,  15,   1, [] wr_dis of SECURE_BOOT_EN
-WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE,            EFUSE_BLK0,  16,   1, [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
-WR_DIS.FLASH_TPUW,                               EFUSE_BLK0,  18,   1, [] wr_dis of FLASH_TPUW
-WR_DIS.DIS_DOWNLOAD_MODE,                        EFUSE_BLK0,  18,   1, [] wr_dis of DIS_DOWNLOAD_MODE
-WR_DIS.DIS_DIRECT_BOOT,                          EFUSE_BLK0,  18,   1, [WR_DIS.DIS_LEGACY_SPI_BOOT] wr_dis of DIS_DIRECT_BOOT
-WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT,            EFUSE_BLK0,  18,   1, [WR_DIS.UART_PRINT_CHANNEL] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT
-WR_DIS.FLASH_ECC_MODE,                           EFUSE_BLK0,  18,   1, [] wr_dis of FLASH_ECC_MODE
-WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,        EFUSE_BLK0,  18,   1, [WR_DIS.DIS_USB_DOWNLOAD_MODE] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE
-WR_DIS.ENABLE_SECURITY_DOWNLOAD,                 EFUSE_BLK0,  18,   1, [] wr_dis of ENABLE_SECURITY_DOWNLOAD
-WR_DIS.UART_PRINT_CONTROL,                       EFUSE_BLK0,  18,   1, [] wr_dis of UART_PRINT_CONTROL
-WR_DIS.PIN_POWER_SELECTION,                      EFUSE_BLK0,  18,   1, [] wr_dis of PIN_POWER_SELECTION
-WR_DIS.FLASH_TYPE,                               EFUSE_BLK0,  18,   1, [] wr_dis of FLASH_TYPE
-WR_DIS.FLASH_PAGE_SIZE,                          EFUSE_BLK0,  18,   1, [] wr_dis of FLASH_PAGE_SIZE
-WR_DIS.FLASH_ECC_EN,                             EFUSE_BLK0,  18,   1, [] wr_dis of FLASH_ECC_EN
-WR_DIS.FORCE_SEND_RESUME,                        EFUSE_BLK0,  18,   1, [] wr_dis of FORCE_SEND_RESUME
-WR_DIS.SECURE_VERSION,                           EFUSE_BLK0,  18,   1, [] wr_dis of SECURE_VERSION
-WR_DIS.DIS_USB_OTG_DOWNLOAD_MODE,                EFUSE_BLK0,  19,   1, [] wr_dis of DIS_USB_OTG_DOWNLOAD_MODE
-WR_DIS.DISABLE_WAFER_VERSION_MAJOR,              EFUSE_BLK0,  19,   1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
-WR_DIS.DISABLE_BLK_VERSION_MAJOR,                EFUSE_BLK0,  19,   1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR
-WR_DIS.BLK1,                                     EFUSE_BLK0,  20,   1, [] wr_dis of BLOCK1
-WR_DIS.MAC,                                      EFUSE_BLK0,  20,   1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
-WR_DIS.SPI_PAD_CONFIG_CLK,                       EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_CLK
-WR_DIS.SPI_PAD_CONFIG_Q,                         EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_Q
-WR_DIS.SPI_PAD_CONFIG_D,                         EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D
-WR_DIS.SPI_PAD_CONFIG_CS,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_CS
-WR_DIS.SPI_PAD_CONFIG_HD,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_HD
-WR_DIS.SPI_PAD_CONFIG_WP,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_WP
-WR_DIS.SPI_PAD_CONFIG_DQS,                       EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_DQS
-WR_DIS.SPI_PAD_CONFIG_D4,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D4
-WR_DIS.SPI_PAD_CONFIG_D5,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D5
-WR_DIS.SPI_PAD_CONFIG_D6,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D6
-WR_DIS.SPI_PAD_CONFIG_D7,                        EFUSE_BLK0,  20,   1, [] wr_dis of SPI_PAD_CONFIG_D7
-WR_DIS.WAFER_VERSION_MINOR_LO,                   EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MINOR_LO
-WR_DIS.PKG_VERSION,                              EFUSE_BLK0,  20,   1, [] wr_dis of PKG_VERSION
-WR_DIS.BLK_VERSION_MINOR,                        EFUSE_BLK0,  20,   1, [] wr_dis of BLK_VERSION_MINOR
-WR_DIS.K_RTC_LDO,                                EFUSE_BLK0,  20,   1, [] wr_dis of K_RTC_LDO
-WR_DIS.K_DIG_LDO,                                EFUSE_BLK0,  20,   1, [] wr_dis of K_DIG_LDO
-WR_DIS.V_RTC_DBIAS20,                            EFUSE_BLK0,  20,   1, [] wr_dis of V_RTC_DBIAS20
-WR_DIS.V_DIG_DBIAS20,                            EFUSE_BLK0,  20,   1, [] wr_dis of V_DIG_DBIAS20
-WR_DIS.DIG_DBIAS_HVT,                            EFUSE_BLK0,  20,   1, [] wr_dis of DIG_DBIAS_HVT
-WR_DIS.WAFER_VERSION_MINOR_HI,                   EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MINOR_HI
-WR_DIS.WAFER_VERSION_MAJOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MAJOR
-WR_DIS.ADC2_CAL_VOL_ATTEN3,                      EFUSE_BLK0,  20,   1, [] wr_dis of ADC2_CAL_VOL_ATTEN3
-WR_DIS.SYS_DATA_PART1,                           EFUSE_BLK0,  21,   1, [] wr_dis of BLOCK2
-WR_DIS.OPTIONAL_UNIQUE_ID,                       EFUSE_BLK0,  21,   1, [] wr_dis of OPTIONAL_UNIQUE_ID
-WR_DIS.BLK_VERSION_MAJOR,                        EFUSE_BLK0,  21,   1, [] wr_dis of BLK_VERSION_MAJOR
-WR_DIS.TEMP_CALIB,                               EFUSE_BLK0,  21,   1, [] wr_dis of TEMP_CALIB
-WR_DIS.OCODE,                                    EFUSE_BLK0,  21,   1, [] wr_dis of OCODE
-WR_DIS.ADC1_INIT_CODE_ATTEN0,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN0
-WR_DIS.ADC1_INIT_CODE_ATTEN1,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN1
-WR_DIS.ADC1_INIT_CODE_ATTEN2,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN2
-WR_DIS.ADC1_INIT_CODE_ATTEN3,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_INIT_CODE_ATTEN3
-WR_DIS.ADC2_INIT_CODE_ATTEN0,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC2_INIT_CODE_ATTEN0
-WR_DIS.ADC2_INIT_CODE_ATTEN1,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC2_INIT_CODE_ATTEN1
-WR_DIS.ADC2_INIT_CODE_ATTEN2,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC2_INIT_CODE_ATTEN2
-WR_DIS.ADC2_INIT_CODE_ATTEN3,                    EFUSE_BLK0,  21,   1, [] wr_dis of ADC2_INIT_CODE_ATTEN3
-WR_DIS.ADC1_CAL_VOL_ATTEN0,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN0
-WR_DIS.ADC1_CAL_VOL_ATTEN1,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN1
-WR_DIS.ADC1_CAL_VOL_ATTEN2,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN2
-WR_DIS.ADC1_CAL_VOL_ATTEN3,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC1_CAL_VOL_ATTEN3
-WR_DIS.ADC2_CAL_VOL_ATTEN0,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC2_CAL_VOL_ATTEN0
-WR_DIS.ADC2_CAL_VOL_ATTEN1,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC2_CAL_VOL_ATTEN1
-WR_DIS.ADC2_CAL_VOL_ATTEN2,                      EFUSE_BLK0,  21,   1, [] wr_dis of ADC2_CAL_VOL_ATTEN2
-WR_DIS.BLOCK_USR_DATA,                           EFUSE_BLK0,  22,   1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
-WR_DIS.CUSTOM_MAC,                               EFUSE_BLK0,  22,   1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
-WR_DIS.BLOCK_KEY0,                               EFUSE_BLK0,  23,   1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
-WR_DIS.BLOCK_KEY1,                               EFUSE_BLK0,  24,   1, [WR_DIS.KEY1] wr_dis of BLOCK_KEY1
-WR_DIS.BLOCK_KEY2,                               EFUSE_BLK0,  25,   1, [WR_DIS.KEY2] wr_dis of BLOCK_KEY2
-WR_DIS.BLOCK_KEY3,                               EFUSE_BLK0,  26,   1, [WR_DIS.KEY3] wr_dis of BLOCK_KEY3
-WR_DIS.BLOCK_KEY4,                               EFUSE_BLK0,  27,   1, [WR_DIS.KEY4] wr_dis of BLOCK_KEY4
-WR_DIS.BLOCK_KEY5,                               EFUSE_BLK0,  28,   1, [WR_DIS.KEY5] wr_dis of BLOCK_KEY5
-WR_DIS.BLOCK_SYS_DATA2,                          EFUSE_BLK0,  29,   1, [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
-WR_DIS.USB_EXCHG_PINS,                           EFUSE_BLK0,  30,   1, [] wr_dis of USB_EXCHG_PINS
-WR_DIS.USB_EXT_PHY_ENABLE,                       EFUSE_BLK0,  30,   1, [WR_DIS.EXT_PHY_ENABLE] wr_dis of USB_EXT_PHY_ENABLE
-WR_DIS.SOFT_DIS_JTAG,                            EFUSE_BLK0,  31,   1, [] wr_dis of SOFT_DIS_JTAG
-RD_DIS,                                          EFUSE_BLK0,  32,   7, [] Disable reading from BlOCK4-10
-RD_DIS.BLOCK_KEY0,                               EFUSE_BLK0,  32,   1, [RD_DIS.KEY0] rd_dis of BLOCK_KEY0
-RD_DIS.BLOCK_KEY1,                               EFUSE_BLK0,  33,   1, [RD_DIS.KEY1] rd_dis of BLOCK_KEY1
-RD_DIS.BLOCK_KEY2,                               EFUSE_BLK0,  34,   1, [RD_DIS.KEY2] rd_dis of BLOCK_KEY2
-RD_DIS.BLOCK_KEY3,                               EFUSE_BLK0,  35,   1, [RD_DIS.KEY3] rd_dis of BLOCK_KEY3
-RD_DIS.BLOCK_KEY4,                               EFUSE_BLK0,  36,   1, [RD_DIS.KEY4] rd_dis of BLOCK_KEY4
-RD_DIS.BLOCK_KEY5,                               EFUSE_BLK0,  37,   1, [RD_DIS.KEY5] rd_dis of BLOCK_KEY5
-RD_DIS.BLOCK_SYS_DATA2,                          EFUSE_BLK0,  38,   1, [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2
-DIS_ICACHE,                                      EFUSE_BLK0,  40,   1, [] Set this bit to disable Icache
-DIS_DCACHE,                                      EFUSE_BLK0,  41,   1, [] Set this bit to disable Dcache
-DIS_DOWNLOAD_ICACHE,                             EFUSE_BLK0,  42,   1, [] Set this bit to disable Icache in download mode (boot_mode[3:0] is 0; 1; 2; 3; 6; 7)
-DIS_DOWNLOAD_DCACHE,                             EFUSE_BLK0,  43,   1, [] Set this bit to disable Dcache in download mode ( boot_mode[3:0] is 0; 1; 2; 3; 6; 7)
-DIS_FORCE_DOWNLOAD,                              EFUSE_BLK0,  44,   1, [] Set this bit to disable the function that forces chip into download mode
-DIS_USB_OTG,                                     EFUSE_BLK0,  45,   1, [DIS_USB] Set this bit to disable USB function
-DIS_TWAI,                                        EFUSE_BLK0,  46,   1, [DIS_CAN] Set this bit to disable CAN function
-DIS_APP_CPU,                                     EFUSE_BLK0,  47,   1, [] Disable app cpu
-SOFT_DIS_JTAG,                                   EFUSE_BLK0,  48,   3, [] Set these bits to disable JTAG in the soft way (odd number 1 means disable ). JTAG can be enabled in HMAC module
-DIS_PAD_JTAG,                                    EFUSE_BLK0,  51,   1, [HARD_DIS_JTAG] Set this bit to disable JTAG in the hard way. JTAG is disabled permanently
-DIS_DOWNLOAD_MANUAL_ENCRYPT,                     EFUSE_BLK0,  52,   1, [] Set this bit to disable flash encryption when in download boot modes
-USB_EXCHG_PINS,                                  EFUSE_BLK0,  57,   1, [] Set this bit to exchange USB D+ and D- pins
-USB_EXT_PHY_ENABLE,                              EFUSE_BLK0,  58,   1, [EXT_PHY_ENABLE] Set this bit to enable external PHY
-VDD_SPI_XPD,                                     EFUSE_BLK0,  68,   1, [] SPI regulator power up signal
-VDD_SPI_TIEH,                                    EFUSE_BLK0,  69,   1, [] If VDD_SPI_FORCE is 1; determines VDD_SPI voltage {0: "VDD_SPI connects to 1.8 V LDO"; 1: "VDD_SPI connects to VDD3P3_RTC_IO"}
-VDD_SPI_FORCE,                                   EFUSE_BLK0,  70,   1, [] Set this bit and force to use the configuration of eFuse to configure VDD_SPI
-WDT_DELAY_SEL,                                   EFUSE_BLK0,  80,   2, [] RTC watchdog timeout threshold; in unit of slow clock cycle {0: "40000"; 1: "80000"; 2: "160000"; 3: "320000"}
-SPI_BOOT_CRYPT_CNT,                              EFUSE_BLK0,  82,   3, [] Enables flash encryption when 1 or 3 bits are set and disabled otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
-SECURE_BOOT_KEY_REVOKE0,                         EFUSE_BLK0,  85,   1, [] Revoke 1st secure boot key
-SECURE_BOOT_KEY_REVOKE1,                         EFUSE_BLK0,  86,   1, [] Revoke 2nd secure boot key
-SECURE_BOOT_KEY_REVOKE2,                         EFUSE_BLK0,  87,   1, [] Revoke 3rd secure boot key
-KEY_PURPOSE_0,                                   EFUSE_BLK0,  88,   4, [KEY0_PURPOSE] Purpose of Key0
-KEY_PURPOSE_1,                                   EFUSE_BLK0,  92,   4, [KEY1_PURPOSE] Purpose of Key1
-KEY_PURPOSE_2,                                   EFUSE_BLK0,  96,   4, [KEY2_PURPOSE] Purpose of Key2
-KEY_PURPOSE_3,                                   EFUSE_BLK0, 100,   4, [KEY3_PURPOSE] Purpose of Key3
-KEY_PURPOSE_4,                                   EFUSE_BLK0, 104,   4, [KEY4_PURPOSE] Purpose of Key4
-KEY_PURPOSE_5,                                   EFUSE_BLK0, 108,   4, [KEY5_PURPOSE] Purpose of Key5
-SECURE_BOOT_EN,                                  EFUSE_BLK0, 116,   1, [] Set this bit to enable secure boot
-SECURE_BOOT_AGGRESSIVE_REVOKE,                   EFUSE_BLK0, 117,   1, [] Set this bit to enable revoking aggressive secure boot
-DIS_USB_JTAG,                                    EFUSE_BLK0, 118,   1, [] Set this bit to disable function of usb switch to jtag in module of usb device
-DIS_USB_SERIAL_JTAG,                             EFUSE_BLK0, 119,   1, [DIS_USB_DEVICE] Set this bit to disable usb device
-STRAP_JTAG_SEL,                                  EFUSE_BLK0, 120,   1, [] Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0
-USB_PHY_SEL,                                     EFUSE_BLK0, 121,   1, [] This bit is used to switch internal PHY and external PHY for USB OTG and USB Device {0: "internal PHY is assigned to USB Device while external PHY is assigned to USB OTG"; 1: "internal PHY is assigned to USB OTG while external PHY is assigned to USB Device"}
-FLASH_TPUW,                                      EFUSE_BLK0, 124,   4, [] Configures flash waiting time after power-up; in unit of ms. If the value is less than 15; the waiting time is the configurable value.  Otherwise; the waiting time is twice the configurable value
-DIS_DOWNLOAD_MODE,                               EFUSE_BLK0, 128,   1, [] Set this bit to disable download mode (boot_mode[3:0] = 0; 1; 2; 3; 6; 7)
-DIS_DIRECT_BOOT,                                 EFUSE_BLK0, 129,   1, [DIS_LEGACY_SPI_BOOT] Disable direct boot mode
-DIS_USB_SERIAL_JTAG_ROM_PRINT,                   EFUSE_BLK0, 130,   1, [UART_PRINT_CHANNEL] USB printing {0: "Enable"; 1: "Disable"}
-FLASH_ECC_MODE,                                  EFUSE_BLK0, 131,   1, [] Flash ECC mode in ROM {0: "16to18 byte"; 1: "16to17 byte"}
-DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,               EFUSE_BLK0, 132,   1, [DIS_USB_DOWNLOAD_MODE] Set this bit to disable UART download mode through USB
-ENABLE_SECURITY_DOWNLOAD,                        EFUSE_BLK0, 133,   1, [] Set this bit to enable secure UART download mode
-UART_PRINT_CONTROL,                              EFUSE_BLK0, 134,   2, [] Set the default UART boot message output mode {0: "Enable"; 1: "Enable when GPIO46 is low at reset"; 2: "Enable when GPIO46 is high at reset"; 3: "Disable"}
-PIN_POWER_SELECTION,                             EFUSE_BLK0, 136,   1, [] Set default power supply for GPIO33-GPIO37; set when SPI flash is initialized {0: "VDD3P3_CPU"; 1: "VDD_SPI"}
-FLASH_TYPE,                                      EFUSE_BLK0, 137,   1, [] SPI flash type {0: "4 data lines"; 1: "8 data lines"}
-FLASH_PAGE_SIZE,                                 EFUSE_BLK0, 138,   2, [] Set Flash page size
-FLASH_ECC_EN,                                    EFUSE_BLK0, 140,   1, [] Set 1 to enable ECC for flash boot
-FORCE_SEND_RESUME,                               EFUSE_BLK0, 141,   1, [] Set this bit to force ROM code to send a resume command during SPI boot
-SECURE_VERSION,                                  EFUSE_BLK0, 142,  16, [] Secure version (used by ESP-IDF anti-rollback feature)
-DIS_USB_OTG_DOWNLOAD_MODE,                       EFUSE_BLK0, 159,   1, [] Set this bit to disable download through USB-OTG
-DISABLE_WAFER_VERSION_MAJOR,                     EFUSE_BLK0, 160,   1, [] Disables check of wafer version major
-DISABLE_BLK_VERSION_MAJOR,                       EFUSE_BLK0, 161,   1, [] Disables check of blk version major
-MAC_FACTORY,                                     EFUSE_BLK1,   0,  48, [MAC_FACTORY] MAC address
-SPI_PAD_CONFIG_CLK,                              EFUSE_BLK1,  48,   6, [] SPI_PAD_configure CLK
-SPI_PAD_CONFIG_Q,                                EFUSE_BLK1,  54,   6, [] SPI_PAD_configure Q(D1)
-SPI_PAD_CONFIG_D,                                EFUSE_BLK1,  60,   6, [] SPI_PAD_configure D(D0)
-SPI_PAD_CONFIG_CS,                               EFUSE_BLK1,  66,   6, [] SPI_PAD_configure CS
-SPI_PAD_CONFIG_HD,                               EFUSE_BLK1,  72,   6, [] SPI_PAD_configure HD(D3)
-SPI_PAD_CONFIG_WP,                               EFUSE_BLK1,  78,   6, [] SPI_PAD_configure WP(D2)
-SPI_PAD_CONFIG_DQS,                              EFUSE_BLK1,  84,   6, [] SPI_PAD_configure DQS
-SPI_PAD_CONFIG_D4,                               EFUSE_BLK1,  90,   6, [] SPI_PAD_configure D4
-SPI_PAD_CONFIG_D5,                               EFUSE_BLK1,  96,   6, [] SPI_PAD_configure D5
-SPI_PAD_CONFIG_D6,                               EFUSE_BLK1, 102,   6, [] SPI_PAD_configure D6
-SPI_PAD_CONFIG_D7,                               EFUSE_BLK1, 108,   6, [] SPI_PAD_configure D7
-WAFER_VERSION_MINOR_LO,                          EFUSE_BLK1, 114,   3, [] WAFER_VERSION_MINOR least significant bits
-PKG_VERSION,                                     EFUSE_BLK1, 117,   3, [] Package version
-BLK_VERSION_MINOR,                               EFUSE_BLK1, 120,   3, [] BLK_VERSION_MINOR
-K_RTC_LDO,                                       EFUSE_BLK1, 141,   7, [] BLOCK1 K_RTC_LDO
-K_DIG_LDO,                                       EFUSE_BLK1, 148,   7, [] BLOCK1 K_DIG_LDO
-V_RTC_DBIAS20,                                   EFUSE_BLK1, 155,   8, [] BLOCK1 voltage of rtc dbias20
-V_DIG_DBIAS20,                                   EFUSE_BLK1, 163,   8, [] BLOCK1 voltage of digital dbias20
-DIG_DBIAS_HVT,                                   EFUSE_BLK1, 171,   5, [] BLOCK1 digital dbias when hvt
-WAFER_VERSION_MINOR_HI,                          EFUSE_BLK1, 183,   1, [] WAFER_VERSION_MINOR most significant bit
-WAFER_VERSION_MAJOR,                             EFUSE_BLK1, 184,   2, [] WAFER_VERSION_MAJOR
-ADC2_CAL_VOL_ATTEN3,                             EFUSE_BLK1, 186,   6, [] ADC2 calibration voltage at atten3
-OPTIONAL_UNIQUE_ID,                              EFUSE_BLK2,   0, 128, [] Optional unique 128-bit ID
-BLK_VERSION_MAJOR,                               EFUSE_BLK2, 128,   2, [] BLK_VERSION_MAJOR of BLOCK2 {0: "No calib"; 1: "ADC calib V1"}
-TEMP_CALIB,                                      EFUSE_BLK2, 132,   9, [] Temperature calibration data
-OCODE,                                           EFUSE_BLK2, 141,   8, [] ADC OCode
-ADC1_INIT_CODE_ATTEN0,                           EFUSE_BLK2, 149,   8, [] ADC1 init code at atten0
-ADC1_INIT_CODE_ATTEN1,                           EFUSE_BLK2, 157,   6, [] ADC1 init code at atten1
-ADC1_INIT_CODE_ATTEN2,                           EFUSE_BLK2, 163,   6, [] ADC1 init code at atten2
-ADC1_INIT_CODE_ATTEN3,                           EFUSE_BLK2, 169,   6, [] ADC1 init code at atten3
-ADC2_INIT_CODE_ATTEN0,                           EFUSE_BLK2, 175,   8, [] ADC2 init code at atten0
-ADC2_INIT_CODE_ATTEN1,                           EFUSE_BLK2, 183,   6, [] ADC2 init code at atten1
-ADC2_INIT_CODE_ATTEN2,                           EFUSE_BLK2, 189,   6, [] ADC2 init code at atten2
-ADC2_INIT_CODE_ATTEN3,                           EFUSE_BLK2, 195,   6, [] ADC2 init code at atten3
-ADC1_CAL_VOL_ATTEN0,                             EFUSE_BLK2, 201,   8, [] ADC1 calibration voltage at atten0
-ADC1_CAL_VOL_ATTEN1,                             EFUSE_BLK2, 209,   8, [] ADC1 calibration voltage at atten1
-ADC1_CAL_VOL_ATTEN2,                             EFUSE_BLK2, 217,   8, [] ADC1 calibration voltage at atten2
-ADC1_CAL_VOL_ATTEN3,                             EFUSE_BLK2, 225,   8, [] ADC1 calibration voltage at atten3
-ADC2_CAL_VOL_ATTEN0,                             EFUSE_BLK2, 233,   8, [] ADC2 calibration voltage at atten0
-ADC2_CAL_VOL_ATTEN1,                             EFUSE_BLK2, 241,   7, [] ADC2 calibration voltage at atten1
-ADC2_CAL_VOL_ATTEN2,                             EFUSE_BLK2, 248,   7, [] ADC2 calibration voltage at atten2
-USER_DATA,                                       EFUSE_BLK3,   0, 256, [BLOCK_USR_DATA] User data
-USER_DATA.MAC_CUSTOM,                            EFUSE_BLK3, 200,  48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC
-KEY0,                                            EFUSE_BLK4,   0, 256, [BLOCK_KEY0] Key0 or user data
-KEY1,                                            EFUSE_BLK5,   0, 256, [BLOCK_KEY1] Key1 or user data
-KEY2,                                            EFUSE_BLK6,   0, 256, [BLOCK_KEY2] Key2 or user data
-KEY3,                                            EFUSE_BLK7,   0, 256, [BLOCK_KEY3] Key3 or user data
-KEY4,                                            EFUSE_BLK8,   0, 256, [BLOCK_KEY4] Key4 or user data
-KEY5,                                            EFUSE_BLK9,   0, 256, [BLOCK_KEY5] Key5 or user data
-SYS_DATA_PART2,                                  EFUSE_BLK10,   0, 256, [BLOCK_SYS_DATA2] System data part 2 (reserved)

esp-hal/ld/README.md

@@ -0,0 +1,8 @@
+# ROM functions
+
+Files in the `rom` subdirectories are taken from esp-idf
+
+- DON'T include any `*newlib*` functions
+- systimer, wdt and mbedtls shouldn't be included
+- make sure to align the version you take the files from with esp-wifi-sys - NEVER randomly sync the files with other versions
+- some additional functions are needed from ROM - see `additional.ld` (these are usually defined in the `*newlib*` files)

esp-hal/ld/esp32/esp32.x

@@ -8,6 +8,10 @@ PROVIDE(__zero_bss = default_mem_hook);
 PROVIDE(__init_data = default_mem_hook);
 PROVIDE(__post_init = default_post_init);
 
+PROVIDE(__level_1_interrupt = handle_interrupts);
+PROVIDE(__level_2_interrupt = handle_interrupts);
+PROVIDE(__level_3_interrupt = handle_interrupts);
+
 INCLUDE exception.x
 
 /* ESP32 fixups */
@@ -15,22 +19,16 @@ INCLUDE "fixups/rtc_fast_rwdata_dummy.x"
 /* END ESP32 fixups */
 
 /* Shared sections - ordering matters */
-INCLUDE "text.x"
-INCLUDE "rodata.x"
 INCLUDE "rwtext.x"
+INCLUDE "text.x"
 INCLUDE "rwdata.x"
+INCLUDE "rodata.x"
 INCLUDE "rtc_fast.x"
 INCLUDE "rtc_slow.x"
 INCLUDE "stack.x"
+INCLUDE "dram2.x"
 /* End of Shared sections */
 
-/* an uninitialized section for use as the wifi-heap in esp-wifi */
-SECTIONS {
-    .dram2_uninit (NOLOAD) : ALIGN(4) {
-        *(.dram2_uninit)
-    } > dram2_seg
-}
-
 EXTERN(DefaultHandler);
 
 EXTERN(WIFI_EVENT); /* Force inclusion of WiFi libraries */

esp-hal/ld/esp32/memory.x

@@ -25,10 +25,18 @@ MEMORY
   * The segment dram2_seg after the rom data space is not mentioned in the esp32 linker scripts in esp-idf, instead the space after is used as heap space.
   * It seems not all rom data space is reserved, but only "core"/"important" ROM functions that may be called after booting from ROM.
   */
-  reserved_rom_data_pro  : ORIGIN = 0X3FFE0000, len = 1088
-  reserved_rom_data_app  : ORIGIN = 0X3FFE3F20, len = 1072
+  reserved_rom_data_pro  : ORIGIN = 0x3ffe0000, len = 1088
+  reserved_rom_data_app  : ORIGIN = 0x3ffe3f20, len = 1072
 
-  dram2_seg              : ORIGIN = 0x3FFE4350, len = 111k /* the rest of DRAM after the rom data segments in the middle */
+  /*
+  *   The following values are derived from the __stack and _stack_sentry values from ROM.
+  *   They represent the stacks used for each core setup by ROM code. In theory both of these 
+  *   can be reclaimed once both cores are running, but for now we play it safe and reserve them both.
+  */
+  reserved_rom_stack_pro  : ORIGIN = 0x3ffe1320, len = 11264
+  reserved_rom_stack_app  : ORIGIN = 0x3ffe5230, len = 11264
+
+  dram2_seg              : ORIGIN = 0x3ffe7e30, len = 98767  /* the rest of DRAM after the rom data segments and rom stacks in the middle */
 
   /* external flash 
      The 0x20 offset is a convenience for the app binary image generation.

esp-hal/ld/esp32/rom-functions.x

@@ -1,29 +1,9 @@
-PROVIDE(ets_delay_us = 0x40008534);
-PROVIDE(ets_update_cpu_frequency_rom = 0x40008550);
-PROVIDE(rom_i2c_writeReg = 0x400041a4);
-PROVIDE(rom_i2c_writeReg_Mask = 0x400041fc);
-PROVIDE(rtc_get_reset_reason = 0x400081d4);
-PROVIDE(software_reset = 0x4000824c);
-PROVIDE(software_reset_cpu = 0x40008264);
+INCLUDE "rom/esp32.rom.api.ld"
+INCLUDE "rom/esp32.rom.eco3.ld"
+INCLUDE "rom/esp32.rom.ld"
+INCLUDE "rom/esp32.rom.libgcc.ld"
+INCLUDE "rom/esp32.rom.redefined.ld"
+INCLUDE "rom/esp32.rom.spiflash_legacy.ld"
+INCLUDE "rom/esp32.rom.syscalls.ld"
 
-PROVIDE ( ets_efuse_get_spiconfig = 0x40008658 );
-PROVIDE ( esp_rom_efuse_get_flash_gpio_info    = ets_efuse_get_spiconfig );
-PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
-PROVIDE ( gpio_matrix_out = 0x40009f0c );
-PROVIDE ( gpio_matrix_in = 0x40009edc );
-PROVIDE ( esp_rom_gpio_connect_in_signal  = gpio_matrix_in );
-PROVIDE ( esp_rom_spiflash_config_clk = 0x40062bc8 );
-PROVIDE ( g_rom_spiflash_dummy_len_plus = 0x3ffae290 );
-PROVIDE ( g_rom_flashchip = 0x3ffae270 );
-PROVIDE ( cache_sram_mmu_set_rom = 0x400097f4 );
-
-PROVIDE (esp_rom_crc32_be = 0x4005d024);
-PROVIDE (esp_rom_crc16_be = 0x4005d09c);
-PROVIDE (esp_rom_crc8_be = 0x4005d114);
-PROVIDE (esp_rom_crc32_le = 0x4005cfec);
-PROVIDE (esp_rom_crc16_le = 0x4005d05c);
-PROVIDE (esp_rom_crc8_le = 0x4005d0e0);
-
-PROVIDE (esp_rom_md5_init   = 0x4005da7c);
-PROVIDE (esp_rom_md5_update = 0x4005da9c);
-PROVIDE (esp_rom_md5_final  = 0x4005db1c);
+INCLUDE "rom/additional.ld"

esp-hal/ld/esp32/rom/additional.ld

@@ -0,0 +1,20 @@
+memcmp = 0x4000c260;
+memcpy = 0x4000c2c8;
+memmove = 0x4000c3c0;
+memset = 0x4000c44c;
+
+PROVIDE ( strcpy = 0x400013ac );
+PROVIDE ( abs = 0x40056340 );
+PROVIDE ( strncpy = 0x400015d4 );
+PROVIDE ( strncmp = 0x4000c5f4 );
+
+PROVIDE ( bzero = 0x4000c1f4 );
+
+PROVIDE ( strcat = 0x4000c518 );
+PROVIDE ( strcmp = 0x40001274 );
+PROVIDE ( strchr = 0x4000c53c );
+PROVIDE ( strlcpy = 0x4000c584 );
+PROVIDE ( strstr = 0x4000c674 );
+PROVIDE ( strcasecmp = 0x400011cc );
+
+PROVIDE ( memchr = 0x4000c244 );

esp-hal/ld/esp32/rom/esp32.rom.api.ld

@@ -0,0 +1,62 @@
+/**
+ * ROM APIs
+ */
+PROVIDE ( esp_rom_crc32_le = crc32_le );
+PROVIDE ( esp_rom_crc16_le = crc16_le );
+PROVIDE ( esp_rom_crc8_le  = crc8_le );
+PROVIDE ( esp_rom_crc32_be = crc32_be );
+PROVIDE ( esp_rom_crc16_be = crc16_be );
+PROVIDE ( esp_rom_crc8_be  = crc8_be );
+
+PROVIDE ( esp_rom_gpio_pad_select_gpio    = gpio_pad_select_gpio );
+PROVIDE ( esp_rom_gpio_pad_pullup_only    = gpio_pad_pullup );
+PROVIDE ( esp_rom_gpio_pad_set_drv        = gpio_pad_set_drv );
+PROVIDE ( esp_rom_gpio_pad_unhold         = gpio_pad_unhold );
+PROVIDE ( esp_rom_gpio_connect_in_signal  = gpio_matrix_in );
+PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
+
+PROVIDE ( esp_rom_efuse_mac_address_crc8       = esp_crc8 );
+PROVIDE ( esp_rom_efuse_get_flash_gpio_info    = ets_efuse_get_spiconfig );
+PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
+
+PROVIDE ( esp_rom_uart_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_uart_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
+PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
+PROVIDE ( esp_rom_uart_switch_buffer  = uart_buff_switch );
+
+PROVIDE ( esp_rom_output_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_output_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_output_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_output_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_output_rx_string      = UartRxString );
+PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_output_putc           = ets_write_char_uart );
+PROVIDE ( esp_rom_output_switch_buffer  = uart_buff_switch );
+
+/* wpa_supplicant re-implements the MD5 functions: MD5Init, MD5Update, MD5Final */
+/* so here we directly assign the symbols with the ROM API address */
+PROVIDE ( esp_rom_md5_init   = 0x4005da7c );
+PROVIDE ( esp_rom_md5_update = 0x4005da9c );
+PROVIDE ( esp_rom_md5_final  = 0x4005db1c );
+
+PROVIDE ( esp_rom_software_reset_system = software_reset );
+PROVIDE ( esp_rom_software_reset_cpu    = software_reset_cpu );
+
+PROVIDE ( esp_rom_printf   = ets_printf );
+PROVIDE ( esp_rom_delay_us = ets_delay_us );
+PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
+PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
+PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
+PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
+
+PROVIDE ( esp_rom_spiflash_set_bp = esp_rom_spiflash_lock );
+PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
+
+PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
+PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
+PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
+PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );

esp-hal/ld/esp32/rom/esp32.rom.eco3.ld

@@ -0,0 +1,10 @@
+/*
+ESP32 ECO3 ROM address table
+Secure Boot Version 2 API's imported from the ROM
+*/
+PROVIDE ( ets_secure_boot_verify_signature = 0x4006543c);
+PROVIDE ( ets_secure_boot_verify_boot_bootloader = 0x400655ec);
+PROVIDE ( ets_use_secure_boot_v2 = 0x4000f8d4);
+PROVIDE ( ets_rsa_pss_verify = 0x40065310);
+PROVIDE ( ets_mgf1_sha256 = 0x400651a8);
+PROVIDE ( ets_emsa_pss_verify = 0x4006520c);

esp-hal/ld/esp32/rom/esp32.rom.libgcc.ld

@@ -0,0 +1,94 @@
+/* Unlike other ROM functions which are exported using PROVIDE, which declares
+   weak symbols, these libgcc functions are exported using assignment,
+   which declares strong symbols. This is done so that ROM functions are always
+   used instead of the ones provided by libgcc.a.
+*/
+
+__absvdi2 = 0x4006387c;
+__absvsi2 = 0x40063868;
+__adddf3 = 0x40002590;
+__addsf3 = 0x400020e8;
+__addvdi3 = 0x40002cbc;
+__addvsi3 = 0x40002c98;
+__ashldi3 = 0x4000c818;
+__ashrdi3 = 0x4000c830;
+__bswapdi2 = 0x40064b08;
+__bswapsi2 = 0x40064ae0;
+__clrsbdi2 = 0x40064b7c;
+__clrsbsi2 = 0x40064b64;
+__clzdi2 = 0x4000ca50;
+__clzsi2 = 0x4000c7e8;
+__cmpdi2 = 0x40063820;
+__ctzdi2 = 0x4000ca64;
+__ctzsi2 = 0x4000c7f0;
+__divdc3 = 0x400645a4;
+__divdf3 = 0x40002954;
+__divdi3 = 0x4000ca84;
+__divsi3 = 0x4000c7b8;
+__eqdf2 = 0x400636a8;
+__eqsf2 = 0x40063374;
+__extendsfdf2 = 0x40002c34;
+__ffsdi2 = 0x4000ca2c;
+__ffssi2 = 0x4000c804;
+__fixdfdi = 0x40002ac4;
+__fixdfsi = 0x40002a78;
+__fixsfdi = 0x4000244c;
+__fixsfsi = 0x4000240c;
+__fixunsdfsi = 0x40002b30;
+__fixunssfdi = 0x40002504;
+__fixunssfsi = 0x400024ac;
+__floatdidf = 0x4000c988;
+__floatdisf = 0x4000c8c0;
+__floatsidf = 0x4000c944;
+__floatsisf = 0x4000c870;
+__floatundidf = 0x4000c978;
+__floatundisf = 0x4000c8b0;
+__floatunsidf = 0x4000c938;
+__floatunsisf = 0x4000c864;
+__gcc_bcmp = 0x40064a70;
+__gedf2 = 0x40063768;
+__gesf2 = 0x4006340c;
+__gtdf2 = 0x400636dc;
+__gtsf2 = 0x400633a0;
+__ledf2 = 0x40063704;
+__lesf2 = 0x400633c0;
+__lshrdi3 = 0x4000c84c;
+__ltdf2 = 0x40063790;
+__ltsf2 = 0x4006342c;
+__moddi3 = 0x4000cd4c;
+__modsi3 = 0x4000c7c0;
+__muldc3 = 0x40063c90;
+__muldf3 = 0x4006358c;
+__muldi3 = 0x4000c9fc;
+__mulsf3 = 0x400632c8;
+__mulsi3 = 0x4000c7b0;
+__mulvdi3 = 0x40002d78;
+__mulvsi3 = 0x40002d60;
+__nedf2 = 0x400636a8;
+__negdf2 = 0x400634a0;
+__negdi2 = 0x4000ca14;
+__negsf2 = 0x400020c0;
+__negvdi2 = 0x40002e98;
+__negvsi2 = 0x40002e78;
+__nesf2 = 0x40063374;
+__nsau_data = 0x3ff96544;
+__paritysi2 = 0x40002f3c;
+__popcount_tab = 0x3ff96544;
+__popcountdi2 = 0x40002ef8;
+__popcountsi2 = 0x40002ed0;
+__powidf2 = 0x400638e4;
+__subdf3 = 0x400026e4;
+__subsf3 = 0x400021d0;
+__subvdi3 = 0x40002d20;
+__subvsi3 = 0x40002cf8;
+__truncdfsf2 = 0x40002b90;
+__ucmpdi2 = 0x40063840;
+__udiv_w_sdiv = 0x40064bec;
+__udivdi3 = 0x4000cff8;
+__udivmoddi4 = 0x40064bf4;
+__udivsi3 = 0x4000c7c8;
+__umoddi3 = 0x4000d280;
+__umodsi3 = 0x4000c7d0;
+__umulsidi3 = 0x4000c7d8;
+__unorddf2 = 0x400637f4;
+__unordsf2 = 0x40063478;

esp-hal/ld/esp32/rom/esp32.rom.redefined.ld

@@ -0,0 +1,38 @@
+/*
+   ROM Functions defined in this file are not used in ESP-IDF as is,
+   and different definitions for functions with the same names are provided.
+   This file is not used when linking ESP-IDF and is intended for reference only
+*/
+
+PROVIDE ( abort = 0x4000bba4 );
+PROVIDE ( aes_128_cbc_decrypt = 0x4005cc7c );
+PROVIDE ( aes_128_cbc_encrypt = 0x4005cc18 );
+PROVIDE ( aes_unwrap = 0x4005ccf0 );
+PROVIDE ( base64_decode = 0x4005ced8 );
+PROVIDE ( base64_encode = 0x4005cdbc );
+PROVIDE ( ets_isr_mask = 0x400067fc );
+PROVIDE ( ets_isr_unmask = 0x40006808 );
+PROVIDE ( ets_timer_arm = 0x40008368 );
+PROVIDE ( ets_timer_arm_us = 0x400083ac );
+PROVIDE ( ets_timer_disarm = 0x400083ec );
+PROVIDE ( ets_timer_done = 0x40008428 );
+PROVIDE ( ets_timer_init = 0x400084e8 );
+PROVIDE ( ets_timer_handler_isr = 0x40008454 );
+PROVIDE ( ets_timer_setfn = 0x40008350 );
+PROVIDE ( hmac_md5 = 0x4005d264 );
+PROVIDE ( hmac_md5_vector = 0x4005d17c );
+PROVIDE ( hmac_sha1 = 0x40060acc );
+PROVIDE ( hmac_sha1_vector = 0x400609e4 );
+PROVIDE ( hmac_sha256 = 0x40060d58 );
+PROVIDE ( hmac_sha256_vector = 0x40060c84 );
+PROVIDE ( MD5Final = 0x4005db1c );
+PROVIDE ( MD5Init = 0x4005da7c );
+PROVIDE ( MD5Update = 0x4005da9c );
+PROVIDE ( md5_vector = 0x4005db80 );
+PROVIDE ( pbkdf2_sha1 = 0x40060ba4 );
+PROVIDE ( rc4_skip = 0x40060928 );
+PROVIDE ( sha1_prf = 0x40060ae8 );
+PROVIDE ( sha1_vector = 0x40060b64 );
+PROVIDE ( sha256_prf = 0x40060d70 );
+PROVIDE ( sha256_vector = 0x40060e08 );
+PROVIDE ( uart_tx_wait_idle = 0x40009278 );

esp-hal/ld/esp32/rom/esp32.rom.spiflash_legacy.ld

@@ -0,0 +1,29 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/*
+	Address table for SPI driver functions in ESP32 ROM.
+	These functions are only linked from ROM when SPI_FLASH_ROM_DRIVER_PATCH is not set in configuration.
+*/
+
+PROVIDE ( esp_rom_spiflash_write_encrypted = 0x40062e78 );
+PROVIDE ( esp_rom_spiflash_erase_area = 0x400631ac );
+PROVIDE ( esp_rom_spiflash_erase_block = 0x40062c4c );
+PROVIDE ( esp_rom_spiflash_erase_chip = 0x40062c14 );
+PROVIDE ( esp_rom_spiflash_erase_sector = 0x40062ccc );
+PROVIDE ( esp_rom_spiflash_attach = 0x40062a6c );
+PROVIDE ( esp_rom_spiflash_lock = 0x400628f0 );
+PROVIDE ( esp_rom_spiflash_read = 0x40062ed8 );
+PROVIDE ( esp_rom_spiflash_config_readmode = 0x40062b64 ); /* SPIMasterReadModeCnfig */
+PROVIDE ( esp_rom_spiflash_read_status = 0x4006226c );
+PROVIDE ( esp_rom_spiflash_read_statushigh = 0x40062448 );
+PROVIDE ( esp_rom_spiflash_write = 0x40062d50 );
+PROVIDE ( esp_rom_spiflash_enable_write = 0x40062320 );
+PROVIDE ( esp_rom_spiflash_write_status = 0x400622f0 );
+
+/* always using patched versions of these functions
+PROVIDE ( esp_rom_spiflash_wait_idle = 0x400622c0 );
+PROVIDE ( esp_rom_spiflash_unlock = 0x400????? );
+*/

esp-hal/ld/esp32/rom/esp32.rom.syscalls.ld

@@ -0,0 +1,66 @@
+/* These ROM functions call respective entries in the syscall table.
+   They are called by other ROM functions (mostly from newlib).
+   We don't link to them directly, since in IDF there are actual
+   implementations of these functions, with same names.
+
+   I.e.:
+
+   times (in ROM) -> _times_r (in ROM) -> syscall table entry _times_r -> _times_r (in IDF)
+
+   Hence the following entries are provided only for reference
+   and commented out.
+ */
+
+/*   <--- the following lines are commented out
+
+PROVIDE ( calloc = 0x4000bee4 );
+PROVIDE ( free = 0x4000beb8 );
+PROVIDE ( _free_r = 0x4000bbcc );
+PROVIDE ( _getpid_r = 0x4000bcfc );
+PROVIDE ( __getreent = 0x4000be8c );
+PROVIDE ( _gettimeofday_r = 0x4000bc58 );
+PROVIDE ( _kill_r = 0x4000bd10 );
+PROVIDE ( _lock_acquire = 0x4000be14 );
+PROVIDE ( _lock_acquire_recursive = 0x4000be28 );
+PROVIDE ( _lock_close = 0x4000bdec );
+PROVIDE ( _lock_close_recursive = 0x4000be00 );
+PROVIDE ( _lock_init = 0x4000bdc4 );
+PROVIDE ( _lock_init_recursive = 0x4000bdd8 );
+PROVIDE ( _lock_release = 0x4000be64 );
+PROVIDE ( _lock_release_recursive = 0x4000be78 );
+PROVIDE ( _lock_try_acquire = 0x4000be3c );
+PROVIDE ( _lock_try_acquire_recursive = 0x4000be50 );
+PROVIDE ( malloc = 0x4000bea0 );
+PROVIDE ( _malloc_r = 0x4000bbb4 );
+PROVIDE ( _raise_r = 0x4000bc70 );
+PROVIDE ( realloc = 0x4000becc );
+PROVIDE ( _realloc_r = 0x4000bbe0 );
+PROVIDE ( _sbrk_r = 0x4000bce4 );
+PROVIDE ( _system_r = 0x4000bc10 );
+PROVIDE ( _times_r = 0x4000bc40 );
+PROVIDE ( _close_r = 0x4000bd3c );
+PROVIDE ( _exit_r = 0x4000bd28 );
+PROVIDE ( _fstat_r = 0x4000bccc );
+PROVIDE ( _link_r = 0x4000bc9c );
+PROVIDE ( _lseek_r = 0x4000bd8c );
+PROVIDE ( _open_r = 0x4000bd54 );
+PROVIDE ( _read_r = 0x4000bda8 );
+PROVIDE ( _rename_r = 0x4000bc28 );
+PROVIDE ( _unlink_r = 0x4000bc84 );
+PROVIDE ( _write_r = 0x4000bd70 );
+
+    ---> end commented out block
+*/
+
+
+/* These are the non-reentrant versions of syscalls present in the ROM.
+   They call the reentrant versions, passing the pointer returned by __getreent
+   as the first argument.
+ */
+
+close = 0x40001778;
+open = 0x4000178c;
+read = 0x400017dc;
+sbrk = 0x400017f4;
+times = 0x40001808;
+write = 0x4000181c;

esp-hal/ld/esp32c2/esp32c2.x

@@ -36,14 +36,6 @@ PROVIDE(_mp_hook = default_mp_hook);
 PROVIDE(_start_trap = default_start_trap);
 
 /* esp32c2 fixups */
-SECTIONS {
-  .text.dummy (NOLOAD) :
-  {
-    /* This section is intended to make _stext address work */
-    . = ABSOLUTE(_stext);
-  } > ROTEXT
-}
-INSERT BEFORE .text;
 
 SECTIONS {
   .trap : ALIGN(4)
@@ -88,11 +80,12 @@ PROVIDE(__global_pointer$ = _data_start + 0x800);
 /* end of esp32c2 fixups */
 
 /* Shared sections - ordering matters */
-INCLUDE "text.x"
-INCLUDE "rodata.x"
 INCLUDE "rwtext.x"
+INCLUDE "text.x"
 INCLUDE "rwdata.x"
+INCLUDE "rodata.x"
 INCLUDE "stack.x"
+INCLUDE "dram2.x"
 /* End of Shared sections */
 
 INCLUDE "debug.x"

esp-hal/ld/esp32c2/memory.x

@@ -12,12 +12,14 @@ MEMORY
                       [0x4037C000, 0x403C0000, "IRAM"]]
     */
 
-    /* 272K of on soc RAM, 16K reserved for cache */
-    ICACHE : ORIGIN = 0x4037C000,  LENGTH = 16K
+    ICACHE : ORIGIN = 0x4037C000, LENGTH = 16K
     /* Instruction RAM */
-    IRAM : ORIGIN = 0x4037C000 + 16K, LENGTH = 272K - 16K
+    IRAM : ORIGIN = 0x4037C000 + LENGTH(ICACHE), LENGTH = 186k
     /* Data RAM */
-    DRAM : ORIGIN = 0x3FCA0000, LENGTH = 0x30000
+    DRAM : ORIGIN = 0x3FCA0000, LENGTH = 186k
+
+    /* memory available after the 2nd stage bootloader is finished */
+    dram2_seg ( RW )       : ORIGIN = ORIGIN(DRAM) + LENGTH(DRAM), len = 0x3fcdeb70 - (ORIGIN(DRAM) + LENGTH(DRAM))
 
     /* External flash */
     /* Instruction ROM */

esp-hal/ld/esp32c2/rom-functions.x

@@ -1,18 +1,8 @@
-PROVIDE(ets_delay_us = 0x40000044);
-PROVIDE(ets_update_cpu_frequency_rom = 0x40000774);
-PROVIDE(rom_i2c_writeReg = 0x400022f4);
-PROVIDE(rom_i2c_writeReg_Mask = 0x400022fc);
-PROVIDE(rtc_get_reset_reason = 0x40000018);
-PROVIDE(software_reset = 0x40000088);
-PROVIDE(software_reset_cpu = 0x4000008c);
+INCLUDE "rom/esp32c2.rom.api.ld"
+INCLUDE "rom/esp32c2.rom.heap.ld"
+INCLUDE "rom/esp32c2.rom.ld"
+INCLUDE "rom/esp32c2.rom.libgcc.ld"
+INCLUDE "rom/esp32c2.rom.rvfp.ld"
+INCLUDE "rom/esp32c2.rom.version.ld"
 
-PROVIDE(esp_rom_crc32_be = 0x40000808);
-PROVIDE(esp_rom_crc16_be = 0x4000080c);
-PROVIDE(esp_rom_crc8_be = 0x40000810);
-PROVIDE(esp_rom_crc32_le = 0x400007fc);
-PROVIDE(esp_rom_crc16_le = 0x40000800);
-PROVIDE(esp_rom_crc8_le = 0x40000804);
-
-PROVIDE(esp_rom_mbedtls_md5_starts_ret = 0x40002be4);
-PROVIDE(esp_rom_mbedtls_md5_update_ret = 0x40002be8);
-PROVIDE(esp_rom_mbedtls_md5_finish_ret = 0x40002bec);
+INCLUDE "rom/additional.ld"

esp-hal/ld/esp32c2/rom/additional.ld

@@ -0,0 +1,15 @@
+memset = 0x40000488;
+memcpy = 0x4000048c;
+memmove = 0x40000490;
+memcmp = 0x40000494;
+
+strcpy = 0x40000498;
+strncpy = 0x4000049c;
+strncmp = 0x400004a4;
+
+PROVIDE ( strcat = 0x4000050c );
+PROVIDE ( strcmp = 0x400004a0 );
+PROVIDE ( strchr = 0x40000514 );
+PROVIDE ( strlcpy = 0x40000524 );
+PROVIDE ( strstr = 0x400004ac );
+PROVIDE ( strcasecmp = 0x40000504 );

esp-hal/ld/esp32c2/rom/esp32c2.rom.api.ld

@@ -0,0 +1,69 @@
+/*
+ * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/** ROM APIs
+ */
+PROVIDE ( esp_rom_crc32_le = crc32_le );
+PROVIDE ( esp_rom_crc16_le = crc16_le );
+PROVIDE ( esp_rom_crc8_le  = crc8_le );
+PROVIDE ( esp_rom_crc32_be = crc32_be );
+PROVIDE ( esp_rom_crc16_be = crc16_be );
+PROVIDE ( esp_rom_crc8_be  = crc8_be );
+
+PROVIDE ( esp_rom_gpio_pad_select_gpio    = gpio_pad_select_gpio );
+PROVIDE ( esp_rom_gpio_pad_pullup_only    = gpio_pad_pullup );
+PROVIDE ( esp_rom_gpio_pad_set_drv        = gpio_pad_set_drv );
+PROVIDE ( esp_rom_gpio_pad_unhold         = gpio_pad_unhold );
+PROVIDE ( esp_rom_gpio_connect_in_signal  = gpio_matrix_in );
+PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
+
+PROVIDE ( esp_rom_efuse_mac_address_crc8       = esp_crc8 );
+PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
+
+PROVIDE ( esp_rom_uart_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_uart_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
+PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
+
+PROVIDE ( esp_rom_output_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_output_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_output_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_output_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_output_rx_string      = UartRxString );
+PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_output_putc           = ets_write_char_uart );
+
+PROVIDE ( esp_rom_mbedtls_md5_starts_ret = mbedtls_md5_starts_ret );
+PROVIDE ( esp_rom_mbedtls_md5_update_ret = mbedtls_md5_update_ret );
+PROVIDE ( esp_rom_mbedtls_md5_finish_ret = mbedtls_md5_finish_ret );
+
+PROVIDE ( esp_rom_software_reset_system = software_reset );
+PROVIDE ( esp_rom_software_reset_cpu    = software_reset_cpu );
+
+PROVIDE ( esp_rom_printf   = ets_printf );
+PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
+PROVIDE ( esp_rom_delay_us = ets_delay_us );
+PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
+PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
+PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
+PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
+
+PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach );
+PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
+PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
+PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
+
+PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
+PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
+PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
+PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
+
+PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
+PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
+PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
+PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );