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Remove PeripheralMarker (#2468)

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* Redo DMA compatibility check using DmaEligible

* Remove PeripheralMarker
This commit is contained in:
Dániel Buga 2024-11-07 14:51:48 +01:00 committed by GitHub
parent 8782429e9f
commit ac819fb42f
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GPG Key ID: B5690EEEBB952194
19 changed files with 133 additions and 148 deletions
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5
esp-hal/src/dma/gdma.rs
View File

@ -475,10 +475,7 @@ pub struct ChannelCreator<const N: u8> {}
impl<CH: DmaChannel, M: Mode> Channel<'_, CH, M> {
/// Asserts that the channel is compatible with the given peripheral.
pub fn runtime_ensure_compatible<P: PeripheralMarker + DmaEligible>(
&self,
_peripheral: &PeripheralRef<'_, P>,
) {
pub fn runtime_ensure_compatible<P: DmaEligible>(&self, _peripheral: &PeripheralRef<'_, P>) {
// No runtime checks; GDMA channels are compatible with any peripheral
}
}

8
esp-hal/src/dma/mod.rs
View File

@ -949,12 +949,6 @@ macro_rules! impl_dma_eligible {
};
}
/// Marker trait
#[doc(hidden)]
pub trait PeripheralMarker {
fn peripheral(&self) -> crate::system::Peripheral;
}
#[doc(hidden)]
#[derive(Debug)]
pub struct DescriptorChain {
@ -2111,7 +2105,7 @@ pub trait RegisterAccess: crate::private::Sealed {
fn set_ext_mem_block_size(&self, size: DmaExtMemBKSize);
#[cfg(pdma)]
fn is_compatible_with(&self, peripheral: &impl PeripheralMarker) -> bool;
fn is_compatible_with(&self, peripheral: DmaPeripheral) -> bool;
/// Configure the channel.
fn configure(&self, burst_mode: bool, priority: DmaPriority) {

30
esp-hal/src/dma/pdma.rs
View File

@ -31,7 +31,7 @@ pub trait PdmaChannel: crate::private::Sealed {
fn register_block(&self) -> &Self::RegisterBlock;
fn tx_waker(&self) -> &'static AtomicWaker;
fn rx_waker(&self) -> &'static AtomicWaker;
fn is_compatible_with(&self, peripheral: &impl PeripheralMarker) -> bool;
fn is_compatible_with(&self, peripheral: DmaPeripheral) -> bool;
}
#[doc(hidden)]
@ -92,7 +92,7 @@ impl<C: PdmaChannel<RegisterBlock = SpiRegisterBlock>> RegisterAccess for SpiDma
}
}
fn is_compatible_with(&self, peripheral: &impl PeripheralMarker) -> bool {
fn is_compatible_with(&self, peripheral: DmaPeripheral) -> bool {
self.0.is_compatible_with(peripheral)
}
}
@ -236,7 +236,7 @@ impl<C: PdmaChannel<RegisterBlock = SpiRegisterBlock>> RegisterAccess for SpiDma
}
}
fn is_compatible_with(&self, peripheral: &impl PeripheralMarker) -> bool {
fn is_compatible_with(&self, peripheral: DmaPeripheral) -> bool {
self.0.is_compatible_with(peripheral)
}
}
@ -390,8 +390,8 @@ macro_rules! ImplSpiChannel {
&WAKER
}
fn is_compatible_with(&self, peripheral: &impl PeripheralMarker) -> bool {
peripheral.peripheral() == crate::system::Peripheral::[<Spi $num>]
fn is_compatible_with(&self, peripheral: DmaPeripheral) -> bool {
peripheral == DmaPeripheral::[<Spi $num>]
}
}
@ -497,7 +497,7 @@ impl<C: PdmaChannel<RegisterBlock = I2sRegisterBlock>> RegisterAccess for I2sDma
.modify(|_, w| w.check_owner().bit(check_owner.unwrap_or(true)));
}
fn is_compatible_with(&self, peripheral: &impl PeripheralMarker) -> bool {
fn is_compatible_with(&self, peripheral: DmaPeripheral) -> bool {
self.0.is_compatible_with(peripheral)
}
}
@ -653,7 +653,7 @@ impl<C: PdmaChannel<RegisterBlock = I2sRegisterBlock>> RegisterAccess for I2sDma
.modify(|_, w| w.check_owner().bit(check_owner.unwrap_or(true)));
}
fn is_compatible_with(&self, peripheral: &impl PeripheralMarker) -> bool {
fn is_compatible_with(&self, peripheral: DmaPeripheral) -> bool {
self.0.is_compatible_with(peripheral)
}
}
@ -802,8 +802,8 @@ macro_rules! ImplI2sChannel {
static WAKER: embassy_sync::waitqueue::AtomicWaker = embassy_sync::waitqueue::AtomicWaker::new();
&WAKER
}
fn is_compatible_with(&self, peripheral: &impl PeripheralMarker) -> bool {
peripheral.peripheral() == crate::system::Peripheral::[<I2s $num>]
fn is_compatible_with(&self, peripheral: DmaPeripheral) -> bool {
peripheral == DmaPeripheral::[<I2s $num>]
}
}
@ -909,11 +909,13 @@ where
C: DmaChannel,
{
/// Asserts that the channel is compatible with the given peripheral.
pub fn runtime_ensure_compatible(&self, peripheral: &PeripheralRef<'_, impl PeripheralMarker>) {
pub fn runtime_ensure_compatible(&self, peripheral: &PeripheralRef<'_, impl DmaEligible>) {
assert!(
self.tx.tx_impl.is_compatible_with(&**peripheral),
self.tx
.tx_impl
.is_compatible_with(peripheral.dma_peripheral()),
"This DMA channel is not compatible with {:?}",
peripheral.peripheral()
peripheral.dma_peripheral()
);
}
}
@ -963,7 +965,7 @@ impl PdmaChannel for AnySpiDmaChannelInner {
fn register_block(&self) -> &SpiRegisterBlock;
fn tx_waker(&self) -> &'static AtomicWaker;
fn rx_waker(&self) -> &'static AtomicWaker;
fn is_compatible_with(&self, peripheral: &impl PeripheralMarker) -> bool;
fn is_compatible_with(&self, peripheral: DmaPeripheral) -> bool;
}
}
}
@ -1017,7 +1019,7 @@ impl PdmaChannel for AnyI2sDmaChannelInner {
fn register_block(&self) -> &I2sRegisterBlock;
fn tx_waker(&self) -> &'static AtomicWaker;
fn rx_waker(&self) -> &'static AtomicWaker;
fn is_compatible_with(&self, peripheral: &impl PeripheralMarker) -> bool;
fn is_compatible_with(&self, peripheral: DmaPeripheral) -> bool;
}
}
}

15
esp-hal/src/i2c.rs
View File

@ -66,7 +66,6 @@ use procmacros::handler;
use crate::{
clock::Clocks,
dma::PeripheralMarker,
gpio::{interconnect::PeripheralOutput, InputSignal, OutputSignal, Pull},
interrupt::InterruptHandler,
peripheral::{Peripheral, PeripheralRef},
@ -1176,7 +1175,9 @@ pub(super) fn i2c1_handler() {
/// I2C Peripheral Instance
#[doc(hidden)]
pub trait Instance: Peripheral<P = Self> + PeripheralMarker + Into<AnyI2c> + 'static {
pub trait Instance: Peripheral<P = Self> + Into<AnyI2c> + 'static {
fn peripheral(&self) -> crate::system::Peripheral;
/// Returns the interrupt associated with this I2C peripheral.
fn interrupt(&self) -> crate::peripherals::Interrupt;
@ -2204,14 +2205,12 @@ fn write_fifo(register_block: &RegisterBlock, data: u8) {
}
}
impl PeripheralMarker for crate::peripherals::I2C0 {
impl Instance for crate::peripherals::I2C0 {
#[inline(always)]
fn peripheral(&self) -> crate::system::Peripheral {
crate::system::Peripheral::I2cExt0
}
}
impl Instance for crate::peripherals::I2C0 {
#[inline(always)]
fn async_handler(&self) -> InterruptHandler {
i2c0_handler
@ -2254,15 +2253,12 @@ impl Instance for crate::peripherals::I2C0 {
}
#[cfg(i2c1)]
impl PeripheralMarker for crate::peripherals::I2C1 {
impl Instance for crate::peripherals::I2C1 {
#[inline(always)]
fn peripheral(&self) -> crate::system::Peripheral {
crate::system::Peripheral::I2cExt1
}
}
#[cfg(i2c1)]
impl Instance for crate::peripherals::I2C1 {
#[inline(always)]
fn async_handler(&self) -> InterruptHandler {
i2c1_handler
@ -2322,6 +2318,7 @@ impl Instance for AnyI2c {
AnyI2cInner::I2c1(i2c) => i2c,
} {
fn interrupt(&self) -> crate::peripherals::Interrupt;
fn peripheral(&self) -> crate::system::Peripheral;
fn async_handler(&self) -> InterruptHandler;
fn scl_output_signal(&self) -> OutputSignal;
fn scl_input_signal(&self) -> InputSignal;

23
esp-hal/src/i2s/master.rs
View File

@ -773,14 +773,7 @@ mod private {
#[cfg(i2s1)]
use crate::peripherals::{i2s1::RegisterBlock, I2S1};
use crate::{
dma::{
ChannelRx,
ChannelTx,
DescriptorChain,
DmaDescriptor,
DmaEligible,
PeripheralMarker,
},
dma::{ChannelRx, ChannelTx, DescriptorChain, DmaDescriptor, DmaEligible},
gpio::{
interconnect::{PeripheralInput, PeripheralOutput},
InputSignal,
@ -911,10 +904,9 @@ mod private {
}
}
pub trait RegBlock:
Peripheral<P = Self> + PeripheralMarker + DmaEligible + Into<super::AnyI2s> + 'static
{
pub trait RegBlock: Peripheral<P = Self> + DmaEligible + Into<super::AnyI2s> + 'static {
fn register_block(&self) -> &RegisterBlock;
fn peripheral(&self) -> crate::system::Peripheral;
}
pub trait Signals: RegBlock {
@ -1609,6 +1601,10 @@ mod private {
fn register_block(&self) -> &RegisterBlock {
unsafe { &*I2S0::PTR.cast::<RegisterBlock>() }
}
fn peripheral(&self) -> crate::system::Peripheral {
crate::system::Peripheral::I2s0
}
}
impl RegisterAccessPrivate for I2S0 {
@ -1713,6 +1709,10 @@ mod private {
fn register_block(&self) -> &RegisterBlock {
unsafe { &*I2S1::PTR.cast::<RegisterBlock>() }
}
fn peripheral(&self) -> crate::system::Peripheral {
crate::system::Peripheral::I2s1
}
}
#[cfg(i2s1)]
@ -1786,6 +1786,7 @@ mod private {
super::AnyI2sInner::I2s1(i2s) => i2s,
} {
fn register_block(&self) -> &RegisterBlock;
fn peripheral(&self) -> crate::system::Peripheral;
}
}
}

15
esp-hal/src/i2s/parallel.rs
View File

@ -52,7 +52,6 @@ use crate::{
DmaError,
DmaPeripheral,
DmaTxBuffer,
PeripheralMarker,
Tx,
},
gpio::{
@ -424,10 +423,9 @@ fn calculate_clock(sample_rate: impl Into<fugit::HertzU32>, data_bits: u8) -> I2
}
#[doc(hidden)]
pub trait Instance:
Peripheral<P = Self> + PeripheralMarker + DmaEligible + Into<AnyI2s> + 'static
{
pub trait Instance: Peripheral<P = Self> + DmaEligible + Into<AnyI2s> + 'static {
fn register_block(&self) -> &RegisterBlock;
fn peripheral(&self) -> crate::system::Peripheral;
fn ws_signal(&self) -> OutputSignal;
fn data_out_signal(&self, i: usize, bits: u8) -> OutputSignal;
@ -614,6 +612,10 @@ impl Instance for I2S0 {
unsafe { &*I2S0::PTR.cast::<RegisterBlock>() }
}
fn peripheral(&self) -> crate::system::Peripheral {
crate::system::Peripheral::I2s0
}
fn ws_signal(&self) -> OutputSignal {
OutputSignal::I2S0O_WS
}
@ -661,6 +663,10 @@ impl Instance for I2S1 {
unsafe { &*I2S1::PTR.cast::<RegisterBlock>() }
}
fn peripheral(&self) -> crate::system::Peripheral {
crate::system::Peripheral::I2s1
}
fn ws_signal(&self) -> OutputSignal {
OutputSignal::I2S1O_WS
}
@ -729,6 +735,7 @@ impl Instance for AnyI2s {
AnyI2sInner::I2s1(i2s) => i2s,
} {
fn register_block(&self) -> &RegisterBlock;
fn peripheral(&self) -> crate::system::Peripheral;
fn ws_signal(&self) -> OutputSignal;
fn data_out_signal(&self, i: usize, bits: u8) -> OutputSignal ;
}

12
esp-hal/src/macros.rs
View File

@ -87,18 +87,6 @@ macro_rules! any_peripheral {
$vis struct $name([< $name Inner >]);
impl $crate::private::Sealed for $name {}
impl $crate::dma::PeripheralMarker for $name {
#[inline(always)]
fn peripheral(&self) -> $crate::system::Peripheral {
match &self.0 {
$(
$(#[cfg($variant_meta)])*
[<$name Inner>]::$variant(inner) => inner.peripheral(),
)*
}
}
}
impl $crate::peripheral::Peripheral for $name {
type P = $name;

20
esp-hal/src/peripheral.rs
View File

@ -210,10 +210,7 @@ mod peripheral_macros {
/// Creates a new `Peripherals` struct and its associated methods.
///
/// The macro has a few fields doing different things, in the form of
/// `[first] second <= third (fourth)`.
/// - The first field is the name of the `Peripherals` enum variant. This is
/// optional and used to create `PeripheralMarker` implementations for
/// DMA-eligible peripherals.
/// `second <= third (fourth)`.
/// - The second field is the name of the peripheral, as it appears in the
/// `Peripherals` struct.
/// - The third field is the name of the peripheral as it appears in the
@ -226,7 +223,7 @@ mod peripheral_macros {
macro_rules! peripherals {
(
$(
$([$enum_variant:ident])? $name:ident <= $from_pac:tt $(($($interrupt:ident),*))?
$name:ident <= $from_pac:tt $(($($interrupt:ident),*))?
), *$(,)?
) => {
@ -234,7 +231,7 @@ mod peripheral_macros {
mod peripherals {
pub use super::pac::*;
$(
$crate::create_peripheral!($([$enum_variant])? $name <= $from_pac);
$crate::create_peripheral!($name <= $from_pac);
)*
}
@ -327,7 +324,7 @@ mod peripheral_macros {
#[macro_export]
/// Macro to create a peripheral structure.
macro_rules! create_peripheral {
($([$enum_variant:ident])? $name:ident <= virtual) => {
($name:ident <= virtual) => {
#[derive(Debug)]
#[allow(non_camel_case_types)]
/// Represents a virtual peripheral with no associated hardware.
@ -358,15 +355,6 @@ mod peripheral_macros {
}
impl $crate::private::Sealed for $name {}
$(
impl $crate::dma::PeripheralMarker for $crate::peripherals::$name {
#[inline(always)]
fn peripheral(&self) -> $crate::system::Peripheral {
$crate::system::Peripheral::$enum_variant
}
}
)?
};
($([$enum_variant:ident])? $name:ident <= $base:ident) => {

16
esp-hal/src/soc/esp32/peripherals.rs
View File

@ -38,8 +38,8 @@ crate::peripherals! {
HINF <= HINF,
I2C0 <= I2C0,
I2C1 <= I2C1,
[I2s0] I2S0 <= I2S0 (I2S0),
[I2s1] I2S1 <= I2S1 (I2S1),
I2S0 <= I2S0 (I2S0),
I2S1 <= I2S1 (I2S1),
IO_MUX <= IO_MUX,
LEDC <= LEDC,
MCPWM0 <= MCPWM0,
@ -60,17 +60,17 @@ crate::peripherals! {
SLCHOST <= SLCHOST,
SPI0 <= SPI0,
SPI1 <= SPI1,
[Spi2] SPI2 <= SPI2 (SPI2_DMA, SPI2),
[Spi3] SPI3 <= SPI3 (SPI3_DMA, SPI3),
SPI2 <= SPI2 (SPI2_DMA, SPI2),
SPI3 <= SPI3 (SPI3_DMA, SPI3),
SYSTEM <= DPORT,
SW_INTERRUPT <= virtual,
TIMG0 <= TIMG0,
TIMG1 <= TIMG1,
TOUCH <= virtual,
[Twai0] TWAI0 <= TWAI0,
[Uart0] UART0 <= UART0,
[Uart1] UART1 <= UART1,
[Uart2] UART2 <= UART2,
TWAI0 <= TWAI0,
UART0 <= UART0,
UART1 <= UART1,
UART2 <= UART2,
UHCI0 <= UHCI0,
UHCI1 <= UHCI1,
WIFI <= virtual,

6
esp-hal/src/soc/esp32c2/peripherals.rs
View File

@ -40,13 +40,13 @@ crate::peripherals! {
SHA <= SHA,
SPI0 <= SPI0,
SPI1 <= SPI1,
[Spi2] SPI2 <= SPI2 (SPI2),
SPI2 <= SPI2 (SPI2),
SYSTEM <= SYSTEM,
SYSTIMER <= SYSTIMER,
SW_INTERRUPT <= virtual,
TIMG0 <= TIMG0,
[Uart0] UART0 <= UART0,
[Uart1] UART1 <= UART1,
UART0 <= UART0,
UART1 <= UART1,
WIFI <= virtual,
XTS_AES <= XTS_AES,
MEM2MEM1 <= virtual,

10
esp-hal/src/soc/esp32c3/peripherals.rs
View File

@ -34,7 +34,7 @@ crate::peripherals! {
GPIO_SD <= GPIO_SD,
HMAC <= HMAC,
I2C0 <= I2C0,
[I2s0] I2S0 <= I2S0 (I2S0),
I2S0 <= I2S0 (I2S0),
INTERRUPT_CORE0 <= INTERRUPT_CORE0,
IO_MUX <= IO_MUX,
LEDC <= LEDC,
@ -47,15 +47,15 @@ crate::peripherals! {
SHA <= SHA,
SPI0 <= SPI0,
SPI1 <= SPI1,
[Spi2] SPI2 <= SPI2 (SPI2),
SPI2 <= SPI2 (SPI2),
SYSTEM <= SYSTEM,
SYSTIMER <= SYSTIMER,
SW_INTERRUPT <= virtual,
TIMG0 <= TIMG0,
TIMG1 <= TIMG1,
[Twai0] TWAI0 <= TWAI0,
[Uart0] UART0 <= UART0,
[Uart1] UART1 <= UART1,
TWAI0 <= TWAI0,
UART0 <= UART0,
UART1 <= UART1,
UHCI0 <= UHCI0,
UHCI1 <= UHCI1,
USB_DEVICE <= USB_DEVICE,

12
esp-hal/src/soc/esp32c6/peripherals.rs
View File

@ -37,7 +37,7 @@ crate::peripherals! {
HP_APM <= HP_APM,
HP_SYS <= HP_SYS,
I2C0 <= I2C0,
[I2s0] I2S0 <= I2S0 (I2S0),
I2S0 <= I2S0 (I2S0),
IEEE802154 <= IEEE802154,
INTERRUPT_CORE0 <= INTERRUPT_CORE0,
INTPRI <= INTPRI,
@ -73,7 +73,7 @@ crate::peripherals! {
SOC_ETM <= SOC_ETM,
SPI0 <= SPI0,
SPI1 <= SPI1,
[Spi2] SPI2 <= SPI2 (SPI2),
SPI2 <= SPI2 (SPI2),
SYSTEM <= PCR,
SYSTIMER <= SYSTIMER,
SW_INTERRUPT <= virtual,
@ -81,10 +81,10 @@ crate::peripherals! {
TIMG0 <= TIMG0,
TIMG1 <= TIMG1,
TRACE0 <= TRACE,
[Twai0] TWAI0 <= TWAI0,
[Twai1] TWAI1 <= TWAI1,
[Uart0] UART0 <= UART0,
[Uart1] UART1 <= UART1,
TWAI0 <= TWAI0,
TWAI1 <= TWAI1,
UART0 <= UART0,
UART1 <= UART1,
UHCI0 <= UHCI0,
USB_DEVICE <= USB_DEVICE,
WIFI <= virtual,

10
esp-hal/src/soc/esp32h2/peripherals.rs
View File

@ -35,7 +35,7 @@ crate::peripherals! {
HP_SYS <= HP_SYS,
I2C0 <= I2C0,
I2C1 <= I2C1,
[I2s0] I2S0 <= I2S0 (I2S0),
I2S0 <= I2S0 (I2S0),
IEEE802154 <= IEEE802154,
INTERRUPT_CORE0 <= INTERRUPT_CORE0,
INTPRI <= INTPRI,
@ -65,7 +65,7 @@ crate::peripherals! {
SOC_ETM <= SOC_ETM,
SPI0 <= SPI0,
SPI1 <= SPI1,
[Spi2] SPI2 <= SPI2 (SPI2),
SPI2 <= SPI2 (SPI2),
SYSTEM <= PCR,
SYSTIMER <= SYSTIMER,
SW_INTERRUPT <= virtual,
@ -73,9 +73,9 @@ crate::peripherals! {
TIMG0 <= TIMG0,
TIMG1 <= TIMG1,
TRACE0 <= TRACE,
[Twai0] TWAI0 <= TWAI0,
[Uart0] UART0 <= UART0,
[Uart1] UART1 <= UART1,
TWAI0 <= TWAI0,
UART0 <= UART0,
UART1 <= UART1,
UHCI0 <= UHCI0,
USB_DEVICE <= USB_DEVICE,
MEM2MEM1 <= virtual,

12
esp-hal/src/soc/esp32s2/peripherals.rs
View File

@ -35,7 +35,7 @@ crate::peripherals! {
HMAC <= HMAC,
I2C0 <= I2C0,
I2C1 <= I2C1,
[I2s0] I2S0 <= I2S0 (I2S0),
I2S0 <= I2S0 (I2S0),
INTERRUPT_CORE0 <= INTERRUPT_CORE0,
IO_MUX <= IO_MUX,
LEDC <= LEDC,
@ -52,17 +52,17 @@ crate::peripherals! {
SHA <= SHA,
SPI0 <= SPI0,
SPI1 <= SPI1,
[Spi2] SPI2 <= SPI2 (SPI2_DMA, SPI2),
[Spi3] SPI3 <= SPI3 (SPI3_DMA, SPI3),
SPI2 <= SPI2 (SPI2_DMA, SPI2),
SPI3 <= SPI3 (SPI3_DMA, SPI3),
SYSCON <= SYSCON,
SYSTEM <= SYSTEM,
SYSTIMER <= SYSTIMER,
SW_INTERRUPT <= virtual,
TIMG0 <= TIMG0,
TIMG1 <= TIMG1,
[Twai0] TWAI0 <= TWAI0,
[Uart0] UART0 <= UART0,
[Uart1] UART1 <= UART1,
TWAI0 <= TWAI0,
UART0 <= UART0,
UART1 <= UART1,
UHCI0 <= UHCI0,
ULP_RISCV_CORE <= virtual,
USB0 <= USB0,

18
esp-hal/src/soc/esp32s3/peripherals.rs
View File

@ -36,12 +36,12 @@ crate::peripherals! {
HMAC <= HMAC,
I2C0 <= I2C0,
I2C1 <= I2C1,
[I2s0] I2S0 <= I2S0 (I2S0),
[I2s1] I2S1 <= I2S1 (I2S1),
I2S0 <= I2S0 (I2S0),
I2S1 <= I2S1 (I2S1),
INTERRUPT_CORE0 <= INTERRUPT_CORE0,
INTERRUPT_CORE1 <= INTERRUPT_CORE1,
IO_MUX <= IO_MUX,
[LcdCam] LCD_CAM <= LCD_CAM,
LCD_CAM <= LCD_CAM,
LEDC <= LEDC,
LPWR <= RTC_CNTL,
PCNT <= PCNT,
@ -59,17 +59,17 @@ crate::peripherals! {
SHA <= SHA,
SPI0 <= SPI0,
SPI1 <= SPI1,
[Spi2] SPI2 <= SPI2 (SPI2),
[Spi3] SPI3 <= SPI3 (SPI3),
SPI2 <= SPI2 (SPI2),
SPI3 <= SPI3 (SPI3),
SYSTEM <= SYSTEM,
SYSTIMER <= SYSTIMER,
SW_INTERRUPT <= virtual,
TIMG0 <= TIMG0,
TIMG1 <= TIMG1,
[Twai0] TWAI0 <= TWAI0,
[Uart0] UART0 <= UART0,
[Uart1] UART1 <= UART1,
[Uart2] UART2 <= UART2,
TWAI0 <= TWAI0,
UART0 <= UART0,
UART1 <= UART1,
UART2 <= UART2,
UHCI0 <= UHCI0,
UHCI1 <= UHCI1,
ULP_RISCV_CORE <= virtual,

23
esp-hal/src/spi/master.rs
View File

@ -80,16 +80,7 @@ use procmacros::ram;
use super::{DmaError, Error, SpiBitOrder, SpiDataMode, SpiMode};
use crate::{
clock::Clocks,
dma::{
Channel,
DmaChannelConvert,
DmaEligible,
DmaRxBuffer,
DmaTxBuffer,
PeripheralMarker,
Rx,
Tx,
},
dma::{Channel, DmaChannelConvert, DmaEligible, DmaRxBuffer, DmaTxBuffer, Rx, Tx},
gpio::{interconnect::PeripheralOutput, InputSignal, NoPin, OutputSignal},
interrupt::InterruptHandler,
peripheral::{Peripheral, PeripheralRef},
@ -589,8 +580,8 @@ where
_mode: PhantomData,
};
PeripheralClockControl::enable(this.spi.peripheral());
PeripheralClockControl::reset(this.spi.peripheral());
PeripheralClockControl::enable(this.driver().peripheral);
PeripheralClockControl::reset(this.driver().peripheral);
this.driver().init();
unwrap!(this.apply_config(&config)); // FIXME: update based on the resolution of https://github.com/esp-rs/esp-hal/issues/2416
@ -2154,9 +2145,7 @@ mod ehal1 {
}
/// SPI peripheral instance.
pub trait Instance:
private::Sealed + PeripheralMarker + Into<AnySpi> + DmaEligible + 'static
{
pub trait Instance: private::Sealed + Into<AnySpi> + DmaEligible + 'static {
/// Returns the peripheral data describing this SPI instance.
fn info(&self) -> &'static Info;
}
@ -2172,6 +2161,9 @@ pub struct Info {
/// Use [Self::register_block] to access the register block.
pub register_block: *const RegisterBlock,
/// The system peripheral marker.
pub peripheral: crate::system::Peripheral,
/// Interrupt for this SPI instance.
pub interrupt: crate::peripherals::Interrupt,
@ -3005,6 +2997,7 @@ macro_rules! spi_instance {
fn info(&self) -> &'static Info {
static INFO: Info = Info {
register_block: crate::peripherals::[<SPI $num>]::PTR,
peripheral: crate::system::Peripheral::[<Spi $num>],
interrupt: crate::peripherals::Interrupt::[<SPI $num>],
sclk: OutputSignal::$sclk,
mosi: OutputSignal::$mosi,

12
esp-hal/src/spi/slave.rs
View File

@ -75,7 +75,7 @@ use core::marker::PhantomData;
use super::{Error, SpiMode};
use crate::{
dma::{DmaChannelConvert, DmaEligible, PeripheralMarker},
dma::{DmaChannelConvert, DmaEligible},
gpio::{
interconnect::{PeripheralInput, PeripheralOutput},
InputSignal,
@ -167,8 +167,8 @@ where
_mode: PhantomData,
};
PeripheralClockControl::reset(spi.spi.peripheral());
PeripheralClockControl::enable(spi.spi.peripheral());
PeripheralClockControl::reset(spi.spi.info().peripheral);
PeripheralClockControl::enable(spi.spi.info().peripheral);
spi.spi.info().init();
spi.spi.info().set_data_mode(mode, false);
@ -572,7 +572,7 @@ pub mod dma {
}
/// SPI peripheral instance.
pub trait Instance: Peripheral<P = Self> + Into<AnySpi> + PeripheralMarker + 'static {
pub trait Instance: Peripheral<P = Self> + Into<AnySpi> + 'static {
/// Returns the peripheral data describing this SPI instance.
fn info(&self) -> &'static Info;
}
@ -592,6 +592,9 @@ pub struct Info {
/// Use [Self::register_block] to access the register block.
pub register_block: *const RegisterBlock,
/// System peripheral marker.
pub peripheral: crate::system::Peripheral,
/// SCLK signal.
pub sclk: InputSignal,
@ -794,6 +797,7 @@ macro_rules! spi_instance {
fn info(&self) -> &'static Info {
static INFO: Info = Info {
register_block: crate::peripherals::[<SPI $num>]::PTR,
peripheral: crate::system::Peripheral::[<Spi $num>],
sclk: InputSignal::$sclk,
mosi: InputSignal::$mosi,
miso: OutputSignal::$miso,

15
esp-hal/src/twai/mod.rs
View File

@ -129,7 +129,6 @@ use core::marker::PhantomData;
use self::filter::{Filter, FilterType};
use crate::{
dma::PeripheralMarker,
gpio::{
interconnect::{PeripheralInput, PeripheralOutput},
InputSignal,
@ -1472,10 +1471,13 @@ where
}
/// TWAI peripheral instance.
pub trait Instance: Peripheral<P = Self> + PeripheralMarker + Into<AnyTwai> + 'static {
pub trait Instance: Peripheral<P = Self> + Into<AnyTwai> + 'static {
/// The identifier number for this TWAI instance.
fn number(&self) -> usize;
/// Returns the system peripheral marker for this instance.
fn peripheral(&self) -> crate::system::Peripheral;
/// Input signal.
fn input_signal(&self) -> InputSignal;
/// Output signal.
@ -1660,6 +1662,10 @@ impl Instance for crate::peripherals::TWAI0 {
0
}
fn peripheral(&self) -> crate::system::Peripheral {
crate::system::Peripheral::Twai0
}
fn input_signal(&self) -> InputSignal {
cfg_if::cfg_if! {
if #[cfg(any(esp32, esp32c3, esp32s2, esp32s3))] {
@ -1705,6 +1711,10 @@ impl Instance for crate::peripherals::TWAI1 {
1
}
fn peripheral(&self) -> crate::system::Peripheral {
crate::system::Peripheral::Twai1
}
fn input_signal(&self) -> InputSignal {
InputSignal::TWAI1_RX
}
@ -1751,6 +1761,7 @@ impl Instance for AnyTwai {
AnyTwaiInner::Twai1(twai) => twai,
} {
fn number(&self) -> usize;
fn peripheral(&self) -> crate::system::Peripheral;
fn input_signal(&self) -> InputSignal;
fn output_signal(&self) -> OutputSignal;
fn interrupt(&self) -> crate::peripherals::Interrupt;

19
esp-hal/src/uart.rs
View File

@ -135,7 +135,6 @@ use portable_atomic::AtomicBool;
use crate::{
clock::Clocks,
dma::PeripheralMarker,
gpio::{
interconnect::{PeripheralInput, PeripheralOutput},
InputSignal,
@ -1211,7 +1210,7 @@ where
}
};
PeripheralClockControl::enable(self.tx.uart.peripheral());
PeripheralClockControl::enable(self.tx.uart.info().peripheral);
self.uart_peripheral_reset();
self.rx.disable_rx_interrupts();
self.tx.disable_tx_interrupts();
@ -1263,7 +1262,7 @@ where
}
rst_core(self.register_block(), true);
PeripheralClockControl::reset(self.tx.uart.peripheral());
PeripheralClockControl::reset(self.tx.uart.info().peripheral);
rst_core(self.register_block(), false);
}
}
@ -2156,7 +2155,7 @@ pub mod lp_uart {
}
/// UART Peripheral Instance
pub trait Instance: Peripheral<P = Self> + PeripheralMarker + Into<AnyUart> + 'static {
pub trait Instance: Peripheral<P = Self> + Into<AnyUart> + 'static {
/// Returns the peripheral data and state describing this UART instance.
fn parts(&self) -> (&'static Info, &'static State);
@ -2181,6 +2180,9 @@ pub struct Info {
/// Use [Self::register_block] to access the register block.
pub register_block: *const RegisterBlock,
/// The system peripheral marker.
pub peripheral: crate::system::Peripheral,
/// Interrupt handler for the asynchronous operations of this UART instance.
pub async_handler: InterruptHandler,
@ -2586,7 +2588,7 @@ impl PartialEq for Info {
unsafe impl Sync for Info {}
macro_rules! impl_instance {
($inst:ident, $txd:ident, $rxd:ident, $cts:ident, $rts:ident) => {
($inst:ident, $peri:ident, $txd:ident, $rxd:ident, $cts:ident, $rts:ident) => {
impl Instance for crate::peripherals::$inst {
fn parts(&self) -> (&'static Info, &'static State) {
#[crate::macros::handler]
@ -2603,6 +2605,7 @@ macro_rules! impl_instance {
static PERIPHERAL: Info = Info {
register_block: crate::peripherals::$inst::ptr(),
peripheral: crate::system::Peripheral::$peri,
async_handler: irq_handler,
interrupt: Interrupt::$inst,
tx_signal: OutputSignal::$txd,
@ -2616,10 +2619,10 @@ macro_rules! impl_instance {
};
}
impl_instance!(UART0, U0TXD, U0RXD, U0CTS, U0RTS);
impl_instance!(UART1, U1TXD, U1RXD, U1CTS, U1RTS);
impl_instance!(UART0, Uart0, U0TXD, U0RXD, U0CTS, U0RTS);
impl_instance!(UART1, Uart1, U1TXD, U1RXD, U1CTS, U1RTS);
#[cfg(uart2)]
impl_instance!(UART2, U2TXD, U2RXD, U2CTS, U2RTS);
impl_instance!(UART2, Uart2, U2TXD, U2RXD, U2CTS, U2RTS);
crate::any_peripheral! {
/// Any UART peripheral.