Add LCD_CAM Camera driver (#1483)
* Add LCD_CAM Camera driver * comments * 16 bit * Expose most config * Module documentation * Remove GPIO generics * Fix breaking change * Remove Pin generics from Camera type * Fix unsafe * Another breaking change * fmt
This commit is contained in:
Dominic Fischer
GitHub
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157ac17be1
commit
d5d3f1f46b
@ -12,6 +12,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- ESP32-PICO-V3-02: Initial support (#1155)
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- `time::current_time` API (#1503)
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- ESP32-S3: Add LCD_CAM Camera driver (#1483)
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### Fixed
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@ -1,5 +1,581 @@
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use crate::{peripheral::PeripheralRef, peripherals::LCD_CAM};
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//! # Camera - Master or Slave Mode
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//!
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//! ## Overview
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//! The LCD_CAM peripheral supports receiving 8/16 bit DVP signals in either
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//! master or slave mode. In master mode, the peripheral provides the master
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//! clock to drive the camera, in slave mode it does not. This is configured
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//! with the `with_master_clock` method on the camera driver. The driver (due to
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//! the peripheral) mandates DMA (Direct Memory Access) for efficient data
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//! transfer.
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//!
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//! ## Examples
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//! Following code shows how to receive some bytes from an 8 bit DVP stream in
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//! master mode.
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//!
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//! ```no_run
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//! let mclk_pin = io.pins.gpio15;
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//! let vsync_pin = io.pins.gpio6;
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//! let href_pin = io.pins.gpio7;
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//! let pclk_pin = io.pins.gpio13;
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//! let data_pins = RxEightBits::new(
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//! io.pins.gpio11,
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//! io.pins.gpio9,
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//! io.pins.gpio8,
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//! io.pins.gpio10,
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//! io.pins.gpio12,
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//! io.pins.gpio18,
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//! io.pins.gpio17,
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//! io.pins.gpio16,
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//! );
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//!
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//! let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
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//! let mut camera = Camera::new(lcd_cam.cam, channel.rx, data_pins, 20u32.MHz(), &clocks)
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//! .with_master_clock(mclk_pin) // Remove this for slave mode.
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//! .with_ctrl_pins(vsync_pin, href_pin, pclk_pin);
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//! ```
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use core::mem::size_of;
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use embedded_dma::WriteBuffer;
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use fugit::HertzU32;
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use crate::{
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clock::Clocks,
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dma::{
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ChannelRx,
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ChannelTypes,
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DmaError,
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DmaPeripheral,
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DmaTransfer,
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LcdCamPeripheral,
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RegisterAccess,
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Rx,
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RxChannel,
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RxPrivate,
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},
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gpio::{InputPin, InputSignal, OutputPin, OutputSignal},
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i2s::Error,
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lcd_cam::{cam::private::RxPins, private::calculate_clkm, BitOrder, ByteOrder},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::LCD_CAM,
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};
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/// Generation of GDMA SUC EOF
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum EofMode {
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/// Generate GDMA SUC EOF by data byte length
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ByteLen,
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/// Generate GDMA SUC EOF by the vsync signal
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VsyncSignal,
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}
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/// Vsync Filter Threshold
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum VsyncFilterThreshold {
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One,
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Two,
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Three,
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Four,
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Five,
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Six,
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Seven,
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Eight,
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}
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pub struct Cam<'d> {
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pub(crate) _lcd_cam: PeripheralRef<'d, LCD_CAM>,
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pub(crate) lcd_cam: PeripheralRef<'d, LCD_CAM>,
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}
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pub struct Camera<'d, RX> {
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lcd_cam: PeripheralRef<'d, LCD_CAM>,
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rx_channel: RX,
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// 1 or 2
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bus_width: usize,
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}
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impl<'d, T, R> Camera<'d, ChannelRx<'d, T, R>>
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where
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T: RxChannel<R>,
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R: ChannelTypes + RegisterAccess,
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R::P: LcdCamPeripheral,
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{
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pub fn new<P: RxPins>(
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cam: Cam<'d>,
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mut channel: ChannelRx<'d, T, R>,
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_pins: P,
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frequency: HertzU32,
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clocks: &Clocks,
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) -> Self {
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let lcd_cam = cam.lcd_cam;
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let (i, divider) = calculate_clkm(
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frequency.to_Hz() as _,
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&[
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clocks.xtal_clock.to_Hz() as _,
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clocks.cpu_clock.to_Hz() as _,
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clocks.crypto_pwm_clock.to_Hz() as _,
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],
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);
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lcd_cam.cam_ctrl().write(|w| {
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// Force enable the clock for all configuration registers.
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unsafe {
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w.cam_clk_sel()
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.bits((i + 1) as _)
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.cam_clkm_div_num()
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.bits(divider.div_num as _)
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.cam_clkm_div_b()
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.bits(divider.div_b as _)
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.cam_clkm_div_a()
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.bits(divider.div_a as _)
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.cam_vsync_filter_thres()
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.bits(0)
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.cam_vs_eof_en()
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.set_bit()
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.cam_line_int_en()
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.clear_bit()
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.cam_stop_en()
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.clear_bit()
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}
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});
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lcd_cam.cam_ctrl1().write(|w| unsafe {
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w.cam_vh_de_mode_en()
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.set_bit()
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.cam_rec_data_bytelen()
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.bits(0)
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.cam_line_int_num()
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.bits(0)
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.cam_vsync_filter_en()
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.clear_bit()
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.cam_2byte_en()
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.clear_bit()
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.cam_clk_inv()
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.clear_bit()
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.cam_de_inv()
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.clear_bit()
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.cam_hsync_inv()
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.clear_bit()
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.cam_vsync_inv()
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.clear_bit()
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});
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lcd_cam
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.cam_rgb_yuv()
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.write(|w| w.cam_conv_bypass().clear_bit());
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lcd_cam.cam_ctrl().modify(|_, w| w.cam_update().set_bit());
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channel.init_channel();
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Self {
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lcd_cam,
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rx_channel: channel,
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bus_width: P::BUS_WIDTH,
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}
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}
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}
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impl<'d, RX: Rx> Camera<'d, RX> {
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pub fn set_byte_order(&mut self, byte_order: ByteOrder) -> &mut Self {
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self.lcd_cam
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.cam_ctrl()
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.modify(|_, w| w.cam_byte_order().bit(byte_order != ByteOrder::default()));
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self
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}
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pub fn set_bit_order(&mut self, bit_order: BitOrder) -> &mut Self {
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self.lcd_cam
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.cam_ctrl()
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.modify(|_, w| w.cam_bit_order().bit(bit_order != BitOrder::default()));
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self
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}
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pub fn set_vsync_filter(&mut self, threshold: Option<VsyncFilterThreshold>) -> &mut Self {
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if let Some(threshold) = threshold {
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let value = match threshold {
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VsyncFilterThreshold::One => 0,
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VsyncFilterThreshold::Two => 1,
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VsyncFilterThreshold::Three => 2,
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VsyncFilterThreshold::Four => 3,
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VsyncFilterThreshold::Five => 4,
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VsyncFilterThreshold::Six => 5,
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VsyncFilterThreshold::Seven => 6,
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VsyncFilterThreshold::Eight => 7,
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};
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self.lcd_cam
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.cam_ctrl()
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.modify(|_, w| unsafe { w.cam_vsync_filter_thres().bits(value) });
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self.lcd_cam
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.cam_ctrl1()
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.modify(|_, w| w.cam_vsync_filter_en().set_bit());
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} else {
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self.lcd_cam
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.cam_ctrl1()
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.modify(|_, w| w.cam_vsync_filter_en().clear_bit());
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}
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self
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}
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pub fn with_master_clock<MCLK: OutputPin>(self, mclk: impl Peripheral<P = MCLK> + 'd) -> Self {
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crate::into_ref!(mclk);
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mclk.set_to_push_pull_output()
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.connect_peripheral_to_output(OutputSignal::CAM_CLK);
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self
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}
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pub fn with_ctrl_pins<VSYNC: InputPin, HENABLE: InputPin, PCLK: InputPin>(
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self,
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vsync: impl Peripheral<P = VSYNC> + 'd,
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h_enable: impl Peripheral<P = HENABLE> + 'd,
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pclk: impl Peripheral<P = PCLK> + 'd,
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) -> Self {
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crate::into_ref!(vsync);
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crate::into_ref!(h_enable);
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crate::into_ref!(pclk);
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vsync
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.set_to_input()
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.connect_input_to_peripheral(InputSignal::CAM_V_SYNC);
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h_enable
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.set_to_input()
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.connect_input_to_peripheral(InputSignal::CAM_H_ENABLE);
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pclk.set_to_input()
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.connect_input_to_peripheral(InputSignal::CAM_PCLK);
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self
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}
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// Reset Camera control unit and Async Rx FIFO
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fn reset_unit_and_fifo(&self) {
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self.lcd_cam
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.cam_ctrl1()
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.modify(|_, w| w.cam_reset().set_bit());
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self.lcd_cam
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.cam_ctrl1()
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.modify(|_, w| w.cam_reset().clear_bit());
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self.lcd_cam
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.cam_ctrl1()
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.modify(|_, w| w.cam_afifo_reset().set_bit());
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self.lcd_cam
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.cam_ctrl1()
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.modify(|_, w| w.cam_afifo_reset().clear_bit());
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}
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// Start the Camera unit to listen for incoming DVP stream.
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fn start_unit(&self) {
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self.lcd_cam
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.cam_ctrl()
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.modify(|_, w| w.cam_update().set_bit());
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self.lcd_cam
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.cam_ctrl1()
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.modify(|_, w| w.cam_start().set_bit());
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}
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fn start_dma<RXBUF: WriteBuffer>(
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&mut self,
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circular: bool,
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buf: &mut RXBUF,
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) -> Result<(), DmaError> {
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let (ptr, len) = unsafe { buf.write_buffer() };
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assert_eq!(self.bus_width, size_of::<RXBUF::Word>());
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unsafe {
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self.rx_channel.prepare_transfer_without_start(
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circular,
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DmaPeripheral::LcdCam,
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ptr as _,
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len * size_of::<RXBUF::Word>(),
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)?;
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}
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self.rx_channel.start_transfer()
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}
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pub fn read_dma<'t, RXBUF: WriteBuffer>(
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&'t mut self,
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buf: &'t mut RXBUF,
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) -> Result<Transfer<'t, 'd, RX>, DmaError> {
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self.reset_unit_and_fifo();
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// Start DMA to receive incoming transfer.
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self.start_dma(false, buf)?;
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self.start_unit();
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Ok(Transfer { instance: self })
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}
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pub fn read_dma_circular<'t, RXBUF: WriteBuffer>(
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&'t mut self,
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buf: &'t mut RXBUF,
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) -> Result<Transfer<'t, 'd, RX>, DmaError> {
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self.reset_unit_and_fifo();
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// Start DMA to receive incoming transfer.
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self.start_dma(true, buf)?;
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self.start_unit();
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Ok(Transfer { instance: self })
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}
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}
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/// An in-progress transfer
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#[must_use]
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pub struct Transfer<'t, 'd, RX: Rx> {
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instance: &'t mut Camera<'d, RX>,
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}
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impl<'t, 'd, RX: Rx> Transfer<'t, 'd, RX> {
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/// Amount of bytes which can be popped
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pub fn available(&mut self) -> usize {
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self.instance.rx_channel.available()
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}
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pub fn pop(&mut self, data: &mut [u8]) -> Result<usize, Error> {
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Ok(self.instance.rx_channel.pop(data)?)
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}
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/// Wait for the DMA transfer to complete.
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/// Length of the received data is returned
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#[allow(clippy::type_complexity)]
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pub fn wait_receive(self, dst: &mut [u8]) -> Result<usize, (DmaError, usize)> {
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// Wait for DMA transfer to finish.
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while !self.is_done() {}
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let len = self
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.instance
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.rx_channel
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.drain_buffer(dst)
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.map_err(|e| (e, 0))?;
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if self.instance.rx_channel.has_error() {
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Err((DmaError::DescriptorError, len))
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} else {
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Ok(len)
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}
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}
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}
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impl<'t, 'd, RX: Rx> DmaTransfer for Transfer<'t, 'd, RX> {
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fn wait(self) -> Result<(), DmaError> {
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// Wait for DMA transfer to finish.
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while !self.is_done() {}
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let ch = &self.instance.rx_channel;
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if ch.has_error() {
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Err(DmaError::DescriptorError)
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} else {
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Ok(())
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}
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}
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fn is_done(&self) -> bool {
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let ch = &self.instance.rx_channel;
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// Wait for IN_SUC_EOF (i.e. VSYNC)
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ch.is_done() ||
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// Or for IN_DSCR_EMPTY (i.e. No more buffer space)
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ch.has_dscr_empty_error() ||
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// Or for IN_DSCR_ERR (i.e. bad descriptor)
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ch.has_error()
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}
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}
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impl<'t, 'd, RX: Rx> Drop for Transfer<'t, 'd, RX> {
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fn drop(&mut self) {
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self.instance
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.lcd_cam
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.cam_ctrl1()
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.modify(|_, w| w.cam_start().clear_bit());
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// TODO: Stop DMA?? self.instance.rx_channel.stop_transfer();
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}
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}
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pub struct RxEightBits {
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_pins: (),
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}
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impl RxEightBits {
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#[allow(clippy::too_many_arguments)]
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pub fn new<'d, P0, P1, P2, P3, P4, P5, P6, P7>(
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pin_0: impl Peripheral<P = P0> + 'd,
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pin_1: impl Peripheral<P = P1> + 'd,
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pin_2: impl Peripheral<P = P2> + 'd,
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pin_3: impl Peripheral<P = P3> + 'd,
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pin_4: impl Peripheral<P = P4> + 'd,
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pin_5: impl Peripheral<P = P5> + 'd,
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pin_6: impl Peripheral<P = P6> + 'd,
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pin_7: impl Peripheral<P = P7> + 'd,
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) -> Self
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where
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P0: InputPin,
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P1: InputPin,
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P2: InputPin,
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P3: InputPin,
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P4: InputPin,
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P5: InputPin,
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P6: InputPin,
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P7: InputPin,
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{
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crate::into_ref!(pin_0);
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crate::into_ref!(pin_1);
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crate::into_ref!(pin_2);
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crate::into_ref!(pin_3);
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crate::into_ref!(pin_4);
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crate::into_ref!(pin_5);
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crate::into_ref!(pin_6);
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crate::into_ref!(pin_7);
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pin_0
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.set_to_input()
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.connect_input_to_peripheral(InputSignal::CAM_DATA_0);
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pin_1
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.set_to_input()
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.connect_input_to_peripheral(InputSignal::CAM_DATA_1);
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pin_2
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.set_to_input()
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.connect_input_to_peripheral(InputSignal::CAM_DATA_2);
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pin_3
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.set_to_input()
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.connect_input_to_peripheral(InputSignal::CAM_DATA_3);
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pin_4
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.set_to_input()
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.connect_input_to_peripheral(InputSignal::CAM_DATA_4);
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pin_5
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.set_to_input()
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.connect_input_to_peripheral(InputSignal::CAM_DATA_5);
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pin_6
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.set_to_input()
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.connect_input_to_peripheral(InputSignal::CAM_DATA_6);
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pin_7
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.set_to_input()
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.connect_input_to_peripheral(InputSignal::CAM_DATA_7);
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Self { _pins: () }
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}
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}
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impl RxPins for RxEightBits {
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const BUS_WIDTH: usize = 1;
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}
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pub struct RxSixteenBits {
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_pins: (),
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}
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impl RxSixteenBits {
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#[allow(clippy::too_many_arguments)]
|
||||
pub fn new<'d, P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10, P11, P12, P13, P14, P15>(
|
||||
pin_0: impl Peripheral<P = P0> + 'd,
|
||||
pin_1: impl Peripheral<P = P1> + 'd,
|
||||
pin_2: impl Peripheral<P = P2> + 'd,
|
||||
pin_3: impl Peripheral<P = P3> + 'd,
|
||||
pin_4: impl Peripheral<P = P4> + 'd,
|
||||
pin_5: impl Peripheral<P = P5> + 'd,
|
||||
pin_6: impl Peripheral<P = P6> + 'd,
|
||||
pin_7: impl Peripheral<P = P7> + 'd,
|
||||
pin_8: impl Peripheral<P = P8> + 'd,
|
||||
pin_9: impl Peripheral<P = P9> + 'd,
|
||||
pin_10: impl Peripheral<P = P10> + 'd,
|
||||
pin_11: impl Peripheral<P = P11> + 'd,
|
||||
pin_12: impl Peripheral<P = P12> + 'd,
|
||||
pin_13: impl Peripheral<P = P13> + 'd,
|
||||
pin_14: impl Peripheral<P = P14> + 'd,
|
||||
pin_15: impl Peripheral<P = P15> + 'd,
|
||||
) -> Self
|
||||
where
|
||||
P0: InputPin,
|
||||
P1: InputPin,
|
||||
P2: InputPin,
|
||||
P3: InputPin,
|
||||
P4: InputPin,
|
||||
P5: InputPin,
|
||||
P6: InputPin,
|
||||
P7: InputPin,
|
||||
P8: InputPin,
|
||||
P9: InputPin,
|
||||
P10: InputPin,
|
||||
P11: InputPin,
|
||||
P12: InputPin,
|
||||
P13: InputPin,
|
||||
P14: InputPin,
|
||||
P15: InputPin,
|
||||
{
|
||||
crate::into_ref!(pin_0);
|
||||
crate::into_ref!(pin_1);
|
||||
crate::into_ref!(pin_2);
|
||||
crate::into_ref!(pin_3);
|
||||
crate::into_ref!(pin_4);
|
||||
crate::into_ref!(pin_5);
|
||||
crate::into_ref!(pin_6);
|
||||
crate::into_ref!(pin_7);
|
||||
crate::into_ref!(pin_8);
|
||||
crate::into_ref!(pin_9);
|
||||
crate::into_ref!(pin_10);
|
||||
crate::into_ref!(pin_11);
|
||||
crate::into_ref!(pin_12);
|
||||
crate::into_ref!(pin_13);
|
||||
crate::into_ref!(pin_14);
|
||||
crate::into_ref!(pin_15);
|
||||
|
||||
pin_0
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_0);
|
||||
pin_1
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_1);
|
||||
pin_2
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_2);
|
||||
pin_3
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_3);
|
||||
pin_4
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_4);
|
||||
pin_5
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_5);
|
||||
pin_6
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_6);
|
||||
pin_7
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_7);
|
||||
pin_8
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_8);
|
||||
pin_9
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_9);
|
||||
pin_10
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_10);
|
||||
pin_11
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_11);
|
||||
pin_12
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_12);
|
||||
pin_13
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_13);
|
||||
pin_14
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_14);
|
||||
pin_15
|
||||
.set_to_input()
|
||||
.connect_input_to_peripheral(InputSignal::CAM_DATA_15);
|
||||
|
||||
Self { _pins: () }
|
||||
}
|
||||
}
|
||||
|
||||
impl RxPins for RxSixteenBits {
|
||||
const BUS_WIDTH: usize = 2;
|
||||
}
|
||||
|
||||
mod private {
|
||||
pub trait RxPins {
|
||||
const BUS_WIDTH: usize;
|
||||
}
|
||||
}
|
||||
|
||||
@ -31,7 +31,7 @@ impl<'d> LcdCam<'d> {
|
||||
lcd_cam: unsafe { lcd_cam.clone_unchecked() },
|
||||
},
|
||||
cam: Cam {
|
||||
_lcd_cam: unsafe { lcd_cam.clone_unchecked() },
|
||||
lcd_cam: unsafe { lcd_cam.clone_unchecked() },
|
||||
},
|
||||
}
|
||||
}
|
||||
|
||||
423
examples/src/bin/lcd_cam_ov2640.rs
Normal file
423
examples/src/bin/lcd_cam_ov2640.rs
Normal file
@ -0,0 +1,423 @@
|
||||
//! Drives the camera on a Freenove ESP32-S3 WROOM (also works as is on the ESP32S3-EYE)
|
||||
//!
|
||||
//! This example reads a JPEG from an OV2640 and writes it to the console as hex.
|
||||
//!
|
||||
//! Pins used:
|
||||
//! SIOD GPIO4
|
||||
//! SIOC GPIO5
|
||||
//! XCLK GPIO15
|
||||
//! VSYNC GPIO6
|
||||
//! HREF GPIO7
|
||||
//! PCLK GPIO13
|
||||
//! D2 GPIO11
|
||||
//! D3 GPIO9
|
||||
//! D4 GPIO8
|
||||
//! D5 GPIO10
|
||||
//! D6 GPIO12
|
||||
//! D7 GPIO18
|
||||
//! D8 GPIO17
|
||||
//! D9 GPIO16
|
||||
|
||||
//% CHIPS: esp32s3
|
||||
|
||||
#![no_std]
|
||||
#![no_main]
|
||||
|
||||
use esp_backtrace as _;
|
||||
use esp_hal::{
|
||||
clock::ClockControl,
|
||||
delay::Delay,
|
||||
dma::{Dma, DmaPriority},
|
||||
dma_buffers,
|
||||
gpio::Io,
|
||||
i2c,
|
||||
i2c::I2C,
|
||||
lcd_cam::{
|
||||
cam::{Camera, RxEightBits},
|
||||
LcdCam,
|
||||
},
|
||||
peripherals::Peripherals,
|
||||
prelude::*,
|
||||
system::SystemControl,
|
||||
Blocking,
|
||||
};
|
||||
use esp_println::println;
|
||||
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let peripherals = Peripherals::take();
|
||||
let system = SystemControl::new(peripherals.SYSTEM);
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
|
||||
|
||||
let dma = Dma::new(peripherals.DMA);
|
||||
let channel = dma.channel0;
|
||||
|
||||
let (_, mut tx_descriptors, rx_buffer, mut rx_descriptors) = dma_buffers!(0, 32678);
|
||||
|
||||
let channel = channel.configure(
|
||||
false,
|
||||
&mut tx_descriptors,
|
||||
&mut rx_descriptors,
|
||||
DmaPriority::Priority0,
|
||||
);
|
||||
|
||||
let cam_siod = io.pins.gpio4;
|
||||
let cam_sioc = io.pins.gpio5;
|
||||
let cam_xclk = io.pins.gpio15;
|
||||
let cam_vsync = io.pins.gpio6;
|
||||
let cam_href = io.pins.gpio7;
|
||||
let cam_pclk = io.pins.gpio13;
|
||||
let cam_data_pins = RxEightBits::new(
|
||||
io.pins.gpio11,
|
||||
io.pins.gpio9,
|
||||
io.pins.gpio8,
|
||||
io.pins.gpio10,
|
||||
io.pins.gpio12,
|
||||
io.pins.gpio18,
|
||||
io.pins.gpio17,
|
||||
io.pins.gpio16,
|
||||
);
|
||||
|
||||
let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
||||
let mut camera = Camera::new(lcd_cam.cam, channel.rx, cam_data_pins, 20u32.MHz(), &clocks)
|
||||
.with_master_clock(cam_xclk)
|
||||
.with_ctrl_pins(cam_vsync, cam_href, cam_pclk);
|
||||
|
||||
let delay = Delay::new(&clocks);
|
||||
|
||||
let mut buffer = rx_buffer;
|
||||
buffer.fill(0u8);
|
||||
|
||||
delay.delay_millis(500u32);
|
||||
|
||||
let i2c = I2C::new(
|
||||
peripherals.I2C0,
|
||||
cam_siod,
|
||||
cam_sioc,
|
||||
100u32.kHz(),
|
||||
&clocks,
|
||||
None,
|
||||
);
|
||||
|
||||
let mut sccb = Sccb::new(i2c);
|
||||
|
||||
// Checking camera address
|
||||
sccb.probe(OV2640_ADDRESS).unwrap();
|
||||
println!("Probe successful!");
|
||||
|
||||
sccb.write(OV2640_ADDRESS, 0xFF, 0x01).unwrap(); // bank sensor
|
||||
let pid = sccb.read(OV2640_ADDRESS, 0x0A).unwrap();
|
||||
println!("Found PID of {:#02X}, and was expecting 0x26", pid);
|
||||
|
||||
// Start waiting for camera before initialising it to prevent missing the first few bytes.
|
||||
// This can be improved with a VSYNC interrupt but would complicate this example.
|
||||
let transfer = camera.read_dma(&mut buffer).unwrap();
|
||||
|
||||
for (reg, value) in FIRST_BLOCK {
|
||||
sccb.write(OV2640_ADDRESS, *reg, *value).unwrap();
|
||||
}
|
||||
delay.delay_millis(10u32);
|
||||
for (reg, value) in SECOND_BLOCK {
|
||||
sccb.write(OV2640_ADDRESS, *reg, *value).unwrap();
|
||||
if *reg == 0xDD && *value == 0x7F {
|
||||
delay.delay_millis(10u32);
|
||||
}
|
||||
}
|
||||
|
||||
transfer.wait().unwrap();
|
||||
|
||||
// Note: JPEGs starts with "FF, D8, FF, E0" and end with "FF, D9"
|
||||
|
||||
let index_of_end = buffer.windows(2).position(|c| c[0] == 0xFF && c[1] == 0xD9);
|
||||
let index_of_end = if let Some(idx) = index_of_end {
|
||||
idx + 2
|
||||
} else {
|
||||
println!("Failed to find JPEG terminator");
|
||||
buffer.len()
|
||||
};
|
||||
|
||||
println!("Frame data (parse with `xxd -r -p <uart>.txt image.jpg`):");
|
||||
println!("{:02X?}", &buffer[..index_of_end]);
|
||||
|
||||
loop {}
|
||||
}
|
||||
|
||||
pub const OV2640_ADDRESS: u8 = 0x30;
|
||||
|
||||
pub struct Sccb<'d, T> {
|
||||
i2c: I2C<'d, T, Blocking>,
|
||||
}
|
||||
|
||||
impl<'d, T> Sccb<'d, T>
|
||||
where
|
||||
T: i2c::Instance,
|
||||
{
|
||||
pub fn new(i2c: I2C<'d, T, Blocking>) -> Self {
|
||||
Self { i2c }
|
||||
}
|
||||
|
||||
pub fn probe(&mut self, address: u8) -> Result<(), i2c::Error> {
|
||||
self.i2c.write(address, &[])
|
||||
}
|
||||
|
||||
pub fn read(&mut self, address: u8, reg: u8) -> Result<u8, i2c::Error> {
|
||||
self.i2c.write(address, &[reg])?;
|
||||
|
||||
let mut bytes = [0u8; 1];
|
||||
self.i2c.read(address, &mut bytes)?;
|
||||
Ok(bytes[0])
|
||||
}
|
||||
|
||||
pub fn write(&mut self, address: u8, reg: u8, data: u8) -> Result<(), i2c::Error> {
|
||||
self.i2c.write(address, &[reg, data])
|
||||
}
|
||||
}
|
||||
|
||||
const FIRST_BLOCK: &[(u8, u8)] = &[(0xFF, 0x01), (0x12, 0x80)];
|
||||
|
||||
const SECOND_BLOCK: &[(u8, u8)] = &[
|
||||
(0xFF, 0x00),
|
||||
(0x2C, 0xFF),
|
||||
(0x2E, 0xDF),
|
||||
(0xFF, 0x01),
|
||||
(0x3C, 0x32),
|
||||
(0x11, 0x01),
|
||||
(0x09, 0x02),
|
||||
(0x04, 0x28),
|
||||
(0x13, 0xE5),
|
||||
(0x14, 0x48),
|
||||
(0x2C, 0x0C),
|
||||
(0x33, 0x78),
|
||||
(0x3A, 0x33),
|
||||
(0x3B, 0xFB),
|
||||
(0x3E, 0x00),
|
||||
(0x43, 0x11),
|
||||
(0x16, 0x10),
|
||||
(0x39, 0x92),
|
||||
(0x35, 0xDA),
|
||||
(0x22, 0x1A),
|
||||
(0x37, 0xC3),
|
||||
(0x23, 0x00),
|
||||
(0x34, 0xC0),
|
||||
(0x06, 0x88),
|
||||
(0x07, 0xC0),
|
||||
(0x0D, 0x87),
|
||||
(0x0E, 0x41),
|
||||
(0x4C, 0x00),
|
||||
(0x4A, 0x81),
|
||||
(0x21, 0x99),
|
||||
(0x24, 0x40),
|
||||
(0x25, 0x38),
|
||||
(0x26, 0x82),
|
||||
(0x5C, 0x00),
|
||||
(0x63, 0x00),
|
||||
(0x61, 0x70),
|
||||
(0x62, 0x80),
|
||||
(0x7C, 0x05),
|
||||
(0x20, 0x80),
|
||||
(0x28, 0x30),
|
||||
(0x6C, 0x00),
|
||||
(0x6D, 0x80),
|
||||
(0x6E, 0x00),
|
||||
(0x70, 0x02),
|
||||
(0x71, 0x94),
|
||||
(0x73, 0xC1),
|
||||
(0x3D, 0x34),
|
||||
(0x5A, 0x57),
|
||||
(0x4F, 0xBB),
|
||||
(0x50, 0x9C),
|
||||
(0x12, 0x20),
|
||||
(0x17, 0x11),
|
||||
(0x18, 0x43),
|
||||
(0x19, 0x00),
|
||||
(0x1A, 0x25),
|
||||
(0x32, 0x89),
|
||||
(0x37, 0xC0),
|
||||
(0x4F, 0xCA),
|
||||
(0x50, 0xA8),
|
||||
(0x6D, 0x00),
|
||||
(0x3D, 0x38),
|
||||
(0xFF, 0x00),
|
||||
(0xE5, 0x7F),
|
||||
(0xF9, 0xC0),
|
||||
(0x41, 0x24),
|
||||
(0xE0, 0x14),
|
||||
(0x76, 0xFF),
|
||||
(0x33, 0xA0),
|
||||
(0x42, 0x20),
|
||||
(0x43, 0x18),
|
||||
(0x4C, 0x00),
|
||||
(0x87, 0x50),
|
||||
(0x88, 0x3F),
|
||||
(0xD7, 0x03),
|
||||
(0xD9, 0x10),
|
||||
(0xD3, 0x82),
|
||||
(0xC8, 0x08),
|
||||
(0xC9, 0x80),
|
||||
(0x7C, 0x00),
|
||||
(0x7D, 0x00),
|
||||
(0x7C, 0x03),
|
||||
(0x7D, 0x48),
|
||||
(0x7D, 0x48),
|
||||
(0x7C, 0x08),
|
||||
(0x7D, 0x20),
|
||||
(0x7D, 0x10),
|
||||
(0x7D, 0x0E),
|
||||
(0x90, 0x00),
|
||||
(0x91, 0x0E),
|
||||
(0x91, 0x1A),
|
||||
(0x91, 0x31),
|
||||
(0x91, 0x5A),
|
||||
(0x91, 0x69),
|
||||
(0x91, 0x75),
|
||||
(0x91, 0x7E),
|
||||
(0x91, 0x88),
|
||||
(0x91, 0x8F),
|
||||
(0x91, 0x96),
|
||||
(0x91, 0xA3),
|
||||
(0x91, 0xAF),
|
||||
(0x91, 0xC4),
|
||||
(0x91, 0xD7),
|
||||
(0x91, 0xE8),
|
||||
(0x91, 0x20),
|
||||
(0x92, 0x00),
|
||||
(0x93, 0x06),
|
||||
(0x93, 0xE3),
|
||||
(0x93, 0x05),
|
||||
(0x93, 0x05),
|
||||
(0x93, 0x00),
|
||||
(0x93, 0x04),
|
||||
(0x93, 0x00),
|
||||
(0x93, 0x00),
|
||||
(0x93, 0x00),
|
||||
(0x93, 0x00),
|
||||
(0x93, 0x00),
|
||||
(0x93, 0x00),
|
||||
(0x93, 0x00),
|
||||
(0x96, 0x00),
|
||||
(0x97, 0x08),
|
||||
(0x97, 0x19),
|
||||
(0x97, 0x02),
|
||||
(0x97, 0x0C),
|
||||
(0x97, 0x24),
|
||||
(0x97, 0x30),
|
||||
(0x97, 0x28),
|
||||
(0x97, 0x26),
|
||||
(0x97, 0x02),
|
||||
(0x97, 0x98),
|
||||
(0x97, 0x80),
|
||||
(0x97, 0x00),
|
||||
(0x97, 0x00),
|
||||
(0xA4, 0x00),
|
||||
(0xA8, 0x00),
|
||||
(0xC5, 0x11),
|
||||
(0xC6, 0x51),
|
||||
(0xBF, 0x80),
|
||||
(0xC7, 0x10),
|
||||
(0xB6, 0x66),
|
||||
(0xB8, 0xA5),
|
||||
(0xB7, 0x64),
|
||||
(0xB9, 0x7C),
|
||||
(0xB3, 0xAF),
|
||||
(0xB4, 0x97),
|
||||
(0xB5, 0xFF),
|
||||
(0xB0, 0xC5),
|
||||
(0xB1, 0x94),
|
||||
(0xB2, 0x0F),
|
||||
(0xC4, 0x5C),
|
||||
(0xC3, 0xFD),
|
||||
(0x7F, 0x00),
|
||||
(0xE5, 0x1F),
|
||||
(0xE1, 0x67),
|
||||
(0xDD, 0x7F),
|
||||
(0xDA, 0x00),
|
||||
(0xE0, 0x00),
|
||||
(0x05, 0x00),
|
||||
(0x05, 0x01),
|
||||
(0xFF, 0x01),
|
||||
(0x12, 0x40),
|
||||
(0x03, 0x0A),
|
||||
(0x32, 0x09),
|
||||
(0x17, 0x11),
|
||||
(0x18, 0x43),
|
||||
(0x19, 0x00),
|
||||
(0x1A, 0x4B),
|
||||
(0x37, 0xC0),
|
||||
(0x4F, 0xCA),
|
||||
(0x50, 0xA8),
|
||||
(0x5A, 0x23),
|
||||
(0x6D, 0x00),
|
||||
(0x3D, 0x38),
|
||||
(0x39, 0x92),
|
||||
(0x35, 0xDA),
|
||||
(0x22, 0x1A),
|
||||
(0x37, 0xC3),
|
||||
(0x23, 0x00),
|
||||
(0x34, 0xC0),
|
||||
(0x06, 0x88),
|
||||
(0x07, 0xC0),
|
||||
(0x0D, 0x87),
|
||||
(0x0E, 0x41),
|
||||
(0x42, 0x03),
|
||||
(0x4C, 0x00),
|
||||
(0xFF, 0x00),
|
||||
(0xE0, 0x04),
|
||||
(0xC0, 0x64),
|
||||
(0xC1, 0x4B),
|
||||
(0x8C, 0x00),
|
||||
(0x51, 0xC8),
|
||||
(0x52, 0x96),
|
||||
(0x53, 0x00),
|
||||
(0x54, 0x00),
|
||||
(0x55, 0x00),
|
||||
(0x57, 0x00),
|
||||
(0x86, 0x3D),
|
||||
(0x50, 0x80),
|
||||
(0x51, 0xC8),
|
||||
(0x52, 0x96),
|
||||
(0x53, 0x00),
|
||||
(0x54, 0x00),
|
||||
(0x55, 0x00),
|
||||
(0x57, 0x00),
|
||||
(0x5A, 0xA0),
|
||||
(0x5B, 0x78),
|
||||
(0x5C, 0x00),
|
||||
(0xFF, 0x01),
|
||||
(0x11, 0x00),
|
||||
(0xFF, 0x00),
|
||||
(0xD3, 0x10),
|
||||
(0x05, 0x00),
|
||||
(0xE0, 0x14),
|
||||
(0xDA, 0x12),
|
||||
(0xD7, 0x03),
|
||||
(0xE1, 0x77),
|
||||
(0xE5, 0x1F),
|
||||
(0xD9, 0x10),
|
||||
(0xDF, 0x80),
|
||||
(0x33, 0x80),
|
||||
(0x3C, 0x10),
|
||||
(0xEB, 0x30),
|
||||
(0xDD, 0x7F),
|
||||
(0xE0, 0x00),
|
||||
(0xE0, 0x14),
|
||||
(0xDA, 0x12),
|
||||
(0xD7, 0x03),
|
||||
(0xE1, 0x77),
|
||||
(0xE5, 0x1F),
|
||||
(0xD9, 0x10),
|
||||
(0xDF, 0x80),
|
||||
(0x33, 0x80),
|
||||
(0x3C, 0x10),
|
||||
(0xEB, 0x30),
|
||||
(0xDD, 0x7F),
|
||||
(0xE0, 0x00),
|
||||
(0xFF, 0x01),
|
||||
(0x14, 0x08),
|
||||
(0xFF, 0x00),
|
||||
(0x87, 0x50),
|
||||
(0x87, 0x10),
|
||||
(0xC3, 0xFD),
|
||||
(0x44, 0x0C),
|
||||
];
|
||||
Loading…
Reference in New Issue
Block a user