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Enable ESP32 HIL (#1977)

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* Enable ESP32 HIL

* RMT fixed

* SPI DMA partially works, _pcnt tests not working

* bckup

* finish

* readme and cleanup

* rebase + cleanup

* RMT S2 pin typo + clean forgotten comments

* review comments

* update 10000

* indentation

* replace cfg gate with cfg_if
This commit is contained in:
Juraj Sadel 2024-09-06 10:53:27 +02:00 committed by GitHub
parent fba475ee40
commit 17daa464ba
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
23 changed files with 108 additions and 59 deletions
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6
.github/workflows/hil.yml vendored
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@ -86,6 +86,8 @@ jobs:
- soc: esp32h2
rust-target: riscv32imac-unknown-none-elf
# # Xtensa devices:
- soc: esp32
rust-target: xtensa-esp32-none-elf
- soc: esp32s2
rust-target: xtensa-esp32s2-none-elf
- soc: esp32s3
@ -168,6 +170,10 @@ jobs:
host: armv7
hubs: "1-1"
# Xtensa devices:
- soc: esp32
runner: esp32-jtag
host: aarch64
hubs: "1 3"
- soc: esp32s2
runner: esp32s2-jtag
host: armv7

8
hil-test/README.md
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@ -103,9 +103,17 @@ Our self-hosted runners have the following setup:
- `GPIO9` and `GPIO10` are connected.
- `GPIO43 (TX)` and `GPIO45` are connected.
- RPi: Raspbian 12 configured with the following [setup]
- ESP32 (`esp32-jtag`):
- Devkit: `ESP32-DevKitC-V4` connected via UART.
- `GPIO32` and `GPIO33` are I2C pins.
- `GPIO4` and `GPIO5` are connected.
- `GPIO26` and `GPIO27` are connected.
- Probe: `ESP-Prog` connected with the [following connections][connection_esp32]
- RPi: Raspbian 12 configured with the following [setup]
[connection_c2]: https://docs.espressif.com/projects/esp-idf/en/stable/esp32c2/api-guides/jtag-debugging/configure-other-jtag.html#configure-hardware
[connection_s2]: https://docs.espressif.com/projects/esp-idf/en/stable/esp32s2/api-guides/jtag-debugging/configure-other-jtag.html#configure-hardware
[connection_esp32]: https://docs.espressif.com/projects/esp-idf/en/stable/esp32/api-guides/jtag-debugging/configure-other-jtag.html#configure-hardware.html#configure-hardware
[`hil.yml`]: https://github.com/esp-rs/esp-hal/blob/main/.github/workflows/hil.yml
[setup]: #rpi-setup

8
hil-test/src/lib.rs
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@ -30,6 +30,8 @@ macro_rules! i2c_pins {
cfg_if::cfg_if! {
if #[cfg(any(esp32s2, esp32s3))] {
($io.pins.gpio2, $io.pins.gpio3)
} else if #[cfg(esp32)] {
($io.pins.gpio32, $io.pins.gpio33)
} else if #[cfg(esp32c6)] {
($io.pins.gpio6, $io.pins.gpio7)
} else if #[cfg(esp32h2)] {
@ -49,7 +51,11 @@ macro_rules! common_test_pins {
cfg_if::cfg_if! {
if #[cfg(any(esp32s2, esp32s3))] {
($io.pins.gpio9, $io.pins.gpio10)
} else {
}
else if #[cfg(esp32)] {
($io.pins.gpio26, $io.pins.gpio27)
}
else {
($io.pins.gpio2, $io.pins.gpio3)
}
}

18
hil-test/tests/embassy_timers_executors.rs
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@ -8,21 +8,23 @@
#![no_main]
use embassy_time::{Duration, Ticker, Timer};
use esp_hal::{
interrupt::software::SoftwareInterruptControl,
peripherals::Peripherals,
prelude::*,
timer::{timg::TimerGroup, ErasedTimer, OneShotTimer, PeriodicTimer},
};
#[cfg(not(feature = "esp32"))]
use esp_hal::{
interrupt::software::SoftwareInterruptControl,
interrupt::Priority,
timer::systimer::{Alarm, FrozenUnit, Periodic, SystemTimer, Target},
timer::ErasedTimer,
};
use esp_hal::{
peripherals::Peripherals,
prelude::*,
timer::{timg::TimerGroup, OneShotTimer, PeriodicTimer},
};
#[cfg(not(feature = "esp32"))]
use esp_hal_embassy::InterruptExecutor;
use hil_test as _;
#[cfg(not(feature = "esp32"))]
macro_rules! mk_static {
($t:ty,$val:expr) => {{
static STATIC_CELL: static_cell::StaticCell<$t> = static_cell::StaticCell::new();
@ -123,7 +125,9 @@ fn set_up_embassy_with_systimer(peripherals: Peripherals) {
#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())]
mod test {
use super::*;
use crate::{test_cases::*, test_helpers::*};
use crate::test_cases::*;
#[cfg(not(feature = "esp32"))]
use crate::test_helpers::*;
#[init]
fn init() -> Peripherals {

4
hil-test/tests/gpio.rs
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@ -1,8 +1,8 @@
//! GPIO Test
//!
//! Folowing pins are used:
//! GPIO2 / GPIO9 (esp32s2 and esp32s3)
//! GPIO3 / GPIO10 (esp32s2 and esp32s3)
//! GPIO2 / GPIO9 (esp32s2 / esp32s3) / GPIO26 (esp32)
//! GPIO3 / GPIO10 (esp32s2 / esp32s3) / GPIO27 (esp32)
//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
//% FEATURES: generic-queue

6
hil-test/tests/i2c.rs
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@ -4,12 +4,14 @@
//! SDA GPIO2 (esp32s2 and esp32s3)
//! GPIO6 (esp32c6)
//! GPIO18 (esp32c2)
//! GPIO4 (esp32, esp32h2 and esp32c3)
//! GPIO4 (esp32h2 and esp32c3)
//! GPIO32 (esp32)
//!
//! SCL GPIO3 (esp32s2 and esp32s3)
//! GPIO7 (esp32c6, esp32 and esp32c3)
//! GPIO7 (esp32c6 and esp32c3)
//! GPIO22 (esp32h2)
//! GPIO19 (esp32c2)
//! GPIO33 (esp32)
//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3

22
hil-test/tests/i2s_async.rs
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@ -13,7 +13,7 @@
#![no_main]
use esp_hal::{
dma::{Dma, DmaChannel0, DmaPriority},
dma::{Dma, DmaPriority},
gpio::Io,
i2s::{asynch::*, DataFormat, I2s, I2sTx, Standard},
peripheral::Peripheral,
@ -23,6 +23,17 @@ use esp_hal::{
};
use hil_test as _;
cfg_if::cfg_if! {
if #[cfg(any(
feature = "esp32",
feature = "esp32s2",
))] {
use esp_hal::dma::Spi2DmaChannel as DmaChannel0;
} else {
use esp_hal::dma::DmaChannel0;
}
}
const BUFFER_SIZE: usize = 2000;
#[derive(Clone)]
@ -91,7 +102,14 @@ mod tests {
let mut io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
let dma = Dma::new(peripherals.DMA);
let dma_channel = dma.channel0;
cfg_if::cfg_if! {
if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
let dma_channel = dma.spi2channel;
} else {
let dma_channel = dma.channel0;
}
}
let (tx_buffer, tx_descriptors, rx_buffer, rx_descriptors) =
esp_hal::dma_circular_buffers!(BUFFER_SIZE, BUFFER_SIZE);

1
hil-test/tests/pcnt.rs
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@ -2,6 +2,7 @@
//!
//! It's assumed GPIO2 is connected to GPIO3
//! (GPIO9 and GPIO10 for esp32s2 and esp32s3)
//! (GPIO26 and GPIO27 for esp32)
//% CHIPS: esp32 esp32c6 esp32h2 esp32s2 esp32s3

2
hil-test/tests/qspi_read.rs
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@ -7,7 +7,7 @@
//!
//! Connect MISO and GPIO pins.
//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
//% CHIPS: esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
#![no_std]
#![no_main]

2
hil-test/tests/qspi_write.rs
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@ -9,7 +9,7 @@
//!
//! Connect MOSI and PCNT pins.
//% CHIPS: esp32 esp32c6 esp32h2 esp32s2 esp32s3
//% CHIPS: esp32c6 esp32h2 esp32s2 esp32s3
#![no_std]
#![no_main]

2
hil-test/tests/qspi_write_read.rs
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@ -9,7 +9,7 @@
//!
//! Connect MOSI/MISO and GPIO pins.
//% CHIPS: esp32 esp32c6 esp32h2 esp32s2 esp32s3
//% CHIPS: esp32c6 esp32h2 esp32s2 esp32s3
#![no_std]
#![no_main]

17
hil-test/tests/rmt.rs
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@ -2,6 +2,7 @@
//!
//! It's assumed GPIO2 is connected to GPIO3
//! (GPIO9 and GPIO10 for esp32s2 and esp32s3)
//! (GPIO26 and GPIO27 for esp32)
//% CHIPS: esp32 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
@ -59,11 +60,16 @@ mod tests {
};
cfg_if::cfg_if! {
if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
if #[cfg(feature = "esp32")] {
let rx_channel = {
use esp_hal::rmt::RxChannelCreator;
rmt.channel1.configure(rx, rx_config).unwrap()
};
} else if #[cfg(feature = "esp32s2")] {
let rx_channel = {
use esp_hal::rmt::RxChannelCreator;
rmt.channel1.configure(rx, rx_config).unwrap()
};
} else if #[cfg(feature = "esp32s3")] {
let rx_channel = {
use esp_hal::rmt::RxChannelCreator;
@ -101,11 +107,12 @@ mod tests {
let rx_transaction = rx_channel.receive(&mut rcv_data).unwrap();
let tx_transaction = tx_channel.transmit(&tx_data);
tx_transaction.wait().unwrap();
rx_transaction.wait().unwrap();
// the last two pulse-codes are the ones which wait for the timeout so they
// can't be equal
rx_transaction.wait().unwrap();
tx_transaction.wait().unwrap();
// the last two pulse-codes are the ones which wait for the timeout so
// they can't be equal
assert_eq!(&tx_data[..18], &rcv_data[..18]);
}
}

17
hil-test/tests/spi_full_duplex.rs
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@ -2,9 +2,8 @@
//!
//! Folowing pins are used:
//! SCLK GPIO0
//! MISO GPIO2 / GPIO9 (esp32s2 and esp32s3)
//! MOSI GPIO3 / GPIO10 (esp32s2 and esp32s3)
//! CS GPIO8
//! MISO GPIO2 / GPIO9 (esp32s2 / esp32s3) / GPIO26 (esp32)
//! MOSI GPIO3 / GPIO10 (esp32s2 / esp32s3) / GPIO27 (esp32)
//!
//! Connect MISO and MOSI pins.
@ -37,16 +36,14 @@ mod tests {
let peripherals = esp_hal::init(esp_hal::Config::default());
let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
let sclk = io.pins.gpio0;
let (miso, mosi) = hil_test::common_test_pins!(io);
let cs = io.pins.gpio8;
let spi = Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let spi = Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0)
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso);
Context { spi }
}

10
hil-test/tests/spi_full_duplex_dma.rs
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@ -2,9 +2,8 @@
//!
//! Folowing pins are used:
//! SCLK GPIO0
//! MISO GPIO2 / GPIO9 (esp32s2 and esp32s3)
//! MOSI GPIO3 / GPIO10 (esp32s2 and esp32s3)
//! CS GPIO8
//! MISO GPIO2 / GPIO9 (esp32s2 / esp32s3) / GPIO26 (esp32)
//! MOSI GPIO3 / GPIO10 (esp32s2 / esp32s3) / GPIO27 (esp32)
//!
//! Connect MISO and MOSI pins.
@ -57,7 +56,6 @@ mod tests {
let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
let sclk = io.pins.gpio0;
let (miso, mosi) = hil_test::common_test_pins!(io);
let cs = io.pins.gpio8;
let dma = Dma::new(peripherals.DMA);
@ -70,7 +68,9 @@ mod tests {
}
let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
Context { spi }

8
hil-test/tests/spi_full_duplex_dma_async.rs
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@ -4,7 +4,6 @@
//! SCLK GPIO0
//! MOSI GPIO3 / GPIO10 (esp32s3)
//! MISO GPIO4
//! CS GPIO8
//!
//! PCNT GPIO2 / GPIO9 (esp32s3)
//! OUTPUT GPIO5 (helper to keep MISO LOW)
@ -14,7 +13,7 @@
//!
//! Connect PCNT and MOSI, MISO and GPIO5 pins.
//% CHIPS: esp32 esp32c6 esp32h2 esp32s3
//% CHIPS: esp32c6 esp32h2 esp32s3
//% FEATURES: generic-queue
#![no_std]
@ -78,7 +77,6 @@ mod tests {
let (mosi_mirror, mosi) = hil_test::common_test_pins!(io);
let miso = io.pins.gpio4;
let cs = io.pins.gpio8;
let mosi_mirror = mosi_mirror.degrade();
let mut out_pin = Output::new(io.pins.gpio5, Level::Low);
@ -100,7 +98,9 @@ mod tests {
let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)
.with_dma(dma_channel.configure_for_async(false, DmaPriority::Priority0))
.with_buffers(dma_tx_buf, dma_rx_buf);

8
hil-test/tests/spi_full_duplex_dma_pcnt.rs
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@ -3,7 +3,6 @@
//! Folowing pins are used:
//! SCLK GPIO0
//! MOSI GPIO3 / GPIO10 (esp32s3)
//! CS GPIO8
//! PCNT GPIO2 / GPIO9 (esp32s3)
//! OUTPUT GPIO5 (helper to keep MISO LOW)
//!
@ -12,7 +11,7 @@
//!
//! Connect MISO and MOSI pins.
//% CHIPS: esp32 esp32c6 esp32h2 esp32s3
//% CHIPS: esp32c6 esp32h2 esp32s3
#![no_std]
#![no_main]
@ -70,7 +69,6 @@ mod tests {
let sclk = io.pins.gpio0;
let (mosi_mirror, mosi) = hil_test::common_test_pins!(io);
let miso = io.pins.gpio4;
let cs = io.pins.gpio8;
let dma = Dma::new(peripherals.DMA);
@ -83,7 +81,9 @@ mod tests {
}
let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
let pcnt = Pcnt::new(peripherals.PCNT);

4
hil-test/tests/spi_half_duplex_read.rs
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@ -2,9 +2,9 @@
//!
//! Folowing pins are used:
//! SCLK GPIO0
//! MISO GPIO2 / GPIO9 (esp32s2 and esp32s3)
//! MISO GPIO2 / GPIO9 (esp32s2 / esp32s3) / GPIO26 (esp32)
//!
//! GPIO GPIO3 / GPIO10 (esp32s2 and esp32s3)
//! GPIO GPIO3 / GPIO10 (esp32s2 / esp32s3) / GPIO27 (esp32)
//!
//! Connect MISO and GPIO pins.

4
hil-test/tests/spi_half_duplex_write.rs
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@ -2,9 +2,9 @@
//!
//! Following pins are used:
//! SCLK GPIO0
//! MOSI GPIO2 / GPIO9 (esp32s2 and esp32s3)
//! MOSI GPIO2 / GPIO9 (esp32s2 / esp32s3) / GPIO26 (esp32)
//!
//! PCNT GPIO3 / GPIO10 (esp32s2 and esp32s3)
//! PCNT GPIO3 / GPIO10 (esp32s2 / esp32s3) / GPIO27 (esp32)
//!
//! Connect MOSI and PCNT pins.

4
hil-test/tests/twai.rs
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@ -1,8 +1,8 @@
//! TWAI test
//!
//! Folowing pins are used:
//! TX GPIO2 / GPIO9 (esp32s2 and esp32s3)
//! RX GPIO3 / GPIO10 (esp32s2 and esp32s3)
//! TX GPIO2 / GPIO9 (esp32s2 / esp32s3) / GPIO26 (esp32)
//! RX GPIO3 / GPIO10 (esp32s2 / esp32s3) / GPIO27 (esp32)
//!
//! Connect TX and RX pins.

4
hil-test/tests/uart.rs
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@ -1,8 +1,8 @@
//! UART Test
//!
//! Folowing pins are used:
//! TX GPIO2 / GPIO9 (esp32s2 and esp32s3)
//! RX GPIO3 / GPIO10 (esp32s2 and esp32s3)
//! TX GPIO2 / GPIO9 (esp32s2 / esp32s3) / GPIO26 (esp32)
//! RX GPIO3 / GPIO10 (esp32s2 / esp32s3) / GPIO27 (esp32)
//!
//! Connect TX and RX pins.

4
hil-test/tests/uart_async.rs
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@ -1,8 +1,8 @@
//! UART Test
//!
//! Folowing pins are used:
//! TX GPIO2 / GPIO9 (esp32s2 and esp32s3)
//! RX GPIO3 / GPIO10 (esp32s2 and esp32s3)
//! TX GPIO2 / GPIO9 (esp32s2 / esp32s3) / GPIO26 (esp32)
//! RX GPIO3 / GPIO10 (esp32s2 / esp32s3) / GPIO27 (esp32)
//!
//! Connect TX and RX pins.

4
hil-test/tests/uart_tx_rx.rs
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@ -1,8 +1,8 @@
//! UART TX/RX Test
//!
//! Folowing pins are used:
//! TX GPIO2 / GPIO9 (esp32s2 and esp32s3)
//! RX GPIO3 / GPIO10 (esp32s2 and esp32s3)
//! TX GPIO2 / GPIO9 (esp32s2 / esp32s3) / GPIO26 (esp32)
//! RX GPIO3 / GPIO10 (esp32s2 / esp32s3) / GPIO27 (esp32)
//!
//! Connect TX and RX pins.

4
hil-test/tests/uart_tx_rx_async.rs
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@ -1,8 +1,8 @@
//! UART TX/RX Async Test
//!
//! Folowing pins are used:
//! TX GPIO2 / GPIO9 (esp32s2 and esp32s3)
//! RX GPIO3 / GPIO10 (esp32s2 and esp32s3)
//! TX GPIO2 / GPIO9 (esp32s2 / esp32s3) / GPIO26 (esp32)
//! RX GPIO3 / GPIO10 (esp32s2 / esp32s3) / GPIO27 (esp32)
//!
//! Connect TX and RX pins.