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Rename DM type parameter to Dm (#2821)

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* Rename DM type parameter to Dm

* Rename M, DmaMode, MODE type parameters to Dm

* fmt
This commit is contained in:
Juraj Sadel 2024-12-17 17:49:23 +01:00 committed by GitHub
parent 85d30e9816
commit d9f1e9a53f
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
27 changed files with 572 additions and 575 deletions
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2
esp-hal/src/dma/gdma.rs
View File

@ -581,7 +581,7 @@ impl InterruptAccess<DmaRxInterrupt> for AnyGdmaRxChannel {
}
}
impl<CH: DmaChannel, M: Mode> Channel<'_, M, CH> {
impl<CH: DmaChannel, Dm: Mode> Channel<'_, Dm, CH> {
/// Asserts that the channel is compatible with the given peripheral.
pub fn runtime_ensure_compatible<P: DmaEligible>(&self, _peripheral: &PeripheralRef<'_, P>) {
// No runtime checks; GDMA channels are compatible with any peripheral

20
esp-hal/src/dma/m2m.rs
View File

@ -28,11 +28,11 @@ use crate::{
/// This is a pseudo-peripheral that allows for memory to memory transfers.
/// It is not a real peripheral, but a way to use the DMA engine for memory
/// to memory transfers.
pub struct Mem2Mem<'d, M>
pub struct Mem2Mem<'d, Dm>
where
M: Mode,
Dm: Mode,
{
channel: Channel<'d, M, AnyGdmaChannel>,
channel: Channel<'d, Dm, AnyGdmaChannel>,
rx_chain: DescriptorChain,
tx_chain: DescriptorChain,
peripheral: DmaPeripheral,
@ -123,9 +123,9 @@ impl<'d> Mem2Mem<'d, Blocking> {
}
}
impl<M> Mem2Mem<'_, M>
impl<Dm> Mem2Mem<'_, Dm>
where
M: Mode,
Dm: Mode,
{
/// Start a memory to memory transfer.
pub fn start_transfer<'t, TXBUF, RXBUF>(
@ -156,9 +156,9 @@ where
}
}
impl<MODE> DmaSupport for Mem2Mem<'_, MODE>
impl<Dm> DmaSupport for Mem2Mem<'_, Dm>
where
MODE: Mode,
Dm: Mode,
{
fn peripheral_wait_dma(&mut self, _is_rx: bool, _is_tx: bool) {
while !self.channel.rx.is_done() {}
@ -169,11 +169,11 @@ where
}
}
impl<'d, M> DmaSupportRx for Mem2Mem<'d, M>
impl<'d, Dm> DmaSupportRx for Mem2Mem<'d, Dm>
where
M: Mode,
Dm: Mode,
{
type RX = ChannelRx<'d, M, AnyGdmaRxChannel>;
type RX = ChannelRx<'d, Dm, AnyGdmaRxChannel>;
fn rx(&mut self) -> &mut Self::RX {
&mut self.channel.rx

44
esp-hal/src/dma/mod.rs
View File

@ -1808,13 +1808,13 @@ fn create_guard(_ch: &impl RegisterAccess) -> PeripheralGuard {
// DMA receive channel
#[non_exhaustive]
#[doc(hidden)]
pub struct ChannelRx<'a, M, CH>
pub struct ChannelRx<'a, Dm, CH>
where
M: Mode,
Dm: Mode,
CH: DmaRxChannel,
{
pub(crate) rx_impl: PeripheralRef<'a, CH>,
pub(crate) _phantom: PhantomData<M>,
pub(crate) _phantom: PhantomData<Dm>,
pub(crate) _guard: PeripheralGuard,
}
@ -1892,9 +1892,9 @@ where
}
}
impl<M, CH> ChannelRx<'_, M, CH>
impl<Dm, CH> ChannelRx<'_, Dm, CH>
where
M: Mode,
Dm: Mode,
CH: DmaRxChannel,
{
/// Configure the channel.
@ -1936,16 +1936,16 @@ where
}
}
impl<M, CH> crate::private::Sealed for ChannelRx<'_, M, CH>
impl<Dm, CH> crate::private::Sealed for ChannelRx<'_, Dm, CH>
where
M: Mode,
Dm: Mode,
CH: DmaRxChannel,
{
}
impl<M, CH> Rx for ChannelRx<'_, M, CH>
impl<Dm, CH> Rx for ChannelRx<'_, Dm, CH>
where
M: Mode,
Dm: Mode,
CH: DmaRxChannel,
{
// TODO: used by I2S, which should be rewritten to use the Preparation-based
@ -2108,13 +2108,13 @@ pub trait Tx: crate::private::Sealed {
/// DMA transmit channel
#[doc(hidden)]
pub struct ChannelTx<'a, M, CH>
pub struct ChannelTx<'a, Dm, CH>
where
M: Mode,
Dm: Mode,
CH: DmaTxChannel,
{
pub(crate) tx_impl: PeripheralRef<'a, CH>,
pub(crate) _phantom: PhantomData<M>,
pub(crate) _phantom: PhantomData<Dm>,
pub(crate) _guard: PeripheralGuard,
}
@ -2186,9 +2186,9 @@ where
}
}
impl<M, CH> ChannelTx<'_, M, CH>
impl<Dm, CH> ChannelTx<'_, Dm, CH>
where
M: Mode,
Dm: Mode,
CH: DmaTxChannel,
{
/// Configure the channel priority.
@ -2230,16 +2230,16 @@ where
}
}
impl<M, CH> crate::private::Sealed for ChannelTx<'_, M, CH>
impl<Dm, CH> crate::private::Sealed for ChannelTx<'_, Dm, CH>
where
M: Mode,
Dm: Mode,
CH: DmaTxChannel,
{
}
impl<M, CH> Tx for ChannelTx<'_, M, CH>
impl<Dm, CH> Tx for ChannelTx<'_, Dm, CH>
where
M: Mode,
Dm: Mode,
CH: DmaTxChannel,
{
// TODO: used by I2S, which should be rewritten to use the Preparation-based
@ -2448,15 +2448,15 @@ pub trait InterruptAccess<T: EnumSetType>: crate::private::Sealed {
/// DMA Channel
#[non_exhaustive]
pub struct Channel<'d, M, CH>
pub struct Channel<'d, Dm, CH>
where
M: Mode,
Dm: Mode,
CH: DmaChannel,
{
/// RX half of the channel
pub rx: ChannelRx<'d, M, CH::Rx>,
pub rx: ChannelRx<'d, Dm, CH::Rx>,
/// TX half of the channel
pub tx: ChannelTx<'d, M, CH::Tx>,
pub tx: ChannelTx<'d, Dm, CH::Tx>,
}
impl<'d, CH> Channel<'d, Blocking, CH>

4
esp-hal/src/dma/pdma/mod.rs
View File

@ -194,10 +194,10 @@ pub(super) fn init_dma(_cs: CriticalSection<'_>) {
}
}
impl<CH, M> Channel<'_, M, CH>
impl<CH, Dm> Channel<'_, Dm, CH>
where
CH: DmaChannel,
M: Mode,
Dm: Mode,
{
/// Asserts that the channel is compatible with the given peripheral.
pub fn runtime_ensure_compatible(&self, peripheral: &PeripheralRef<'_, impl DmaEligible>) {

12
esp-hal/src/i2c/master/mod.rs
View File

@ -274,16 +274,16 @@ impl Default for Config {
}
/// I2C driver
pub struct I2c<'d, DM: Mode, T = AnyI2c> {
pub struct I2c<'d, Dm: Mode, T = AnyI2c> {
i2c: PeripheralRef<'d, T>,
phantom: PhantomData<DM>,
phantom: PhantomData<Dm>,
config: Config,
guard: PeripheralGuard,
}
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<T: Instance, DM: Mode> SetConfig for I2c<'_, DM, T> {
impl<T: Instance, Dm: Mode> SetConfig for I2c<'_, Dm, T> {
type Config = Config;
type ConfigError = ConfigError;
@ -292,11 +292,11 @@ impl<T: Instance, DM: Mode> SetConfig for I2c<'_, DM, T> {
}
}
impl<T, DM: Mode> embedded_hal::i2c::ErrorType for I2c<'_, DM, T> {
impl<T, Dm: Mode> embedded_hal::i2c::ErrorType for I2c<'_, Dm, T> {
type Error = Error;
}
impl<T, DM: Mode> embedded_hal::i2c::I2c for I2c<'_, DM, T>
impl<T, Dm: Mode> embedded_hal::i2c::I2c for I2c<'_, Dm, T>
where
T: Instance,
{
@ -310,7 +310,7 @@ where
}
}
impl<'d, T, DM: Mode> I2c<'d, DM, T>
impl<'d, T, Dm: Mode> I2c<'d, Dm, T>
where
T: Instance,
{

98
esp-hal/src/i2s/master.rs
View File

@ -250,15 +250,15 @@ impl DataFormat {
/// Instance of the I2S peripheral driver
#[non_exhaustive]
pub struct I2s<'d, M, T = AnyI2s>
pub struct I2s<'d, Dm, T = AnyI2s>
where
T: RegisterAccess,
M: Mode,
Dm: Mode,
{
/// Handles the reception (RX) side of the I2S peripheral.
pub i2s_rx: RxCreator<'d, M, T>,
pub i2s_rx: RxCreator<'d, Dm, T>,
/// Handles the transmission (TX) side of the I2S peripheral.
pub i2s_tx: TxCreator<'d, M, T>,
pub i2s_tx: TxCreator<'d, Dm, T>,
}
impl<'d, T> I2s<'d, Blocking, T>
@ -308,10 +308,10 @@ where
}
}
impl<DmaMode, T> I2s<'_, DmaMode, T>
impl<Dm, T> I2s<'_, Dm, T>
where
T: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
/// Sets the interrupt handler
///
@ -346,17 +346,17 @@ where
}
}
impl<DmaMode, I> crate::private::Sealed for I2s<'_, DmaMode, I>
impl<Dm, I> crate::private::Sealed for I2s<'_, Dm, I>
where
I: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
}
impl<DmaMode, I> InterruptConfigurable for I2s<'_, DmaMode, I>
impl<Dm, I> InterruptConfigurable for I2s<'_, Dm, I>
where
I: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
fn set_interrupt_handler(&mut self, handler: crate::interrupt::InterruptHandler) {
I2s::set_interrupt_handler(self, handler);
@ -441,10 +441,10 @@ where
}
}
impl<'d, M, T> I2s<'d, M, T>
impl<'d, Dm, T> I2s<'d, Dm, T>
where
T: RegisterAccess,
M: Mode,
Dm: Mode,
{
/// Configures the I2S peripheral to use a master clock (MCLK) output pin.
pub fn with_mclk<P: PeripheralOutput>(self, pin: impl Peripheral<P = P> + 'd) -> Self {
@ -457,31 +457,31 @@ where
}
/// I2S TX channel
pub struct I2sTx<'d, DmaMode, T = AnyI2s>
pub struct I2sTx<'d, Dm, T = AnyI2s>
where
T: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
i2s: PeripheralRef<'d, T>,
tx_channel: ChannelTx<'d, DmaMode, PeripheralTxChannel<T>>,
tx_channel: ChannelTx<'d, Dm, PeripheralTxChannel<T>>,
tx_chain: DescriptorChain,
_guard: PeripheralGuard,
}
impl<DmaMode, T> core::fmt::Debug for I2sTx<'_, DmaMode, T>
impl<Dm, T> core::fmt::Debug for I2sTx<'_, Dm, T>
where
T: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
f.debug_struct("I2sTx").finish()
}
}
impl<DmaMode, T> DmaSupport for I2sTx<'_, DmaMode, T>
impl<Dm, T> DmaSupport for I2sTx<'_, Dm, T>
where
T: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
fn peripheral_wait_dma(&mut self, _is_rx: bool, _is_tx: bool) {
self.i2s.wait_for_tx_done();
@ -492,12 +492,12 @@ where
}
}
impl<'d, DmaMode, T> DmaSupportTx for I2sTx<'d, DmaMode, T>
impl<'d, Dm, T> DmaSupportTx for I2sTx<'d, Dm, T>
where
T: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
type TX = ChannelTx<'d, DmaMode, PeripheralTxChannel<T>>;
type TX = ChannelTx<'d, Dm, PeripheralTxChannel<T>>;
fn tx(&mut self) -> &mut Self::TX {
&mut self.tx_channel
@ -508,10 +508,10 @@ where
}
}
impl<DmaMode, T> I2sTx<'_, DmaMode, T>
impl<Dm, T> I2sTx<'_, Dm, T>
where
T: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
fn write_bytes(&mut self, data: &[u8]) -> Result<(), Error> {
self.start_tx_transfer(&data, false)?;
@ -529,7 +529,7 @@ where
) -> Result<(), Error>
where
TXBUF: ReadBuffer,
DmaMode: Mode,
Dm: Mode,
{
let (ptr, len) = unsafe { words.read_buffer() };
@ -590,31 +590,31 @@ where
}
/// I2S RX channel
pub struct I2sRx<'d, DmaMode, T = AnyI2s>
pub struct I2sRx<'d, Dm, T = AnyI2s>
where
T: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
i2s: PeripheralRef<'d, T>,
rx_channel: ChannelRx<'d, DmaMode, PeripheralRxChannel<T>>,
rx_channel: ChannelRx<'d, Dm, PeripheralRxChannel<T>>,
rx_chain: DescriptorChain,
_guard: PeripheralGuard,
}
impl<DmaMode, T> core::fmt::Debug for I2sRx<'_, DmaMode, T>
impl<Dm, T> core::fmt::Debug for I2sRx<'_, Dm, T>
where
T: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
f.debug_struct("I2sRx").finish()
}
}
impl<DmaMode, T> DmaSupport for I2sRx<'_, DmaMode, T>
impl<Dm, T> DmaSupport for I2sRx<'_, Dm, T>
where
T: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
fn peripheral_wait_dma(&mut self, _is_rx: bool, _is_tx: bool) {
self.i2s.wait_for_rx_done();
@ -625,12 +625,12 @@ where
}
}
impl<'d, DmaMode, T> DmaSupportRx for I2sRx<'d, DmaMode, T>
impl<'d, Dm, T> DmaSupportRx for I2sRx<'d, Dm, T>
where
T: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
type RX = ChannelRx<'d, DmaMode, PeripheralRxChannel<T>>;
type RX = ChannelRx<'d, Dm, PeripheralRxChannel<T>>;
fn rx(&mut self) -> &mut Self::RX {
&mut self.rx_channel
@ -641,10 +641,10 @@ where
}
}
impl<DmaMode, T> I2sRx<'_, DmaMode, T>
impl<Dm, T> I2sRx<'_, Dm, T>
where
T: RegisterAccess,
DmaMode: Mode,
Dm: Mode,
{
fn read_bytes(&mut self, mut data: &mut [u8]) -> Result<(), Error> {
self.start_rx_transfer(&mut data, false)?;
@ -760,23 +760,23 @@ mod private {
Mode,
};
pub struct TxCreator<'d, M, T>
pub struct TxCreator<'d, Dm, T>
where
T: RegisterAccess,
M: Mode,
Dm: Mode,
{
pub i2s: PeripheralRef<'d, T>,
pub tx_channel: ChannelTx<'d, M, PeripheralTxChannel<T>>,
pub tx_channel: ChannelTx<'d, Dm, PeripheralTxChannel<T>>,
pub descriptors: &'static mut [DmaDescriptor],
pub(crate) guard: PeripheralGuard,
}
impl<'d, M, T> TxCreator<'d, M, T>
impl<'d, Dm, T> TxCreator<'d, Dm, T>
where
M: Mode,
Dm: Mode,
T: RegisterAccess,
{
pub fn build(self) -> I2sTx<'d, M, T> {
pub fn build(self) -> I2sTx<'d, Dm, T> {
let peripheral = self.i2s.peripheral();
I2sTx {
i2s: self.i2s,
@ -820,23 +820,23 @@ mod private {
}
}
pub struct RxCreator<'d, M, T>
pub struct RxCreator<'d, Dm, T>
where
T: RegisterAccess,
M: Mode,
Dm: Mode,
{
pub i2s: PeripheralRef<'d, T>,
pub rx_channel: ChannelRx<'d, M, PeripheralRxChannel<T>>,
pub rx_channel: ChannelRx<'d, Dm, PeripheralRxChannel<T>>,
pub descriptors: &'static mut [DmaDescriptor],
pub(crate) guard: PeripheralGuard,
}
impl<'d, M, T> RxCreator<'d, M, T>
impl<'d, Dm, T> RxCreator<'d, Dm, T>
where
M: Mode,
Dm: Mode,
T: RegisterAccess,
{
pub fn build(self) -> I2sRx<'d, M, T> {
pub fn build(self) -> I2sRx<'d, Dm, T> {
let peripheral = self.i2s.peripheral();
I2sRx {
i2s: self.i2s,

36
esp-hal/src/i2s/parallel.rs
View File

@ -236,13 +236,13 @@ impl<'d> TxPins<'d> for TxEightBits<'d> {
}
/// I2S Parallel Interface
pub struct I2sParallel<'d, DM, I = AnyI2s>
pub struct I2sParallel<'d, Dm, I = AnyI2s>
where
DM: Mode,
Dm: Mode,
I: Instance,
{
instance: PeripheralRef<'d, I>,
tx_channel: ChannelTx<'d, DM, PeripheralTxChannel<I>>,
tx_channel: ChannelTx<'d, Dm, PeripheralTxChannel<I>>,
_guard: PeripheralGuard,
}
@ -323,16 +323,16 @@ where
}
}
impl<'d, I, DM> I2sParallel<'d, DM, I>
impl<'d, I, Dm> I2sParallel<'d, Dm, I>
where
I: Instance,
DM: Mode,
Dm: Mode,
{
/// Write data to the I2S peripheral
pub fn send<BUF: DmaTxBuffer>(
mut self,
mut data: BUF,
) -> Result<I2sParallelTransfer<'d, BUF, DM, I>, (DmaError, Self, BUF)> {
) -> Result<I2sParallelTransfer<'d, BUF, Dm, I>, (DmaError, Self, BUF)> {
self.instance.tx_reset();
self.instance.tx_fifo_reset();
let result = unsafe {
@ -354,21 +354,21 @@ where
/// Represents an ongoing (or potentially finished) transfer using the i2s
/// parallel interface
pub struct I2sParallelTransfer<'d, BUF, DM, I = AnyI2s>
pub struct I2sParallelTransfer<'d, BUF, Dm, I = AnyI2s>
where
I: Instance,
BUF: DmaTxBuffer,
DM: Mode,
Dm: Mode,
{
i2s: ManuallyDrop<I2sParallel<'d, DM, I>>,
i2s: ManuallyDrop<I2sParallel<'d, Dm, I>>,
buf_view: ManuallyDrop<BUF::View>,
}
impl<'d, I, BUF, DM> I2sParallelTransfer<'d, BUF, DM, I>
impl<'d, I, BUF, Dm> I2sParallelTransfer<'d, BUF, Dm, I>
where
I: Instance,
BUF: DmaTxBuffer,
DM: Mode,
Dm: Mode,
{
/// Returns true when [Self::wait] will not block.
pub fn is_done(&self) -> bool {
@ -376,7 +376,7 @@ where
}
/// Wait for the transfer to finish
pub fn wait(mut self) -> (I2sParallel<'d, DM, I>, BUF) {
pub fn wait(mut self) -> (I2sParallel<'d, Dm, I>, BUF) {
self.i2s.instance.tx_wait_done();
let i2s = unsafe { ManuallyDrop::take(&mut self.i2s) };
let view = unsafe { ManuallyDrop::take(&mut self.buf_view) };
@ -401,11 +401,11 @@ where
}
}
impl<I, BUF, DM> Deref for I2sParallelTransfer<'_, BUF, DM, I>
impl<I, BUF, Dm> Deref for I2sParallelTransfer<'_, BUF, Dm, I>
where
I: Instance,
BUF: DmaTxBuffer,
DM: Mode,
Dm: Mode,
{
type Target = BUF::View;
@ -414,22 +414,22 @@ where
}
}
impl<I, BUF, DM> DerefMut for I2sParallelTransfer<'_, BUF, DM, I>
impl<I, BUF, Dm> DerefMut for I2sParallelTransfer<'_, BUF, Dm, I>
where
I: Instance,
BUF: DmaTxBuffer,
DM: Mode,
Dm: Mode,
{
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.buf_view
}
}
impl<I, BUF, DM> Drop for I2sParallelTransfer<'_, BUF, DM, I>
impl<I, BUF, Dm> Drop for I2sParallelTransfer<'_, BUF, Dm, I>
where
I: Instance,
BUF: DmaTxBuffer,
DM: Mode,
Dm: Mode,
{
fn drop(&mut self) {
self.stop_peripherals();

30
esp-hal/src/lcd_cam/lcd/dpi.rs
View File

@ -128,19 +128,19 @@ pub enum ConfigError {
}
/// Represents the RGB LCD interface.
pub struct Dpi<'d, DM: Mode> {
pub struct Dpi<'d, Dm: Mode> {
lcd_cam: PeripheralRef<'d, LCD_CAM>,
tx_channel: ChannelTx<'d, Blocking, PeripheralTxChannel<LCD_CAM>>,
_mode: PhantomData<DM>,
_mode: PhantomData<Dm>,
}
impl<'d, DM> Dpi<'d, DM>
impl<'d, Dm> Dpi<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
/// Create a new instance of the RGB/DPI driver.
pub fn new<CH>(
lcd: Lcd<'d, DM>,
lcd: Lcd<'d, Dm>,
channel: impl Peripheral<P = CH> + 'd,
config: Config,
) -> Result<Self, ConfigError>
@ -548,7 +548,7 @@ where
mut self,
next_frame_en: bool,
mut buf: TX,
) -> Result<DpiTransfer<'d, TX, DM>, (DmaError, Self, TX)> {
) -> Result<DpiTransfer<'d, TX, Dm>, (DmaError, Self, TX)> {
let result = unsafe {
self.tx_channel
.prepare_transfer(DmaPeripheral::LcdCam, &mut buf)
@ -587,12 +587,12 @@ where
/// Represents an ongoing (or potentially finished) transfer using the RGB LCD
/// interface
pub struct DpiTransfer<'d, BUF: DmaTxBuffer, DM: Mode> {
dpi: ManuallyDrop<Dpi<'d, DM>>,
pub struct DpiTransfer<'d, BUF: DmaTxBuffer, Dm: Mode> {
dpi: ManuallyDrop<Dpi<'d, Dm>>,
buffer_view: ManuallyDrop<BUF::View>,
}
impl<'d, BUF: DmaTxBuffer, DM: Mode> DpiTransfer<'d, BUF, DM> {
impl<'d, BUF: DmaTxBuffer, Dm: Mode> DpiTransfer<'d, BUF, Dm> {
/// Returns true when [Self::wait] will not block.
pub fn is_done(&self) -> bool {
self.dpi
@ -604,7 +604,7 @@ impl<'d, BUF: DmaTxBuffer, DM: Mode> DpiTransfer<'d, BUF, DM> {
}
/// Stops this transfer on the spot and returns the peripheral and buffer.
pub fn stop(mut self) -> (Dpi<'d, DM>, BUF) {
pub fn stop(mut self) -> (Dpi<'d, Dm>, BUF) {
self.stop_peripherals();
let (dpi, view) = self.release();
(dpi, BUF::from_view(view))
@ -614,7 +614,7 @@ impl<'d, BUF: DmaTxBuffer, DM: Mode> DpiTransfer<'d, BUF, DM> {
///
/// Note: If you specified `next_frame_en` as true in [Dpi::send], you're
/// just waiting for a DMA error when you call this.
pub fn wait(mut self) -> (Result<(), DmaError>, Dpi<'d, DM>, BUF) {
pub fn wait(mut self) -> (Result<(), DmaError>, Dpi<'d, Dm>, BUF) {
while !self.is_done() {
core::hint::spin_loop();
}
@ -637,7 +637,7 @@ impl<'d, BUF: DmaTxBuffer, DM: Mode> DpiTransfer<'d, BUF, DM> {
(result, dpi, BUF::from_view(view))
}
fn release(mut self) -> (Dpi<'d, DM>, BUF::View) {
fn release(mut self) -> (Dpi<'d, Dm>, BUF::View) {
// SAFETY: Since forget is called on self, we know that self.dpi and
// self.buffer_view won't be touched again.
let result = unsafe {
@ -661,7 +661,7 @@ impl<'d, BUF: DmaTxBuffer, DM: Mode> DpiTransfer<'d, BUF, DM> {
}
}
impl<BUF: DmaTxBuffer, DM: Mode> Deref for DpiTransfer<'_, BUF, DM> {
impl<BUF: DmaTxBuffer, Dm: Mode> Deref for DpiTransfer<'_, BUF, Dm> {
type Target = BUF::View;
fn deref(&self) -> &Self::Target {
@ -669,13 +669,13 @@ impl<BUF: DmaTxBuffer, DM: Mode> Deref for DpiTransfer<'_, BUF, DM> {
}
}
impl<BUF: DmaTxBuffer, DM: Mode> DerefMut for DpiTransfer<'_, BUF, DM> {
impl<BUF: DmaTxBuffer, Dm: Mode> DerefMut for DpiTransfer<'_, BUF, Dm> {
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.buffer_view
}
}
impl<BUF: DmaTxBuffer, DM: Mode> Drop for DpiTransfer<'_, BUF, DM> {
impl<BUF: DmaTxBuffer, Dm: Mode> Drop for DpiTransfer<'_, BUF, Dm> {
fn drop(&mut self) {
self.stop_peripherals();

30
esp-hal/src/lcd_cam/lcd/i8080.rs
View File

@ -92,19 +92,19 @@ pub enum ConfigError {
}
/// Represents the I8080 LCD interface.
pub struct I8080<'d, DM: Mode> {
pub struct I8080<'d, Dm: Mode> {
lcd_cam: PeripheralRef<'d, LCD_CAM>,
tx_channel: ChannelTx<'d, Blocking, PeripheralTxChannel<LCD_CAM>>,
_mode: PhantomData<DM>,
_mode: PhantomData<Dm>,
}
impl<'d, DM> I8080<'d, DM>
impl<'d, Dm> I8080<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
/// Creates a new instance of the I8080 LCD interface.
pub fn new<P, CH>(
lcd: Lcd<'d, DM>,
lcd: Lcd<'d, Dm>,
channel: impl Peripheral<P = CH> + 'd,
mut pins: P,
config: Config,
@ -300,7 +300,7 @@ where
cmd: impl Into<Command<W>>,
dummy: u8,
mut data: BUF,
) -> Result<I8080Transfer<'d, BUF, DM>, (DmaError, Self, BUF)> {
) -> Result<I8080Transfer<'d, BUF, Dm>, (DmaError, Self, BUF)> {
let cmd = cmd.into();
// Reset LCD control unit and Async Tx FIFO
@ -396,7 +396,7 @@ where
}
}
impl<DM: Mode> core::fmt::Debug for I8080<'_, DM> {
impl<Dm: Mode> core::fmt::Debug for I8080<'_, Dm> {
fn fmt(&self, f: &mut Formatter<'_>) -> core::fmt::Result {
f.debug_struct("I8080").finish()
}
@ -404,12 +404,12 @@ impl<DM: Mode> core::fmt::Debug for I8080<'_, DM> {
/// Represents an ongoing (or potentially finished) transfer using the I8080 LCD
/// interface
pub struct I8080Transfer<'d, BUF: DmaTxBuffer, DM: Mode> {
i8080: ManuallyDrop<I8080<'d, DM>>,
pub struct I8080Transfer<'d, BUF: DmaTxBuffer, Dm: Mode> {
i8080: ManuallyDrop<I8080<'d, Dm>>,
buf_view: ManuallyDrop<BUF::View>,
}
impl<'d, BUF: DmaTxBuffer, DM: Mode> I8080Transfer<'d, BUF, DM> {
impl<'d, BUF: DmaTxBuffer, Dm: Mode> I8080Transfer<'d, BUF, Dm> {
/// Returns true when [Self::wait] will not block.
pub fn is_done(&self) -> bool {
self.i8080
@ -421,7 +421,7 @@ impl<'d, BUF: DmaTxBuffer, DM: Mode> I8080Transfer<'d, BUF, DM> {
}
/// Stops this transfer on the spot and returns the peripheral and buffer.
pub fn cancel(mut self) -> (I8080<'d, DM>, BUF) {
pub fn cancel(mut self) -> (I8080<'d, Dm>, BUF) {
self.stop_peripherals();
let (_, i8080, buf) = self.wait();
(i8080, buf)
@ -431,7 +431,7 @@ impl<'d, BUF: DmaTxBuffer, DM: Mode> I8080Transfer<'d, BUF, DM> {
///
/// Note: This also clears the transfer interrupt so it can be used in
/// interrupt handlers to "handle" the interrupt.
pub fn wait(mut self) -> (Result<(), DmaError>, I8080<'d, DM>, BUF) {
pub fn wait(mut self) -> (Result<(), DmaError>, I8080<'d, Dm>, BUF) {
while !self.is_done() {}
// Clear "done" interrupt.
@ -470,7 +470,7 @@ impl<'d, BUF: DmaTxBuffer, DM: Mode> I8080Transfer<'d, BUF, DM> {
}
}
impl<BUF: DmaTxBuffer, DM: Mode> Deref for I8080Transfer<'_, BUF, DM> {
impl<BUF: DmaTxBuffer, Dm: Mode> Deref for I8080Transfer<'_, BUF, Dm> {
type Target = BUF::View;
fn deref(&self) -> &Self::Target {
@ -478,7 +478,7 @@ impl<BUF: DmaTxBuffer, DM: Mode> Deref for I8080Transfer<'_, BUF, DM> {
}
}
impl<BUF: DmaTxBuffer, DM: Mode> DerefMut for I8080Transfer<'_, BUF, DM> {
impl<BUF: DmaTxBuffer, Dm: Mode> DerefMut for I8080Transfer<'_, BUF, Dm> {
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.buf_view
}
@ -523,7 +523,7 @@ impl<'d, BUF: DmaTxBuffer> I8080Transfer<'d, BUF, crate::Async> {
}
}
impl<BUF: DmaTxBuffer, DM: Mode> Drop for I8080Transfer<'_, BUF, DM> {
impl<BUF: DmaTxBuffer, Dm: Mode> Drop for I8080Transfer<'_, BUF, Dm> {
fn drop(&mut self) {
self.stop_peripherals();

4
esp-hal/src/lcd_cam/lcd/mod.rs
View File

@ -17,12 +17,12 @@ pub mod dpi;
pub mod i8080;
/// Represents an LCD interface.
pub struct Lcd<'d, DM: crate::Mode> {
pub struct Lcd<'d, Dm: crate::Mode> {
/// The `LCD_CAM` peripheral reference for managing the LCD functionality.
pub(crate) lcd_cam: PeripheralRef<'d, LCD_CAM>,
/// A marker for the mode of operation (blocking or asynchronous).
pub(crate) _mode: core::marker::PhantomData<DM>,
pub(crate) _mode: core::marker::PhantomData<Dm>,
pub(super) _guard: GenericPeripheralGuard<{ system::Peripheral::LcdCam as u8 }>,
}

4
esp-hal/src/lcd_cam/mod.rs
View File

@ -24,9 +24,9 @@ use crate::{
};
/// Represents a combined LCD and Camera interface.
pub struct LcdCam<'d, DM: crate::Mode> {
pub struct LcdCam<'d, Dm: crate::Mode> {
/// The LCD interface.
pub lcd: Lcd<'d, DM>,
pub lcd: Lcd<'d, Dm>,
/// The Camera interface.
pub cam: Cam<'d>,
}

118
esp-hal/src/parl_io.rs
View File

@ -844,9 +844,9 @@ impl ContainsValidSignalPin for RxEightBits<'_> {}
#[cfg(esp32c6)]
impl ContainsValidSignalPin for RxSixteenBits<'_> {}
impl<'d, DM> TxCreatorFullDuplex<'d, DM>
impl<'d, Dm> TxCreatorFullDuplex<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
/// Configure TX to use the given pins and settings
pub fn with_config<P, CP>(
@ -856,7 +856,7 @@ where
idle_value: u16,
sample_edge: SampleEdge,
bit_order: BitPackOrder,
) -> Result<ParlIoTx<'d, DM>, Error>
) -> Result<ParlIoTx<'d, Dm>, Error>
where
P: FullDuplex + TxPins + ConfigurePins,
CP: TxClkPin,
@ -876,9 +876,9 @@ where
}
}
impl<'d, DM> TxCreator<'d, DM>
impl<'d, Dm> TxCreator<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
/// Configure TX to use the given pins and settings
pub fn with_config<P, CP>(
@ -888,7 +888,7 @@ where
idle_value: u16,
sample_edge: SampleEdge,
bit_order: BitPackOrder,
) -> Result<ParlIoTx<'d, DM>, Error>
) -> Result<ParlIoTx<'d, Dm>, Error>
where
P: TxPins + ConfigurePins,
CP: TxClkPin,
@ -909,27 +909,27 @@ where
}
/// Parallel IO TX channel
pub struct ParlIoTx<'d, DM>
pub struct ParlIoTx<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
tx_channel: ChannelTx<'d, DM, PeripheralTxChannel<PARL_IO>>,
tx_channel: ChannelTx<'d, Dm, PeripheralTxChannel<PARL_IO>>,
tx_chain: DescriptorChain,
_guard: GenericPeripheralGuard<{ crate::system::Peripheral::ParlIo as u8 }>,
}
impl<DM> core::fmt::Debug for ParlIoTx<'_, DM>
impl<Dm> core::fmt::Debug for ParlIoTx<'_, Dm>
where
DM: Mode,
Dm: Mode,
{
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
f.debug_struct("ParlIoTx").finish()
}
}
impl<'d, DM> RxCreatorFullDuplex<'d, DM>
impl<'d, Dm> RxCreatorFullDuplex<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
/// Configure RX to use the given pins and settings
pub fn with_config<P, CP>(
@ -938,7 +938,7 @@ where
clk_pin: &'d mut CP,
bit_order: BitPackOrder,
timeout_ticks: Option<u16>,
) -> Result<ParlIoRx<'d, DM>, Error>
) -> Result<ParlIoRx<'d, Dm>, Error>
where
P: FullDuplex + RxPins + ConfigurePins,
CP: RxClkPin,
@ -959,9 +959,9 @@ where
}
}
impl<'d, DM> RxCreator<'d, DM>
impl<'d, Dm> RxCreator<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
/// Configure RX to use the given pins and settings
pub fn with_config<P, CP>(
@ -970,7 +970,7 @@ where
clk_pin: &'d mut CP,
bit_order: BitPackOrder,
timeout_ticks: Option<u16>,
) -> Result<ParlIoRx<'d, DM>, Error>
) -> Result<ParlIoRx<'d, Dm>, Error>
where
P: RxPins + ConfigurePins,
CP: RxClkPin,
@ -990,18 +990,18 @@ where
}
/// Parallel IO RX channel
pub struct ParlIoRx<'d, DM>
pub struct ParlIoRx<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
rx_channel: ChannelRx<'d, DM, PeripheralRxChannel<PARL_IO>>,
rx_channel: ChannelRx<'d, Dm, PeripheralRxChannel<PARL_IO>>,
rx_chain: DescriptorChain,
_guard: GenericPeripheralGuard<{ crate::system::Peripheral::ParlIo as u8 }>,
}
impl<DM> core::fmt::Debug for ParlIoRx<'_, DM>
impl<Dm> core::fmt::Debug for ParlIoRx<'_, Dm>
where
DM: Mode,
Dm: Mode,
{
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
f.debug_struct("ParlIoTx").finish()
@ -1093,16 +1093,16 @@ fn internal_clear_interrupts(interrupts: EnumSet<ParlIoInterrupt>) {
/// Parallel IO in full duplex mode
///
/// Full duplex mode might limit the maximum possible bit width.
pub struct ParlIoFullDuplex<'d, DM>
pub struct ParlIoFullDuplex<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
/// The transmitter (TX) channel responsible for handling DMA transfers in
/// the parallel I/O full-duplex operation.
pub tx: TxCreatorFullDuplex<'d, DM>,
pub tx: TxCreatorFullDuplex<'d, Dm>,
/// The receiver (RX) channel responsible for handling DMA transfers in the
/// parallel I/O full-duplex operation.
pub rx: RxCreatorFullDuplex<'d, DM>,
pub rx: RxCreatorFullDuplex<'d, Dm>,
}
impl<'d> ParlIoFullDuplex<'d, Blocking> {
@ -1219,13 +1219,13 @@ impl<'d> ParlIoFullDuplex<'d, Async> {
}
/// Parallel IO in half duplex / TX only mode
pub struct ParlIoTxOnly<'d, DM>
pub struct ParlIoTxOnly<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
/// The transmitter (TX) channel responsible for handling DMA transfers in
/// the parallel I/O operation.
pub tx: TxCreator<'d, DM>,
pub tx: TxCreator<'d, Dm>,
}
impl<'d> ParlIoTxOnly<'d, Blocking> {
@ -1325,13 +1325,13 @@ impl InterruptConfigurable for ParlIoTxOnly<'_, Blocking> {
}
/// Parallel IO in half duplex / RX only mode
pub struct ParlIoRxOnly<'d, DM>
pub struct ParlIoRxOnly<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
/// The receiver (RX) channel responsible for handling DMA transfers in the
/// parallel I/O operation.
pub rx: RxCreator<'d, DM>,
pub rx: RxCreator<'d, Dm>,
}
impl<'d> ParlIoRxOnly<'d, Blocking> {
@ -1461,9 +1461,9 @@ fn internal_init(frequency: HertzU32) -> Result<(), Error> {
Ok(())
}
impl<DM> ParlIoTx<'_, DM>
impl<Dm> ParlIoTx<'_, Dm>
where
DM: Mode,
Dm: Mode,
{
/// Perform a DMA write.
///
@ -1516,9 +1516,9 @@ where
}
}
impl<DM> DmaSupport for ParlIoTx<'_, DM>
impl<Dm> DmaSupport for ParlIoTx<'_, Dm>
where
DM: Mode,
Dm: Mode,
{
fn peripheral_wait_dma(&mut self, _is_rx: bool, _is_tx: bool) {
while !Instance::is_tx_eof() {}
@ -1531,11 +1531,11 @@ where
}
}
impl<'d, DM> DmaSupportTx for ParlIoTx<'d, DM>
impl<'d, Dm> DmaSupportTx for ParlIoTx<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
type TX = ChannelTx<'d, DM, PeripheralTxChannel<PARL_IO>>;
type TX = ChannelTx<'d, Dm, PeripheralTxChannel<PARL_IO>>;
fn tx(&mut self) -> &mut Self::TX {
&mut self.tx_channel
@ -1546,9 +1546,9 @@ where
}
}
impl<'d, DM> ParlIoRx<'d, DM>
impl<'d, Dm> ParlIoRx<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
/// Perform a DMA read.
///
@ -1577,7 +1577,7 @@ where
}
fn start_receive_bytes_dma(
rx_channel: &mut ChannelRx<'d, DM, PeripheralRxChannel<PARL_IO>>,
rx_channel: &mut ChannelRx<'d, Dm, PeripheralRxChannel<PARL_IO>>,
rx_chain: &mut DescriptorChain,
ptr: *mut u8,
len: usize,
@ -1605,9 +1605,9 @@ where
}
}
impl<DM> DmaSupport for ParlIoRx<'_, DM>
impl<Dm> DmaSupport for ParlIoRx<'_, Dm>
where
DM: Mode,
Dm: Mode,
{
fn peripheral_wait_dma(&mut self, _is_rx: bool, _is_tx: bool) {
loop {
@ -1627,11 +1627,11 @@ where
}
}
impl<'d, DM> DmaSupportRx for ParlIoRx<'d, DM>
impl<'d, Dm> DmaSupportRx for ParlIoRx<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
type RX = ChannelRx<'d, DM, PeripheralRxChannel<PARL_IO>>;
type RX = ChannelRx<'d, Dm, PeripheralRxChannel<PARL_IO>>;
fn rx(&mut self) -> &mut Self::RX {
&mut self.rx_channel
@ -1643,41 +1643,41 @@ where
}
/// Creates a TX channel
pub struct TxCreator<'d, DM>
pub struct TxCreator<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
tx_channel: ChannelTx<'d, DM, PeripheralTxChannel<PARL_IO>>,
tx_channel: ChannelTx<'d, Dm, PeripheralTxChannel<PARL_IO>>,
descriptors: &'static mut [DmaDescriptor],
_guard: GenericPeripheralGuard<{ system::Peripheral::ParlIo as u8 }>,
}
/// Creates a RX channel
pub struct RxCreator<'d, DM>
pub struct RxCreator<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
rx_channel: ChannelRx<'d, DM, PeripheralRxChannel<PARL_IO>>,
rx_channel: ChannelRx<'d, Dm, PeripheralRxChannel<PARL_IO>>,
descriptors: &'static mut [DmaDescriptor],
_guard: GenericPeripheralGuard<{ system::Peripheral::ParlIo as u8 }>,
}
/// Creates a TX channel
pub struct TxCreatorFullDuplex<'d, DM>
pub struct TxCreatorFullDuplex<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
tx_channel: ChannelTx<'d, DM, PeripheralTxChannel<PARL_IO>>,
tx_channel: ChannelTx<'d, Dm, PeripheralTxChannel<PARL_IO>>,
descriptors: &'static mut [DmaDescriptor],
_guard: GenericPeripheralGuard<{ system::Peripheral::ParlIo as u8 }>,
}
/// Creates a RX channel
pub struct RxCreatorFullDuplex<'d, DM>
pub struct RxCreatorFullDuplex<'d, Dm>
where
DM: Mode,
Dm: Mode,
{
rx_channel: ChannelRx<'d, DM, PeripheralRxChannel<PARL_IO>>,
rx_channel: ChannelRx<'d, Dm, PeripheralRxChannel<PARL_IO>>,
descriptors: &'static mut [DmaDescriptor],
_guard: GenericPeripheralGuard<{ system::Peripheral::ParlIo as u8 }>,
}

142
esp-hal/src/rmt.rs
View File

@ -351,9 +351,9 @@ pub struct RxChannelConfig {
pub use impl_for_chip::{ChannelCreator, Rmt};
impl<'d, M> Rmt<'d, M>
impl<'d, Dm> Rmt<'d, Dm>
where
M: crate::Mode,
Dm: crate::Mode,
{
pub(crate) fn new_internal(
peripheral: impl Peripheral<P = crate::peripherals::RMT> + 'd,
@ -425,7 +425,7 @@ impl InterruptConfigurable for Rmt<'_, Blocking> {
}
}
fn configure_rx_channel<'d, P: PeripheralInput, T: RxChannelInternal<M>, M: crate::Mode>(
fn configure_rx_channel<'d, P: PeripheralInput, T: RxChannelInternal<Dm>, Dm: crate::Mode>(
pin: impl Peripheral<P = P> + 'd,
config: RxChannelConfig,
) -> Result<T, Error> {
@ -462,7 +462,7 @@ fn configure_rx_channel<'d, P: PeripheralInput, T: RxChannelInternal<M>, M: crat
Ok(T::new())
}
fn configure_tx_channel<'d, P: PeripheralOutput, T: TxChannelInternal<M>, M: crate::Mode>(
fn configure_tx_channel<'d, P: PeripheralOutput, T: TxChannelInternal<Dm>, Dm: crate::Mode>(
pin: impl Peripheral<P = P> + 'd,
config: TxChannelConfig,
) -> Result<T, Error> {
@ -744,25 +744,25 @@ mod impl_for_chip {
};
/// RMT Instance
pub struct Rmt<'d, M>
pub struct Rmt<'d, Dm>
where
M: crate::Mode,
Dm: crate::Mode,
{
pub(super) peripheral: PeripheralRef<'d, crate::peripherals::RMT>,
/// RMT Channel 0.
pub channel0: ChannelCreator<M, 0>,
pub channel0: ChannelCreator<Dm, 0>,
/// RMT Channel 1.
pub channel1: ChannelCreator<M, 1>,
pub channel1: ChannelCreator<Dm, 1>,
/// RMT Channel 2.
pub channel2: ChannelCreator<M, 2>,
pub channel2: ChannelCreator<Dm, 2>,
/// RMT Channel 3.
pub channel3: ChannelCreator<M, 3>,
phantom: PhantomData<M>,
pub channel3: ChannelCreator<Dm, 3>,
phantom: PhantomData<Dm>,
}
impl<'d, M> Rmt<'d, M>
impl<'d, Dm> Rmt<'d, Dm>
where
M: crate::Mode,
Dm: crate::Mode,
{
pub(super) fn create(
peripheral: impl Peripheral<P = crate::peripherals::RMT> + 'd,
@ -793,11 +793,11 @@ mod impl_for_chip {
}
/// RMT Channel Creator
pub struct ChannelCreator<M, const CHANNEL: u8>
pub struct ChannelCreator<Dm, const CHANNEL: u8>
where
M: crate::Mode,
Dm: crate::Mode,
{
phantom: PhantomData<M>,
phantom: PhantomData<Dm>,
_guard: GenericPeripheralGuard<{ crate::system::Peripheral::Rmt as u8 }>,
}
@ -824,33 +824,33 @@ mod impl_for_chip {
};
/// RMT Instance
pub struct Rmt<'d, M>
pub struct Rmt<'d, Dm>
where
M: crate::Mode,
Dm: crate::Mode,
{
pub(super) peripheral: PeripheralRef<'d, crate::peripherals::RMT>,
/// RMT Channel 0.
pub channel0: ChannelCreator<M, 0>,
pub channel0: ChannelCreator<Dm, 0>,
/// RMT Channel 1.
pub channel1: ChannelCreator<M, 1>,
pub channel1: ChannelCreator<Dm, 1>,
/// RMT Channel 2.
pub channel2: ChannelCreator<M, 2>,
pub channel2: ChannelCreator<Dm, 2>,
/// RMT Channel 3.
pub channel3: ChannelCreator<M, 3>,
pub channel3: ChannelCreator<Dm, 3>,
/// RMT Channel 4.
pub channel4: ChannelCreator<M, 4>,
pub channel4: ChannelCreator<Dm, 4>,
/// RMT Channel 5.
pub channel5: ChannelCreator<M, 5>,
pub channel5: ChannelCreator<Dm, 5>,
/// RMT Channel 6.
pub channel6: ChannelCreator<M, 6>,
pub channel6: ChannelCreator<Dm, 6>,
/// RMT Channel 7.
pub channel7: ChannelCreator<M, 7>,
phantom: PhantomData<M>,
pub channel7: ChannelCreator<Dm, 7>,
phantom: PhantomData<Dm>,
}
impl<'d, M> Rmt<'d, M>
impl<'d, Dm> Rmt<'d, Dm>
where
M: crate::Mode,
Dm: crate::Mode,
{
pub(super) fn create(
peripheral: impl Peripheral<P = crate::peripherals::RMT> + 'd,
@ -896,11 +896,11 @@ mod impl_for_chip {
}
/// RMT Channel Creator
pub struct ChannelCreator<M, const CHANNEL: u8>
pub struct ChannelCreator<Dm, const CHANNEL: u8>
where
M: crate::Mode,
Dm: crate::Mode,
{
phantom: PhantomData<M>,
phantom: PhantomData<Dm>,
_guard: GenericPeripheralGuard<{ crate::system::Peripheral::Rmt as u8 }>,
}
@ -951,25 +951,25 @@ mod impl_for_chip {
};
/// RMT Instance
pub struct Rmt<'d, M>
pub struct Rmt<'d, Dm>
where
M: crate::Mode,
Dm: crate::Mode,
{
pub(super) peripheral: PeripheralRef<'d, crate::peripherals::RMT>,
/// RMT Channel 0.
pub channel0: ChannelCreator<M, 0>,
pub channel0: ChannelCreator<Dm, 0>,
/// RMT Channel 1.
pub channel1: ChannelCreator<M, 1>,
pub channel1: ChannelCreator<Dm, 1>,
/// RMT Channel 2.
pub channel2: ChannelCreator<M, 2>,
pub channel2: ChannelCreator<Dm, 2>,
/// RMT Channel 3.
pub channel3: ChannelCreator<M, 3>,
phantom: PhantomData<M>,
pub channel3: ChannelCreator<Dm, 3>,
phantom: PhantomData<Dm>,
}
impl<'d, M> Rmt<'d, M>
impl<'d, Dm> Rmt<'d, Dm>
where
M: crate::Mode,
Dm: crate::Mode,
{
pub(super) fn create(
peripheral: impl Peripheral<P = crate::peripherals::RMT> + 'd,
@ -1000,11 +1000,11 @@ mod impl_for_chip {
}
/// RMT Channel Creator
pub struct ChannelCreator<M, const CHANNEL: u8>
pub struct ChannelCreator<Dm, const CHANNEL: u8>
where
M: crate::Mode,
Dm: crate::Mode,
{
phantom: PhantomData<M>,
phantom: PhantomData<Dm>,
_guard: GenericPeripheralGuard<{ crate::system::Peripheral::Rmt as u8 }>,
}
@ -1039,33 +1039,33 @@ mod impl_for_chip {
};
/// RMT Instance
pub struct Rmt<'d, M>
pub struct Rmt<'d, Dm>
where
M: crate::Mode,
Dm: crate::Mode,
{
pub(super) peripheral: PeripheralRef<'d, crate::peripherals::RMT>,
/// RMT Channel 0.
pub channel0: ChannelCreator<M, 0>,
pub channel0: ChannelCreator<Dm, 0>,
/// RMT Channel 1.
pub channel1: ChannelCreator<M, 1>,
pub channel1: ChannelCreator<Dm, 1>,
/// RMT Channel 2.
pub channel2: ChannelCreator<M, 2>,
pub channel2: ChannelCreator<Dm, 2>,
/// RMT Channel 3.
pub channel3: ChannelCreator<M, 3>,
pub channel3: ChannelCreator<Dm, 3>,
/// RMT Channel 4.
pub channel4: ChannelCreator<M, 4>,
pub channel4: ChannelCreator<Dm, 4>,
/// RMT Channel 5.
pub channel5: ChannelCreator<M, 5>,
pub channel5: ChannelCreator<Dm, 5>,
/// RMT Channel 6.
pub channel6: ChannelCreator<M, 6>,
pub channel6: ChannelCreator<Dm, 6>,
/// RMT Channel 7.
pub channel7: ChannelCreator<M, 7>,
phantom: PhantomData<M>,
pub channel7: ChannelCreator<Dm, 7>,
phantom: PhantomData<Dm>,
}
impl<'d, M> Rmt<'d, M>
impl<'d, Dm> Rmt<'d, Dm>
where
M: crate::Mode,
Dm: crate::Mode,
{
pub(super) fn create(
peripheral: impl Peripheral<P = crate::peripherals::RMT> + 'd,
@ -1112,11 +1112,11 @@ mod impl_for_chip {
}
/// RMT Channel Creator
pub struct ChannelCreator<M, const CHANNEL: u8>
pub struct ChannelCreator<Dm, const CHANNEL: u8>
where
M: crate::Mode,
Dm: crate::Mode,
{
phantom: PhantomData<M>,
phantom: PhantomData<Dm>,
_guard: GenericPeripheralGuard<{ crate::system::Peripheral::Rmt as u8 }>,
}
@ -1144,11 +1144,11 @@ mod impl_for_chip {
/// RMT Channel
#[derive(Debug)]
#[non_exhaustive]
pub struct Channel<M, const CHANNEL: u8>
pub struct Channel<Dm, const CHANNEL: u8>
where
M: crate::Mode,
Dm: crate::Mode,
{
phantom: PhantomData<M>,
phantom: PhantomData<Dm>,
_guard: GenericPeripheralGuard<{ system::Peripheral::Rmt as u8 }>,
}
@ -1530,9 +1530,9 @@ pub enum Event {
}
#[doc(hidden)]
pub trait TxChannelInternal<M>
pub trait TxChannelInternal<Dm>
where
M: crate::Mode,
Dm: crate::Mode,
{
const CHANNEL: u8;
@ -1626,9 +1626,9 @@ where
}
#[doc(hidden)]
pub trait RxChannelInternal<M>
pub trait RxChannelInternal<Dm>
where
M: crate::Mode,
Dm: crate::Mode,
{
const CHANNEL: u8;
@ -1765,7 +1765,7 @@ mod chip_specific {
macro_rules! impl_tx_channel {
($signal:ident, $ch_num:literal) => {
paste::paste! {
impl<M> $crate::rmt::TxChannelInternal<M> for $crate::rmt::Channel<M, $ch_num> where M: $crate::Mode {
impl<Dm> $crate::rmt::TxChannelInternal<Dm> for $crate::rmt::Channel<Dm, $ch_num> where Dm: $crate::Mode {
const CHANNEL: u8 = $ch_num;
fn new() -> Self {
@ -1928,7 +1928,7 @@ mod chip_specific {
macro_rules! impl_rx_channel {
($signal:ident, $ch_num:literal, $ch_index:literal) => {
paste::paste! {
impl<M> $crate::rmt::RxChannelInternal<M> for $crate::rmt::Channel<M, $ch_num> where M: $crate::Mode {
impl<Dm> $crate::rmt::RxChannelInternal<Dm> for $crate::rmt::Channel<Dm, $ch_num> where Dm: $crate::Mode {
const CHANNEL: u8 = $ch_num;
fn new() -> Self {
@ -2119,7 +2119,7 @@ mod chip_specific {
macro_rules! impl_tx_channel {
($signal:ident, $ch_num:literal) => {
paste::paste! {
impl<M> super::TxChannelInternal<M> for $crate::rmt::Channel<M, $ch_num> where M: $crate::Mode {
impl<Dm> super::TxChannelInternal<Dm> for $crate::rmt::Channel<Dm, $ch_num> where Dm: $crate::Mode {
const CHANNEL: u8 = $ch_num;
fn new() -> Self {
@ -2272,7 +2272,7 @@ mod chip_specific {
macro_rules! impl_rx_channel {
($signal:ident, $ch_num:literal) => {
paste::paste! {
impl<M> super::RxChannelInternal<M> for $crate::rmt::Channel<M, $ch_num> where M: $crate::Mode {
impl<Dm> super::RxChannelInternal<Dm> for $crate::rmt::Channel<Dm, $ch_num> where Dm: $crate::Mode {
const CHANNEL: u8 = $ch_num;
fn new() -> Self {

14
esp-hal/src/rsa/esp32.rs
View File

@ -10,7 +10,7 @@ use crate::rsa::{
RsaMultiplication,
};
impl<DM: crate::Mode> Rsa<'_, DM> {
impl<Dm: crate::Mode> Rsa<'_, Dm> {
/// After the RSA Accelerator is released from reset, the memory blocks
/// needs to be initialized, only after that peripheral should be used.
/// This function would return without an error if the memory is initialized
@ -79,11 +79,11 @@ pub mod operand_sizes {
);
}
impl<'d, T: RsaMode, DM: crate::Mode, const N: usize> RsaModularMultiplication<'_, 'd, T, DM>
impl<'d, T: RsaMode, Dm: crate::Mode, const N: usize> RsaModularMultiplication<'_, 'd, T, Dm>
where
T: RsaMode<InputType = [u32; N]>,
{
pub(super) fn write_mode(rsa: &mut Rsa<'d, DM>) {
pub(super) fn write_mode(rsa: &mut Rsa<'d, Dm>) {
rsa.write_multi_mode((N / 16 - 1) as u32)
}
@ -98,22 +98,22 @@ where
}
}
impl<'d, T: RsaMode, DM: crate::Mode, const N: usize> RsaModularExponentiation<'_, 'd, T, DM>
impl<'d, T: RsaMode, Dm: crate::Mode, const N: usize> RsaModularExponentiation<'_, 'd, T, Dm>
where
T: RsaMode<InputType = [u32; N]>,
{
/// Sets the modular exponentiation mode for the RSA hardware.
pub(super) fn write_mode(rsa: &mut Rsa<'d, DM>) {
pub(super) fn write_mode(rsa: &mut Rsa<'d, Dm>) {
rsa.write_modexp_mode((N / 16 - 1) as u32)
}
}
impl<'d, T: RsaMode + Multi, DM: crate::Mode, const N: usize> RsaMultiplication<'_, 'd, T, DM>
impl<'d, T: RsaMode + Multi, Dm: crate::Mode, const N: usize> RsaMultiplication<'_, 'd, T, Dm>
where
T: RsaMode<InputType = [u32; N]>,
{
/// Sets the multiplication mode for the RSA hardware.
pub(super) fn write_mode(rsa: &mut Rsa<'d, DM>) {
pub(super) fn write_mode(rsa: &mut Rsa<'d, Dm>) {
rsa.write_multi_mode(((N * 2) / 16 + 7) as u32)
}

14
esp-hal/src/rsa/esp32cX.rs
View File

@ -10,7 +10,7 @@ use crate::rsa::{
RsaMultiplication,
};
impl<DM: crate::Mode> Rsa<'_, DM> {
impl<Dm: crate::Mode> Rsa<'_, Dm> {
/// After the RSA Accelerator is released from reset, the memory blocks
/// needs to be initialized, only after that peripheral should be used.
/// This function would return without an error if the memory is initialized
@ -229,7 +229,7 @@ pub mod operand_sizes {
);
}
impl<'d, T: RsaMode, DM: crate::Mode, const N: usize> RsaModularExponentiation<'_, 'd, T, DM>
impl<'d, T: RsaMode, Dm: crate::Mode, const N: usize> RsaModularExponentiation<'_, 'd, T, Dm>
where
T: RsaMode<InputType = [u32; N]>,
{
@ -244,16 +244,16 @@ where
}
/// Sets the modular exponentiation mode for the RSA hardware.
pub(super) fn write_mode(rsa: &mut Rsa<'d, DM>) {
pub(super) fn write_mode(rsa: &mut Rsa<'d, Dm>) {
rsa.write_mode((N - 1) as u32)
}
}
impl<'d, T: RsaMode, DM: crate::Mode, const N: usize> RsaModularMultiplication<'_, 'd, T, DM>
impl<'d, T: RsaMode, Dm: crate::Mode, const N: usize> RsaModularMultiplication<'_, 'd, T, Dm>
where
T: RsaMode<InputType = [u32; N]>,
{
pub(super) fn write_mode(rsa: &mut Rsa<'d, DM>) {
pub(super) fn write_mode(rsa: &mut Rsa<'d, Dm>) {
rsa.write_mode((N - 1) as u32)
}
@ -262,7 +262,7 @@ where
}
}
impl<'d, T: RsaMode + Multi, DM: crate::Mode, const N: usize> RsaMultiplication<'_, 'd, T, DM>
impl<'d, T: RsaMode + Multi, Dm: crate::Mode, const N: usize> RsaMultiplication<'_, 'd, T, Dm>
where
T: RsaMode<InputType = [u32; N]>,
{
@ -271,7 +271,7 @@ where
}
/// Sets the multiplication mode for the RSA hardware.
pub(super) fn write_mode(rsa: &mut Rsa<'d, DM>) {
pub(super) fn write_mode(rsa: &mut Rsa<'d, Dm>) {
rsa.write_mode((N * 2 - 1) as u32)
}
}

14
esp-hal/src/rsa/esp32sX.rs
View File

@ -10,7 +10,7 @@ use crate::rsa::{
RsaMultiplication,
};
impl<DM: crate::Mode> Rsa<'_, DM> {
impl<Dm: crate::Mode> Rsa<'_, Dm> {
/// After the RSA accelerator is released from reset, the memory blocks
/// needs to be initialized, only after that peripheral should be used.
/// This function would return without an error if the memory is
@ -248,7 +248,7 @@ pub mod operand_sizes {
);
}
impl<'d, T: RsaMode, DM: crate::Mode, const N: usize> RsaModularExponentiation<'_, 'd, T, DM>
impl<'d, T: RsaMode, Dm: crate::Mode, const N: usize> RsaModularExponentiation<'_, 'd, T, Dm>
where
T: RsaMode<InputType = [u32; N]>,
{
@ -263,16 +263,16 @@ where
}
/// Sets the modular exponentiation mode for the RSA hardware.
pub(super) fn write_mode(rsa: &mut Rsa<'d, DM>) {
pub(super) fn write_mode(rsa: &mut Rsa<'d, Dm>) {
rsa.write_mode((N - 1) as u32)
}
}
impl<'d, T: RsaMode, DM: crate::Mode, const N: usize> RsaModularMultiplication<'_, 'd, T, DM>
impl<'d, T: RsaMode, Dm: crate::Mode, const N: usize> RsaModularMultiplication<'_, 'd, T, Dm>
where
T: RsaMode<InputType = [u32; N]>,
{
pub(super) fn write_mode(rsa: &mut Rsa<'d, DM>) {
pub(super) fn write_mode(rsa: &mut Rsa<'d, Dm>) {
rsa.write_mode((N - 1) as u32)
}
@ -281,12 +281,12 @@ where
}
}
impl<'d, T: RsaMode + Multi, DM: crate::Mode, const N: usize> RsaMultiplication<'_, 'd, T, DM>
impl<'d, T: RsaMode + Multi, Dm: crate::Mode, const N: usize> RsaMultiplication<'_, 'd, T, Dm>
where
T: RsaMode<InputType = [u32; N]>,
{
/// Sets the multiplication mode for the RSA hardware.
pub(super) fn write_mode(rsa: &mut Rsa<'d, DM>) {
pub(super) fn write_mode(rsa: &mut Rsa<'d, Dm>) {
rsa.write_mode((N * 2 - 1) as u32)
}

30
esp-hal/src/rsa/mod.rs
View File

@ -44,9 +44,9 @@ mod rsa_spec_impl;
pub use rsa_spec_impl::operand_sizes;
/// RSA peripheral container
pub struct Rsa<'d, DM: crate::Mode> {
pub struct Rsa<'d, Dm: crate::Mode> {
rsa: PeripheralRef<'d, RSA>,
phantom: PhantomData<DM>,
phantom: PhantomData<Dm>,
_guard: GenericPeripheralGuard<{ PeripheralEnable::Rsa as u8 }>,
}
@ -93,7 +93,7 @@ impl<'d> Rsa<'d, Async> {
}
}
impl<'d, DM: crate::Mode> Rsa<'d, DM> {
impl<'d, Dm: crate::Mode> Rsa<'d, Dm> {
fn new_internal(rsa: impl Peripheral<P = RSA> + 'd) -> Self {
crate::into_ref!(rsa);
@ -215,12 +215,12 @@ use implement_op;
/// used to find the `(base ^ exponent) mod modulus`.
///
/// Each operand is a little endian byte array of the same size
pub struct RsaModularExponentiation<'a, 'd, T: RsaMode, DM: crate::Mode> {
rsa: &'a mut Rsa<'d, DM>,
pub struct RsaModularExponentiation<'a, 'd, T: RsaMode, Dm: crate::Mode> {
rsa: &'a mut Rsa<'d, Dm>,
phantom: PhantomData<T>,
}
impl<'a, 'd, T: RsaMode, DM: crate::Mode, const N: usize> RsaModularExponentiation<'a, 'd, T, DM>
impl<'a, 'd, T: RsaMode, Dm: crate::Mode, const N: usize> RsaModularExponentiation<'a, 'd, T, Dm>
where
T: RsaMode<InputType = [u32; N]>,
{
@ -231,7 +231,7 @@ where
///
/// For more information refer to 24.3.2 of <https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf>.
pub fn new(
rsa: &'a mut Rsa<'d, DM>,
rsa: &'a mut Rsa<'d, Dm>,
exponent: &T::InputType,
modulus: &T::InputType,
m_prime: u32,
@ -281,12 +281,12 @@ where
/// used to find the `(operand a * operand b) mod modulus`.
///
/// Each operand is a little endian byte array of the same size
pub struct RsaModularMultiplication<'a, 'd, T: RsaMode, DM: crate::Mode> {
rsa: &'a mut Rsa<'d, DM>,
pub struct RsaModularMultiplication<'a, 'd, T: RsaMode, Dm: crate::Mode> {
rsa: &'a mut Rsa<'d, Dm>,
phantom: PhantomData<T>,
}
impl<'a, 'd, T: RsaMode, DM: crate::Mode, const N: usize> RsaModularMultiplication<'a, 'd, T, DM>
impl<'a, 'd, T: RsaMode, Dm: crate::Mode, const N: usize> RsaModularMultiplication<'a, 'd, T, Dm>
where
T: RsaMode<InputType = [u32; N]>,
{
@ -298,7 +298,7 @@ where
///
/// For more information refer to 20.3.1 of <https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf>.
pub fn new(
rsa: &'a mut Rsa<'d, DM>,
rsa: &'a mut Rsa<'d, Dm>,
operand_a: &T::InputType,
modulus: &T::InputType,
r: &T::InputType,
@ -336,17 +336,17 @@ where
/// be used to find the `operand a * operand b`.
///
/// Each operand is a little endian byte array of the same size
pub struct RsaMultiplication<'a, 'd, T: RsaMode + Multi, DM: crate::Mode> {
rsa: &'a mut Rsa<'d, DM>,
pub struct RsaMultiplication<'a, 'd, T: RsaMode + Multi, Dm: crate::Mode> {
rsa: &'a mut Rsa<'d, Dm>,
phantom: PhantomData<T>,
}
impl<'a, 'd, T: RsaMode + Multi, DM: crate::Mode, const N: usize> RsaMultiplication<'a, 'd, T, DM>
impl<'a, 'd, T: RsaMode + Multi, Dm: crate::Mode, const N: usize> RsaMultiplication<'a, 'd, T, Dm>
where
T: RsaMode<InputType = [u32; N]>,
{
/// Creates an instance of `RsaMultiplication`.
pub fn new(rsa: &'a mut Rsa<'d, DM>, operand_a: &T::InputType) -> Self {
pub fn new(rsa: &'a mut Rsa<'d, Dm>, operand_a: &T::InputType) -> Self {
Self::write_mode(rsa);
rsa.write_operand_a(operand_a);

2
esp-hal/src/sha.rs
View File

@ -550,7 +550,7 @@ impl<'d, A: ShaAlgorithm, S: BorrowMut<Sha<'d>>> digest::FixedOutput for ShaDige
}
}
/// This macro implements the Sha<'a, DM> trait for a specified Sha algorithm
/// This macro implements the Sha<'a, Dm> trait for a specified Sha algorithm
/// and a set of parameters
macro_rules! impl_sha {
($name: ident, $mode_bits: tt, $digest_length: tt, $chunk_length: tt) => {

110
esp-hal/src/spi/master.rs
View File

@ -457,13 +457,13 @@ pub enum ConfigError {}
/// SPI peripheral driver
#[derive(Debug, PartialEq)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub struct Spi<'d, M, T = AnySpi> {
pub struct Spi<'d, Dm, T = AnySpi> {
spi: PeripheralRef<'d, T>,
_mode: PhantomData<M>,
_mode: PhantomData<Dm>,
guard: PeripheralGuard,
}
impl<M, T> Spi<'_, M, T>
impl<Dm, T> Spi<'_, Dm, T>
where
T: Instance,
{
@ -550,7 +550,7 @@ where
}
}
impl<'d, M, T> Spi<'d, M, T>
impl<'d, Dm, T> Spi<'d, Dm, T>
where
T: Instance,
{
@ -652,10 +652,10 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M, T> SetConfig for Spi<'_, M, T>
impl<Dm, T> SetConfig for Spi<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
type Config = Config;
type ConfigError = ConfigError;
@ -665,7 +665,7 @@ where
}
}
impl<'d, M, T> Spi<'d, M, T>
impl<'d, Dm, T> Spi<'d, Dm, T>
where
T: QspiInstance,
{
@ -706,7 +706,7 @@ where
}
}
impl<M, T> Spi<'_, M, T>
impl<Dm, T> Spi<'_, Dm, T>
where
T: Instance,
{
@ -831,13 +831,13 @@ mod dma {
/// [`SpiDmaBus`] via `with_buffers` to get access
/// to a DMA capable SPI bus that implements the
/// embedded-hal traits.
pub struct SpiDma<'d, M, T = AnySpi>
pub struct SpiDma<'d, Dm, T = AnySpi>
where
T: Instance,
M: Mode,
Dm: Mode,
{
pub(crate) spi: PeripheralRef<'d, T>,
pub(crate) channel: Channel<'d, M, PeripheralDmaChannel<T>>,
pub(crate) channel: Channel<'d, Dm, PeripheralDmaChannel<T>>,
tx_transfer_in_progress: bool,
rx_transfer_in_progress: bool,
#[cfg(all(esp32, spi_address_workaround))]
@ -845,10 +845,10 @@ mod dma {
guard: PeripheralGuard,
}
impl<M, T> crate::private::Sealed for SpiDma<'_, M, T>
impl<Dm, T> crate::private::Sealed for SpiDma<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
}
@ -888,10 +888,10 @@ mod dma {
}
}
impl<M, T> core::fmt::Debug for SpiDma<'_, M, T>
impl<Dm, T> core::fmt::Debug for SpiDma<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
/// Formats the `SpiDma` instance for debugging purposes.
///
@ -989,9 +989,9 @@ mod dma {
}
}
impl<'d, M, T> SpiDma<'d, M, T>
impl<'d, Dm, T> SpiDma<'d, Dm, T>
where
M: Mode,
Dm: Mode,
T: Instance,
{
fn driver(&self) -> &'static Info {
@ -1173,17 +1173,17 @@ mod dma {
self,
dma_rx_buf: DmaRxBuf,
dma_tx_buf: DmaTxBuf,
) -> SpiDmaBus<'d, M, T> {
) -> SpiDmaBus<'d, Dm, T> {
SpiDmaBus::new(self, dma_rx_buf, dma_tx_buf)
}
}
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M, T> SetConfig for SpiDma<'_, M, T>
impl<Dm, T> SetConfig for SpiDma<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
type Config = Config;
type ConfigError = ConfigError;
@ -1197,21 +1197,21 @@ mod dma {
///
/// This structure holds references to the SPI instance, DMA buffers, and
/// transfer status.
pub struct SpiDmaTransfer<'d, M, Buf, T = AnySpi>
pub struct SpiDmaTransfer<'d, Dm, Buf, T = AnySpi>
where
T: Instance,
M: Mode,
Dm: Mode,
{
spi_dma: ManuallyDrop<SpiDma<'d, M, T>>,
spi_dma: ManuallyDrop<SpiDma<'d, Dm, T>>,
dma_buf: ManuallyDrop<Buf>,
}
impl<'d, M, T, Buf> SpiDmaTransfer<'d, M, Buf, T>
impl<'d, Dm, T, Buf> SpiDmaTransfer<'d, Dm, Buf, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn new(spi_dma: SpiDma<'d, M, T>, dma_buf: Buf) -> Self {
fn new(spi_dma: SpiDma<'d, Dm, T>, dma_buf: Buf) -> Self {
Self {
spi_dma: ManuallyDrop::new(spi_dma),
dma_buf: ManuallyDrop::new(dma_buf),
@ -1230,7 +1230,7 @@ mod dma {
///
/// This method blocks until the transfer is finished and returns the
/// `SpiDma` instance and the associated buffer.
pub fn wait(mut self) -> (SpiDma<'d, M, T>, Buf) {
pub fn wait(mut self) -> (SpiDma<'d, Dm, T>, Buf) {
self.spi_dma.wait_for_idle();
let retval = unsafe {
(
@ -1250,10 +1250,10 @@ mod dma {
}
}
impl<M, T, Buf> Drop for SpiDmaTransfer<'_, M, Buf, T>
impl<Dm, T, Buf> Drop for SpiDmaTransfer<'_, Dm, Buf, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn drop(&mut self) {
if !self.is_done() {
@ -1280,10 +1280,10 @@ mod dma {
}
}
impl<'d, M, T> SpiDma<'d, M, T>
impl<'d, Dm, T> SpiDma<'d, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
/// # Safety:
///
@ -1309,7 +1309,7 @@ mod dma {
mut self,
bytes_to_write: usize,
mut buffer: TX,
) -> Result<SpiDmaTransfer<'d, M, TX, T>, (Error, Self, TX)> {
) -> Result<SpiDmaTransfer<'d, Dm, TX, T>, (Error, Self, TX)> {
self.wait_for_idle();
match unsafe { self.start_dma_write(bytes_to_write, &mut buffer) } {
@ -1342,7 +1342,7 @@ mod dma {
mut self,
bytes_to_read: usize,
mut buffer: RX,
) -> Result<SpiDmaTransfer<'d, M, RX, T>, (Error, Self, RX)> {
) -> Result<SpiDmaTransfer<'d, Dm, RX, T>, (Error, Self, RX)> {
self.wait_for_idle();
match unsafe { self.start_dma_read(bytes_to_read, &mut buffer) } {
Ok(_) => Ok(SpiDmaTransfer::new(self, buffer)),
@ -1378,7 +1378,7 @@ mod dma {
mut rx_buffer: RX,
bytes_to_write: usize,
mut tx_buffer: TX,
) -> Result<SpiDmaTransfer<'d, M, (RX, TX), T>, (Error, Self, RX, TX)> {
) -> Result<SpiDmaTransfer<'d, Dm, (RX, TX), T>, (Error, Self, RX, TX)> {
self.wait_for_idle();
match unsafe {
self.start_dma_transfer(
@ -1431,7 +1431,7 @@ mod dma {
dummy: u8,
bytes_to_read: usize,
mut buffer: RX,
) -> Result<SpiDmaTransfer<'d, M, RX, T>, (Error, Self, RX)> {
) -> Result<SpiDmaTransfer<'d, Dm, RX, T>, (Error, Self, RX)> {
self.wait_for_idle();
match unsafe {
@ -1496,7 +1496,7 @@ mod dma {
dummy: u8,
bytes_to_write: usize,
mut buffer: TX,
) -> Result<SpiDmaTransfer<'d, M, TX, T>, (Error, Self, TX)> {
) -> Result<SpiDmaTransfer<'d, Dm, TX, T>, (Error, Self, TX)> {
self.wait_for_idle();
match unsafe {
@ -1519,21 +1519,21 @@ mod dma {
///
/// This structure is responsible for managing SPI transfers using DMA
/// buffers.
pub struct SpiDmaBus<'d, M, T = AnySpi>
pub struct SpiDmaBus<'d, Dm, T = AnySpi>
where
T: Instance,
M: Mode,
Dm: Mode,
{
spi_dma: SpiDma<'d, M, T>,
spi_dma: SpiDma<'d, Dm, T>,
rx_buf: DmaRxBuf,
tx_buf: DmaTxBuf,
}
impl<M, T> crate::private::Sealed for SpiDmaBus<'_, M, T>
impl<Dm, T> crate::private::Sealed for SpiDmaBus<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
}
@ -1565,14 +1565,14 @@ mod dma {
}
}
impl<'d, M, T> SpiDmaBus<'d, M, T>
impl<'d, Dm, T> SpiDmaBus<'d, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
/// Creates a new `SpiDmaBus` with the specified SPI instance and DMA
/// buffers.
pub fn new(spi_dma: SpiDma<'d, M, T>, rx_buf: DmaRxBuf, tx_buf: DmaTxBuf) -> Self {
pub fn new(spi_dma: SpiDma<'d, Dm, T>, rx_buf: DmaRxBuf, tx_buf: DmaTxBuf) -> Self {
Self {
spi_dma,
rx_buf,
@ -1619,10 +1619,10 @@ mod dma {
}
}
impl<M, T> SpiDmaBus<'_, M, T>
impl<Dm, T> SpiDmaBus<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn wait_for_idle(&mut self) {
self.spi_dma.wait_for_idle();
@ -1811,10 +1811,10 @@ mod dma {
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M, T> SetConfig for SpiDmaBus<'_, M, T>
impl<Dm, T> SetConfig for SpiDmaBus<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
type Config = Config;
type ConfigError = ConfigError;
@ -2031,18 +2031,18 @@ mod dma {
use super::*;
impl<M, T> ErrorType for SpiDmaBus<'_, M, T>
impl<Dm, T> ErrorType for SpiDmaBus<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
type Error = Error;
}
impl<M, T> SpiBus for SpiDmaBus<'_, M, T>
impl<Dm, T> SpiBus for SpiDmaBus<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn read(&mut self, words: &mut [u8]) -> Result<(), Self::Error> {
self.read(words)
@ -2074,11 +2074,11 @@ mod ehal1 {
use super::*;
impl<M, T> embedded_hal::spi::ErrorType for Spi<'_, M, T> {
impl<Dm, T> embedded_hal::spi::ErrorType for Spi<'_, Dm, T> {
type Error = Error;
}
impl<M, T> FullDuplex for Spi<'_, M, T>
impl<Dm, T> FullDuplex for Spi<'_, Dm, T>
where
T: Instance,
{
@ -2091,7 +2091,7 @@ mod ehal1 {
}
}
impl<M, T> SpiBus for Spi<'_, M, T>
impl<Dm, T> SpiBus for Spi<'_, Dm, T>
where
T: Instance,
{

38
esp-hal/src/spi/slave.rs
View File

@ -91,11 +91,11 @@ const MAX_DMA_SIZE: usize = 32768 - 32;
/// SPI peripheral driver.
///
/// See the [module-level documentation][self] for more details.
pub struct Spi<'d, M, T = AnySpi> {
pub struct Spi<'d, Dm, T = AnySpi> {
spi: PeripheralRef<'d, T>,
#[allow(dead_code)]
data_mode: SpiMode,
_mode: PhantomData<M>,
_mode: PhantomData<Dm>,
_guard: PeripheralGuard,
}
@ -106,12 +106,12 @@ impl<'d> Spi<'d, Blocking> {
}
}
impl<'d, M, T> Spi<'d, M, T>
impl<'d, Dm, T> Spi<'d, Dm, T>
where
T: Instance,
{
/// Constructs an SPI instance in 8bit dataframe mode.
pub fn new_typed(spi: impl Peripheral<P = T> + 'd, mode: SpiMode) -> Spi<'d, M, T> {
pub fn new_typed(spi: impl Peripheral<P = T> + 'd, mode: SpiMode) -> Spi<'d, Dm, T> {
crate::into_ref!(spi);
let guard = PeripheralGuard::new(spi.info().peripheral);
@ -218,32 +218,32 @@ pub mod dma {
}
/// A DMA capable SPI instance.
pub struct SpiDma<'d, M, T = AnySpi>
pub struct SpiDma<'d, Dm, T = AnySpi>
where
T: InstanceDma,
M: Mode,
Dm: Mode,
{
pub(crate) spi: PeripheralRef<'d, T>,
pub(crate) channel: Channel<'d, M, PeripheralDmaChannel<T>>,
pub(crate) channel: Channel<'d, Dm, PeripheralDmaChannel<T>>,
rx_chain: DescriptorChain,
tx_chain: DescriptorChain,
_guard: PeripheralGuard,
}
impl<DmaMode, T> core::fmt::Debug for SpiDma<'_, DmaMode, T>
impl<Dm, T> core::fmt::Debug for SpiDma<'_, Dm, T>
where
T: InstanceDma,
DmaMode: Mode,
Dm: Mode,
{
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
f.debug_struct("SpiDma").finish()
}
}
impl<DmaMode, T> DmaSupport for SpiDma<'_, DmaMode, T>
impl<Dm, T> DmaSupport for SpiDma<'_, Dm, T>
where
T: InstanceDma,
DmaMode: Mode,
Dm: Mode,
{
fn peripheral_wait_dma(&mut self, is_rx: bool, is_tx: bool) {
while !((!is_tx || self.channel.tx.is_done())
@ -259,12 +259,12 @@ pub mod dma {
}
}
impl<'d, DmaMode, T> DmaSupportTx for SpiDma<'d, DmaMode, T>
impl<'d, Dm, T> DmaSupportTx for SpiDma<'d, Dm, T>
where
T: InstanceDma,
DmaMode: Mode,
Dm: Mode,
{
type TX = ChannelTx<'d, DmaMode, PeripheralTxChannel<T>>;
type TX = ChannelTx<'d, Dm, PeripheralTxChannel<T>>;
fn tx(&mut self) -> &mut Self::TX {
&mut self.channel.tx
@ -275,12 +275,12 @@ pub mod dma {
}
}
impl<'d, DmaMode, T> DmaSupportRx for SpiDma<'d, DmaMode, T>
impl<'d, Dm, T> DmaSupportRx for SpiDma<'d, Dm, T>
where
T: InstanceDma,
DmaMode: Mode,
Dm: Mode,
{
type RX = ChannelRx<'d, DmaMode, PeripheralRxChannel<T>>;
type RX = ChannelRx<'d, Dm, PeripheralRxChannel<T>>;
fn rx(&mut self) -> &mut Self::RX {
&mut self.channel.rx
@ -315,9 +315,9 @@ pub mod dma {
}
}
impl<M, T> SpiDma<'_, M, T>
impl<Dm, T> SpiDma<'_, Dm, T>
where
M: Mode,
Dm: Mode,
T: InstanceDma,
{
fn driver(&self) -> DmaDriver {

30
esp-hal/src/timer/mod.rs
View File

@ -119,9 +119,9 @@ pub trait Timer: Into<AnyTimer> + InterruptConfigurable + 'static + crate::priva
}
/// A one-shot timer.
pub struct OneShotTimer<'d, M, T = AnyTimer> {
pub struct OneShotTimer<'d, Dm, T = AnyTimer> {
inner: PeripheralRef<'d, T>,
_ph: PhantomData<M>,
_ph: PhantomData<Dm>,
}
impl<'d> OneShotTimer<'d, Blocking> {
@ -197,9 +197,9 @@ where
}
}
impl<M, T> OneShotTimer<'_, M, T>
impl<Dm, T> OneShotTimer<'_, Dm, T>
where
M: Mode,
Dm: Mode,
T: Timer,
{
/// Delay for *at least* `ms` milliseconds.
@ -267,16 +267,16 @@ where
}
}
impl<M, T> crate::private::Sealed for OneShotTimer<'_, M, T>
impl<Dm, T> crate::private::Sealed for OneShotTimer<'_, Dm, T>
where
T: Timer,
M: Mode,
Dm: Mode,
{
}
impl<M, T> InterruptConfigurable for OneShotTimer<'_, M, T>
impl<Dm, T> InterruptConfigurable for OneShotTimer<'_, Dm, T>
where
M: Mode,
Dm: Mode,
T: Timer,
{
fn set_interrupt_handler(&mut self, handler: crate::interrupt::InterruptHandler) {
@ -303,9 +303,9 @@ where
}
/// A periodic timer.
pub struct PeriodicTimer<'d, M, T = AnyTimer> {
pub struct PeriodicTimer<'d, Dm, T = AnyTimer> {
inner: PeripheralRef<'d, T>,
_ph: PhantomData<M>,
_ph: PhantomData<Dm>,
}
impl<'d> PeriodicTimer<'d, Blocking> {
@ -329,9 +329,9 @@ where
}
}
impl<M, T> PeriodicTimer<'_, M, T>
impl<Dm, T> PeriodicTimer<'_, Dm, T>
where
M: Mode,
Dm: Mode,
T: Timer,
{
/// Start a new count down.
@ -390,11 +390,11 @@ where
}
}
impl<M, T> crate::private::Sealed for PeriodicTimer<'_, M, T> where T: Timer {}
impl<Dm, T> crate::private::Sealed for PeriodicTimer<'_, Dm, T> where T: Timer {}
impl<M, T> InterruptConfigurable for PeriodicTimer<'_, M, T>
impl<Dm, T> InterruptConfigurable for PeriodicTimer<'_, Dm, T>
where
M: Mode,
Dm: Mode,
T: Timer,
{
fn set_interrupt_handler(&mut self, handler: crate::interrupt::InterruptHandler) {

14
esp-hal/src/touch.rs
View File

@ -85,12 +85,12 @@ pub struct TouchConfig {
}
/// This struct marks a successfully initialized touch peripheral
pub struct Touch<'d, TOUCHMODE: TouchMode, MODE: Mode> {
pub struct Touch<'d, TOUCHMODE: TouchMode, Dm: Mode> {
_inner: PeripheralRef<'d, TOUCH>,
_touch_mode: PhantomData<TOUCHMODE>,
_mode: PhantomData<MODE>,
_mode: PhantomData<Dm>,
}
impl<TOUCHMODE: TouchMode, MODE: Mode> Touch<'_, TOUCHMODE, MODE> {
impl<TOUCHMODE: TouchMode, Dm: Mode> Touch<'_, TOUCHMODE, Dm> {
/// Common initialization of the touch peripheral.
fn initialize_common(config: Option<TouchConfig>) {
let rtccntl = unsafe { &*RTC_CNTL::ptr() };
@ -318,10 +318,10 @@ impl<'d> Touch<'d, Continuous, Async> {
}
/// A pin that is configured as a TouchPad.
pub struct TouchPad<P: TouchPin, TOUCHMODE: TouchMode, MODE: Mode> {
pub struct TouchPad<P: TouchPin, TOUCHMODE: TouchMode, Dm: Mode> {
pin: P,
_touch_mode: PhantomData<TOUCHMODE>,
_mode: PhantomData<MODE>,
_mode: PhantomData<Dm>,
}
impl<P: TouchPin> TouchPad<P, OneShot, Blocking> {
/// (Re-)Start a touch measurement on the pin. You can get the result by
@ -362,13 +362,13 @@ impl<P: TouchPin> TouchPad<P, OneShot, Blocking> {
.modify(|_, w| w.touch_start_en().set_bit());
}
}
impl<P: TouchPin, TOUCHMODE: TouchMode, MODE: Mode> TouchPad<P, TOUCHMODE, MODE> {
impl<P: TouchPin, TOUCHMODE: TouchMode, Dm: Mode> TouchPad<P, TOUCHMODE, Dm> {
/// Construct a new instance of [`TouchPad`].
///
/// ## Parameters:
/// - `pin`: The pin that gets configured as touch pad
/// - `touch`: The [`Touch`] struct indicating that touch is configured.
pub fn new(pin: P, _touch: &Touch<'_, TOUCHMODE, MODE>) -> Self {
pub fn new(pin: P, _touch: &Touch<'_, TOUCHMODE, Dm>) -> Self {
// TODO revert this on drop
pin.set_touch(Internal);

46
esp-hal/src/twai/mod.rs
View File

@ -662,18 +662,18 @@ impl BaudRate {
}
/// An inactive TWAI peripheral in the "Reset"/configuration state.
pub struct TwaiConfiguration<'d, DM: crate::Mode, T = AnyTwai> {
pub struct TwaiConfiguration<'d, Dm: crate::Mode, T = AnyTwai> {
twai: PeripheralRef<'d, T>,
filter: Option<(FilterType, [u8; 8])>,
phantom: PhantomData<DM>,
phantom: PhantomData<Dm>,
mode: TwaiMode,
_guard: PeripheralGuard,
}
impl<'d, DM, T> TwaiConfiguration<'d, DM, T>
impl<'d, Dm, T> TwaiConfiguration<'d, Dm, T>
where
T: Instance,
DM: crate::Mode,
Dm: crate::Mode,
{
fn new_internal<TX: PeripheralOutput, RX: PeripheralInput>(
twai: impl Peripheral<P = T> + 'd,
@ -906,7 +906,7 @@ where
/// Put the peripheral into Operation Mode, allowing the transmission and
/// reception of packets using the new object.
pub fn start(self) -> Twai<'d, DM, T> {
pub fn start(self) -> Twai<'d, Dm, T> {
self.apply_filter();
self.set_mode(self.mode);
@ -1075,17 +1075,17 @@ where
///
/// In this mode, the TWAI controller can transmit and receive messages
/// including error signals (such as error and overload frames).
pub struct Twai<'d, DM: crate::Mode, T = AnyTwai> {
pub struct Twai<'d, Dm: crate::Mode, T = AnyTwai> {
twai: PeripheralRef<'d, T>,
tx: TwaiTx<'d, DM, T>,
rx: TwaiRx<'d, DM, T>,
phantom: PhantomData<DM>,
tx: TwaiTx<'d, Dm, T>,
rx: TwaiRx<'d, Dm, T>,
phantom: PhantomData<Dm>,
}
impl<'d, T, DM> Twai<'d, DM, T>
impl<'d, T, Dm> Twai<'d, Dm, T>
where
T: Instance,
DM: crate::Mode,
Dm: crate::Mode,
{
fn mode(&self) -> TwaiMode {
let mode = self.twai.register_block().mode().read();
@ -1101,7 +1101,7 @@ where
/// Stop the peripheral, putting it into reset mode and enabling
/// reconfiguration.
pub fn stop(self) -> TwaiConfiguration<'d, DM, T> {
pub fn stop(self) -> TwaiConfiguration<'d, Dm, T> {
// Put the peripheral into reset/configuration mode by setting the reset mode
// bit.
self.twai
@ -1190,22 +1190,22 @@ where
/// Consumes this `Twai` instance and splits it into transmitting and
/// receiving halves.
pub fn split(self) -> (TwaiRx<'d, DM, T>, TwaiTx<'d, DM, T>) {
pub fn split(self) -> (TwaiRx<'d, Dm, T>, TwaiTx<'d, Dm, T>) {
(self.rx, self.tx)
}
}
/// Interface to the TWAI transmitter part.
pub struct TwaiTx<'d, DM: crate::Mode, T = AnyTwai> {
pub struct TwaiTx<'d, Dm: crate::Mode, T = AnyTwai> {
twai: PeripheralRef<'d, T>,
phantom: PhantomData<DM>,
phantom: PhantomData<Dm>,
_guard: PeripheralGuard,
}
impl<DM, T> TwaiTx<'_, DM, T>
impl<Dm, T> TwaiTx<'_, Dm, T>
where
T: Instance,
DM: crate::Mode,
Dm: crate::Mode,
{
/// Transmit a frame.
///
@ -1239,16 +1239,16 @@ where
}
/// Interface to the TWAI receiver part.
pub struct TwaiRx<'d, DM: crate::Mode, T = AnyTwai> {
pub struct TwaiRx<'d, Dm: crate::Mode, T = AnyTwai> {
twai: PeripheralRef<'d, T>,
phantom: PhantomData<DM>,
phantom: PhantomData<Dm>,
_guard: PeripheralGuard,
}
impl<DM, T> TwaiRx<'_, DM, T>
impl<Dm, T> TwaiRx<'_, Dm, T>
where
T: Instance,
DM: crate::Mode,
Dm: crate::Mode,
{
/// Receive a frame
pub fn receive(&mut self) -> nb::Result<EspTwaiFrame, EspTwaiError> {
@ -1335,10 +1335,10 @@ unsafe fn copy_to_data_register(dest: *mut u32, src: &[u8]) {
}
#[cfg(any(doc, feature = "unstable"))]
impl<DM, T> embedded_can::nb::Can for Twai<'_, DM, T>
impl<Dm, T> embedded_can::nb::Can for Twai<'_, Dm, T>
where
T: Instance,
DM: crate::Mode,
Dm: crate::Mode,
{
type Frame = EspTwaiFrame;
type Error = EspTwaiError;

118
esp-hal/src/uart.rs
View File

@ -537,15 +537,15 @@ impl AtCmdConfig {
}
}
struct UartBuilder<'d, M, T = AnyUart> {
struct UartBuilder<'d, Dm, T = AnyUart> {
uart: PeripheralRef<'d, T>,
phantom: PhantomData<M>,
phantom: PhantomData<Dm>,
}
impl<'d, M, T> UartBuilder<'d, M, T>
impl<'d, Dm, T> UartBuilder<'d, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn new(uart: impl Peripheral<P = T> + 'd) -> Self {
crate::into_ref!(uart);
@ -573,7 +573,7 @@ where
self
}
fn init(self, config: Config) -> Result<Uart<'d, M, T>, ConfigError> {
fn init(self, config: Config) -> Result<Uart<'d, Dm, T>, ConfigError> {
let rx_guard = PeripheralGuard::new(self.uart.parts().0.peripheral);
let tx_guard = PeripheralGuard::new(self.uart.parts().0.peripheral);
@ -596,22 +596,22 @@ where
}
/// UART (Full-duplex)
pub struct Uart<'d, M, T = AnyUart> {
rx: UartRx<'d, M, T>,
tx: UartTx<'d, M, T>,
pub struct Uart<'d, Dm, T = AnyUart> {
rx: UartRx<'d, Dm, T>,
tx: UartTx<'d, Dm, T>,
}
/// UART (Transmit)
pub struct UartTx<'d, M, T = AnyUart> {
pub struct UartTx<'d, Dm, T = AnyUart> {
uart: PeripheralRef<'d, T>,
phantom: PhantomData<M>,
phantom: PhantomData<Dm>,
guard: PeripheralGuard,
}
/// UART (Receive)
pub struct UartRx<'d, M, T = AnyUart> {
pub struct UartRx<'d, Dm, T = AnyUart> {
uart: PeripheralRef<'d, T>,
phantom: PhantomData<M>,
phantom: PhantomData<Dm>,
guard: PeripheralGuard,
}
@ -627,10 +627,10 @@ pub enum ConfigError {
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M, T> SetConfig for Uart<'_, M, T>
impl<Dm, T> SetConfig for Uart<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
type Config = Config;
type ConfigError = ConfigError;
@ -642,10 +642,10 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M, T> SetConfig for UartRx<'_, M, T>
impl<Dm, T> SetConfig for UartRx<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
type Config = Config;
type ConfigError = ConfigError;
@ -657,10 +657,10 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M, T> SetConfig for UartTx<'_, M, T>
impl<Dm, T> SetConfig for UartTx<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
type Config = Config;
type ConfigError = ConfigError;
@ -670,10 +670,10 @@ where
}
}
impl<'d, M, T> UartTx<'d, M, T>
impl<'d, Dm, T> UartTx<'d, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
/// Configure RTS pin
pub fn with_rts(self, rts: impl Peripheral<P = impl PeripheralOutput> + 'd) -> Self {
@ -861,10 +861,10 @@ fn sync_regs(_register_block: &RegisterBlock) {
}
}
impl<'d, M, T> UartRx<'d, M, T>
impl<'d, Dm, T> UartRx<'d, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
/// Configure CTS pin
pub fn with_cts(self, cts: impl Peripheral<P = impl PeripheralInput> + 'd) -> Self {
@ -1142,10 +1142,10 @@ pub enum UartInterrupt {
RxFifoFull,
}
impl<'d, M, T> Uart<'d, M, T>
impl<'d, Dm, T> Uart<'d, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
/// Configure CTS pin
pub fn with_cts(mut self, cts: impl Peripheral<P = impl PeripheralInput> + 'd) -> Self {
@ -1168,7 +1168,7 @@ where
///
/// This is particularly useful when having two tasks correlating to
/// transmitting and receiving.
pub fn split(self) -> (UartRx<'d, M, T>, UartTx<'d, M, T>) {
pub fn split(self) -> (UartRx<'d, Dm, T>, UartTx<'d, Dm, T>) {
(self.rx, self.tx)
}
@ -1353,10 +1353,10 @@ where
}
}
impl<T, M> ufmt_write::uWrite for Uart<'_, M, T>
impl<T, Dm> ufmt_write::uWrite for Uart<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
type Error = Error;
@ -1371,10 +1371,10 @@ where
}
}
impl<T, M> ufmt_write::uWrite for UartTx<'_, M, T>
impl<T, Dm> ufmt_write::uWrite for UartTx<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
type Error = Error;
@ -1385,10 +1385,10 @@ where
}
}
impl<T, M> core::fmt::Write for Uart<'_, M, T>
impl<T, Dm> core::fmt::Write for Uart<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
#[inline]
fn write_str(&mut self, s: &str) -> core::fmt::Result {
@ -1396,10 +1396,10 @@ where
}
}
impl<T, M> core::fmt::Write for UartTx<'_, M, T>
impl<T, Dm> core::fmt::Write for UartTx<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
#[inline]
fn write_str(&mut self, s: &str) -> core::fmt::Result {
@ -1409,42 +1409,42 @@ where
}
}
impl<T, M> embedded_hal_nb::serial::ErrorType for Uart<'_, M, T> {
impl<T, Dm> embedded_hal_nb::serial::ErrorType for Uart<'_, Dm, T> {
type Error = Error;
}
impl<T, M> embedded_hal_nb::serial::ErrorType for UartTx<'_, M, T> {
impl<T, Dm> embedded_hal_nb::serial::ErrorType for UartTx<'_, Dm, T> {
type Error = Error;
}
impl<T, M> embedded_hal_nb::serial::ErrorType for UartRx<'_, M, T> {
impl<T, Dm> embedded_hal_nb::serial::ErrorType for UartRx<'_, Dm, T> {
type Error = Error;
}
impl<T, M> embedded_hal_nb::serial::Read for Uart<'_, M, T>
impl<T, Dm> embedded_hal_nb::serial::Read for Uart<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn read(&mut self) -> nb::Result<u8, Self::Error> {
self.read_byte()
}
}
impl<T, M> embedded_hal_nb::serial::Read for UartRx<'_, M, T>
impl<T, Dm> embedded_hal_nb::serial::Read for UartRx<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn read(&mut self) -> nb::Result<u8, Self::Error> {
self.read_byte()
}
}
impl<T, M> embedded_hal_nb::serial::Write for Uart<'_, M, T>
impl<T, Dm> embedded_hal_nb::serial::Write for Uart<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
self.write_byte(word)
@ -1455,10 +1455,10 @@ where
}
}
impl<T, M> embedded_hal_nb::serial::Write for UartTx<'_, M, T>
impl<T, Dm> embedded_hal_nb::serial::Write for UartTx<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
self.write_byte(word)
@ -1471,28 +1471,28 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<T, M> embedded_io::ErrorType for Uart<'_, M, T> {
impl<T, Dm> embedded_io::ErrorType for Uart<'_, Dm, T> {
type Error = Error;
}
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<T, M> embedded_io::ErrorType for UartTx<'_, M, T> {
impl<T, Dm> embedded_io::ErrorType for UartTx<'_, Dm, T> {
type Error = Error;
}
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<T, M> embedded_io::ErrorType for UartRx<'_, M, T> {
impl<T, Dm> embedded_io::ErrorType for UartRx<'_, Dm, T> {
type Error = Error;
}
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<T, M> embedded_io::Read for Uart<'_, M, T>
impl<T, Dm> embedded_io::Read for Uart<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
self.rx.read(buf)
@ -1501,10 +1501,10 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<T, M> embedded_io::Read for UartRx<'_, M, T>
impl<T, Dm> embedded_io::Read for UartRx<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
if buf.is_empty() {
@ -1521,10 +1521,10 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<T, M> embedded_io::ReadReady for Uart<'_, M, T>
impl<T, Dm> embedded_io::ReadReady for Uart<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn read_ready(&mut self) -> Result<bool, Self::Error> {
self.rx.read_ready()
@ -1533,10 +1533,10 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<T, M> embedded_io::ReadReady for UartRx<'_, M, T>
impl<T, Dm> embedded_io::ReadReady for UartRx<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn read_ready(&mut self) -> Result<bool, Self::Error> {
Ok(self.rx_fifo_count() > 0)
@ -1545,10 +1545,10 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<T, M> embedded_io::Write for Uart<'_, M, T>
impl<T, Dm> embedded_io::Write for Uart<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
self.tx.write(buf)
@ -1561,10 +1561,10 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<T, M> embedded_io::Write for UartTx<'_, M, T>
impl<T, Dm> embedded_io::Write for UartTx<'_, Dm, T>
where
T: Instance,
M: Mode,
Dm: Mode,
{
fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
self.write_bytes(buf)

100
esp-hal/src/usb_serial_jtag.rs
View File

@ -149,26 +149,26 @@ use crate::{
type Error = Infallible;
/// USB Serial/JTAG (Full-duplex)
pub struct UsbSerialJtag<'d, M> {
rx: UsbSerialJtagRx<'d, M>,
tx: UsbSerialJtagTx<'d, M>,
pub struct UsbSerialJtag<'d, Dm> {
rx: UsbSerialJtagRx<'d, Dm>,
tx: UsbSerialJtagTx<'d, Dm>,
}
/// USB Serial/JTAG (Transmit)
pub struct UsbSerialJtagTx<'d, M> {
pub struct UsbSerialJtagTx<'d, Dm> {
peripheral: PeripheralRef<'d, USB_DEVICE>,
phantom: PhantomData<M>,
phantom: PhantomData<Dm>,
}
/// USB Serial/JTAG (Receive)
pub struct UsbSerialJtagRx<'d, M> {
pub struct UsbSerialJtagRx<'d, Dm> {
peripheral: PeripheralRef<'d, USB_DEVICE>,
phantom: PhantomData<M>,
phantom: PhantomData<Dm>,
}
impl<'d, M> UsbSerialJtagTx<'d, M>
impl<'d, Dm> UsbSerialJtagTx<'d, Dm>
where
M: Mode,
Dm: Mode,
{
fn new_inner(peripheral: impl Peripheral<P = USB_DEVICE> + 'd) -> Self {
crate::into_ref!(peripheral);
@ -245,9 +245,9 @@ where
}
}
impl<'d, M> UsbSerialJtagRx<'d, M>
impl<'d, Dm> UsbSerialJtagRx<'d, Dm>
where
M: Mode,
Dm: Mode,
{
fn new_inner(peripheral: impl Peripheral<P = USB_DEVICE> + 'd) -> Self {
crate::into_ref!(peripheral);
@ -361,9 +361,9 @@ impl InterruptConfigurable for UsbSerialJtag<'_, Blocking> {
}
}
impl<'d, M> UsbSerialJtag<'d, M>
impl<'d, Dm> UsbSerialJtag<'d, Dm>
where
M: Mode,
Dm: Mode,
{
fn new_inner(usb_device: impl Peripheral<P = USB_DEVICE> + 'd) -> Self {
// Do NOT reset the peripheral. Doing so will result in a broken USB JTAG
@ -398,7 +398,7 @@ where
/// Split the USB Serial JTAG peripheral into a transmitter and receiver,
/// which is particularly useful when having two tasks correlating to
/// transmitting and receiving.
pub fn split(self) -> (UsbSerialJtagRx<'d, M>, UsbSerialJtagTx<'d, M>) {
pub fn split(self) -> (UsbSerialJtagRx<'d, Dm>, UsbSerialJtagTx<'d, Dm>) {
(self.rx, self.tx)
}
@ -484,18 +484,18 @@ impl Instance for USB_DEVICE {
}
}
impl<M> core::fmt::Write for UsbSerialJtag<'_, M>
impl<Dm> core::fmt::Write for UsbSerialJtag<'_, Dm>
where
M: Mode,
Dm: Mode,
{
fn write_str(&mut self, s: &str) -> core::fmt::Result {
core::fmt::Write::write_str(&mut self.tx, s)
}
}
impl<M> core::fmt::Write for UsbSerialJtagTx<'_, M>
impl<Dm> core::fmt::Write for UsbSerialJtagTx<'_, Dm>
where
M: Mode,
Dm: Mode,
{
fn write_str(&mut self, s: &str) -> core::fmt::Result {
self.write_bytes(s.as_bytes())
@ -504,9 +504,9 @@ where
}
}
impl<M> ufmt_write::uWrite for UsbSerialJtag<'_, M>
impl<Dm> ufmt_write::uWrite for UsbSerialJtag<'_, Dm>
where
M: Mode,
Dm: Mode,
{
type Error = Error;
@ -521,9 +521,9 @@ where
}
}
impl<M> ufmt_write::uWrite for UsbSerialJtagTx<'_, M>
impl<Dm> ufmt_write::uWrite for UsbSerialJtagTx<'_, Dm>
where
M: Mode,
Dm: Mode,
{
type Error = Error;
@ -542,48 +542,48 @@ where
}
}
impl<M> embedded_hal_nb::serial::ErrorType for UsbSerialJtag<'_, M>
impl<Dm> embedded_hal_nb::serial::ErrorType for UsbSerialJtag<'_, Dm>
where
M: Mode,
Dm: Mode,
{
type Error = Error;
}
impl<M> embedded_hal_nb::serial::ErrorType for UsbSerialJtagTx<'_, M>
impl<Dm> embedded_hal_nb::serial::ErrorType for UsbSerialJtagTx<'_, Dm>
where
M: Mode,
Dm: Mode,
{
type Error = Error;
}
impl<M> embedded_hal_nb::serial::ErrorType for UsbSerialJtagRx<'_, M>
impl<Dm> embedded_hal_nb::serial::ErrorType for UsbSerialJtagRx<'_, Dm>
where
M: Mode,
Dm: Mode,
{
type Error = Error;
}
impl<M> embedded_hal_nb::serial::Read for UsbSerialJtag<'_, M>
impl<Dm> embedded_hal_nb::serial::Read for UsbSerialJtag<'_, Dm>
where
M: Mode,
Dm: Mode,
{
fn read(&mut self) -> nb::Result<u8, Self::Error> {
embedded_hal_nb::serial::Read::read(&mut self.rx)
}
}
impl<M> embedded_hal_nb::serial::Read for UsbSerialJtagRx<'_, M>
impl<Dm> embedded_hal_nb::serial::Read for UsbSerialJtagRx<'_, Dm>
where
M: Mode,
Dm: Mode,
{
fn read(&mut self) -> nb::Result<u8, Self::Error> {
self.read_byte()
}
}
impl<M> embedded_hal_nb::serial::Write for UsbSerialJtag<'_, M>
impl<Dm> embedded_hal_nb::serial::Write for UsbSerialJtag<'_, Dm>
where
M: Mode,
Dm: Mode,
{
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
embedded_hal_nb::serial::Write::write(&mut self.tx, word)
@ -594,9 +594,9 @@ where
}
}
impl<M> embedded_hal_nb::serial::Write for UsbSerialJtagTx<'_, M>
impl<Dm> embedded_hal_nb::serial::Write for UsbSerialJtagTx<'_, Dm>
where
M: Mode,
Dm: Mode,
{
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
self.write_byte_nb(word)
@ -609,36 +609,36 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M> embedded_io::ErrorType for UsbSerialJtag<'_, M>
impl<Dm> embedded_io::ErrorType for UsbSerialJtag<'_, Dm>
where
M: Mode,
Dm: Mode,
{
type Error = Error;
}
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M> embedded_io::ErrorType for UsbSerialJtagTx<'_, M>
impl<Dm> embedded_io::ErrorType for UsbSerialJtagTx<'_, Dm>
where
M: Mode,
Dm: Mode,
{
type Error = Error;
}
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M> embedded_io::ErrorType for UsbSerialJtagRx<'_, M>
impl<Dm> embedded_io::ErrorType for UsbSerialJtagRx<'_, Dm>
where
M: Mode,
Dm: Mode,
{
type Error = Error;
}
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M> embedded_io::Read for UsbSerialJtag<'_, M>
impl<Dm> embedded_io::Read for UsbSerialJtag<'_, Dm>
where
M: Mode,
Dm: Mode,
{
fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
embedded_io::Read::read(&mut self.rx, buf)
@ -647,9 +647,9 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M> embedded_io::Read for UsbSerialJtagRx<'_, M>
impl<Dm> embedded_io::Read for UsbSerialJtagRx<'_, Dm>
where
M: Mode,
Dm: Mode,
{
fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
loop {
@ -663,9 +663,9 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M> embedded_io::Write for UsbSerialJtag<'_, M>
impl<Dm> embedded_io::Write for UsbSerialJtag<'_, Dm>
where
M: Mode,
Dm: Mode,
{
fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
embedded_io::Write::write(&mut self.tx, buf)
@ -678,9 +678,9 @@ where
#[cfg(any(doc, feature = "unstable"))]
#[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
impl<M> embedded_io::Write for UsbSerialJtagTx<'_, M>
impl<Dm> embedded_io::Write for UsbSerialJtagTx<'_, Dm>
where
M: Mode,
Dm: Mode,
{
fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
self.write_bytes(buf)?;

65
esp-wifi/src/wifi/mod.rs
View File

@ -1789,16 +1789,16 @@ pub(crate) fn wifi_start_scan(
/// [`Configuration::Client`] or [`Configuration::AccessPoint`].
///
/// If you want to use AP-STA mode, use `[new_ap_sta]`.
pub fn new_with_config<'d, MODE: WifiDeviceMode>(
pub fn new_with_config<'d, Dm: WifiDeviceMode>(
inited: &'d EspWifiController<'d>,
device: impl Peripheral<P = crate::hal::peripherals::WIFI> + 'd,
config: MODE::Config,
) -> Result<(WifiDevice<'d, MODE>, WifiController<'d>), WifiError> {
config: Dm::Config,
) -> Result<(WifiDevice<'d, Dm>, WifiController<'d>), WifiError> {
crate::hal::into_ref!(device);
Ok((
WifiDevice::new(unsafe { device.clone_unchecked() }, MODE::new()),
WifiController::new_with_config(inited, device, MODE::wrap_config(config))?,
WifiDevice::new(unsafe { device.clone_unchecked() }, Dm::new()),
WifiController::new_with_config(inited, device, Dm::wrap_config(config))?,
))
}
@ -1807,12 +1807,12 @@ pub fn new_with_config<'d, MODE: WifiDeviceMode>(
///
/// This function will panic if the mode is [`WifiMode::ApSta`].
/// If you want to use AP-STA mode, use `[new_ap_sta]`.
pub fn new_with_mode<'d, MODE: WifiDeviceMode>(
pub fn new_with_mode<'d, Dm: WifiDeviceMode>(
inited: &'d EspWifiController<'d>,
device: impl Peripheral<P = crate::hal::peripherals::WIFI> + 'd,
_mode: MODE,
) -> Result<(WifiDevice<'d, MODE>, WifiController<'d>), WifiError> {
new_with_config(inited, device, <MODE as Sealed>::Config::default())
_mode: Dm,
) -> Result<(WifiDevice<'d, Dm>, WifiController<'d>), WifiError> {
new_with_config(inited, device, <Dm as Sealed>::Config::default())
}
/// Creates a new [WifiDevice] and [WifiController] in AP-STA mode, with a
@ -2071,16 +2071,13 @@ impl WifiDeviceMode for WifiApDevice {
}
/// A wifi device implementing smoltcp's Device trait.
pub struct WifiDevice<'d, MODE: WifiDeviceMode> {
pub struct WifiDevice<'d, Dm: WifiDeviceMode> {
_device: PeripheralRef<'d, crate::hal::peripherals::WIFI>,
mode: MODE,
mode: Dm,
}
impl<'d, MODE: WifiDeviceMode> WifiDevice<'d, MODE> {
pub(crate) fn new(
_device: PeripheralRef<'d, crate::hal::peripherals::WIFI>,
mode: MODE,
) -> Self {
impl<'d, Dm: WifiDeviceMode> WifiDevice<'d, Dm> {
pub(crate) fn new(_device: PeripheralRef<'d, crate::hal::peripherals::WIFI>, mode: Dm) -> Self {
Self { _device, mode }
}
@ -2092,14 +2089,14 @@ impl<'d, MODE: WifiDeviceMode> WifiDevice<'d, MODE> {
/// Receives data from the Wi-Fi device (only when `smoltcp` feature is
/// disabled).
#[cfg(not(feature = "smoltcp"))]
pub fn receive(&mut self) -> Option<(WifiRxToken<MODE>, WifiTxToken<MODE>)> {
pub fn receive(&mut self) -> Option<(WifiRxToken<Dm>, WifiTxToken<Dm>)> {
self.mode.rx_token()
}
/// Transmits data through the Wi-Fi device (only when `smoltcp` feature is
/// disabled).
#[cfg(not(feature = "smoltcp"))]
pub fn transmit(&mut self) -> Option<WifiTxToken<MODE>> {
pub fn transmit(&mut self) -> Option<WifiTxToken<Dm>> {
self.mode.tx_token()
}
}
@ -2619,13 +2616,13 @@ impl<'d> WifiController<'d> {
// see https://docs.rs/smoltcp/0.7.1/smoltcp/phy/index.html
#[cfg(feature = "smoltcp")]
impl<MODE: WifiDeviceMode> Device for WifiDevice<'_, MODE> {
impl<Dm: WifiDeviceMode> Device for WifiDevice<'_, Dm> {
type RxToken<'a>
= WifiRxToken<MODE>
= WifiRxToken<Dm>
where
Self: 'a;
type TxToken<'a>
= WifiTxToken<MODE>
= WifiTxToken<Dm>
where
Self: 'a;
@ -2654,11 +2651,11 @@ impl<MODE: WifiDeviceMode> Device for WifiDevice<'_, MODE> {
#[doc(hidden)]
#[derive(Debug)]
pub struct WifiRxToken<MODE: Sealed> {
mode: MODE,
pub struct WifiRxToken<Dm: Sealed> {
mode: Dm,
}
impl<MODE: Sealed> WifiRxToken<MODE> {
impl<Dm: Sealed> WifiRxToken<Dm> {
/// Consumes the RX token and applies the callback function to the received
/// data buffer.
pub fn consume_token<R, F>(self, f: F) -> R
@ -2686,7 +2683,7 @@ impl<MODE: Sealed> WifiRxToken<MODE> {
}
#[cfg(feature = "smoltcp")]
impl<MODE: Sealed> RxToken for WifiRxToken<MODE> {
impl<Dm: Sealed> RxToken for WifiRxToken<Dm> {
fn consume<R, F>(self, f: F) -> R
where
F: FnOnce(&mut [u8]) -> R,
@ -2697,11 +2694,11 @@ impl<MODE: Sealed> RxToken for WifiRxToken<MODE> {
#[doc(hidden)]
#[derive(Debug)]
pub struct WifiTxToken<MODE: Sealed> {
mode: MODE,
pub struct WifiTxToken<Dm: Sealed> {
mode: Dm,
}
impl<MODE: Sealed> WifiTxToken<MODE> {
impl<Dm: Sealed> WifiTxToken<Dm> {
/// Consumes the TX token and applies the callback function to the received
/// data buffer.
pub fn consume_token<R, F>(self, len: usize, f: F) -> R
@ -2726,7 +2723,7 @@ impl<MODE: Sealed> WifiTxToken<MODE> {
}
#[cfg(feature = "smoltcp")]
impl<MODE: Sealed> TxToken for WifiTxToken<MODE> {
impl<Dm: Sealed> TxToken for WifiTxToken<Dm> {
fn consume<R, F>(self, len: usize, f: F) -> R
where
F: FnOnce(&mut [u8]) -> R,
@ -3124,7 +3121,7 @@ pub(crate) mod embassy {
pub(crate) static STA_RECEIVE_WAKER: AtomicWaker = AtomicWaker::new();
pub(crate) static STA_LINK_STATE_WAKER: AtomicWaker = AtomicWaker::new();
impl<MODE: WifiDeviceMode> RxToken for WifiRxToken<MODE> {
impl<Dm: WifiDeviceMode> RxToken for WifiRxToken<Dm> {
fn consume<R, F>(self, f: F) -> R
where
F: FnOnce(&mut [u8]) -> R,
@ -3133,7 +3130,7 @@ pub(crate) mod embassy {
}
}
impl<MODE: WifiDeviceMode> TxToken for WifiTxToken<MODE> {
impl<Dm: WifiDeviceMode> TxToken for WifiTxToken<Dm> {
fn consume<R, F>(self, len: usize, f: F) -> R
where
F: FnOnce(&mut [u8]) -> R,
@ -3142,13 +3139,13 @@ pub(crate) mod embassy {
}
}
impl<MODE: WifiDeviceMode> Driver for WifiDevice<'_, MODE> {
impl<Dm: WifiDeviceMode> Driver for WifiDevice<'_, Dm> {
type RxToken<'a>
= WifiRxToken<MODE>
= WifiRxToken<Dm>
where
Self: 'a;
type TxToken<'a>
= WifiTxToken<MODE>
= WifiTxToken<Dm>
where
Self: 'a;

8
esp-wifi/src/wifi/utils.rs
View File

@ -16,7 +16,7 @@ fn timestamp() -> smoltcp::time::Instant {
)
}
fn setup_iface<MODE: WifiDeviceMode>(device: &mut WifiDevice<'_, MODE>, mode: MODE) -> Interface {
fn setup_iface<Dm: WifiDeviceMode>(device: &mut WifiDevice<'_, Dm>, mode: Dm) -> Interface {
let mac = mode.mac_address();
let hw_address = HardwareAddress::Ethernet(EthernetAddress::from_bytes(&mac));
@ -26,11 +26,11 @@ fn setup_iface<MODE: WifiDeviceMode>(device: &mut WifiDevice<'_, MODE>, mode: MO
}
/// Convenient way to create an `smoltcp` ethernet interface
pub fn create_network_interface<'d, MODE: WifiDeviceMode>(
pub fn create_network_interface<'d, Dm: WifiDeviceMode>(
inited: &'d EspWifiController<'d>,
device: impl crate::hal::peripheral::Peripheral<P = crate::hal::peripherals::WIFI> + 'd,
mode: MODE,
) -> Result<(Interface, WifiDevice<'d, MODE>, WifiController<'d>), WifiError> {
mode: Dm,
) -> Result<(Interface, WifiDevice<'d, Dm>, WifiController<'d>), WifiError> {
let (mut device, controller) = crate::wifi::new_with_mode(inited, device, mode)?;
let iface = setup_iface(&mut device, mode);