Juraj Sadel
f374d6a102
Enable SPI_DMA_XX_ASYNC and _PCNT tests on ESP32 and S2, remove GPIO usage from description ( #2140 )
2024-09-11 10:23:07 +00:00
Sergio Gasquez Arcos
b5f0246129
Reordered RX-TX pairs to be consistent ( #2074 )
...
* feat: Update rx-tx order in i2s
* feat: Update rx-tx order in dma macros
* feat: Update rx-tx order in spi
* feat: Update rx-tx order in aes
* feat: Update rx-tx order in mem2mem
* feat: Update rx-tx order in twai and split methods
* feat: Update rx-tx order in twai
* feat: Update rx-tx order in twai and uart docs
* docs: Add sentence about order
* docs: Update changelog
* feat: Update rx-tx order in embassy_interrupt_spi_dma tests
* style: Rustfmt
* docs: Migrating guide
* fix: Typo
Co-authored-by: Dániel Buga <bugadani@gmail.com>
* fix: Diff
Co-authored-by: Dániel Buga <bugadani@gmail.com>
* fix: Tests rx-tx order
* fix: Update new_with_default_pins order
* feat: Update rx/tx order in hil_test::common_test_pins!
* feat: Update dma_extmem2mem example
* fix: Revert deleted input arg
* style: rustfmt
* feat: Disable test_asymmetric_dma_transfer for S2
---------
Co-authored-by: Dániel Buga <bugadani@gmail.com>
2024-09-06 09:56:10 +00:00
Juraj Sadel
17daa464ba
Enable ESP32 HIL ( #1977 )
...
* Enable ESP32 HIL
* RMT fixed
* SPI DMA partially works, _pcnt tests not working
* bckup
* finish
* readme and cleanup
* rebase + cleanup
* RMT S2 pin typo + clean forgotten comments
* review comments
* update 10000
* indentation
* replace cfg gate with cfg_if
2024-09-06 08:53:27 +00:00
Dániel Buga
99bf346898
Remove the need to manually pass clocks around ( #1999 )
...
* Clean up passing clocks to drivers
* Update changelog
* Initialise Clocks in a critical section
* Fix calling now() before init
* Fix doc
* Fix esp-wifi migration guide
* Add safety comment
* Update tests
2024-09-04 14:13:51 +00:00
Kirill Mikhailov
9bec6a1806
Adding I2C HIL test ( #2023 )
...
* i2c hil test
* pin
* fmt
* Test
* WIP (gpio test left)
* Finalize the CODE part (to be cleaned up)
fmt
* Smaller cleanup
* cleanup
* rebase
* fix
* getting last chips ready
* Addressing reviews
2024-09-04 12:45:58 +00:00
Dániel Buga
447411fb58
Rework hal initialization ( #1970 )
...
* Rework hal initialization
* Turn sw interrupt control into a virtual peripheral
* Return a tuple instead of a named struct
* Fix docs
* Remove SystemClockControl
* Move software interrupts under interrupt
* Re-document what's left in system
* Update time docs
* Update sw int docs
* Introduce Config
* Fix tests
* Remove redundant inits
* Doc
* Clean up examples&tests
* Update tests
* Add changelog entry
* Start migration guide
* Restore some convenience-imports
* Remove Config from prelude
2024-09-02 13:38:46 +00:00
Dániel Buga
ec130877b7
Disable RTT polling in HIL tests by default ( #1960 )
...
* Disable defmt-rtt by default
* Update i2s test based on changes done to async
* fmt
* Update readme
* Update more tests
2024-08-19 13:47:22 +00:00
Björn Quentin
1424f2a43d
Implement InterruptConfigurable ( #1819 )
...
* Implement `InterruptConfigurable`
* Fix doc-tests
* Clippy
* Fix lp_core_uart example
* CHANGELOG.md
* Have DEFAULT_INTERRUPT_HANDLER
* Fix docs
* Clippy
* Add `set_interrupt_handler` for WDT
2024-07-18 13:37:46 +00:00
Scott Mabin
6c3ccb6043
Add read_bytes method to uart ( #1784 )
...
* Add read_bytes method to uart
* Changelog
2024-07-11 12:55:42 +00:00
Sergio Gasquez Arcos
e46e80b8c1
Enable C2 HIL ( #1680 )
...
* ci: Enable c2 hil
* docs: Update pins and add C2
* feat: Update C2 probe-rs args
* test: Update pins and disable failing tests
* docs: Update S3 wires
* ci: Enable C2 hil tests
2024-06-26 14:17:40 +00:00
Sergio Gasquez Arcos
a33159a021
Rework Uart constructors, add UartTx and UartRx constuctors. ( #1592 )
...
* feat: Add with_pins methods for UART
* feat: Remove configure_pin methods
* docs: Update changelog
* fix: Update tests and examples
* style: Fix format
* Add UartTx/Rx constructors
* feat: Add new_with_default_pins methods
* docs: Update changelog
* feat: Remove optional cts/rts arguments
* feat: Add UartTx/Rx::new_async methods
* fix: Attach interrupt handler to new_ascyn UartRx/Tx
* style: Avoid long module paths
* feat: Make flush_tx public
* test: Use Uart async instead of UartTx/Rx async
* test: Add tests for UartTx/UartRx
* feat: Add configuration method to constuctors
* feat: Move set_rx_fifo_full_threshold and set_rx_timeout to UartRx
* docs: Fix changelog
* test: Fix executor
* feat: Configure UartRx threshold and timeout
* docs: Update changelog
* test: Update uart instance
* feat: Add default_uart0_pins macro to simplify examples
* feat: Address feedback pt1
* feat: Address feedback pt2 - Make constructors fallible
* fix: Doctest
2024-06-11 13:07:17 +00:00
