esp-hal/hil-test/tests/uart_tx_rx.rs
Sergio Gasquez Arcos a33159a021
Rework Uart constructors, add UartTx and UartRx constuctors. (#1592)
* feat: Add with_pins methods for UART

* feat: Remove configure_pin methods

* docs: Update changelog

* fix: Update tests and examples

* style: Fix format

* Add UartTx/Rx constructors

* feat: Add new_with_default_pins methods

* docs: Update changelog

* feat: Remove optional cts/rts arguments

* feat: Add UartTx/Rx::new_async methods

* fix: Attach interrupt handler to new_ascyn UartRx/Tx

* style: Avoid long module paths

* feat: Make flush_tx public

* test: Use Uart async instead of UartTx/Rx async

* test: Add tests for UartTx/UartRx

* feat: Add configuration method to constuctors

* feat: Move set_rx_fifo_full_threshold and set_rx_timeout to UartRx

* docs: Fix changelog

* test: Fix executor

* feat: Configure UartRx threshold and timeout

* docs: Update changelog

* test: Update uart instance

* feat: Add default_uart0_pins macro to simplify examples

* feat: Address feedback pt1

* feat: Address feedback pt2 - Make constructors fallible

* fix: Doctest
2024-06-11 13:07:17 +00:00

71 lines
1.5 KiB
Rust

//! UART TX/RX Test
//!
//! Folowing pins are used:
//! TX GPIP2
//! RX GPIO4
//!
//! Connect TX (GPIO2) and RX (GPIO4) pins.
//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
#![no_std]
#![no_main]
use defmt_rtt as _;
use esp_backtrace as _;
use esp_hal::{
clock::ClockControl,
gpio::Io,
peripherals::{Peripherals, UART0, UART1},
prelude::*,
system::SystemControl,
uart::{UartRx, UartTx},
Blocking,
};
use nb::block;
struct Context {
tx: UartTx<'static, UART0, Blocking>,
rx: UartRx<'static, UART1, Blocking>,
}
impl Context {
pub fn init() -> Self {
let peripherals = Peripherals::take();
let system = SystemControl::new(peripherals.SYSTEM);
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
let tx = UartTx::new(peripherals.UART0, &clocks, None, io.pins.gpio2).unwrap();
let rx = UartRx::new(peripherals.UART1, &clocks, None, io.pins.gpio4).unwrap();
Context { tx, rx }
}
}
#[cfg(test)]
#[embedded_test::tests]
mod tests {
use defmt::assert_eq;
use super::*;
#[init]
fn init() -> Context {
Context::init()
}
#[test]
#[timeout(3)]
fn test_send_receive(mut ctx: Context) {
let byte = [0x42];
ctx.tx.flush_tx().unwrap();
ctx.tx.write_bytes(&byte).unwrap();
let read = block!(ctx.rx.read_byte());
assert_eq!(read, Ok(0x42));
}
}