LED data gets transmitted using signal but not stable yet

* Mark interconnect as unstable

* Explicitly set unstable feature in HIL tests

* WIP append feature set name to artifact

* Add name to feature sets, build all combinations

* Fix tests

* Provide a looping executor for stable async tests

* Fix usb serial jtag

* Hide interconnect types

.cargo/config.toml

@@ -1,2 +1,4 @@
 [alias]
 xtask = "run --package xtask --"
+xfmt = "xtask fmt-packages"
+qa = "xtask run-example qa-test"

.github/actions/check-esp-hal/action.yml

@@ -61,3 +61,8 @@ runs:
         CI: 1
       shell: bash
       run: cargo +${{ inputs.toolchain }} xtask build-examples esp-hal ${{ inputs.device }} --debug
+    - name: Build (qa-test)
+      env:
+        CI: 1
+      shell: bash
+      run: cargo +${{ inputs.toolchain }} xtask build-examples qa-test ${{ inputs.device }} --debug

.github/workflows/changelog.yml

@@ -2,16 +2,13 @@ name: Changelog check
 
 on:
   pull_request:
-    # We will not track changes for the following packages.
+    # We will not track changes for the following packages/directories.
     paths-ignore:
-      - "/xtask/"
-      - "/esp-build/"
-      - "/esp-hal-procmacros/"
-      - "/esp-metadata/"
       - "/examples/"
-      - "/hil-tests/"
       - "/extras/"
+      - "/hil-tests/"
       - "/resources/"
+      - "/xtask/"
     # Run on labeled/unlabeled in addition to defaults to detect
     # adding/removing skip-changelog labels.
     types: [opened, reopened, labeled, unlabeled, synchronize]
@@ -33,24 +30,34 @@ jobs:
               - 'esp-alloc/**'
             esp-backtrace:
               - 'esp-backtrace/**'
+            esp-build:
+              - 'esp-build/**'
+            esp-config:
+              - 'esp-config/**'
             esp-hal:
               - 'esp-hal/**'
             esp-hal-embassy:
               - 'esp-hal-embassy/**'
+            esp-hal-procmacros:
+              - 'esp-hal-procmacros/**'
             esp-ieee802154:
               - 'esp-ieee802154/**'
             esp-lp-hal:
               - 'esp-lp-hal/**'
+            esp-metadata:
+              - 'esp-metadata/**'
             esp-println:
               - 'esp-println/**'
             esp-riscv-rt:
               - 'esp-riscv-rt/**'
-            xtensa-lx-rt:
-              - 'xtensa-lx-rt/**'
             esp-storage:
               - 'esp-storage/**'
             esp-wifi:
               - 'esp-wifi/**'
+            xtensa-lx:
+              - 'xtensa-lx/**'
+            xtensa-lx-rt:
+              - 'xtensa-lx-rt/**'
 
       - name: Check that changelog updated (esp-alloc)
         if: steps.changes.outputs.esp-alloc == 'true'
@@ -68,6 +75,22 @@ jobs:
           skipLabels: "skip-changelog"
           missingUpdateErrorMessage: "Please add a changelog entry in the esp-backtrace/CHANGELOG.md file."
 
+      - name: Check that changelog updated (esp-build)
+        if: steps.changes.outputs.esp-build == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-build/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-build/CHANGELOG.md file."
+
+      - name: Check that changelog updated (esp-config)
+        if: steps.changes.outputs.esp-config == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-config/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-config/CHANGELOG.md file."
+
       - name: Check that changelog updated (esp-hal)
         if: steps.changes.outputs.esp-hal == 'true'
         uses: dangoslen/changelog-enforcer@v3
@@ -84,6 +107,14 @@ jobs:
           skipLabels: "skip-changelog"
           missingUpdateErrorMessage: "Please add a changelog entry in the esp-hal-embassy/CHANGELOG.md file."
 
+      - name: Check that changelog updated (esp-hal-procmacros)
+        if: steps.changes.outputs.esp-hal-procmacros == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: esp-hal-procmacros/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the esp-hal-procmacros/CHANGELOG.md file."
+
       - name: Check that changelog updated (esp-ieee802154)
         if: steps.changes.outputs.esp-ieee802154 == 'true'
         uses: dangoslen/changelog-enforcer@v3
@@ -131,3 +162,19 @@ jobs:
           changeLogPath: esp-wifi/CHANGELOG.md
           skipLabels: "skip-changelog"
           missingUpdateErrorMessage: "Please add a changelog entry in the esp-wifi/CHANGELOG.md file."
+
+      - name: Check that changelog updated (xtensa-lx)
+        if: steps.changes.outputs.xtensa-lx == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: xtensa-lx/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the xtensa-lx/CHANGELOG.md file."
+
+      - name: Check that changelog updated (xtensa-lx-rt)
+        if: steps.changes.outputs.xtensa-lx-rt == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: xtensa-lx-rt/CHANGELOG.md
+          skipLabels: "skip-changelog"
+          missingUpdateErrorMessage: "Please add a changelog entry in the xtensa-lx-rt/CHANGELOG.md file."

.github/workflows/ci.yml

@@ -23,7 +23,7 @@ on:
 env:
   CARGO_TERM_COLOR: always
   GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
-  MSRV: "1.79.0"
+  MSRV: "1.83.0"
   RUSTDOCFLAGS: -Dwarnings
   DEFMT_LOG: trace
 
@@ -70,6 +70,7 @@ jobs:
       - uses: esp-rs/xtensa-toolchain@v1.5
         with:
           ldproxy: false
+          version: 1.83.0.1
       # Install the Rust stable toolchain for RISC-V devices:
       - uses: dtolnay/rust-toolchain@v1
         with:
@@ -137,10 +138,10 @@ jobs:
 
       - name: msrv RISCV (esp-wifi)
         run: |
-          cargo xtask build-package --features=esp32c2,wifi,ble,async --target=riscv32imc-unknown-none-elf   esp-wifi
-          cargo xtask build-package --features=esp32c3,wifi,ble,async --target=riscv32imc-unknown-none-elf   esp-wifi
-          cargo xtask build-package --features=esp32c6,wifi,ble,async --target=riscv32imac-unknown-none-elf  esp-wifi
-          cargo xtask build-package --features=esp32h2,ble,async --target=riscv32imac-unknown-none-elf  esp-wifi
+          cargo xtask build-package --features=esp32c2,wifi,ble,esp-hal/unstable --target=riscv32imc-unknown-none-elf   esp-wifi
+          cargo xtask build-package --features=esp32c3,wifi,ble,esp-hal/unstable --target=riscv32imc-unknown-none-elf   esp-wifi
+          cargo xtask build-package --features=esp32c6,wifi,ble,esp-hal/unstable --target=riscv32imac-unknown-none-elf  esp-wifi
+          cargo xtask build-package --features=esp32h2,ble,esp-hal/unstable --target=riscv32imac-unknown-none-elf  esp-wifi
 
         # Verify the MSRV for all Xtensa chips:
       - name: msrv Xtensa (esp-hal)
@@ -151,9 +152,9 @@ jobs:
 
       - name: msrv Xtensa (esp-wifi)
         run: |
-          cargo xtask build-package --toolchain=esp --features=esp32,wifi,ble,async   --target=xtensa-esp32-none-elf   esp-wifi
-          cargo xtask build-package --toolchain=esp --features=esp32s2,wifi,async --target=xtensa-esp32s2-none-elf esp-wifi
-          cargo xtask build-package --toolchain=esp --features=esp32s3,wifi,ble,async --target=xtensa-esp32s3-none-elf esp-wifi
+          cargo xtask build-package --toolchain=esp --features=esp32,wifi,ble,esp-hal/unstable   --target=xtensa-esp32-none-elf   esp-wifi
+          cargo xtask build-package --toolchain=esp --features=esp32s2,wifi,esp-hal/unstable     --target=xtensa-esp32s2-none-elf esp-wifi
+          cargo xtask build-package --toolchain=esp --features=esp32s3,wifi,ble,esp-hal/unstable --target=xtensa-esp32s3-none-elf esp-wifi
 
       - name: msrv (esp-lp-hal)
         run: |

.github/workflows/documentation.yml

@@ -36,6 +36,7 @@ jobs:
         with:
           default: true
           ldproxy: false
+          version: 1.83.0.1
 
       - name: Checkout repository
         uses: actions/checkout@v4

.github/workflows/hil.yml

@@ -116,30 +116,15 @@ jobs:
           buildtargets: ${{ matrix.target.soc }}
           default: true
           ldproxy: false
+          version: 1.83.0.1
 
       - name: Build tests
         run: cargo xtask build-tests ${{ matrix.target.soc }}
 
-      - name: Prepare artifact
-        run: |
-          # Create the 'tests' directory if it doesn't exist
-          mkdir -p tests
-
-          # Find ELF files in the specified path and move them to 'tests'
-          find "hil-test/target/${{ matrix.target.rust-target }}/release/deps/" -type f -exec file {} + | \
-          grep ELF | \
-          awk -F: '{print $1}' | \
-          xargs -I {} mv {} tests
-
-          # Rename files in 'tests' by removing everything after the first dash
-          for file in tests/*-*; do
-            base_name="$(basename "$file" | cut -d'-' -f1)"
-            mv "$file" "tests/$base_name"
-          done
       - uses: actions/upload-artifact@v4
         with:
           name: tests-${{ matrix.target.soc }}
-          path: /home/runner/work/esp-hal/esp-hal/tests
+          path: /home/runner/work/esp-hal/esp-hal/target/tests/${{ matrix.target.soc }}
           if-no-files-found: error
           overwrite: true
 
@@ -156,32 +141,25 @@ jobs:
           - soc: esp32c2
             runner: esp32c2-jtag
             host: aarch64
-            hubs: "1 3"
           - soc: esp32c3
             runner: esp32c3-usb
             host: armv7
-            hubs: "1-1"
           - soc: esp32c6
             runner: esp32c6-usb
             host: armv7
-            hubs: "1-1"
           - soc: esp32h2
             runner: esp32h2-usb
             host: armv7
-            hubs: "1-1"
           # Xtensa devices:
           - soc: esp32
             runner: esp32-jtag
             host: aarch64
-            hubs: "1 3"
           - soc: esp32s2
             runner: esp32s2-jtag
             host: armv7
-            hubs: "1-1"
           - soc: esp32s3
             runner: esp32s3-usb
             host: armv7
-            hubs: "1-1"
     steps:
       - uses: actions/download-artifact@v4
         with:
@@ -192,32 +170,11 @@ jobs:
         with:
           name: xtask-${{ matrix.target.host }}
 
-      - name: Cycle USB ports
-        run: |
-          export PATH=$PATH:/home/espressif/.cargo/bin
-          for i in {1..10}; do
-            # Disable all used hubs
-            for hub in ${{ matrix.target.hubs }}; do
-              sudo uhubctl -a off -l $hub
-            done
-
-            sleep 0.5
-
-            # Enable all used hubs
-            for hub in ${{ matrix.target.hubs }}; do
-              sudo uhubctl -a on -l $hub
-            done
-
-            sleep 0.5
-
-            if probe-rs list | grep -q "\[0\]:"; then
-              break
-            fi
-          done
-
       - name: Run Tests
         id: run-tests
         run: |
+          [ -f ~/setup.sh ] && source ~/setup.sh
+
           export PATH=$PATH:/home/espressif/.cargo/bin
           chmod +x xtask
           ./xtask run-elfs ${{ matrix.target.soc }} tests-${{ matrix.target.soc }}

Cargo.toml

@@ -21,6 +21,7 @@ exclude  = [
     "extras/esp-wifishark",
     "extras/ieee802154-sniffer",
     "hil-test",
+    "qa-test",
     "xtensa-lx",
     "xtensa-lx-rt",
     "xtensa-lx-rt/procmacros",

README.md

@@ -20,7 +20,7 @@ If you have any questions, comments, or concerns, please [open an issue], [start
 
 > [!NOTE]
 >
-> This project is still in the relatively early stages of development, and as such there should be no expectation of API stability. A significant number of peripherals currently have drivers implemented but have varying levels of functionality. For most tasks, this should be usable already, however some more advanced or uncommon features may not yet be implemented.
+> This repository includes crates that are at various stages of maturity and stability. While many functionalities have already been implemented and are usable for most tasks, certain advanced or less common features may still be under development. Each crate may offer different levels of functionality and guarantees.
 
 [esp-lp-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp-lp-hal
 [esp-idf-svc]: https://github.com/esp-rs/esp-idf-svc

documentation/API-GUIDELINES.md

@@ -7,44 +7,80 @@ This is a living document - make sure to check the latest version of this docume
 > [!NOTE]
 > Not all of the currently existing code follows this guideline, yet.
 
-In general, the [Rust API Guidelines](https://rust-lang.github.io/api-guidelines) apply to all projects in the ESP-RS GitHub organization where possible. (`C-RW-VALUE` and `C-SERDE` do not apply)
+In general, the [Rust API Guidelines](https://rust-lang.github.io/api-guidelines) apply to all projects in the ESP-RS GitHub organization where possible.
+  - Especially for public API but if possible also for internal APIs.
 
-Especially for public API but if possible also for internal APIs.
+## Amendments to the Rust API Guidelines
 
-The following paragraphs contain additional recommendations.
+- `C-RW-VALUE` and `C-SERDE` do not apply.
+- `C-COMMON-TRAITS`:
+  The set of traits to implement depend on the type and use case. In esp-hal, we can highlight a few such use cases and provide recommendations what should be implemented. If nothing here applies, use your best judgement.
+  - Driver structures: `Debug`
+  - Driver configuration: `Default`, `Debug`, `PartialEq/Eq`, `Clone/Copy`, `Hash`
+    - `Clone/Copy` depends on the size and contents of the structure. They should generally be implemented, unless there is a good reason not to.
+    - The `Default` configuration needs to make sense for a particular driver, and applying the default configuration must not fail.
+  - Error types: `Debug`, `PartialEq/Eq`, `Clone/Copy`, `Hash`, `Error`, `Display`
 
 ## Construction and Destruction of Drivers
 
-- Drivers take peripherals and pins via the `PeripheralRef` pattern - they don't consume peripherals/pins.
-- Consider adding a `Drop` implementation resetting the peripheral to idle state.
-- Consider using a builder-like pattern for configuration which must be done during initialization.
+- Drivers must take peripherals via the `PeripheralRef` pattern - they don't consume peripherals directly.
+- If a driver requires pins, those pins should be configured using `fn with_signal_name(self, pin: impl Peripheral<P = impl PeripheralInput> + 'd) -> Self` or `fn with_signal_name(self, pin: impl Peripheral<P = impl PeripheralOutput> + 'd) -> Self`
+- If a driver supports multiple peripheral instances (for example, I2C0 is one such instance):
+  - The driver should not be generic over the peripheral instance.
+  - The author must to use `crate::any_peripheral` to define the "any" peripheral instance type.
+  - The driver must implement a `new` constructor that automatically converts the peripheral instance into the any type.
+- If a driver is configurable, configuration options should be implemented as a `Config` struct in the same module where the driver is located.
+  - The driver's constructor should take the config struct by value, and it should return `Result<Self, ConfigError>`.
+  - The `ConfigError` enum should be separate from other `Error` enums used by the driver.
+  - The driver should implement `fn apply_config(&mut self, config: &Config) -> Result<(), ConfigError>`.
+  - In case the driver's configuration is infallible (all possible combinations of options are supported by the hardware), the `ConfigError` should be implemented as an empty `enum`.
+  - Configuration structs should derive `procmacros::BuilderLite` in order to automatically implement the Builder Lite pattern for them.
+- If a driver implements both blocking and async operations, or only implements blocking operations, but may support asynchronous ones in the future, the driver's type signature must include a `crate::Mode` type parameter.
+- By default, constructors must configure the driver for blocking mode. The driver must implement `into_async` (and a matching `into_blocking`) function that reconfigures the driver.
+  - `into_async` must configure the driver and/or the associated DMA channels. This most often means enabling an interrupt handler.
+  - `into_blocking` must undo the configuration done by `into_async`.
+- The asynchronous driver implementation must also expose the blocking methods (except for interrupt related functions).
+- Drivers must have a `Drop` implementation resetting the peripheral to idle state. There are some exceptions to this:
+  - GPIO where common usage is to "set and drop" so they can't be changed
+  - Where we don't want to disable the peripheral as it's used internally, for example SYSTIMER is used by `time::now()` API. See `KEEP_ENABLED` in src/system.rs
+  - A driver doesn't need to do anything special for deinitialization and has a `PeripheralGuard` field which implements the disabling and resetting of the peripheral.
+- Consider using a builder-like pattern for driver construction.
 
 ## Interoperability
 
-- `cfg` gated `defmt` derives and impls are added to new structs and enums.
+- Don't use `log::XXX!` macros directly - use the wrappers in `fmt.rs` (e.g. just `info!` instead of `log::info!` or importing `log::*`)!
+- Consider implementing common ecosystem traits, like the ones in `embedded-hal` or `embassy-embedded-hal`.
+  - Where the guidelines suggest implementing `Debug`, `defmt::Format` should also be implemented.
+    - The `defmt::Format` implementation needs to be gated behind the `defmt` feature.
     - see [this example](https://github.com/esp-rs/esp-hal/blob/df2b7bd8472cc1d18db0d9441156575570f59bb3/esp-hal/src/spi/mod.rs#L15)
     - e.g. `#[cfg_attr(feature = "defmt", derive(defmt::Format))]`
-- Don't use `log::XXX!` macros directly - use the wrappers in `fmt.rs` (e.g. just `info!` instead of `log::info!` or importing `log::*`)!
+  - Implementations of common, but unstable traits (e.g. `embassy_embedded_hal::SetConfig`) need to be gated with the `unstable` feature.
 
 ## API Surface
 
-- Add `#[deny(missing_docs)]` to new modules or when reworking a larger part of a module. In the end we will require this for whole crates.
-- API documentation shouldn't be an afterthought
-- Private details shouldn't leak into the public API, and should be made private where technically possible.
-- Implementation details that _need_ to be public should be marked with `#[doc(hidden)]` and a comment as to why it needs to be public.
-- Functions which technically need to be public but shouldn't be callable by the user need to be sealed.
+- API documentation must be provided for every new driver and API.
+- Private details should not leak into the public API, and should be made private where technically possible.
+  - Implementation details that _need_ to be public should be marked with `#[doc(hidden)]` and a comment as to why it needs to be public.
+    - For the time being, this includes any `Instance` traits, and `State` or `Info` structs as well.
+  - Functions which technically need to be public but shouldn't be callable by the user need to be sealed.
     - see [this example in Rust's core library](https://github.com/rust-lang/rust/blob/044a28a4091f2e1a5883f7fa990223f8b200a2cd/library/core/src/error.rs#L89-L100)
-- Any public traits, that **must not** be implemented downstream need to be `Sealed`
+- Any public traits, that **must not** be implemented downstream need to be `Sealed`.
 - Prefer compile-time checks over runtime checks where possible, prefer a fallible API over panics.
-- Follow naming conventions in order to be consistent across drivers - take inspiration from existing drivers
+- Follow naming conventions in order to be consistent across drivers - take inspiration from existing drivers.
 - Design APIs in a way that they are easy to use.
 - Driver API decisions should be assessed individually, don't _not_ just follow embedded-hal or other ecosystem trait crates. Expose the capabilities of the hardware. (Ecosystem traits are implemented on top of the inherent API)
 - Avoid type states and extraneous generics whenever possible
-    - These often lead to usability problems, and tend to just complicate things needlessly - sometimes it can be a good tradeoff to make a type not ZST
-    - Common cases of useless type info is storing pin information - this is usually not required after configuring the pins and will bloat the complexity of the type massively. When following the `PeripheralRef` pattern it's not needed in order to keep users from re-using the pin while in use
+  - These often lead to usability problems, and tend to just complicate things needlessly - sometimes it can be a good tradeoff to make a type not ZST
+  - Common cases of useless type info is storing pin information - this is usually not required after configuring the pins and will bloat the complexity of the type massively. When following the `PeripheralRef` pattern it's not needed in order to keep users from re-using the pin while in use
 - Avoiding `&mut self` when `&self` is safe to use. `&self` is generally easier to use as an API. Typical applications of this are where the methods just do writes to registers which don't have side effects.
-    - For example starting a timer is fine for `&self`, worst case a timer will be started twice if two parts of the program call it. You can see a real example of this [here](https://github.com/esp-rs/esp-hal/pull/1500#pullrequestreview-2015911974)
 - Maintain order consistency in the API, such as in the case of pairs like RX/TX.
+- If your driver provides a way to listen for interrupts, the interrupts should be listed in a `derive(EnumSetType)` enum as opposed to one function per interrupt flag.
+- If a driver only implements a subset of a peripheral's capabilities, it should be placed in the `peripheral::subcategory` module.
+  - For example, if a driver implements the slave-mode I2C driver, it should be placed into `i2c::slave`.
+  - This helps us reducing the need of introducing breaking changes if we implement additional functionalities.
+- Avoid abbreviations and contractions in the API, where possible.
+  - Saving a few characters may introduce ambiguity, e.g `SpiTransDone`, is it `Transmit` or `Transfer`?
+  - Common abbreviations, that are well understood such as `Dma` are perfectly fine.
 
 ## Maintainability
 
@@ -52,9 +88,19 @@ The following paragraphs contain additional recommendations.
 - Every line of code is a liability. Take some time to see if your implementation can be simplified before opening a PR.
 - If you are porting code from ESP-IDF (or anything else), please include a link WITH the commit hash in it, and please highlight the relevant line(s) of code
 - If necessary provide further context as comments (consider linking to code, PRs, TRM - make sure to use permanent links, e.g. include the hash when linking to a Git repository, include the revision, page number etc. when linking to TRMs)
+- Prefer line comments (//) to block comments (/* ... */)
 - Generally, follow common "good practices" and idiomatic Rust style
 - All `Future` objects (public or private) must be marked with ``#[must_use = "futures do nothing unless you `.await` or poll them"]``.
-- Prefer `cfg_if!` over multiple exclusive `#[cfg]` attributes. `cfg_if!` visually divides the options, often results in simpler conditions and simplifies adding new branches in the future.
+- Prefer `cfg_if!` (or, if the branches just pick between separate values of the same variable, `cfg!()`) over multiple exclusive `#[cfg]` attributes. `cfg_if!`/`cfg!()` visually divide the options, often results in simpler conditions and simplifies adding new branches in the future.
+
+## Driver implementation
+
+- If a common `Instance` trait is used for multiple peripherals, those traits should not have any logic implemented in them.
+- The `Instance` traits should only be used to access information about a peripheral instance.
+- The internal implementation of the driver should be non-generic over the peripheral instance. This helps the compiler produce smaller code.
+- The author is encouraged to return a static shared reference to an `Info` and a `State` structure from the `Instance` trait.
+  - The `Info` struct should describe the peripheral. Do not use any interior mutability.
+  - The `State` struct should contain counters, wakers and other, mutable state. As this is accessed via a shared reference, interior mutability and atomic variables are preferred.
 
 ## Modules Documentation
 
@@ -88,4 +134,11 @@ Modules should have the following documentation format:
     ```
     #![doc = concat!("[ESP-IDF documentation](https://docs.espressif.com/projects/esp-idf/en/latest/", crate::soc::chip!(), "/api-reference/peripherals/etm.html)")]
     ```
-- Documentation examples should be short and basic, for more complex scenarios, create an example.
+  - In case of referencing a TRM chapter, use the `crate::trm_markdown_link!()` macro. If you are referring to a particular chapter, you may use `crate::trm_markdown_link!("#chapter_anchor")`.
+- Documentation examples must be short
+  - But must also provide value beyond what the rustdoc generated docs show
+    - Showing a snippet of a slightly more complex interaction, for example inverting the signals for a driver
+    - Showing construction if it is more complex, or requires some non-obvious precursor steps. Think about this for drivers that take a generic instance to construct, rustdoc doesn't do a good job of showing what concrete things can be passed into a constructor.
+  - For more complex scenarios, create an example.
+- Use rustdoc syntax for linking to other documentation items instead of markdown links where possible
+  - https://doc.rust-lang.org/rustdoc/write-documentation/linking-to-items-by-name.html

esp-alloc/.clippy.toml

@@ -0,0 +1 @@
+avoid-breaking-exported-api = false

esp-alloc/CHANGELOG.md

@@ -9,6 +9,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ### Added
 
+- `esp_alloc::HEAP.stats()` can now be used to get heap usage informations (#2137)
+
 ### Changed
 
 ### Fixed

esp-alloc/Cargo.toml

@@ -4,29 +4,34 @@ version      = "0.5.0"
 edition      = "2021"
 rust-version = "1.68"
 description  = "A heap allocator for Espressif devices"
+keywords     = ["allocator", "embedded", "embedded-hal", "esp32", "espressif", "memory"]
+categories   = ["embedded", "memory-management", "no-std"]
 repository   = "https://github.com/esp-rs/esp-hal"
 license      = "MIT OR Apache-2.0"
 
-keywords = [
-    "allocator",
-    "esp32",
-    "riscv",
-    "xtensa",
-]
-categories = [
-    "memory-management",
-    "no-std",
-]
-
 [package.metadata.docs.rs]
 default-target = "riscv32imc-unknown-none-elf"
 features       = ["nightly"]
 
 [dependencies]
+defmt                 = { version = "0.3.8", optional = true }
+cfg-if                = "1.0.0"
 critical-section      = "1.1.3"
 enumset               = "1.1.5"
 linked_list_allocator = { version = "0.10.5", default-features = false, features = ["const_mut_refs"] }
+document-features     = "0.2.10"
 
 [features]
 default = []
 nightly = []
+
+## Implement `defmt::Format` on certain types.
+defmt = ["dep:defmt"]
+
+## Enable this feature if you want to keep stats about the internal heap usage such as:
+## - Max memory usage since initialization of the heap
+## - Total allocated memory since initialization of the heap
+## - Total freed memory since initialization of the heap
+##
+## ⚠️ Note: Enabling this feature will require extra computation every time alloc/dealloc is called.
+internal-heap-stats = []

esp-alloc/src/lib.rs

@@ -51,7 +51,28 @@
 //! ```rust
 //! let large_buffer: Vec<u8, _> = Vec::with_capacity_in(1048576, &PSRAM_ALLOCATOR);
 //! ```
-
+//!
+//! You can also get stats about the heap usage at anytime with:
+//! ```rust
+//! let stats: HeapStats = esp_alloc::HEAP.stats();
+//! // HeapStats implements the Display and defmt::Format traits, so you can pretty-print the heap stats.
+//! println!("{}", stats);
+//! ```
+//!
+//! ```txt
+//! HEAP INFO
+//! Size: 131068
+//! Current usage: 46148
+//! Max usage: 46148
+//! Total freed: 0
+//! Total allocated: 46148
+//! Memory Layout:
+//! Internal | ████████████░░░░░░░░░░░░░░░░░░░░░░░ | Used: 35% (Used 46148 of 131068, free: 84920)
+//! Unused   | ░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░ |
+//! Unused   | ░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░ |
+//! ```
+//! ## Feature Flags
+#![doc = document_features::document_features!()]
 #![no_std]
 #![cfg_attr(feature = "nightly", feature(allocator_api))]
 #![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
@@ -63,6 +84,7 @@ use core::alloc::{AllocError, Allocator};
 use core::{
     alloc::{GlobalAlloc, Layout},
     cell::RefCell,
+    fmt::Display,
     ptr::{self, NonNull},
 };
 
@@ -76,7 +98,22 @@ pub static HEAP: EspHeap = EspHeap::empty();
 
 const NON_REGION: Option<HeapRegion> = None;
 
-#[derive(EnumSetType)]
+const BAR_WIDTH: usize = 35;
+
+fn write_bar(f: &mut core::fmt::Formatter<'_>, usage_percent: usize) -> core::fmt::Result {
+    let used_blocks = BAR_WIDTH * usage_percent / 100;
+    (0..used_blocks).try_for_each(|_| write!(f, "█"))?;
+    (used_blocks..BAR_WIDTH).try_for_each(|_| write!(f, "░"))
+}
+
+#[cfg(feature = "defmt")]
+fn write_bar_defmt(fmt: defmt::Formatter, usage_percent: usize) {
+    let used_blocks = BAR_WIDTH * usage_percent / 100;
+    (0..used_blocks).for_each(|_| defmt::write!(fmt, "█"));
+    (used_blocks..BAR_WIDTH).for_each(|_| defmt::write!(fmt, "░"));
+}
+
+#[derive(EnumSetType, Debug)]
 /// Describes the properties of a memory region
 pub enum MemoryCapability {
     /// Memory must be internal; specifically it should not disappear when
@@ -86,6 +123,75 @@ pub enum MemoryCapability {
     External,
 }
 
+/// Stats for a heap region
+#[derive(Debug)]
+pub struct RegionStats {
+    /// Total usable size of the heap region in bytes.
+    size: usize,
+
+    /// Currently used size of the heap region in bytes.
+    used: usize,
+
+    /// Free size of the heap region in bytes.
+    free: usize,
+
+    /// Capabilities of the memory region.
+    capabilities: EnumSet<MemoryCapability>,
+}
+
+impl Display for RegionStats {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        let usage_percent = self.used * 100 / self.size;
+
+        // Display Memory type
+        if self.capabilities.contains(MemoryCapability::Internal) {
+            write!(f, "Internal")?;
+        } else if self.capabilities.contains(MemoryCapability::External) {
+            write!(f, "External")?;
+        } else {
+            write!(f, "Unknown")?;
+        }
+
+        write!(f, " | ")?;
+
+        write_bar(f, usage_percent)?;
+
+        write!(
+            f,
+            " | Used: {}% (Used {} of {}, free: {})",
+            usage_percent, self.used, self.size, self.free
+        )
+    }
+}
+
+#[cfg(feature = "defmt")]
+impl defmt::Format for RegionStats {
+    fn format(&self, fmt: defmt::Formatter) {
+        let usage_percent = self.used * 100 / self.size;
+
+        if self.capabilities.contains(MemoryCapability::Internal) {
+            defmt::write!(fmt, "Internal");
+        } else if self.capabilities.contains(MemoryCapability::External) {
+            defmt::write!(fmt, "External");
+        } else {
+            defmt::write!(fmt, "Unknown");
+        }
+
+        defmt::write!(fmt, " | ");
+
+        write_bar_defmt(fmt, usage_percent);
+
+        defmt::write!(
+            fmt,
+            " | Used: {}% (Used {} of {}, free: {})",
+            usage_percent,
+            self.used,
+            self.size,
+            self.free
+        );
+    }
+}
+
 /// A memory region to be used as heap memory
 pub struct HeapRegion {
     heap: Heap,
@@ -112,6 +218,104 @@ impl HeapRegion {
 
         Self { heap, capabilities }
     }
+
+    /// Return stats for the current memory region
+    pub fn stats(&self) -> RegionStats {
+        RegionStats {
+            size: self.heap.size(),
+            used: self.heap.used(),
+            free: self.heap.free(),
+            capabilities: self.capabilities,
+        }
+    }
+}
+
+/// Stats for a heap allocator
+///
+/// Enable the "internal-heap-stats" feature if you want collect additional heap
+/// informations at the cost of extra cpu time during every alloc/dealloc.
+#[derive(Debug)]
+pub struct HeapStats {
+    /// Granular stats for all the configured memory regions.
+    region_stats: [Option<RegionStats>; 3],
+
+    /// Total size of all combined heap regions in bytes.
+    size: usize,
+
+    /// Current usage of the heap across all configured regions in bytes.
+    current_usage: usize,
+
+    /// Estimation of the max used heap in bytes.
+    #[cfg(feature = "internal-heap-stats")]
+    max_usage: usize,
+
+    /// Estimation of the total allocated bytes since initialization.
+    #[cfg(feature = "internal-heap-stats")]
+    total_allocated: usize,
+
+    /// Estimation of the total freed bytes since initialization.
+    #[cfg(feature = "internal-heap-stats")]
+    total_freed: usize,
+}
+
+impl Display for HeapStats {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        writeln!(f, "HEAP INFO")?;
+        writeln!(f, "Size: {}", self.size)?;
+        writeln!(f, "Current usage: {}", self.current_usage)?;
+        #[cfg(feature = "internal-heap-stats")]
+        {
+            writeln!(f, "Max usage: {}", self.max_usage)?;
+            writeln!(f, "Total freed: {}", self.total_freed)?;
+            writeln!(f, "Total allocated: {}", self.total_allocated)?;
+        }
+        writeln!(f, "Memory Layout: ")?;
+        for region in self.region_stats.iter() {
+            if let Some(region) = region.as_ref() {
+                region.fmt(f)?;
+                writeln!(f)?;
+            } else {
+                // Display unused memory regions
+                write!(f, "Unused   | ")?;
+                write_bar(f, 0)?;
+                writeln!(f, " |")?;
+            }
+        }
+        Ok(())
+    }
+}
+
+#[cfg(feature = "defmt")]
+impl defmt::Format for HeapStats {
+    fn format(&self, fmt: defmt::Formatter) {
+        defmt::write!(fmt, "HEAP INFO\n");
+        defmt::write!(fmt, "Size: {}\n", self.size);
+        defmt::write!(fmt, "Current usage: {}\n", self.current_usage);
+        #[cfg(feature = "internal-heap-stats")]
+        {
+            defmt::write!(fmt, "Max usage: {}\n", self.max_usage);
+            defmt::write!(fmt, "Total freed: {}\n", self.total_freed);
+            defmt::write!(fmt, "Total allocated: {}\n", self.total_allocated);
+        }
+        defmt::write!(fmt, "Memory Layout:\n");
+        for region in self.region_stats.iter() {
+            if let Some(region) = region.as_ref() {
+                defmt::write!(fmt, "{}\n", region);
+            } else {
+                defmt::write!(fmt, "Unused   | ");
+                write_bar_defmt(fmt, 0);
+                defmt::write!(fmt, " |\n");
+            }
+        }
+    }
+}
+
+/// Internal stats to keep track across multiple regions.
+#[cfg(feature = "internal-heap-stats")]
+struct InternalHeapStats {
+    max_usage: usize,
+    total_allocated: usize,
+    total_freed: usize,
 }
 
 /// A memory allocator
@@ -120,6 +324,8 @@ impl HeapRegion {
 /// memory in regions satisfying specific needs.
 pub struct EspHeap {
     heap: Mutex<RefCell<[Option<HeapRegion>; 3]>>,
+    #[cfg(feature = "internal-heap-stats")]
+    internal_heap_stats: Mutex<RefCell<InternalHeapStats>>,
 }
 
 impl EspHeap {
@@ -127,6 +333,12 @@ impl EspHeap {
     pub const fn empty() -> Self {
         EspHeap {
             heap: Mutex::new(RefCell::new([NON_REGION; 3])),
+            #[cfg(feature = "internal-heap-stats")]
+            internal_heap_stats: Mutex::new(RefCell::new(InternalHeapStats {
+                max_usage: 0,
+                total_allocated: 0,
+                total_freed: 0,
+            })),
         }
     }
 
@@ -189,6 +401,51 @@ impl EspHeap {
         })
     }
 
+    /// Return usage stats for the [Heap].
+    ///
+    /// Note:
+    /// [HeapStats] directly implements [Display], so this function can be
+    /// called from within `println!()` to pretty-print the usage of the
+    /// heap.
+    pub fn stats(&self) -> HeapStats {
+        const EMPTY_REGION_STAT: Option<RegionStats> = None;
+        let mut region_stats: [Option<RegionStats>; 3] = [EMPTY_REGION_STAT; 3];
+
+        critical_section::with(|cs| {
+            let mut used = 0;
+            let mut free = 0;
+            let regions = self.heap.borrow_ref(cs);
+            for (id, region) in regions.iter().enumerate() {
+                if let Some(region) = region.as_ref() {
+                    let stats = region.stats();
+                    free += stats.free;
+                    used += stats.used;
+                    region_stats[id] = Some(region.stats());
+                }
+            }
+
+            cfg_if::cfg_if! {
+                if #[cfg(feature = "internal-heap-stats")] {
+                    let internal_heap_stats = self.internal_heap_stats.borrow_ref(cs);
+                    HeapStats {
+                        region_stats,
+                        size: free + used,
+                        current_usage: used,
+                        max_usage: internal_heap_stats.max_usage,
+                        total_allocated: internal_heap_stats.total_allocated,
+                        total_freed: internal_heap_stats.total_freed,
+                    }
+                } else {
+                    HeapStats {
+                        region_stats,
+                        size: free + used,
+                        current_usage: used,
+                    }
+                }
+            }
+        })
+    }
+
     /// Returns an estimate of the amount of bytes available.
     pub fn free(&self) -> usize {
         self.free_caps(EnumSet::empty())
@@ -232,6 +489,8 @@ impl EspHeap {
         layout: Layout,
     ) -> *mut u8 {
         critical_section::with(|cs| {
+            #[cfg(feature = "internal-heap-stats")]
+            let before = self.used();
             let mut regions = self.heap.borrow_ref_mut(cs);
             let mut iter = (*regions).iter_mut().filter(|region| {
                 if region.is_some() {
@@ -256,7 +515,22 @@ impl EspHeap {
                 }
             };
 
-            res.map_or(ptr::null_mut(), |allocation| allocation.as_ptr())
+            res.map_or(ptr::null_mut(), |allocation| {
+                #[cfg(feature = "internal-heap-stats")]
+                {
+                    let mut internal_heap_stats = self.internal_heap_stats.borrow_ref_mut(cs);
+                    drop(regions);
+                    // We need to call used because [linked_list_allocator::Heap] does internal size
+                    // alignment so we cannot use the size provided by the layout.
+                    let used = self.used();
+
+                    internal_heap_stats.total_allocated += used - before;
+                    internal_heap_stats.max_usage =
+                        core::cmp::max(internal_heap_stats.max_usage, used);
+                }
+
+                allocation.as_ptr()
+            })
         })
     }
 }
@@ -272,6 +546,8 @@ unsafe impl GlobalAlloc for EspHeap {
         }
 
         critical_section::with(|cs| {
+            #[cfg(feature = "internal-heap-stats")]
+            let before = self.used();
             let mut regions = self.heap.borrow_ref_mut(cs);
             let mut iter = (*regions).iter_mut();
 
@@ -280,6 +556,16 @@ unsafe impl GlobalAlloc for EspHeap {
                     region.heap.deallocate(NonNull::new_unchecked(ptr), layout);
                 }
             }
+
+            #[cfg(feature = "internal-heap-stats")]
+            {
+                let mut internal_heap_stats = self.internal_heap_stats.borrow_ref_mut(cs);
+                drop(regions);
+                // We need to call `used()` because [linked_list_allocator::Heap] does internal
+                // size alignment so we cannot use the size provided by the
+                // layout.
+                internal_heap_stats.total_freed += before - self.used();
+            }
         })
     }
 }

esp-alloc/src/macros.rs

@@ -29,9 +29,9 @@ macro_rules! heap_allocator {
 /// ```
 #[macro_export]
 macro_rules! psram_allocator {
-    ($peripheral:expr,$psram_module:path) => {{
+    ($peripheral:expr, $psram_module:path) => {{
         use $psram_module as _psram;
-        let (start, size) = _psram::init_psram($peripheral, _psram::PsramConfig::default());
+        let (start, size) = _psram::psram_raw_parts(&$peripheral);
         unsafe {
             $crate::HEAP.add_region($crate::HeapRegion::new(
                 start,

esp-backtrace/Cargo.toml

@@ -4,6 +4,8 @@ version      = "0.14.2"
 edition      = "2021"
 rust-version = "1.76.0"
 description  = "Bare-metal backtrace support for Espressif devices"
+keywords     = ["backtrace", "embedded", "esp32", "espressif"]
+categories   = ["embedded", "hardware-support", "no-std"]
 repository   = "https://github.com/esp-rs/esp-hal"
 license      = "MIT OR Apache-2.0"
 

esp-build/CHANGELOG.md

@@ -0,0 +1,24 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## [Unreleased]
+
+### Added
+
+### Fixed
+
+### Changed
+
+- Use `panic` instead of `process::exit` in esp-build (#2402 )
+
+### Removed
+
+## [0.1.0] - 2024-04-17
+
+- Initial release
+
+[Unreleased]: https://github.com/esp-rs/esp-hal/commits/main/esp-build?since=2024-04-17

esp-build/src/lib.rs

@@ -2,7 +2,7 @@
 
 #![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
 
-use std::{io::Write as _, process};
+use std::io::Write as _;
 
 use proc_macro::TokenStream;
 use quote::ToTokens;
@@ -26,7 +26,7 @@ use termcolor::{Color, ColorChoice, ColorSpec, StandardStream, WriteColor};
 #[proc_macro]
 pub fn error(input: TokenStream) -> TokenStream {
     do_alert(Color::Red, input);
-    process::exit(1);
+    panic!("Build failed");
 }
 
 /// Print a build warning.

esp-config/CHANGELOG.md

@@ -0,0 +1,32 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## [Unreleased]
+
+### Added
+
+### Fixed
+
+- Users no longer have to manually import `esp_config_int_parse`. (#2630)
+
+### Changed
+
+- Crate prefixes and configuration keys are now separated by `_CONFIG_` (#2848)
+
+### Removed
+
+## 0.2.0 - 2024-11-20
+
+### Added
+
+- Add configuration validation (#2475)
+
+## 0.1.0 - 2024-10-10
+
+- Initial release
+
+[Unreleased]: https://github.com/esp-rs/esp-hal/commits/main/esp-config?since=2024-11-20

esp-config/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name         = "esp-config"
-version      = "0.1.0"
+version      = "0.2.0"
 edition      = "2021"
 rust-version = "1.79.0"
 description  = "Configure projects using esp-hal and related packages"

esp-config/src/generate.rs

@@ -1,77 +1,246 @@
-use core::fmt::Write;
-use std::{collections::HashMap, env, fs, path::PathBuf};
+use std::{
+    collections::HashMap,
+    env,
+    fmt::{self, Write as _},
+    fs,
+    ops::Range,
+    path::PathBuf,
+};
 
 const DOC_TABLE_HEADER: &str = r#"
 | Name | Description | Default value |
 |------|-------------|---------------|
 "#;
-const CHOSEN_TABLE_HEADER: &str = r#"
+
+const SELECTED_TABLE_HEADER: &str = r#"
 | Name | Selected value |
 |------|----------------|
 "#;
 
-#[derive(Clone, Debug, PartialEq, Eq)]
-pub struct ParseError(String);
-
-#[derive(Clone, Debug, PartialEq, Eq)]
-pub enum Value {
-    SignedInteger(isize),
-    UnsignedInteger(usize),
-    Bool(bool),
-    String(String),
+/// Configuration errors.
+#[derive(Debug, Clone, PartialEq, Eq)]
+pub enum Error {
+    /// Parse errors.
+    Parse(String),
+    /// Validation errors.
+    Validation(String),
 }
 
-impl Value {
-    fn parse_in_place(&mut self, s: &str) -> Result<(), ParseError> {
-        *self = match self {
-            Value::Bool(_) => match s.to_lowercase().as_ref() {
-                "false" | "no" | "n" | "f" => Value::Bool(false),
-                "true" | "yes" | "y" | "t" => Value::Bool(true),
-                _ => return Err(ParseError(format!("Invalid boolean value: {}", s))),
-            },
-            Value::SignedInteger(_) => Value::SignedInteger(
-                match s.as_bytes() {
-                    [b'0', b'x', ..] => isize::from_str_radix(&s[2..], 16),
-                    [b'0', b'o', ..] => isize::from_str_radix(&s[2..], 8),
-                    [b'0', b'b', ..] => isize::from_str_radix(&s[2..], 2),
-                    _ => isize::from_str_radix(&s, 10),
-                }
-                .map_err(|_| ParseError(format!("Invalid signed numerical value: {}", s)))?,
-            ),
-            Value::UnsignedInteger(_) => Value::UnsignedInteger(
-                match s.as_bytes() {
-                    [b'0', b'x', ..] => usize::from_str_radix(&s[2..], 16),
-                    [b'0', b'o', ..] => usize::from_str_radix(&s[2..], 8),
-                    [b'0', b'b', ..] => usize::from_str_radix(&s[2..], 2),
-                    _ => usize::from_str_radix(&s, 10),
-                }
-                .map_err(|_| ParseError(format!("Invalid unsigned numerical value: {}", s)))?,
-            ),
-            Value::String(_) => Value::String(String::from(s)),
-        };
-        Ok(())
+impl Error {
+    /// Convenience function for creating parse errors.
+    pub fn parse<S>(message: S) -> Self
+    where
+        S: Into<String>,
+    {
+        Self::Parse(message.into())
     }
 
-    fn as_string(&self) -> String {
+    /// Convenience function for creating validation errors.
+    pub fn validation<S>(message: S) -> Self
+    where
+        S: Into<String>,
+    {
+        Self::Validation(message.into())
+    }
+}
+
+impl fmt::Display for Error {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
         match self {
-            Value::Bool(value) => String::from(if *value { "true" } else { "false" }),
-            Value::SignedInteger(value) => format!("{}", value),
-            Value::UnsignedInteger(value) => format!("{}", value),
-            Value::String(value) => value.clone(),
+            Error::Parse(message) => write!(f, "{message}"),
+            Error::Validation(message) => write!(f, "{message}"),
         }
     }
 }
 
-/// Generate and parse config from a prefix, and array of key, default,
-/// description tuples.
+/// Supported configuration value types.
+#[derive(Debug, Clone, PartialEq, Eq)]
+pub enum Value {
+    /// Booleans.
+    Bool(bool),
+    /// Integers.
+    Integer(i128),
+    /// Strings.
+    String(String),
+}
+
+// TODO: Do we want to handle negative values for non-decimal values?
+impl Value {
+    fn parse_in_place(&mut self, s: &str) -> Result<(), Error> {
+        *self = match self {
+            Value::Bool(_) => match s {
+                "true" => Value::Bool(true),
+                "false" => Value::Bool(false),
+                _ => {
+                    return Err(Error::parse(format!(
+                        "Expected 'true' or 'false', found: '{s}'"
+                    )))
+                }
+            },
+            Value::Integer(_) => {
+                let inner = match s.as_bytes() {
+                    [b'0', b'x', ..] => i128::from_str_radix(&s[2..], 16),
+                    [b'0', b'o', ..] => i128::from_str_radix(&s[2..], 8),
+                    [b'0', b'b', ..] => i128::from_str_radix(&s[2..], 2),
+                    _ => i128::from_str_radix(&s, 10),
+                }
+                .map_err(|_| Error::parse(format!("Expected valid intger value, found: '{s}'")))?;
+
+                Value::Integer(inner)
+            }
+            Value::String(_) => Value::String(s.into()),
+        };
+
+        Ok(())
+    }
+
+    /// Convert the value to a [bool].
+    pub fn as_bool(&self) -> bool {
+        match self {
+            Value::Bool(value) => *value,
+            _ => panic!("attempted to convert non-bool value to a bool"),
+        }
+    }
+
+    /// Convert the value to an [i128].
+    pub fn as_integer(&self) -> i128 {
+        match self {
+            Value::Integer(value) => *value,
+            _ => panic!("attempted to convert non-integer value to an integer"),
+        }
+    }
+
+    /// Convert the value to a [String].
+    pub fn as_string(&self) -> String {
+        match self {
+            Value::String(value) => value.to_owned(),
+            _ => panic!("attempted to convert non-string value to a string"),
+        }
+    }
+
+    /// Is the value a bool?
+    pub fn is_bool(&self) -> bool {
+        matches!(self, Value::Bool(_))
+    }
+
+    /// Is the value an integer?
+    pub fn is_integer(&self) -> bool {
+        matches!(self, Value::Integer(_))
+    }
+
+    /// Is the value a string?
+    pub fn is_string(&self) -> bool {
+        matches!(self, Value::String(_))
+    }
+}
+
+impl fmt::Display for Value {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        match self {
+            Value::Bool(b) => write!(f, "{b}"),
+            Value::Integer(i) => write!(f, "{i}"),
+            Value::String(s) => write!(f, "{s}"),
+        }
+    }
+}
+
+/// Configuration value validation functions.
+pub enum Validator {
+    /// Only allow negative integers, i.e. any values less than 0.
+    NegativeInteger,
+    /// Only allow non-negative integers, i.e. any values greater than or equal
+    /// to 0.
+    NonNegativeInteger,
+    /// Only allow positive integers, i.e. any values greater than to 0.
+    PositiveInteger,
+    /// Ensure that an integer value falls within the specified range.
+    IntegerInRange(Range<i128>),
+    /// A custom validation function to run against any supported value type.
+    Custom(Box<dyn Fn(&Value) -> Result<(), Error>>),
+}
+
+impl Validator {
+    fn validate(&self, value: &Value) -> Result<(), Error> {
+        match self {
+            Validator::NegativeInteger => negative_integer(value)?,
+            Validator::NonNegativeInteger => non_negative_integer(value)?,
+            Validator::PositiveInteger => positive_integer(value)?,
+            Validator::IntegerInRange(range) => integer_in_range(range, value)?,
+            Validator::Custom(validator_fn) => validator_fn(value)?,
+        }
+
+        Ok(())
+    }
+}
+
+fn negative_integer(value: &Value) -> Result<(), Error> {
+    if !value.is_integer() {
+        return Err(Error::validation(
+            "Validator::NegativeInteger can only be used with integer values",
+        ));
+    } else if value.as_integer() >= 0 {
+        return Err(Error::validation(format!(
+            "Expected negative integer, found '{}'",
+            value.as_integer()
+        )));
+    }
+
+    Ok(())
+}
+
+fn non_negative_integer(value: &Value) -> Result<(), Error> {
+    if !value.is_integer() {
+        return Err(Error::validation(
+            "Validator::NonNegativeInteger can only be used with integer values",
+        ));
+    } else if value.as_integer() < 0 {
+        return Err(Error::validation(format!(
+            "Expected non-negative integer, found '{}'",
+            value.as_integer()
+        )));
+    }
+
+    Ok(())
+}
+
+fn positive_integer(value: &Value) -> Result<(), Error> {
+    if !value.is_integer() {
+        return Err(Error::validation(
+            "Validator::PositiveInteger can only be used with integer values",
+        ));
+    } else if value.as_integer() <= 0 {
+        return Err(Error::validation(format!(
+            "Expected positive integer, found '{}'",
+            value.as_integer()
+        )));
+    }
+
+    Ok(())
+}
+
+fn integer_in_range(range: &Range<i128>, value: &Value) -> Result<(), Error> {
+    if !value.is_integer() || !range.contains(&value.as_integer()) {
+        Err(Error::validation(format!(
+            "Value '{}' does not fall within range '{:?}'",
+            value, range
+        )))
+    } else {
+        Ok(())
+    }
+}
+
+/// Generate and parse config from a prefix, and an array tuples containing the
+/// name, description, default value, and an optional validator.
 ///
 /// This function will parse any `SCREAMING_SNAKE_CASE` environment variables
-/// that match the given prefix. It will then attempt to parse the [`Value`].
+/// that match the given prefix. It will then attempt to parse the [`Value`] and
+/// run any validators which have been specified.
+///
 /// Once the config has been parsed, this function will emit `snake_case` cfg's
 /// _without_ the prefix which can be used in the dependant crate. After that,
 /// it will create a markdown table in the `OUT_DIR` under the name
-/// `{prefix}_config_table.md` where prefix has also been converted
-/// to `snake_case`. This can be included in crate documentation to outline the
+/// `{prefix}_config_table.md` where prefix has also been converted to
+/// `snake_case`. This can be included in crate documentation to outline the
 /// available configuration options for the crate.
 ///
 /// Passing a value of true for the `emit_md_tables` argument will create and
@@ -80,27 +249,51 @@ impl Value {
 ///
 /// Unknown keys with the supplied prefix will cause this function to panic.
 pub fn generate_config(
-    prefix: &str,
-    config: &[(&str, Value, &str)],
+    crate_name: &str,
+    config: &[(&str, &str, Value, Option<Validator>)],
     emit_md_tables: bool,
 ) -> HashMap<String, Value> {
-    // only rebuild if build.rs changed. Otherwise Cargo will rebuild if any
+    // Only rebuild if `build.rs` changed. Otherwise, Cargo will rebuild if any
     // other file changed.
     println!("cargo:rerun-if-changed=build.rs");
+
     #[cfg(not(test))]
     env_change_work_around();
 
-    // ensure that the prefix is `SCREAMING_SNAKE_CASE`
-    let prefix = format!("{}_", screaming_snake_case(prefix));
     let mut doc_table = String::from(DOC_TABLE_HEADER);
-    let mut selected_config = String::from(CHOSEN_TABLE_HEADER);
+    let mut selected_config = String::from(SELECTED_TABLE_HEADER);
+
+    // Ensure that the prefix is `SCREAMING_SNAKE_CASE`:
+    let prefix = format!("{}_CONFIG_", screaming_snake_case(crate_name));
+
+    // Build a lookup table for any provided validators; we must prefix the
+    // name of the config and transform it to SCREAMING_SNAKE_CASE so that
+    // it matches the keys in the hash table produced by `create_config`.
+    let config_validators = config
+        .iter()
+        .flat_map(|(name, _description, _default, validator)| {
+            if let Some(validator) = validator {
+                let name = format!("{prefix}{}", screaming_snake_case(name));
+                Some((name, validator))
+            } else {
+                None
+            }
+        })
+        .collect::<HashMap<_, _>>();
 
     let mut configs = create_config(&prefix, config, &mut doc_table);
     capture_from_env(&prefix, &mut configs);
+
+    for (name, value) in configs.iter() {
+        if let Some(validator) = config_validators.get(name) {
+            validator.validate(value).unwrap();
+        }
+    }
+
     emit_configuration(&prefix, &configs, &mut selected_config);
 
     if emit_md_tables {
-        let file_name = snake_case(&prefix);
+        let file_name = snake_case(crate_name);
         write_config_tables(&file_name, doc_table, selected_config);
     }
 
@@ -118,8 +311,7 @@ fn env_change_work_around() {
     // target
     while !out_dir.ends_with("target") {
         if !out_dir.pop() {
-            // We ran out of directories...
-            return;
+            return; // We ran out of directories...
         }
     }
     out_dir.pop();
@@ -141,44 +333,42 @@ fn env_change_work_around() {
     }
 }
 
-fn emit_configuration(
+fn create_config(
     prefix: &str,
-    configs: &HashMap<String, Value>,
-    selected_config: &mut String,
-) {
-    // emit cfgs and set envs
-    for (name, value) in configs.into_iter() {
-        let cfg_name = snake_case(name.trim_start_matches(prefix));
-        println!("cargo:rustc-check-cfg=cfg({cfg_name})");
-        match value {
-            Value::Bool(true) => {
-                println!("cargo:rustc-cfg={cfg_name}")
-            }
-            _ => {}
-        }
+    config: &[(&str, &str, Value, Option<Validator>)],
+    doc_table: &mut String,
+) -> HashMap<String, Value> {
+    let mut configs = HashMap::new();
 
-        let value = value.as_string();
-        // values that haven't been seen will be output here with the default value
-        println!("cargo:rustc-env={}={}", name, value);
+    for (name, description, default, _validator) in config {
+        let name = format!("{prefix}{}", screaming_snake_case(name));
+        configs.insert(name.clone(), default.clone());
 
-        writeln!(selected_config, "|**{name}**|{value}|").unwrap();
+        // Write documentation table line:
+        let default = default.to_string();
+        writeln!(doc_table, "|**{name}**|{description}|{default}|").unwrap();
+
+        // Rebuild if config environment variable changed:
+        println!("cargo:rerun-if-env-changed={name}");
     }
+
+    configs
 }
 
 fn capture_from_env(prefix: &str, configs: &mut HashMap<String, Value>) {
     let mut unknown = Vec::new();
     let mut failed = Vec::new();
 
-    // Try and capture input from the environment
+    // Try and capture input from the environment:
     for (var, value) in env::vars() {
-        if let Some(_) = var.strip_prefix(prefix) {
+        if var.starts_with(prefix) {
             let Some(cfg) = configs.get_mut(&var) else {
                 unknown.push(var);
                 continue;
             };
 
             if let Err(e) = cfg.parse_in_place(&value) {
-                failed.push(format!("{}: {e:?}", var));
+                failed.push(format!("{var}: {e}"));
             }
         }
     }
@@ -192,61 +382,54 @@ fn capture_from_env(prefix: &str, configs: &mut HashMap<String, Value>) {
     }
 }
 
-fn create_config(
+fn emit_configuration(
     prefix: &str,
-    config: &[(&str, Value, &str)],
-    doc_table: &mut String,
-) -> HashMap<String, Value> {
-    // Generate the template for the config
-    let mut configs = HashMap::new();
-    for (name, default, desc) in config {
-        let name = format!("{prefix}{}", screaming_snake_case(&name));
-        configs.insert(name.clone(), default.clone());
+    configs: &HashMap<String, Value>,
+    selected_config: &mut String,
+) {
+    for (name, value) in configs.iter() {
+        let cfg_name = snake_case(name.trim_start_matches(prefix));
+        println!("cargo:rustc-check-cfg=cfg({cfg_name})");
 
-        // write doc table line
-        let default = default.as_string();
-        writeln!(doc_table, "|**{name}**|{desc}|{default}|").unwrap();
+        if let Value::Bool(true) = value {
+            println!("cargo:rustc-cfg={cfg_name}");
+        }
 
-        // Rebuild if config envvar changed.
-        println!("cargo:rerun-if-env-changed={name}");
+        let value = value.to_string();
+
+        // Values that haven't been seen will be output here with the default value:
+        println!("cargo:rustc-env={}={}", name, value);
+        writeln!(selected_config, "|**{name}**|{value}|").unwrap();
     }
-
-    configs
 }
 
 fn write_config_tables(prefix: &str, doc_table: String, selected_config: String) {
     let out_dir = PathBuf::from(env::var_os("OUT_DIR").unwrap());
+
     let out_file = out_dir
-        .join(format!("{prefix}config_table.md"))
-        .to_string_lossy()
+        .join(format!("{prefix}_config_table.md"))
+        .display()
         .to_string();
     fs::write(out_file, doc_table).unwrap();
 
-    let out_dir = PathBuf::from(env::var_os("OUT_DIR").unwrap());
     let out_file = out_dir
-        .join(format!("{prefix}selected_config.md"))
-        .to_string_lossy()
+        .join(format!("{prefix}_selected_config.md"))
+        .display()
         .to_string();
     fs::write(out_file, selected_config).unwrap();
 }
 
-// Converts a symbol name like
-// "PLACE-spi_DRIVER-IN_ram"
-// to
-// "place_spi_driver_in_ram"
 fn snake_case(name: &str) -> String {
     let mut name = name.replace("-", "_");
     name.make_ascii_lowercase();
+
     name
 }
 
-// Converts a symbol name like
-// "PLACE-spi_DRIVER-IN_ram"
-// to
-// "PLACE_SPI_DRIVER_IN_RAM"
 fn screaming_snake_case(name: &str) -> String {
     let mut name = name.replace("-", "_");
     name.make_ascii_uppercase();
+
     name
 }
 
@@ -257,82 +440,79 @@ mod test {
     #[test]
     fn value_number_formats() {
         const INPUTS: &[&str] = &["0xAA", "0o252", "0b0000000010101010", "170"];
-        let mut v = Value::SignedInteger(0);
+        let mut v = Value::Integer(0);
 
         for input in INPUTS {
             v.parse_in_place(input).unwrap();
             // no matter the input format, the output format should be decimal
-            assert_eq!(v.as_string(), "170");
+            assert_eq!(format!("{v}"), "170");
         }
     }
 
     #[test]
     fn value_bool_inputs() {
-        const TRUE_INPUTS: &[&str] = &["true", "y", "yes"];
-        const FALSE_INPUTS: &[&str] = &["false", "n", "no"];
         let mut v = Value::Bool(false);
 
-        for input in TRUE_INPUTS {
-            v.parse_in_place(input).unwrap();
-            // no matter the input variant, the output format should be "true"
-            assert_eq!(v.as_string(), "true");
-        }
+        v.parse_in_place("true").unwrap();
+        assert_eq!(format!("{v}"), "true");
 
-        for input in FALSE_INPUTS {
-            v.parse_in_place(input).unwrap();
-            // no matter the input variant, the output format should be "false"
-            assert_eq!(v.as_string(), "false");
-        }
+        v.parse_in_place("false").unwrap();
+        assert_eq!(format!("{v}"), "false");
     }
 
     #[test]
     fn env_override() {
         temp_env::with_vars(
             [
-                ("ESP_TEST_NUMBER", Some("0xaa")),
-                ("ESP_TEST_NUMBER_SIGNED", Some("-999")),
-                ("ESP_TEST_STRING", Some("Hello world!")),
-                ("ESP_TEST_BOOL", Some("true")),
+                ("ESP_TEST_CONFIG_NUMBER", Some("0xaa")),
+                ("ESP_TEST_CONFIG_NUMBER_SIGNED", Some("-999")),
+                ("ESP_TEST_CONFIG_STRING", Some("Hello world!")),
+                ("ESP_TEST_CONFIG_BOOL", Some("true")),
             ],
             || {
                 let configs = generate_config(
                     "esp-test",
                     &[
-                        ("number", Value::UnsignedInteger(999), "NA"),
-                        ("number_signed", Value::SignedInteger(-777), "NA"),
-                        ("string", Value::String("Demo".to_owned()), "NA"),
-                        ("bool", Value::Bool(false), "NA"),
-                        ("number_default", Value::UnsignedInteger(999), "NA"),
-                        ("string_default", Value::String("Demo".to_owned()), "NA"),
-                        ("bool_default", Value::Bool(false), "NA"),
+                        ("number", "NA", Value::Integer(999), None),
+                        ("number_signed", "NA", Value::Integer(-777), None),
+                        ("string", "NA", Value::String("Demo".to_owned()), None),
+                        ("bool", "NA", Value::Bool(false), None),
+                        ("number_default", "NA", Value::Integer(999), None),
+                        (
+                            "string_default",
+                            "NA",
+                            Value::String("Demo".to_owned()),
+                            None,
+                        ),
+                        ("bool_default", "NA", Value::Bool(false), None),
                     ],
                     false,
                 );
 
                 // some values have changed
                 assert_eq!(
-                    match configs.get("ESP_TEST_NUMBER").unwrap() {
-                        Value::UnsignedInteger(num) => *num,
+                    match configs.get("ESP_TEST_CONFIG_NUMBER").unwrap() {
+                        Value::Integer(num) => *num,
                         _ => unreachable!(),
                     },
                     0xaa
                 );
                 assert_eq!(
-                    match configs.get("ESP_TEST_NUMBER_SIGNED").unwrap() {
-                        Value::SignedInteger(num) => *num,
+                    match configs.get("ESP_TEST_CONFIG_NUMBER_SIGNED").unwrap() {
+                        Value::Integer(num) => *num,
                         _ => unreachable!(),
                     },
                     -999
                 );
                 assert_eq!(
-                    match configs.get("ESP_TEST_STRING").unwrap() {
+                    match configs.get("ESP_TEST_CONFIG_STRING").unwrap() {
                         Value::String(val) => val,
                         _ => unreachable!(),
                     },
                     "Hello world!"
                 );
                 assert_eq!(
-                    match configs.get("ESP_TEST_BOOL").unwrap() {
+                    match configs.get("ESP_TEST_CONFIG_BOOL").unwrap() {
                         Value::Bool(val) => *val,
                         _ => unreachable!(),
                     },
@@ -341,21 +521,21 @@ mod test {
 
                 // the rest are the defaults
                 assert_eq!(
-                    match configs.get("ESP_TEST_NUMBER_DEFAULT").unwrap() {
-                        Value::UnsignedInteger(num) => *num,
+                    match configs.get("ESP_TEST_CONFIG_NUMBER_DEFAULT").unwrap() {
+                        Value::Integer(num) => *num,
                         _ => unreachable!(),
                     },
                     999
                 );
                 assert_eq!(
-                    match configs.get("ESP_TEST_STRING_DEFAULT").unwrap() {
+                    match configs.get("ESP_TEST_CONFIG_STRING_DEFAULT").unwrap() {
                         Value::String(val) => val,
                         _ => unreachable!(),
                     },
                     "Demo"
                 );
                 assert_eq!(
-                    match configs.get("ESP_TEST_BOOL_DEFAULT").unwrap() {
+                    match configs.get("ESP_TEST_CONFIG_BOOL_DEFAULT").unwrap() {
                         Value::Bool(val) => *val,
                         _ => unreachable!(),
                     },
@@ -366,17 +546,125 @@ mod test {
     }
 
     #[test]
-    #[should_panic]
-    fn env_unknown_bails() {
+    fn builtin_validation_passes() {
         temp_env::with_vars(
             [
-                ("ESP_TEST_NUMBER", Some("0xaa")),
-                ("ESP_TEST_RANDOM_VARIABLE", Some("")),
+                ("ESP_TEST_CONFIG_POSITIVE_NUMBER", Some("7")),
+                ("ESP_TEST_CONFIG_NEGATIVE_NUMBER", Some("-1")),
+                ("ESP_TEST_CONFIG_NON_NEGATIVE_NUMBER", Some("0")),
+                ("ESP_TEST_CONFIG_RANGE", Some("9")),
             ],
             || {
                 generate_config(
                     "esp-test",
-                    &[("number", Value::UnsignedInteger(999), "NA")],
+                    &[
+                        (
+                            "positive_number",
+                            "NA",
+                            Value::Integer(-1),
+                            Some(Validator::PositiveInteger),
+                        ),
+                        (
+                            "negative_number",
+                            "NA",
+                            Value::Integer(1),
+                            Some(Validator::NegativeInteger),
+                        ),
+                        (
+                            "non_negative_number",
+                            "NA",
+                            Value::Integer(-1),
+                            Some(Validator::NonNegativeInteger),
+                        ),
+                        (
+                            "range",
+                            "NA",
+                            Value::Integer(0),
+                            Some(Validator::IntegerInRange(5..10)),
+                        ),
+                    ],
+                    false,
+                )
+            },
+        );
+    }
+
+    #[test]
+    fn custom_validation_passes() {
+        temp_env::with_vars([("ESP_TEST_CONFIG_NUMBER", Some("13"))], || {
+            generate_config(
+                "esp-test",
+                &[(
+                    "number",
+                    "NA",
+                    Value::Integer(-1),
+                    Some(Validator::Custom(Box::new(|value| {
+                        let range = 10..20;
+                        if !value.is_integer() || !range.contains(&value.as_integer()) {
+                            Err(Error::validation("value does not fall within range"))
+                        } else {
+                            Ok(())
+                        }
+                    }))),
+                )],
+                false,
+            )
+        });
+    }
+
+    #[test]
+    #[should_panic]
+    fn builtin_validation_bails() {
+        temp_env::with_vars([("ESP_TEST_CONFIG_POSITIVE_NUMBER", Some("-99"))], || {
+            generate_config(
+                "esp-test",
+                &[(
+                    "positive_number",
+                    "NA",
+                    Value::Integer(-1),
+                    Some(Validator::PositiveInteger),
+                )],
+                false,
+            )
+        });
+    }
+
+    #[test]
+    #[should_panic]
+    fn custom_validation_bails() {
+        temp_env::with_vars([("ESP_TEST_CONFIG_NUMBER", Some("37"))], || {
+            generate_config(
+                "esp-test",
+                &[(
+                    "number",
+                    "NA",
+                    Value::Integer(-1),
+                    Some(Validator::Custom(Box::new(|value| {
+                        let range = 10..20;
+                        if !value.is_integer() || !range.contains(&value.as_integer()) {
+                            Err(Error::validation("value does not fall within range"))
+                        } else {
+                            Ok(())
+                        }
+                    }))),
+                )],
+                false,
+            )
+        });
+    }
+
+    #[test]
+    #[should_panic]
+    fn env_unknown_bails() {
+        temp_env::with_vars(
+            [
+                ("ESP_TEST_CONFIG_NUMBER", Some("0xaa")),
+                ("ESP_TEST_CONFIG_RANDOM_VARIABLE", Some("")),
+            ],
+            || {
+                generate_config(
+                    "esp-test",
+                    &[("number", "NA", Value::Integer(999), None)],
                     false,
                 );
             },
@@ -386,12 +674,26 @@ mod test {
     #[test]
     #[should_panic]
     fn env_invalid_values_bails() {
-        temp_env::with_vars([("ESP_TEST_NUMBER", Some("Hello world"))], || {
+        temp_env::with_vars([("ESP_TEST_CONFIG_NUMBER", Some("Hello world"))], || {
             generate_config(
                 "esp-test",
-                &[("number", Value::UnsignedInteger(999), "NA")],
+                &[("number", "NA", Value::Integer(999), None)],
                 false,
             );
         });
     }
+
+    #[test]
+    fn env_unknown_prefix_is_ignored() {
+        temp_env::with_vars(
+            [("ESP_TEST_OTHER_CONFIG_NUMBER", Some("Hello world"))],
+            || {
+                generate_config(
+                    "esp-test",
+                    &[("number", "NA", Value::Integer(999), None)],
+                    false,
+                );
+            },
+        );
+    }
 }

esp-config/src/lib.rs

@@ -3,81 +3,84 @@
 #![doc = document_features::document_features!(feature_label = r#"<span class="stab portability"><code>{feature}</code></span>"#)]
 #![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
 #![cfg_attr(not(feature = "build"), no_std)]
+#![deny(missing_docs, rust_2018_idioms)]
 
 #[cfg(feature = "build")]
 mod generate;
 #[cfg(feature = "build")]
-pub use generate::*;
+pub use generate::{generate_config, Error, Validator, Value};
 
+/// Parse the value of an environment variable as a [bool] at compile time.
 #[macro_export]
-// TODO from 1.82 we can use <$ty>::from_str_radix(env!($var), 10) instead
-/// Parse the value of a `env` variable as an integer at compile time
-macro_rules! esp_config_int {
-    ($ty:ty, $var:expr) => {
-        const {
-            const BYTES: &[u8] = env!($var).as_bytes();
-            esp_config_int_parse!($ty, BYTES)
+macro_rules! esp_config_bool {
+    ( $var:expr ) => {
+        match env!($var).as_bytes() {
+            b"true" => true,
+            b"false" => false,
+            _ => ::core::panic!("boolean value must be either 'true' or 'false'"),
         }
     };
 }
 
+// TODO: From 1.82 on, we can use `<$ty>::from_str_radix(env!($var), 10)`
+/// Parse the value of an environment variable as an integer at compile time.
+#[macro_export]
+macro_rules! esp_config_int {
+    ( $ty:ty, $var:expr ) => {
+        const {
+            const BYTES: &[u8] = env!($var).as_bytes();
+            $crate::esp_config_int_parse!($ty, BYTES)
+        }
+    };
+}
+
+/// Get the string value of an environment variable at compile time.
 #[macro_export]
-/// Get the string value of an `env` variable at compile time
 macro_rules! esp_config_str {
-    ($var:expr) => {
+    ( $var:expr ) => {
         env!($var)
     };
 }
 
-#[macro_export]
-/// Parse the value of a `env` variable as an bool at compile time
-macro_rules! esp_config_bool {
-    ($var:expr) => {
-        match env!($var).as_bytes() {
-            b"false" => false,
-            _ => true,
-        }
-    };
-}
-
-#[macro_export]
-#[doc(hidden)] // to avoid confusion with esp_config_int, let's hide this
 /// Parse a string like "777" into an integer, which _can_ be used in a `const`
 /// context
+#[doc(hidden)] // To avoid confusion with `esp_config_int`, hide this in the docs
+#[macro_export]
 macro_rules! esp_config_int_parse {
-    ($ty:ty, $bytes:expr) => {{
+    ( $ty:ty, $bytes:expr ) => {{
         let mut bytes = $bytes;
         let mut val: $ty = 0;
         let mut sign_seen = false;
         let mut is_negative = false;
+
         while let [byte, rest @ ..] = bytes {
             match *byte {
                 b'0'..=b'9' => {
                     val = val * 10 + (*byte - b'0') as $ty;
                 }
                 b'-' | b'+' if !sign_seen => {
-                    if *byte == b'-' {
-                        is_negative = true;
-                    }
+                    is_negative = *byte == b'-';
                     sign_seen = true;
                 }
-                _ => ::core::panic!("invalid digit"),
+                _ => ::core::panic!("invalid character encountered while parsing integer"),
             }
+
             bytes = rest;
         }
+
         if is_negative {
             let original = val;
-            // subtract twice to get the negative
+            // Subtract the value twice to get a negative:
             val -= original;
             val -= original;
         }
+
         val
     }};
 }
 
 #[cfg(test)]
 mod test {
-
     // We can only test success in the const context
     const _: () = {
         core::assert!(esp_config_int_parse!(i64, "-77777".as_bytes()) == -77777);
@@ -98,4 +101,10 @@ mod test {
     fn test_expect_positive() {
         esp_config_int_parse!(u8, "-5".as_bytes());
     }
+
+    #[test]
+    #[should_panic]
+    fn test_invalid_digit() {
+        esp_config_int_parse!(u32, "a".as_bytes());
+    }
 }

esp-hal-embassy/.clippy.toml

@@ -0,0 +1 @@
+avoid-breaking-exported-api = false

esp-hal-embassy/CHANGELOG.md

@@ -7,14 +7,36 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ## [Unreleased]
 
+
 ### Added
 
 ### Changed
 
+- Bump MSRV to 1.83 (#2615)
+
+- Config: Crate prefixes and configuration keys are now separated by `_CONFIG_` (#2848)
+
 ### Fixed
 
 ### Removed
 
+## 0.5.0 - 2024-11-20
+
+### Added
+
+- `ESP_HAL_EMBASSY_LOW_POWER_WAIT` configuration option. (#2329)
+
+### Changed
+
+- Reduce memory footprint by 4 bytes on multi-core MCUs.
+- The time driver no longer uses cross-core critical sections. (#2559)
+
+### Fixed
+
+- Alarm interrupts are now handled on the core that allocated them. (For executors created on the second core after calling `esp_hal_embassy::init`) (#2451)
+
+### Removed
+
 ## 0.4.0 - 2024-10-10
 
 ### Changed
@@ -49,4 +71,4 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ## 0.1.0 - 2024-06-04
 
-[Unreleased]: https://github.com/esp-rs/esp-hal/commits/main/esp-hal-embassy?since=2024-10-10
+[Unreleased]: https://github.com/esp-rs/esp-hal/commits/main/esp-hal-embassy?since=2024-11-20

esp-hal-embassy/Cargo.toml

@@ -1,9 +1,11 @@
 [package]
 name         = "esp-hal-embassy"
-version      = "0.4.0"
+version      = "0.5.0"
 edition      = "2021"
-rust-version = "1.79.0"
+rust-version = "1.83.0"
 description  = "Embassy support for esp-hal"
+keywords     = ["async", "embedded", "esp32", "espressif"]
+categories   = ["asynchronous", "embedded", "hardware-support", "no-std"]
 repository   = "https://github.com/esp-rs/esp-hal"
 license      = "MIT OR Apache-2.0"
 
@@ -12,19 +14,20 @@ default-target = "riscv32imac-unknown-none-elf"
 features       = ["esp32c6"]
 
 [dependencies]
-critical-section    = "1.1.3"
+critical-section    = "1.2.0"
 defmt               = { version = "0.3.8", optional = true }
 document-features   = "0.2.10"
-embassy-executor    = { version = "0.6.0", optional = true }
+embassy-executor    = { version = "0.6.3", optional = true }
 embassy-time-driver = { version = "0.1.0", features = [ "tick-hz-1_000_000" ] }
-esp-hal             = { version = "0.21.0", path = "../esp-hal" }
+esp-hal             = { version = "0.22.0", path = "../esp-hal" }
 log                 = { version = "0.4.22", optional = true }
-macros              = { version = "0.14.0", features = ["embassy"], package = "esp-hal-procmacros", path = "../esp-hal-procmacros" }
+macros              = { version = "0.15.0", features = ["embassy"], package = "esp-hal-procmacros", path = "../esp-hal-procmacros" }
 portable-atomic     = "1.9.0"
 static_cell         = "2.1.0"
 
 [build-dependencies]
 esp-build    = { version = "0.1.0", path = "../esp-build" }
+esp-config   = { version = "0.2.0", path = "../esp-config", features = ["build"] }
 esp-metadata = { version = "0.4.0", path = "../esp-metadata" }
 
 [features]

esp-hal-embassy/MIGRATING-0.3.md

@@ -21,8 +21,43 @@ You no longer have to set up clocks and pass them to `esp_hal_embassy::init`.
 
      let timg0 = TimerGroup::new(peripherals.TIMG0);
 -    esp_hal_embassy::init(&clocks, timg0);
-+    esp_hal_embassy::init(timg0);
++    esp_hal_embassy::init(timg0.timer0);
 
      // ...
  }
 ```
+
+You have to specify a timer instance (that may be a `TimerGroup` timer unit
+or a `SystemTimer` alarm) or an array of `AnyTimer`s when calling `init`.
+An example of how you can set multiple timers (for example when using
+multiple executors):
+
+```rust
+use esp_hal::{
+    prelude::*,
+    timer::{
+        AnyTimer,
+        systimer::SystemTimer
+    }
+};
+
+#[esp_hal_embassy::main]
+async fn main(_spawner: Spawner) -> ! {
+    let peripherals = esp_hal::init(esp_hal::Config::default());
+
+    let timg0 = TimerGroup::new(peripherals.TIMG0);
+    let timer0: AnyTimer = timg0.timer0.into();
+    let timer1: AnyTimer = timg0.timer1.into();
+
+    // You can use either a TimerGroup timer, a SystemTimer alarm,
+    // or you can mix and match them as well.
+    let systimer = SystemTimer::new(peripherals.SYSTIMER).split::<Target>();
+    let timer2: AnyTimer = systimer.alarm0;
+
+    esp_hal_embassy::init([timer0, timer1, timer2]);
+
+    // ...
+}
+```
+
+Note that you only have to convert into `AnyTimer` if you want to use multiple timers.

esp-hal-embassy/MIGRATING-0.4.md

@@ -0,0 +1,3 @@
+# Migration Guide from 0.4.x to v0.5.x
+
+You don't have to make changes to your code to update esp-hal-embassy.

esp-hal-embassy/MIGRATING-0.5.md

@@ -0,0 +1,15 @@
+# Migration Guide from 0.5.x to v0.6.x
+
+## Crate configuration changes
+
+To prevent ambiguity between configurations, we had to change the naming format of configuration
+keys. Before, we used `{prefix}_{key}`, which meant that esp-hal and esp-hal-* configuration keys
+were impossible to tell apart. To fix this issue, we are changing the separator from one underscore
+character to `_CONFIG_`. This also means that users will have to change their `config.toml`
+configurations to match the new format.
+
+```diff
+ [env]
+-ESP_HAL_EMBASSY_LOW_POWER_WAIT="false"
++ESP_HAL_EMBASSY_CONFIG_LOW_POWER_WAIT="false"
+```

esp-hal-embassy/README.md

@@ -2,12 +2,14 @@
 
 [![Crates.io](https://img.shields.io/crates/v/esp-hal-embassy?labelColor=1C2C2E&color=C96329&logo=Rust&style=flat-square)](https://crates.io/crates/esp-hal-embassy)
 [![docs.rs](https://img.shields.io/docsrs/esp-hal-embassy?labelColor=1C2C2E&color=C96329&logo=rust&style=flat-square)](https://docs.rs/esp-hal-embassy)
-![MSRV](https://img.shields.io/badge/MSRV-1.76-blue?labelColor=1C2C2E&style=flat-square)
+![MSRV](https://img.shields.io/badge/MSRV-1.83-blue?labelColor=1C2C2E&style=flat-square)
 ![Crates.io](https://img.shields.io/crates/l/esp-hal-embassy?labelColor=1C2C2E&style=flat-square)
 [![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&labelColor=1C2C2E&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
 
 [Embassy] support for `esp-hal`.
 
+Note that this crate currently requires you to enable the `unstable` feature on `esp-hal`.
+
 [embassy]: https://github.com/embassy-rs/embassy
 
 ## [Documentation]
@@ -16,7 +18,7 @@
 
 ## Minimum Supported Rust Version (MSRV)
 
-This crate is guaranteed to compile on stable Rust 1.76 and up. It _might_
+This crate is guaranteed to compile on stable Rust 1.83 and up. It _might_
 compile with older versions but that may change in any new patch release.
 
 ## License

esp-hal-embassy/build.rs

@@ -1,6 +1,7 @@
 use std::{error::Error, str::FromStr};
 
 use esp_build::assert_unique_used_features;
+use esp_config::{generate_config, Value};
 use esp_metadata::{Chip, Config};
 
 fn main() -> Result<(), Box<dyn Error>> {
@@ -37,5 +38,17 @@ fn main() -> Result<(), Box<dyn Error>> {
     // Define all necessary configuration symbols for the configured device:
     config.define_symbols();
 
+    // emit config
+    generate_config(
+        "esp_hal_embassy",
+        &[(
+            "low-power-wait",
+            "Enables the lower-power wait if no tasks are ready to run on the thread-mode executor. This allows the MCU to use less power if the workload allows. Recommended for battery-powered systems. May impact analog performance.",
+            Value::Bool(true),
+            None
+        )],
+        true,
+    );
+
     Ok(())
 }

esp-hal-embassy/src/executor/interrupt.rs

@@ -4,17 +4,13 @@ use core::{cell::UnsafeCell, mem::MaybeUninit};
 
 use embassy_executor::{raw, SendSpawner};
 use esp_hal::{
-    get_core,
     interrupt::{self, software::SoftwareInterrupt, InterruptHandler},
+    Cpu,
 };
 use portable_atomic::{AtomicUsize, Ordering};
 
-static mut EXECUTORS: [CallbackContext; 4] = [
-    CallbackContext::new(),
-    CallbackContext::new(),
-    CallbackContext::new(),
-    CallbackContext::new(),
-];
+const COUNT: usize = 3 + cfg!(not(multi_core)) as usize;
+static mut EXECUTORS: [CallbackContext; COUNT] = [const { CallbackContext::new() }; COUNT];
 
 /// Interrupt mode executor.
 ///
@@ -46,13 +42,11 @@ impl CallbackContext {
     }
 
     fn set(&self, executor: *mut raw::Executor) {
-        unsafe {
-            self.raw_executor.get().write(executor);
-        }
+        unsafe { self.raw_executor.get().write(executor) };
     }
 }
 
-fn handle_interrupt<const NUM: u8>() {
+extern "C" fn handle_interrupt<const NUM: u8>() {
     let swi = unsafe { SoftwareInterrupt::<NUM>::steal() };
     swi.reset();
 
@@ -62,22 +56,6 @@ fn handle_interrupt<const NUM: u8>() {
     }
 }
 
-extern "C" fn swi_handler0() {
-    handle_interrupt::<0>();
-}
-
-extern "C" fn swi_handler1() {
-    handle_interrupt::<1>();
-}
-
-extern "C" fn swi_handler2() {
-    handle_interrupt::<2>();
-}
-
-extern "C" fn swi_handler3() {
-    handle_interrupt::<3>();
-}
-
 impl<const SWI: u8> InterruptExecutor<SWI> {
     /// Create a new `InterruptExecutor`.
     /// This takes the software interrupt to be used internally.
@@ -109,7 +87,7 @@ impl<const SWI: u8> InterruptExecutor<SWI> {
             .core
             .compare_exchange(
                 usize::MAX,
-                get_core() as usize,
+                Cpu::current() as usize,
                 Ordering::Acquire,
                 Ordering::Relaxed,
             )
@@ -121,16 +99,17 @@ impl<const SWI: u8> InterruptExecutor<SWI> {
         unsafe {
             (*self.executor.get())
                 .as_mut_ptr()
-                .write(raw::Executor::new(SWI as *mut ()));
+                .write(raw::Executor::new((SWI as usize) as *mut ()));
 
             EXECUTORS[SWI as usize].set((*self.executor.get()).as_mut_ptr());
         }
 
         let swi_handler = match SWI {
-            0 => swi_handler0,
-            1 => swi_handler1,
-            2 => swi_handler2,
-            3 => swi_handler3,
+            0 => handle_interrupt::<0>,
+            1 => handle_interrupt::<1>,
+            2 => handle_interrupt::<2>,
+            #[cfg(not(multi_core))]
+            3 => handle_interrupt::<3>,
             _ => unreachable!(),
         };
 

esp-hal-embassy/src/executor/mod.rs

@@ -7,19 +7,18 @@ mod thread;
 fn __pender(context: *mut ()) {
     use esp_hal::interrupt::software::SoftwareInterrupt;
 
-    let context = (context as usize).to_le_bytes();
-
-    match context[0] {
+    match context as usize {
         // For interrupt executors, the context value is the
         // software interrupt number
         0 => unsafe { SoftwareInterrupt::<0>::steal().raise() },
         1 => unsafe { SoftwareInterrupt::<1>::steal().raise() },
         2 => unsafe { SoftwareInterrupt::<2>::steal().raise() },
+        #[cfg(not(multi_core))]
         3 => unsafe { SoftwareInterrupt::<3>::steal().raise() },
-        other => {
-            assert_eq!(other, THREAD_MODE_CONTEXT);
-            // THREAD_MODE_CONTEXT id is reserved for thread mode executors
-            thread::pend_thread_mode(context[1] as usize)
-        }
+        // THREAD_MODE_CONTEXT + core ID
+        16 => thread::pend_thread_mode(0),
+        #[cfg(multi_core)]
+        17 => thread::pend_thread_mode(1),
+        _ => unreachable!(),
     }
 }

esp-hal-embassy/src/executor/thread.rs

@@ -3,63 +3,56 @@
 use core::marker::PhantomData;
 
 use embassy_executor::{raw, Spawner};
-use esp_hal::get_core;
+use esp_hal::Cpu;
 #[cfg(multi_core)]
-use esp_hal::macros::handler;
-#[cfg(multi_core)]
-use esp_hal::peripherals::SYSTEM;
+use esp_hal::{interrupt::software::SoftwareInterrupt, macros::handler};
+#[cfg(low_power_wait)]
 use portable_atomic::{AtomicBool, Ordering};
 
-pub(crate) const THREAD_MODE_CONTEXT: u8 = 16;
+pub(crate) const THREAD_MODE_CONTEXT: usize = 16;
 
 /// global atomic used to keep track of whether there is work to do since sev()
 /// is not available on either Xtensa or RISC-V
-#[cfg(not(multi_core))]
-static SIGNAL_WORK_THREAD_MODE: [AtomicBool; 1] = [AtomicBool::new(false)];
-#[cfg(multi_core)]
-static SIGNAL_WORK_THREAD_MODE: [AtomicBool; 2] = [AtomicBool::new(false), AtomicBool::new(false)];
+static SIGNAL_WORK_THREAD_MODE: [AtomicBool; Cpu::COUNT] =
+    [const { AtomicBool::new(false) }; Cpu::COUNT];
 
-#[cfg(multi_core)]
+#[cfg(all(multi_core, low_power_wait))]
 #[handler]
 fn software3_interrupt() {
     // This interrupt is fired when the thread-mode executor's core needs to be
     // woken. It doesn't matter which core handles this interrupt first, the
     // point is just to wake up the core that is currently executing
     // `waiti`.
-    let system = unsafe { &*SYSTEM::PTR };
-    system
-        .cpu_intr_from_cpu_3()
-        .write(|w| w.cpu_intr_from_cpu_3().bit(false));
+    unsafe { SoftwareInterrupt::<3>::steal().reset() };
 }
 
-pub(crate) fn pend_thread_mode(core: usize) {
-    // Signal that there is work to be done.
-    SIGNAL_WORK_THREAD_MODE[core].store(true, Ordering::SeqCst);
+pub(crate) fn pend_thread_mode(_core: usize) {
+    #[cfg(low_power_wait)]
+    {
+        // Signal that there is work to be done.
+        SIGNAL_WORK_THREAD_MODE[_core].store(true, Ordering::Relaxed);
 
-    // If we are pending a task on the current core, we're done. Otherwise, we
-    // need to make sure the other core wakes up.
-    #[cfg(multi_core)]
-    if core != get_core() as usize {
-        // We need to clear the interrupt from software. We don't actually
-        // need it to trigger and run the interrupt handler, we just need to
-        // kick waiti to return.
-
-        let system = unsafe { &*SYSTEM::PTR };
-        system
-            .cpu_intr_from_cpu_3()
-            .write(|w| w.cpu_intr_from_cpu_3().bit(true));
+        // If we are pending a task on the current core, we're done. Otherwise, we
+        // need to make sure the other core wakes up.
+        #[cfg(multi_core)]
+        if _core != Cpu::current() as usize {
+            // We need to clear the interrupt from software. We don't actually
+            // need it to trigger and run the interrupt handler, we just need to
+            // kick waiti to return.
+            unsafe { SoftwareInterrupt::<3>::steal().raise() };
+        }
     }
 }
 
-/// A thread aware Executor
+/// Thread mode executor.
+///
+/// This is the simplest and most common kind of executor. It runs on thread
+/// mode (at the lowest priority level).
+#[cfg_attr(multi_core, doc = "")]
 #[cfg_attr(
     multi_core,
-    doc = r#"
-This executor is capable of waking an
-executor running on another core if work
-needs to be completed there for a task to
-progress on this core.
-"#
+    doc = "This executor is safe to use on multiple cores. You need to
+create one instance per core. The executors don't steal tasks from each other."
 )]
 pub struct Executor {
     inner: raw::Executor,
@@ -75,19 +68,13 @@ impl Executor {
 This will use software-interrupt 3 which isn't available for anything else to wake the other core(s)."#
     )]
     pub fn new() -> Self {
-        #[cfg(multi_core)]
+        #[cfg(all(multi_core, low_power_wait))]
         unsafe {
-            esp_hal::interrupt::software::SoftwareInterrupt::<3>::steal()
-                .set_interrupt_handler(software3_interrupt)
+            SoftwareInterrupt::<3>::steal().set_interrupt_handler(software3_interrupt);
         }
 
         Self {
-            inner: raw::Executor::new(usize::from_le_bytes([
-                THREAD_MODE_CONTEXT,
-                get_core() as u8,
-                0,
-                0,
-            ]) as *mut ()),
+            inner: raw::Executor::new((THREAD_MODE_CONTEXT + Cpu::current() as usize) as *mut ()),
             not_send: PhantomData,
         }
     }
@@ -107,7 +94,7 @@ This will use software-interrupt 3 which isn't available for anything else to wa
     /// you mutable access. There's a few ways to do this:
     ///
     /// - a [StaticCell](https://docs.rs/static_cell/latest/static_cell/) (safe)
-    /// - a `static mut` (unsafe)
+    /// - a `static mut` (unsafe, not recommended)
     /// - a local variable in a function you know never returns (like `fn main()
     ///   -> !`), upgrading its lifetime with `transmute`. (unsafe)
     ///
@@ -115,20 +102,19 @@ This will use software-interrupt 3 which isn't available for anything else to wa
     pub fn run(&'static mut self, init: impl FnOnce(Spawner)) -> ! {
         init(self.inner.spawner());
 
-        let cpu = get_core() as usize;
+        #[cfg(low_power_wait)]
+        let cpu = Cpu::current() as usize;
 
         loop {
-            unsafe {
-                self.inner.poll();
+            unsafe { self.inner.poll() };
 
-                Self::wait_impl(cpu);
-            }
+            #[cfg(low_power_wait)]
+            Self::wait_impl(cpu);
         }
     }
 
-    #[doc(hidden)]
-    #[cfg(xtensa)]
-    pub fn wait_impl(cpu: usize) {
+    #[cfg(all(xtensa, low_power_wait))]
+    fn wait_impl(cpu: usize) {
         // Manual critical section implementation that only masks interrupts handlers.
         // We must not acquire the cross-core on dual-core systems because that would
         // prevent the other core from doing useful work while this core is sleeping.
@@ -137,9 +123,8 @@ This will use software-interrupt 3 which isn't available for anything else to wa
 
         // we do not care about race conditions between the load and store operations,
         // interrupts will only set this value to true.
-        if SIGNAL_WORK_THREAD_MODE[cpu].load(Ordering::SeqCst) {
-            SIGNAL_WORK_THREAD_MODE[cpu].store(false, Ordering::SeqCst);
-
+        // Acquire makes no sense but at this time it's slightly faster than Relaxed.
+        if SIGNAL_WORK_THREAD_MODE[cpu].load(Ordering::Acquire) {
             // if there is work to do, exit critical section and loop back to polling
             unsafe {
                 core::arch::asm!(
@@ -149,33 +134,38 @@ This will use software-interrupt 3 which isn't available for anything else to wa
                 );
             }
         } else {
-            // waiti sets the PS.INTLEVEL when slipping into sleep
-            // because critical sections in Xtensa are implemented via increasing
-            // PS.INTLEVEL the critical section ends here
-            // take care not add code after `waiti` if it needs to be inside the CS
-            unsafe { core::arch::asm!("waiti 0") }; // critical section ends
-                                                    // here
+            // `waiti` sets the `PS.INTLEVEL` when slipping into sleep because critical
+            // sections in Xtensa are implemented via increasing `PS.INTLEVEL`.
+            // The critical section ends here. Take care not add code after
+            // `waiti` if it needs to be inside the CS.
+            // Do not lower INTLEVEL below the current value.
+            match token & 0x0F {
+                0 => unsafe { core::arch::asm!("waiti 0") },
+                1 => unsafe { core::arch::asm!("waiti 1") },
+                2 => unsafe { core::arch::asm!("waiti 2") },
+                3 => unsafe { core::arch::asm!("waiti 3") },
+                4 => unsafe { core::arch::asm!("waiti 4") },
+                _ => unsafe { core::arch::asm!("waiti 5") },
+            }
         }
+        // If this races and some waker sets the signal, we'll reset it, but still poll.
+        SIGNAL_WORK_THREAD_MODE[cpu].store(false, Ordering::Relaxed);
     }
 
-    #[doc(hidden)]
-    #[cfg(riscv)]
-    pub fn wait_impl(cpu: usize) {
+    #[cfg(all(riscv, low_power_wait))]
+    fn wait_impl(cpu: usize) {
         // we do not care about race conditions between the load and store operations,
         // interrupts will only set this value to true.
         critical_section::with(|_| {
             // if there is work to do, loop back to polling
-            // TODO can we relax this?
-            if SIGNAL_WORK_THREAD_MODE[cpu].load(Ordering::SeqCst) {
-                SIGNAL_WORK_THREAD_MODE[cpu].store(false, Ordering::SeqCst);
-            }
-            // if not, wait for interrupt
-            else {
+            if !SIGNAL_WORK_THREAD_MODE[cpu].load(Ordering::Relaxed) {
+                // if not, wait for interrupt
                 unsafe { core::arch::asm!("wfi") };
             }
         });
-        // if an interrupt occurred while waiting, it will be serviced
-        // here
+        // if an interrupt occurred while waiting, it will be serviced here
+        // If this races and some waker sets the signal, we'll reset it, but still poll.
+        SIGNAL_WORK_THREAD_MODE[cpu].store(false, Ordering::Relaxed);
     }
 }
 

esp-hal-embassy/src/lib.rs

@@ -4,6 +4,9 @@
 //! systems. This package provides support for building applications using
 //! Embassy with [esp-hal].
 //!
+//! Note that this crate currently requires you to enable the `unstable` feature
+//! on `esp-hal`.
+//!
 //! [esp-hal]: https://github.com/esp-rs/esp-hal
 //! [embassy]: https://github.com/embassy-rs/embassy
 //!
@@ -75,20 +78,10 @@ trait IntoAnyTimer: Into<AnyTimer> {}
 
 impl IntoAnyTimer for AnyTimer {}
 
-impl<T, DM> IntoAnyTimer for TimgTimer<T, DM>
-where
-    DM: esp_hal::Mode,
-    Self: Into<AnyTimer>,
-{
-}
+impl IntoAnyTimer for TimgTimer where Self: Into<AnyTimer> {}
 
 #[cfg(not(feature = "esp32"))]
-impl<T, DM, COMP, UNIT> IntoAnyTimer for Alarm<'_, T, DM, COMP, UNIT>
-where
-    DM: esp_hal::Mode,
-    Self: Into<AnyTimer>,
-{
-}
+impl IntoAnyTimer for Alarm where Self: Into<AnyTimer> {}
 
 impl<T> TimerCollection for T
 where
@@ -149,11 +142,14 @@ impl_array!(4);
 /// - A mutable static array of `OneShotTimer` instances
 /// - A 2, 3, 4 element array of `AnyTimer` instances
 ///
+/// Note that if you use the `integrated-timers` feature,
+/// you need to pass as many timers as you start executors.
+///
 /// # Examples
 ///
 /// ```rust, no_run
 #[doc = esp_hal::before_snippet!()]
-/// use esp_hal::timg::TimerGroup;
+/// use esp_hal::timer::timg::TimerGroup;
 ///
 /// let timg0 = TimerGroup::new(peripherals.TIMG0);
 /// esp_hal_embassy::init(timg0.timer0);

esp-hal-embassy/src/time_driver.rs

@@ -1,122 +1,160 @@
-use core::cell::{Cell, RefCell};
+use core::cell::Cell;
 
-use critical_section::Mutex;
 use embassy_time_driver::{AlarmHandle, Driver};
 use esp_hal::{
     interrupt::{InterruptHandler, Priority},
-    prelude::*,
-    time::now,
-    timer::{AnyTimer, OneShotTimer},
+    sync::Locked,
+    time::{now, ExtU64},
+    timer::OneShotTimer,
+    Blocking,
 };
 
-pub const MAX_SUPPORTED_ALARM_COUNT: usize = 7;
+pub type Timer = OneShotTimer<'static, Blocking>;
 
-pub type Timer = OneShotTimer<'static, AnyTimer>;
-
-static TIMERS: Mutex<RefCell<Option<&'static mut [Timer]>>> = Mutex::new(RefCell::new(None));
-
-#[allow(clippy::type_complexity)]
-struct AlarmState {
-    pub callback: Cell<Option<(fn(*mut ()), *mut ())>>,
-    pub allocated: Cell<bool>,
+enum AlarmState {
+    Created(extern "C" fn()),
+    Allocated(extern "C" fn()),
+    Initialized(&'static mut Timer),
+}
+impl AlarmState {
+    fn initialize(timer: &'static mut Timer, interrupt_handler: extern "C" fn()) -> AlarmState {
+        // If the driver is initialized, bind the interrupt handler to the
+        // timer. This ensures that alarms allocated after init are correctly
+        // bound to the core that created the executor.
+        timer.set_interrupt_handler(InterruptHandler::new(interrupt_handler, Priority::max()));
+        timer.enable_interrupt(true);
+        AlarmState::Initialized(timer)
+    }
 }
 
-unsafe impl Send for AlarmState {}
+struct AlarmInner {
+    pub callback: Cell<(*const (), *mut ())>,
+    pub state: AlarmState,
+}
 
-impl AlarmState {
-    pub const fn new() -> Self {
+struct Alarm {
+    pub inner: Locked<AlarmInner>,
+}
+
+unsafe impl Send for Alarm {}
+
+impl Alarm {
+    pub const fn new(handler: extern "C" fn()) -> Self {
         Self {
-            callback: Cell::new(None),
-            allocated: Cell::new(false),
+            inner: Locked::new(AlarmInner {
+                callback: Cell::new((core::ptr::null(), core::ptr::null_mut())),
+                state: AlarmState::Created(handler),
+            }),
         }
     }
 }
 
 pub(super) struct EmbassyTimer {
-    alarms: Mutex<[AlarmState; MAX_SUPPORTED_ALARM_COUNT]>,
+    alarms: [Alarm; MAX_SUPPORTED_ALARM_COUNT],
+    available_timers: Locked<Option<&'static mut [Timer]>>,
 }
 
+/// Repeats the `Alarm::new` constructor for each alarm, creating an interrupt
+/// handler for each of them.
+macro_rules! alarms {
+    ($($idx:literal),*) => {
+        [$(
+            Alarm::new({
+                // Not #[handler] so we don't have to store the priority - which is constant.
+                extern "C" fn handler() {
+                    DRIVER.on_interrupt($idx);
+                }
+                handler
+            })
+        ),*]
+    };
+}
+
+const MAX_SUPPORTED_ALARM_COUNT: usize = 7;
 embassy_time_driver::time_driver_impl!(static DRIVER: EmbassyTimer = EmbassyTimer {
-    alarms: Mutex::new([const { AlarmState::new() }; MAX_SUPPORTED_ALARM_COUNT]),
+    alarms: alarms!(0, 1, 2, 3, 4, 5, 6),
+    available_timers: Locked::new(None),
 });
 
 impl EmbassyTimer {
-    pub(super) fn init(timers: &'static mut [Timer]) {
-        if timers.len() > MAX_SUPPORTED_ALARM_COUNT {
-            panic!(
-                "Maximum of {} timers can be used.",
-                MAX_SUPPORTED_ALARM_COUNT
-            );
-        }
+    pub(super) fn init(mut timers: &'static mut [Timer]) {
+        assert!(
+            timers.len() <= MAX_SUPPORTED_ALARM_COUNT,
+            "Maximum {} timers can be used.",
+            MAX_SUPPORTED_ALARM_COUNT
+        );
 
-        static HANDLERS: [InterruptHandler; MAX_SUPPORTED_ALARM_COUNT] = [
-            handler0, handler1, handler2, handler3, handler4, handler5, handler6,
-        ];
-
-        critical_section::with(|cs| {
-            timers.iter_mut().enumerate().for_each(|(n, timer)| {
-                timer.enable_interrupt(false);
-                timer.stop();
-                timer.set_interrupt_handler(HANDLERS[n]);
-            });
-
-            TIMERS.replace(cs, Some(timers));
+        // Reset timers
+        timers.iter_mut().for_each(|timer| {
+            timer.enable_interrupt(false);
+            timer.stop();
         });
 
-        #[handler(priority = Priority::max())]
-        fn handler0() {
-            DRIVER.on_interrupt(0);
-        }
-        #[handler(priority = Priority::max())]
-        fn handler1() {
-            DRIVER.on_interrupt(1);
-        }
-        #[handler(priority = Priority::max())]
-        fn handler2() {
-            DRIVER.on_interrupt(2);
-        }
-        #[handler(priority = Priority::max())]
-        fn handler3() {
-            DRIVER.on_interrupt(3);
-        }
-        #[handler(priority = Priority::max())]
-        fn handler4() {
-            DRIVER.on_interrupt(4);
-        }
-        #[handler(priority = Priority::max())]
-        fn handler5() {
-            DRIVER.on_interrupt(5);
-        }
-        #[handler(priority = Priority::max())]
-        fn handler6() {
-            DRIVER.on_interrupt(6);
+        // Initialize already allocated timers
+        for alarm in DRIVER.alarms.iter() {
+            timers = alarm.inner.with(move |alarm| {
+                if let AlarmState::Allocated(interrupt_handler) = alarm.state {
+                    // Pluck off a timer
+
+                    let Some((timer, remaining_timers)) = timers.split_first_mut() else {
+                        not_enough_timers();
+                    };
+
+                    alarm.state = AlarmState::initialize(timer, interrupt_handler);
+
+                    remaining_timers
+                } else {
+                    timers
+                }
+            });
         }
+
+        // Store the available timers
+        DRIVER
+            .available_timers
+            .with(|available_timers| *available_timers = Some(timers));
     }
 
     fn on_interrupt(&self, id: usize) {
-        let cb = critical_section::with(|cs| {
-            let mut timers = TIMERS.borrow_ref_mut(cs);
-            let timers = unwrap!(timers.as_mut(), "Time driver not initialized");
-            let timer = &mut timers[id];
-
-            timer.clear_interrupt();
-
-            let alarm = &self.alarms.borrow(cs)[id];
-            alarm.callback.get()
+        let (cb, ctx) = self.alarms[id].inner.with(|alarm| {
+            if let AlarmState::Initialized(timer) = &mut alarm.state {
+                timer.clear_interrupt();
+                alarm.callback.get()
+            } else {
+                unsafe {
+                    // SAFETY: `on_interrupt` is registered right when the alarm is initialized.
+                    core::hint::unreachable_unchecked()
+                }
+            }
         });
 
-        if let Some((f, ctx)) = cb {
-            f(ctx);
-        }
+        let cb: fn(*mut ()) = unsafe {
+            // Safety:
+            // - we can ignore the possibility of `f` being unset (null) because of the
+            //   safety contract of `allocate_alarm`.
+            // - other than that we only store valid function pointers into alarm.callback
+            core::mem::transmute(cb)
+        };
+
+        cb(ctx);
     }
 
-    fn arm(timer: &mut Timer, timestamp: u64) {
+    /// Returns `true` if the timer was armed, `false` if the timestamp is in
+    /// the past.
+    fn arm(timer: &mut Timer, timestamp: u64) -> bool {
         let now = now().duration_since_epoch();
         let ts = timestamp.micros();
-        // if the TS is already in the past make the timer fire immediately
-        let timeout = if ts > now { ts - now } else { 0.micros() };
-        unwrap!(timer.schedule(timeout));
-        timer.enable_interrupt(true);
+
+        if ts > now {
+            let timeout = ts - now;
+            unwrap!(timer.schedule(timeout));
+            true
+        } else {
+            // If the timestamp is past, we return `false` to ask embassy to poll again
+            // immediately.
+            timer.stop();
+            false
+        }
     }
 }
 
@@ -126,27 +164,60 @@ impl Driver for EmbassyTimer {
     }
 
     unsafe fn allocate_alarm(&self) -> Option<AlarmHandle> {
-        critical_section::with(|cs| {
-            for (i, alarm) in self.alarms.borrow(cs).iter().enumerate() {
-                if !alarm.allocated.get() {
-                    // set alarm so it is not overwritten
-                    alarm.allocated.set(true);
-                    return Some(AlarmHandle::new(i as u8));
-                }
+        for (i, alarm) in self.alarms.iter().enumerate() {
+            let handle = alarm.inner.with(|alarm| {
+                let AlarmState::Created(interrupt_handler) = alarm.state else {
+                    return None;
+                };
+
+                let timer = self.available_timers.with(|available_timers| {
+                    // `allocate_alarm` may be called before `esp_hal_embassy::init()`. If
+                    // `timers` is `None`, we return `None` to signal that the alarm cannot be
+                    // initialized yet. These alarms will be initialized when `init` is called.
+                    if let Some(timers) = available_timers.take() {
+                        // If the driver is initialized, we can allocate a timer.
+                        // If this fails, we can't do anything about it.
+                        let Some((timer, rest)) = timers.split_first_mut() else {
+                            not_enough_timers();
+                        };
+                        *available_timers = Some(rest);
+                        Some(timer)
+                    } else {
+                        None
+                    }
+                });
+
+                alarm.state = match timer {
+                    Some(timer) => AlarmState::initialize(timer, interrupt_handler),
+
+                    None => {
+                        // No timers are available yet, mark the alarm as allocated.
+                        AlarmState::Allocated(interrupt_handler)
+                    }
+                };
+
+                Some(AlarmHandle::new(i as u8))
+            });
+
+            if handle.is_some() {
+                return handle;
             }
-            None
-        })
+        }
+
+        None
     }
 
     fn set_alarm_callback(&self, alarm: AlarmHandle, callback: fn(*mut ()), ctx: *mut ()) {
         let n = alarm.id() as usize;
-        critical_section::with(|cs| {
-            let alarm = &self.alarms.borrow(cs)[n];
-            alarm.callback.set(Some((callback, ctx)));
+
+        self.alarms[n].inner.with(|alarm| {
+            alarm.callback.set((callback as *const (), ctx));
         })
     }
 
     fn set_alarm(&self, alarm: AlarmHandle, timestamp: u64) -> bool {
+        let alarm = &self.alarms[alarm.id() as usize];
+
         // If `embassy-executor/integrated-timers` is enabled and there are no pending
         // timers, embassy still calls `set_alarm` with `u64::MAX`. By returning
         // `true` we signal that no re-polling is necessary.
@@ -161,14 +232,22 @@ impl Driver for EmbassyTimer {
         // This is correct behavior. See https://docs.rs/embassy-time-driver/0.1.0/embassy_time_driver/trait.Driver.html#tymethod.set_alarm
         // (... the driver should return true and arrange to call the alarm callback as
         // soon as possible, but not synchronously.)
-        critical_section::with(|cs| {
-            let mut timers = TIMERS.borrow_ref_mut(cs);
-            let timers = unwrap!(timers.as_mut(), "Time driver not initialized");
-            let timer = &mut timers[alarm.id() as usize];
 
-            Self::arm(timer, timestamp);
-        });
-
-        true
+        alarm.inner.with(|alarm| {
+            if let AlarmState::Initialized(timer) = &mut alarm.state {
+                Self::arm(timer, timestamp)
+            } else {
+                panic!("set_alarm called before esp_hal_embassy::init()")
+            }
+        })
     }
 }
+
+#[cold]
+#[track_caller]
+fn not_enough_timers() -> ! {
+    // This is wrapped in a separate function because rustfmt does not like
+    // extremely long strings. Also, if log is used, this avoids storing the string
+    // twice.
+    panic!("There are not enough timers to allocate a new alarm. Call esp_hal_embassy::init() with the correct number of timers, or consider using one of the embassy-timer/generic-queue-X features.");
+}

esp-hal-procmacros/CHANGELOG.md

@@ -0,0 +1,60 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## [Unreleased]
+
+### Added
+
+- Added the `BuilderLite` derive macro which implements the Builder Lite pattern for a struct (#2614)
+
+### Fixed
+
+### Changed
+
+- Functions marked with `#[handler]` can now be referenced in `const` context. (#2559)
+
+### Removed
+
+- Removed the `enum-dispatch`, `interrupt`, and `ram` features (#2594)
+
+## [0.15.0] - 2024-11-20
+
+### Changed
+
+- Remove `get_` prefix from functions (#2528)
+
+## [0.14.0] - 2024-10-10
+
+## [0.13.0] - 2024-08-29
+
+## [0.12.0] - 2024-07-15
+
+## [0.11.0] - 2024-06-04
+
+## [0.10.0] - 2024-04-18
+
+## [0.9.0] - 2024-03-18
+
+## [0.8.0] - 2023-12-12
+
+## [0.7.0] - 2023-10-31
+
+## [0.6.1] - 2023-09-05
+
+## [0.6.0] - 2023-07-04
+
+## [0.5.0] - 2023-03-27
+
+## [0.4.0] - 2023-02-21
+
+## [0.2.0] - 2023-01-26
+
+## [0.1.0] - 2022-08-25
+
+- Initial release
+
+[Unreleased]: https://github.com/esp-rs/esp-hal/commits/main/esp-hal-procmacros?since=2024-11-20

esp-hal-procmacros/Cargo.toml

@@ -1,8 +1,8 @@
 [package]
 name         = "esp-hal-procmacros"
-version      = "0.14.0"
+version      = "0.15.0"
 edition      = "2021"
-rust-version = "1.76.0"
+rust-version = "1.83.0"
 description  = "Procedural macros for esp-hal"
 repository   = "https://github.com/esp-rs/esp-hal"
 license      = "MIT OR Apache-2.0"
@@ -17,24 +17,18 @@ proc-macro = true
 darling           = "0.20.10"
 document-features = "0.2.10"
 litrs             = "0.4.1"
-object            = { version = "0.36.5", optional = true, default-features = false, features = ["read_core", "elf"] }
+object            = { version = "0.36.5", default-features = false, features = ["read_core", "elf"], optional = true }
 proc-macro-crate  = "3.2.0"
 proc-macro-error2 = "2.0.1"
-proc-macro2       = "1.0.87"
+proc-macro2       = "1.0.92"
 quote             = "1.0.37"
-syn               = { version = "2.0.79", features = ["extra-traits", "full"] }
+syn               = { version = "2.0.89", features = ["extra-traits", "full"] }
 
 [features]
 ## Provide a `#[main]` procmacro to mark the entry point for Embassy applications.
 embassy = []
-## Provide enum dispatch helpers.
-enum-dispatch = []
-## Provide an `#[interrupt]` procmacro for defining interrupt service routines.
-interrupt = []
-## Provide a `#[ram]` procmacro to place functions in RAM instead of flash.
-ram = []
 ## Indicates the target device has RTC slow memory available.
-rtc_slow = []
+rtc-slow = []
 
 #! ### Low-power Core Feature Flags
 ## Indicate that the SoC contains an LP core.

esp-hal-procmacros/src/lib.rs

@@ -47,12 +47,32 @@
 #![doc = document_features::document_features!()]
 #![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
 
-#[allow(unused)]
-use proc_macro::TokenStream;
+use darling::{ast::NestedMeta, Error, FromMeta};
+use proc_macro::{Span, TokenStream};
+use proc_macro2::Ident;
+use proc_macro_crate::{crate_name, FoundCrate};
+use proc_macro_error2::abort;
+use quote::{format_ident, quote};
+use syn::{
+    parse,
+    parse::Error as ParseError,
+    spanned::Spanned,
+    Data,
+    DataStruct,
+    GenericArgument,
+    Item,
+    ItemFn,
+    Path,
+    PathArguments,
+    PathSegment,
+    ReturnType,
+    Type,
+};
+
+use self::interrupt::{check_attr_whitelist, WhiteListCaller};
 
 #[cfg(feature = "embassy")]
 mod embassy;
-#[cfg(feature = "interrupt")]
 mod interrupt;
 #[cfg(any(
     feature = "is-lp-core",
@@ -62,7 +82,6 @@ mod interrupt;
 ))]
 mod lp_core;
 
-#[cfg(feature = "ram")]
 #[derive(Debug, Default, darling::FromMeta)]
 #[darling(default)]
 struct RamArgs {
@@ -80,7 +99,7 @@ struct RamArgs {
 /// # Options
 ///
 /// - `rtc_fast`: Use RTC fast RAM.
-/// - `rtc_slow`: Use RTC slow RAM. **Note**: not available on all targets
+/// - `rtc_slow`: Use RTC slow RAM. **Note**: not available on all targets.
 /// - `persistent`: Persist the contents of the `static` across resets. See [the
 ///   section below](#persistent) for details.
 /// - `zeroed`: Initialize the memory of the `static` to zero. The initializer
@@ -126,15 +145,9 @@ struct RamArgs {
 ///
 /// [`bytemuck::AnyBitPattern`]: https://docs.rs/bytemuck/1.9.0/bytemuck/trait.AnyBitPattern.html
 /// [`bytemuck::Zeroable`]: https://docs.rs/bytemuck/1.9.0/bytemuck/trait.Zeroable.html
-#[cfg(feature = "ram")]
 #[proc_macro_attribute]
 #[proc_macro_error2::proc_macro_error]
 pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream {
-    use darling::{ast::NestedMeta, Error, FromMeta};
-    use proc_macro::Span;
-    use proc_macro_error2::abort;
-    use syn::{parse, Item};
-
     let attr_args = match NestedMeta::parse_meta_list(args.into()) {
         Ok(v) => v,
         Err(e) => {
@@ -156,7 +169,7 @@ pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream {
 
     let item: Item = parse(input).expect("failed to parse input");
 
-    #[cfg(not(feature = "rtc_slow"))]
+    #[cfg(not(feature = "rtc-slow"))]
     if rtc_slow {
         abort!(
             Span::call_site(),
@@ -206,7 +219,7 @@ pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream {
     let trait_check = trait_check.map(|name| {
         use proc_macro_crate::{crate_name, FoundCrate};
 
-        let hal = proc_macro2::Ident::new(
+        let hal = Ident::new(
             if let Ok(FoundCrate::Name(ref name)) = crate_name("esp-hal") {
                 name
             } else {
@@ -240,18 +253,9 @@ pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream {
 /// esp_hal::interrupt::Priority::Priority2)]`.
 ///
 /// If no priority is given, `Priority::min()` is assumed
-#[cfg(feature = "interrupt")]
-#[proc_macro_error2::proc_macro_error]
 #[proc_macro_attribute]
+#[proc_macro_error2::proc_macro_error]
 pub fn handler(args: TokenStream, input: TokenStream) -> TokenStream {
-    use darling::{ast::NestedMeta, FromMeta};
-    use proc_macro::Span;
-    use proc_macro2::Ident;
-    use proc_macro_crate::{crate_name, FoundCrate};
-    use syn::{parse::Error as ParseError, spanned::Spanned, ItemFn, ReturnType, Type};
-
-    use self::interrupt::{check_attr_whitelist, WhiteListCaller};
-
     #[derive(Debug, FromMeta)]
     struct MacroArgs {
         priority: Option<syn::Expr>,
@@ -332,7 +336,7 @@ pub fn handler(args: TokenStream, input: TokenStream) -> TokenStream {
         #f
 
         #[allow(non_upper_case_globals)]
-        #vis static #orig: #root::interrupt::InterruptHandler = #root::interrupt::InterruptHandler::new(#new, #priority);
+        #vis const #orig: #root::interrupt::InterruptHandler = #root::interrupt::InterruptHandler::new(#new, #priority);
     )
     .into()
 }
@@ -352,8 +356,8 @@ pub fn load_lp_code(input: TokenStream) -> TokenStream {
 
 /// Marks the entry function of a LP core / ULP program.
 #[cfg(any(feature = "is-lp-core", feature = "is-ulp-core"))]
-#[proc_macro_error2::proc_macro_error]
 #[proc_macro_attribute]
+#[proc_macro_error2::proc_macro_error]
 pub fn entry(args: TokenStream, input: TokenStream) -> TokenStream {
     lp_core::entry(args, input)
 }
@@ -392,3 +396,129 @@ pub fn main(args: TokenStream, item: TokenStream) -> TokenStream {
 
     run(&args.meta, f, main()).unwrap_or_else(|x| x).into()
 }
+
+/// Automatically implement the [Builder Lite] pattern for a struct.
+///
+/// This will create an `impl` which contains methods for each field of a
+/// struct, allowing users to easily set the values. The generated methods will
+/// be the field name prefixed with `with_`, and calls to these methods can be
+/// chained as needed.
+///
+/// ## Example
+///
+/// ```rust, no_run
+/// #[derive(Default)]
+/// enum MyEnum {
+///     #[default]
+///     A,
+///     B,
+/// }
+///
+/// #[derive(Default, BuilderLite)]
+/// #[non_exhaustive]
+/// struct MyStruct {
+///     enum_field: MyEnum,
+///     bool_field: bool,
+///     option_field: Option<i32>,
+/// }
+///
+/// MyStruct::default()
+///     .with_enum_field(MyEnum::B)
+///     .with_bool_field(true)
+///     .with_option_field(-5);
+/// ```
+///
+/// [Builder Lite]: https://matklad.github.io/2022/05/29/builder-lite.html
+#[proc_macro_derive(BuilderLite)]
+pub fn builder_lite_derive(item: TokenStream) -> TokenStream {
+    let input = syn::parse_macro_input!(item as syn::DeriveInput);
+
+    let span = input.span();
+    let ident = input.ident;
+
+    let mut fns = Vec::new();
+    if let Data::Struct(DataStruct { fields, .. }) = &input.data {
+        for field in fields {
+            let field_ident = field.ident.as_ref().unwrap();
+            let field_type = &field.ty;
+
+            let function_ident = format_ident!("with_{}", field_ident);
+
+            let maybe_path_type = extract_type_path(field_type)
+                .and_then(|path| extract_option_segment(path))
+                .and_then(|path_seg| match path_seg.arguments {
+                    PathArguments::AngleBracketed(ref params) => params.args.first(),
+                    _ => None,
+                })
+                .and_then(|generic_arg| match *generic_arg {
+                    GenericArgument::Type(ref ty) => Some(ty),
+                    _ => None,
+                });
+
+            let (field_type, field_assigns) = if let Some(inner_type) = maybe_path_type {
+                (inner_type, quote! { Some(#field_ident) })
+            } else {
+                (field_type, quote! { #field_ident })
+            };
+
+            fns.push(quote! {
+                #[doc = concat!(" Assign the given value to the `", stringify!(#field_ident) ,"` field.")]
+                #[must_use]
+                pub fn #function_ident(mut self, #field_ident: #field_type) -> Self {
+                    self.#field_ident = #field_assigns;
+                    self
+                }
+            });
+
+            if maybe_path_type.is_some() {
+                let function_ident = format_ident!("with_{}_none", field_ident);
+                fns.push(quote! {
+                    #[doc = concat!(" Set the value of `", stringify!(#field_ident), "` to `None`.")]
+                    #[must_use]
+                    pub fn #function_ident(mut self) -> Self {
+                        self.#field_ident = None;
+                        self
+                    }
+                });
+            }
+        }
+    } else {
+        return ParseError::new(
+            span,
+            "#[derive(Builder)] is only defined for structs, not for enums or unions!",
+        )
+        .to_compile_error()
+        .into();
+    }
+
+    let implementation = quote! {
+        #[automatically_derived]
+        impl #ident {
+            #(#fns)*
+        }
+    };
+
+    implementation.into()
+}
+
+// https://stackoverflow.com/a/56264023
+fn extract_type_path(ty: &Type) -> Option<&Path> {
+    match *ty {
+        Type::Path(ref typepath) if typepath.qself.is_none() => Some(&typepath.path),
+        _ => None,
+    }
+}
+
+// https://stackoverflow.com/a/56264023
+fn extract_option_segment(path: &Path) -> Option<&PathSegment> {
+    let idents_of_path = path.segments.iter().fold(String::new(), |mut acc, v| {
+        acc.push_str(&v.ident.to_string());
+        acc.push('|');
+        acc
+    });
+
+    vec!["Option|", "std|option|Option|", "core|option|Option|"]
+        .into_iter()
+        .find(|s| idents_of_path == *s)
+        .and_then(|_| path.segments.last())
+}

esp-hal-procmacros/src/lp_core.rs

@@ -31,7 +31,7 @@ pub fn entry(args: TokenStream, input: TokenStream) -> TokenStream {
         res
     }
 
-    pub(crate) fn get_simplename(t: &Type) -> String {
+    pub(crate) fn simplename(t: &Type) -> String {
         match t {
             Type::Path(p) => p.path.segments.last().unwrap().ident.to_string(),
             _ => String::new(),
@@ -125,7 +125,7 @@ pub fn entry(args: TokenStream, input: TokenStream) -> TokenStream {
                     .into();
             }
             FnArg::Typed(t) => {
-                match get_simplename(&t.ty).as_str() {
+                match simplename(&t.ty).as_str() {
                     "Output" => {
                         let pin = extract_pin(&t.ty);
                         if used_pins.contains(&pin) {

esp-hal/.clippy.toml

@@ -0,0 +1 @@
+avoid-breaking-exported-api = false

esp-hal/CHANGELOG.md

@@ -9,15 +9,251 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ### Added
 
+- ESP32-S3: Added SDMMC signals (#2556)
+- Added `set_priority` to the `DmaChannel` trait on GDMA devices (#2403, #2526)
+- Added `into_async` and `into_blocking` functions for `ParlIoTxOnly`, `ParlIoRxOnly` (#2526)
+- ESP32-C6, H2, S3: Added `split` function to the `DmaChannel` trait. (#2526, #2532)
+- DMA: `PeripheralDmaChannel` type aliasses and `DmaChannelFor` traits to improve usability. (#2532)
+- `dma::{Channel, ChannelRx, ChannelTx}::set_priority` for GDMA devices (#2403)
+- `esp_hal::asynch::AtomicWaker` that does not hold a global critical section (#2555)
+- `esp_hal::sync::RawMutex` for embassy-sync. (#2555)
+- ESP32-C6, H2, S3: Added `split` function to the `DmaChannel` trait. (#2526)
+- Added PSRAM configuration to `esp_hal::Config` if `quad-psram` or `octal-psram` is enabled (#2546)
+- Added `esp_hal::psram::psram_raw_parts` (#2546)
+- The timer drivers `OneShotTimer` & `PeriodicTimer` have `into_async` and `new_typed` methods (#2586)
+- `timer::Timer` trait has three new methods, `wait`, `async_interrupt_handler` and `peripheral_interrupt` (#2586)
+- Configuration structs in the I2C, SPI, and UART drivers now implement the Builder Lite pattern (#2614)
+- Added `I8080::apply_config`, `DPI::apply_config` and `Camera::apply_config` (#2610)
+- Introduced the `unstable` feature which will be used to restrict stable APIs to a subset of esp-hal. (#2628)
+- HAL configuration structs now implement the Builder Lite pattern (#2645)
+- Added `OutputOpenDrain::unlisten` (#2625)
+- Added `{Input, Flex}::wait_for` (#2625)
+- Peripheral singletons now implement `Debug` and `defmt::Format` (#2682, #2834)
+- `BurstConfig`, a device-specific configuration for configuring DMA transfers in burst mode (#2543)
+- `{DmaRxBuf, DmaTxBuf, DmaRxTxBuf}::set_burst_config` (#2543)
+- Added `SpiDmaBus::split` for moving between manual & automatic DMA buffers (#2824)
+- ESP32-S2: DMA support for AES (#2699)
+- Added `transfer_in_place_async` and embedded-hal-async implementation to `Spi` (#2691)
+- `InterruptHandler` now implements `Hash` and `defmt::Format` (#2830)
+- `uart::ConfigError` now implements `Eq` (#2825)
+- `i2c::master::Error` now implements `Eq` and `Hash` (#2825)
+- `i2c::master::Operation` now implements `Debug`, `PartialEq`, `Eq`, `Hash`, and `Display` (#2825)
+- `i2c::master::Config` now implements `PartialEq`, `Eq`, ans `Hash` (#2825)
+- `i2c::master::I2c` now implements `Debug`, `PartialEq`, and `Eq` (#2825)
+- `i2c::master::Info` now implements `Debug` (#2825)
+- `spi::master::Config` now implements `Hash` (#2823)
+- `spi::master` drivers now implement `Debug` and `defmt::Format` (#2823)
+- `DmaRxBuf`, `DmaTxBuf` and `DmaRxTxBuf` now implement `Debug` and `defmt::Format` (#2823)
+- DMA channels (`AnyGdmaChannel`, `SpiDmaChannel`, `I2sDmaChannel`, `CryptoDmaChannel`) and their RX/TX halves now implement `Debug` and `defmt::Format` (#2823)
+- `DmaDescriptor` and `DmaDescriptorFlags` now implement `PartialEq` and `Eq` (#2823)
+- `gpio::{Event, WakeEvent, GpioRegisterAccess}` now implement `Debug`, `Eq`, `PartialEq` and `Hash` (#2842)
+- `gpio::{Level, Pull, AlternateFunction, RtcFunction}` now implement `Hash` (#2842)
+- `gpio::{GpioPin, AnyPin, Io, Output, OutputOpenDrain, Input, Flex}` now implement `Debug`, `defmt::Format` (#2842)
+- More interrupts are available in `esp_hal::spi::master::SpiInterrupt`, add `enable_listen`,`interrupts` and `clear_interrupts` for ESP32/ESP32-S2 (#2833)
+- The `ExtU64` and `RateExtU32` traits have been added to `esp_hal::time` (#2845)
+- Added `AnyPin::steal(pin_number)` (#2854)
+- `adc::{AdcCalSource, Attenuation, Resolution}` now implement `Hash` and `defmt::Format` (#2840)
+- `rtc_cntl::{RtcFastClock, RtcSlowClock, RtcCalSel}` now implement `PartialEq`, `Eq`, `Hash` and `defmt::Format` (#2840)
+- Added `tsens::TemperatureSensor` peripheral for ESP32C6 and ESP32C3 (#2875)
+- Added `with_rx()` and `with_tx()` methods to Uart, UartRx, and UartTx ()
+
 ### Changed
 
+- Bump MSRV to 1.83 (#2615)
+- In addition to taking by value, peripheral drivers can now mutably borrow DMA channel objects. (#2526)
+- DMA channel objects are no longer wrapped in `Channel`. The `Channel` drivers are now managed by DMA enabled peripheral drivers. (#2526)
+- The `Dpi` driver and `DpiTransfer` now have a `Mode` type parameter. The driver's asyncness is determined by the asyncness of the `Lcd` used to create it. (#2526)
+- `dma::{Channel, ChannelRx, ChannelTx}::set_priority` for GDMA devices (#2403)
+- `SystemTimer::set_unit_value` & `SystemTimer::configure_unit` (#2576)
+- `SystemTimer` no longer uses peripheral ref (#2576)
+- `TIMGX` no longer uses peripheral ref (#2581)
+- `SystemTimer::now` has been renamed `SystemTimer::unit_value(Unit)` (#2576)
+- `SpiDma` transfers now explicitly take a length along with the DMA buffer object (#2587)
+- `dma::{Channel, ChannelRx, ChannelTx}::set_priority` for GDMA devices (#2403)
+- `SystemTimer`s `Alarm`s are now type erased (#2576)
+- `TimerGroup` `Timer`s are now type erased (#2581)
+- PSRAM is now initialized automatically if `quad-psram` or `octal-psram` is enabled (#2546)
+- DMA channels are now available via the `Peripherals` struct, and have been renamed accordingly. (#2545)
+- Moved interrupt related items from lib.rs, moved to the `interrupt` module (#2613)
+- The timer drivers `OneShotTimer` & `PeriodicTimer` now have a `Mode` parameter and type erase the underlying driver by default (#2586)
+- `timer::Timer` has new trait requirements of `Into<AnyTimer>`, `'static` and `InterruptConfigurable` (#2586)
+- `systimer::etm::Event` no longer borrows the alarm indefinitely (#2586)
+- A number of public enums and structs in the I2C, SPI, and UART drivers have been marked with `#[non_exhaustive]` (#2614)
+- Interrupt handling related functions are only provided for Blocking UART. (#2610)
+- Changed how `Spi`, (split or unsplit) `Uart`, `LpUart`, `I8080`, `Camera`, `DPI` and `I2C` drivers are constructed (#2610)
+- I8080, camera, DPI: The various standalone configuration options have been merged into `Config` (#2610)
+- Dropped GPIO futures stop listening for interrupts (#2625)
+- UART driver's `StopBits` enum variants now correctly use UpperCamelCase (#2669)
+- The `PeripheralInput` and `PeripheralOutput` traits are now sealed (#2690)
+- `esp_hal::sync::Lock` has been renamed to RawMutex (#2684)
+- Updated `esp-pacs` with support for Wi-Fi on the ESP32 and made the peripheral non virtual
+- `SpiBitOrder`, `SpiDataMode`, `SpiMode` were renamed to `BitOder`, `DataMode` and `Mode` (#2828)
+- `crate::Mode` was renamed to `crate::DriverMode` (#2828)
+- `Spi::with_miso` has been overloaded into `Spi::with_miso` and `Spi::with_sio1` (#2557)
+- Renamed some I2C error variants (#2844)
+- I2C: Replaced potential panics with errors. (#2831)
+- UART: Make `AtCmdConfig` and `ConfigError` non-exhaustive (#2851)
+- UART: Make `AtCmdConfig` use builder-lite pattern (#2851)
+- UART: Fix naming violations for `DataBits`, `Parity`, and `StopBits` enum variants (#2893)
+- UART: Remove blocking version of `read_bytes` and rename `drain_fifo` to `read_bytes` instead (#2895)
+- Renamed variants of `CpuClock`, made the enum non-exhaustive (#2899)
+- SPI: Fix naming violations for `Mode` enum variants (#2902)
+- SPI: Fix naming violations for `Address` and `Command` enum variants (#2906)
+
+- `ClockSource` enums are now `#[non_exhaustive]` (#2912)
+
+- `gpio::{Input, Flex}::wakeup_enable` now returns an error instead of panicking. (#2916)
+
+- Removed the `I` prefix from `DriveStrength` enum variants. (#2922)
+- Removed the `Attenuation` prefix from `Attenuation` enum variants. (#2922)
+
 ### Fixed
 
+- Xtensa devices now correctly enable the `esp-hal-procmacros/rtc-slow` feature (#2594)
+- User-bound GPIO interrupt handlers should no longer interfere with async pins. (#2625)
+- `spi::master::Spi::{into_async, into_blocking}` are now correctly available on the typed driver, to. (#2674)
+- It is no longer possible to safely conjure `GpioPin` instances (#2688)
+- UART: Public API follows `C-WORD_ORDER` Rust API standard (`VerbObject` order) (#2851)
+- `DmaRxStreamBuf` now correctly resets the descriptors the next time it's used (#2890)
+
 ### Removed
 
-## [0.21.0]
+- Remove more examples. Update doctests. (#2547)
+- The `configure` and `configure_for_async` DMA channel functions has been removed (#2403)
+- The DMA channel objects no longer have `tx` and `rx` fields. (#2526)
+- `SysTimerAlarms` has been removed, alarms are now part of the `SystemTimer` struct (#2576)
+- `FrozenUnit`, `AnyUnit`, `SpecificUnit`, `SpecificComparator`, `AnyComparator` have been removed from `systimer` (#2576)
+- Remove Dma[Rx|Tx]Buffer::length (#2587)
+- `esp_hal::psram::psram_range` (#2546)
+- The `Dma` structure has been removed. (#2545)
+- Removed `embedded-hal 0.2.x` impls and deps from `esp-hal` (#2593)
+- Removed `Camera::set_` functions (#2610)
+- `DmaTxBuf::{compute_chunk_size, compute_descriptor_count, new_with_block_size}` (#2543)
 
-- Bump MSRV to 1.79.0 (#1971)
+- The `prelude` module has been removed (#2845)
+
+- Removed all peripheral instance type parameters and `new_typed` constructors (#2907)
+
+## [0.22.0] - 2024-11-20
+
+### Added
+
+- A new config option `PLACE_SWITCH_TABLES_IN_RAM` to improve performance (especially for interrupts) at the cost of slightly more RAM usage (#2331)
+- A new config option `PLACE_ANON_IN_RAM` to improve performance (especially for interrupts) at the cost of RAM usage (#2331)
+- Add burst transfer support to DMA buffers (#2336)
+- `AnyPin` now implements `From<GpioPin<N>>`. (#2326)
+- Added `AnySpi` and `AnySpiDmaChannel`. (#2334)
+- Added `AnyI2s` and `AnyI2sDmaChannel`. (#2367)
+- Added `AnyTwai`. (#2359)
+- Added `AnyUart`. (#2381)
+- `Pins::steal()` to unsafely obtain GPIO. (#2335)
+- `I2c::with_timeout` (#2361)
+- `Spi::half_duplex_read` and `Spi::half_duplex_write` (#2373)
+- Add RGB/DPI driver (#2415)
+- Add `DmaLoopBuf` (#2415)
+- `Cpu::COUNT` and `Cpu::current()` (#2411)
+- `UartInterrupt` and related functions (#2406)
+- I2S Parallel output driver for ESP32. (#2348, #2436, #2472)
+- Add an option to configure `WDT` action (#2330)
+- `DmaDescriptor` is now `Send` (#2456)
+- `into_async` and `into_blocking` functions for most peripherals (#2430, #2461)
+- API mode type parameter (currently always `Blocking`) to `master::Spi` and `slave::Spi` (#2430)
+- `gpio::{GpioPin, AnyPin, Flex, Output, OutputOpenDrain}::split()` to obtain peripheral interconnect signals. (#2418)
+- `gpio::Input::{split(), into_peripheral_output()}` when used with output pins. (#2418)
+- `gpio::Output::peripheral_input()` (#2418)
+- `{Uart, UartRx, UartTx}::apply_config()` (#2449)
+- `{Uart, UartRx, UartTx}` now implement `embassy_embedded_hal::SetConfig` (#2449)
+- GPIO ETM tasks and events now accept `InputSignal` and `OutputSignal` (#2427)
+- `spi::master::Config` and `{Spi, SpiDma, SpiDmaBus}::apply_config` (#2448)
+- `embassy_embedded_hal::SetConfig` is now implemented for `spi::master::{Spi, SpiDma, SpiDmaBus}`, `i2c::master::I2c` (#2448, #2477)
+- `slave::Spi::{with_mosi(), with_miso(), with_sclk(), with_cs()}` functions (#2485)
+- I8080: Added `set_8bits_order()` to set the byte order in 8-bit mode (#2487)
+- `I2c::{apply_config(), with_sda(), with_scl()}` (#2477)
+- ESP32-S2: Added missing GPIO alternate functions (#2512)
+
+### Changed
+
+- Peripheral type erasure for SPI (#2334)
+- Peripheral type erasure for I2S (#2367)
+- Peripheral type erasure for I2C (#2361)
+- Peripheral type erasure for TWAI (#2359)
+- The SPI driver has been rewritten to allow using half-duplex and full-duplex functionality on the same bus. See the migration guide for details. (#2373)
+- Renamed `SpiDma` functions: `dma_transfer` to `transfer`, `dma_write` to `write`, `dma_read` to `read`. (#2373)
+- Peripheral type erasure for UART (#2381)
+- Changed listening for UART events (#2406)
+- Circular DMA transfers now correctly error, `available` returns `Result<usize,DmaError>` now (#2409)
+- Interrupt listen/unlisten/clear functions now accept any type that converts into `EnumSet` (i.e. single interrupt flags). (#2442)
+- SPI interrupt listening is now only available in Blocking mode. The `set_interrupt_handler` is available via `InterruptConfigurable` (#2442)
+- Allow users to create DMA `Preparation`s (#2455)
+- The `rmt::asynch::RxChannelAsync` and `rmt::asynch::TxChannelAsync` traits have been moved to `rmt` (#2430)
+- Calling `AnyPin::output_signals` on an input-only pin (ESP32 GPIO 34-39) will now result in a panic. (#2418)
+- UART configuration types have been moved to `esp_hal::uart` (#2449)
+- `spi::master::Spi::new()` no longer takes `frequency` and `mode` as a parameter. (#2448)
+- Peripheral interconnections via GPIO pins now use the GPIO matrix. (#2419)
+- The I2S driver has been moved to `i2s::master` (#2472)
+- `slave::Spi` constructors no longer take pins (#2485)
+- The `I2c` master driver has been moved from `esp_hal::i2c` to `esp_hal::i2c::master`. (#2476)
+- `I2c` SCL timeout is now defined in bus clock cycles. (#2477)
+- Trying to send a single-shot RMT transmission will result in an error now, `RMT` deals with `u32` now, `PulseCode` is a convenience trait now (#2463)
+- Removed `get_` prefixes from functions (#2528)
+- The `Camera` and `I8080` drivers' constructors now only accepts blocking-mode DMA channels. (#2519)
+- Many peripherals are now disabled by default and also get disabled when the driver is dropped (#2544)
+
+- Config: Crate prefixes and configuration keys are now separated by `_CONFIG_` (#2848)
+
+### Fixed
+
+- Fix conflict between `RtcClock::get_xtal_freq` and `Rtc::disable_rom_message_printing` (#2360)
+- Fixed an issue where interrupts enabled before `esp_hal::init` were disabled. This issue caused the executor created by `#[esp_hal_embassy::main]` to behave incorrectly in multi-core applications. (#2377)
+- Fixed `TWAI::transmit_async`: bus-off state is not reached when CANH and CANL are shorted. (#2421)
+- ESP32: added UART-specific workaround for https://docs.espressif.com/projects/esp-chip-errata/en/latest/esp32/03-errata-description/esp32/cpu-subsequent-access-halted-when-get-interrupted.html (#2441)
+- Fixed some SysTimer race conditions and panics (#2451)
+- TWAI: accept all messages by default (#2467)
+- I8080: `set_byte_order()` now works correctly in 16-bit mode (#2487)
+- ESP32-C6/ESP32-H2: Make higher LEDC frequencies work (#2520)
+
+### Removed
+
+- The `i2s::{I2sWrite, I2sWriteDma, I2sRead, I2sReadDma, I2sWriteDmaAsync, I2sReadDmaAsync}` traits have been removed. (#2316)
+- The `ledc::ChannelHW` trait is no longer generic. (#2387)
+- The `I2c::new_with_timeout` constructors have been removed (#2361)
+- `I2c::new()` no longer takes `frequency` and pins as parameters. (#2477)
+- The `spi::master::HalfDuplexReadWrite` trait has been removed. (#2373)
+- The `Spi::with_pins` methods have been removed. (#2373)
+- The `Spi::new_half_duplex` constructor have been removed. (#2373)
+- The `HalfDuplexMode` and `FullDuplexMode` parameters have been removed from `Spi`. (#2373)
+- Removed the output pin type parameter from `ledc::{Channel, ChannelIFace}` (#2388)
+- Removed the output pin type parameter from `mcpwm::operator::{PwmPin, LinkedPins}` (#2388)
+- Removed the output pin type parameter from `parl_io::{ClkOutPin, ClkInPin, RxClkInPin}` (#2388)
+- Removed the valid pin type parameter from `parl_io::{TxPinConfigWithValidPin, RxPinConfigWithValidPin}` (#2388)
+- Removed the pin type parameters from `parl_io::{TxOneBit, TxTwoBits, TxFourBits, TxEightBits, TxSixteenBits}` (#2388)
+- Removed the pin type parameters from `parl_io::{RxOneBit, RxTwoBits, RxFourBits, RxEightBits, RxSixteenBits}` (#2388)
+- Removed the pin type parameters from `lcd_cam::lcd::i8080::{TxEightBits, TxSixteenBits}` (#2388)
+- Removed the pin type parameters from `lcd_cam::cam::{RxEightBits, RxSixteenBits}` (#2388)
+- Most of the async-specific constructors (`new_async`, `new_async_no_transceiver`) have been removed. (#2430)
+- The `configure_for_async` DMA functions have been removed (#2430)
+- The `Uart::{change_baud, change_stop_bits}` functions have been removed (#2449)
+- `gpio::{Input, Output, OutputOpenDrain, Flex, GpioPin}::{peripheral_input, into_peripheral_output}` have been removed. (#2418)
+- The `GpioEtm` prefix has been removed from `gpio::etm` types (#2427)
+- The `TimerEtm` prefix has been removed from `timer::timg::etm` types (#2427)
+- The `SysTimerEtm` prefix has been removed from `timer::systimer::etm` types (#2427)
+- The `GpioEtmEventRising`, `GpioEtmEventFalling`, `GpioEtmEventAny` types have been replaced with `Event` (#2427)
+- The `TaskSet`, `TaskClear`, `TaskToggle` types have been replaced with `Task` (#2427)
+- `{Spi, SpiDma, SpiDmaBus}` configuration methods (#2448)
+- `Io::new_with_priority` and `Io::new_no_bind_interrupt`. (#2486)
+- `parl_io::{no_clk_pin(), NoClkPin}` (#2531)
+- Removed `get_core` function in favour of `Cpu::current` (#2533)
+
+- Removed `uart::Config` setters and `symbol_length`. (#2847)
+
+## [0.21.1]
+
+### Fixed
+
+- Restored blocking `embedded_hal` compatibility for async I2C driver (#2343)
+- I2c::transaction is now able to transmit data of arbitrary length (#2481)
+
+## [0.21.0]
 
 ### Added
 
@@ -78,6 +314,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - SPI transactions are now cancelled if the transfer object (or async Future) is dropped. (#2216)
 - The DMA channel types have been removed from peripherals (#2261)
 - `I2C` driver renamed to `I2c` (#2320)
+- The GPIO pins are now accessible via `Peripherals` and are no longer part of the `Io` struct (#2508)
+- `dma::{ChannelRx, ChannelTx}` now have a `Mode` type parameter (#2519)
 
 ### Fixed
 
@@ -102,6 +340,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - TWAI should no longer panic when receiving a non-compliant frame (#2255)
 - OneShotTimer: fixed `delay_nanos` behaviour (#2256)
 - Fixed unsoundness around `Efuse` (#2259)
+- Empty I2C writes to unknown addresses now correctly fail with `AckCheckFailed`. (#2506)
 
 ### Removed
 
@@ -122,6 +361,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - Removed `esp_hal::spi::slave::WithDmaSpiN` traits (#2260)
 - The `WithDmaAes` trait has been removed (#2261)
 - The `I2s::new_i2s1` constructor has been removed (#2261)
+- `Peripherals.GPIO` has been removed (#2508)
 
 ## [0.20.1] - 2024-08-30
 
@@ -812,7 +1052,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ## [0.1.0] - 2022-08-05
 
-[Unreleased]: https://github.com/esp-rs/esp-hal/compare/v0.21.0...HEAD
+[Unreleased]: https://github.com/esp-rs/esp-hal/compare/v0.22.0...HEAD
+[0.22.0]: https://github.com/esp-rs/esp-hal/compare/v0.21.1...v0.22.0
+[0.21.1]: https://github.com/esp-rs/esp-hal/compare/v0.21.0...v0.21.1
 [0.21.0]: https://github.com/esp-rs/esp-hal/compare/v0.20.1...v0.21.0
 [0.20.1]: https://github.com/esp-rs/esp-hal/compare/v0.20.0...v0.20.1
 [0.20.0]: https://github.com/esp-rs/esp-hal/compare/v0.19.0...v0.20.0

esp-hal/Cargo.toml

@@ -1,10 +1,12 @@
 [package]
 name          = "esp-hal"
-version       = "0.21.0"
+version       = "0.22.0"
 edition       = "2021"
-rust-version  = "1.79.0"
+rust-version  = "1.83.0"
 description   = "Bare-metal HAL for Espressif devices"
 documentation = "https://docs.esp-rs.org/esp-hal/"
+keywords      = ["embedded", "embedded-hal", "esp32", "espressif", "hal"]
+categories    = ["embedded", "hardware-support", "no-std"]
 repository    = "https://github.com/esp-rs/esp-hal"
 license       = "MIT OR Apache-2.0"
 links         = "esp-hal"
@@ -16,73 +18,74 @@ rustdoc-args   = ["--cfg", "docsrs"]
 
 [dependencies]
 bitflags                 = "2.6.0"
-bytemuck                 = "1.18.0"
-bitfield                 = "0.16.1"
+bytemuck                 = "1.19.0"
+bitfield                 = "0.17.0"
 cfg-if                   = "1.0.0"
 chrono                   = { version = "0.4.38", default-features = false }
-critical-section         = "1.1.3"
+critical-section         = "1.2.0"
 defmt                    = { version = "0.3.8", optional = true }
-delegate                 = "0.12.0"
+delegate                 = "0.13.1"
 digest                   = { version = "0.10.7", default-features = false, optional = true }
 document-features        = "0.2.10"
+embassy-embedded-hal     = { version = "0.2.0", optional = true }
 embassy-futures          = "0.1.1"
-embassy-sync             = "0.6.0"
+embassy-sync             = "0.6.1"
 embassy-usb-driver       = { version = "0.1.0", optional = true }
-embassy-usb-synopsys-otg = { version = "0.1.0", optional = true }
-embedded-can             = "0.4.1"
-embedded-hal-02          = { version = "0.2.7", features = ["unproven"], package = "embedded-hal" }
+embassy-usb-synopsys-otg = { version = "0.2.0", optional = true }
+embedded-can             = { version = "0.4.1", optional = true }
 embedded-hal             = "1.0.0"
 embedded-hal-async       = "1.0.0"
 embedded-hal-nb          = "1.0.0"
-embedded-io              = "0.6.1"
-embedded-io-async        = "0.6.1"
+embedded-io              = { version = "0.6.1", optional = true }
+embedded-io-async        = { version = "0.6.1", optional = true }
 enumset                  = "1.1.5"
+esp-build                = { version = "0.1.0", path = "../esp-build" }
 esp-synopsys-usb-otg     = { version = "0.4.2", optional = true, features = ["fs", "esp32sx"] }
 fugit                    = "0.3.7"
+instability              = "0.3.6"
 log                      = { version = "0.4.22", optional = true }
 nb                       = "1.1.0"
 paste                    = "1.0.15"
 portable-atomic          = { version = "1.9.0", default-features = false }
-procmacros               = { version = "0.14.0", features = ["enum-dispatch", "interrupt", "ram"], package = "esp-hal-procmacros", path = "../esp-hal-procmacros" }
-riscv                    = { version = "0.11.1", optional = true }
+procmacros               = { version = "0.15.0", package = "esp-hal-procmacros", path = "../esp-hal-procmacros" }
 strum                    = { version = "0.26.3", default-features = false, features = ["derive"] }
 void                     = { version = "1.0.2", default-features = false }
 usb-device               = { version = "0.3.2", optional = true }
 rand_core                = "0.6.4"
 ufmt-write               = "0.1.0"
-xtensa-lx                = { version = "0.9.0", optional = true }
 
 # IMPORTANT:
 # Each supported device MUST have its PAC included below along with a
 # corresponding feature.
-esp32   = { version = "0.33.0", features = ["critical-section", "rt"], optional = true }
-esp32c2 = { version = "0.22.0", features = ["critical-section", "rt"], optional = true }
-esp32c3 = { version = "0.25.0", features = ["critical-section", "rt"], optional = true }
-esp32c6 = { version = "0.16.0", features = ["critical-section", "rt"], optional = true }
-esp32h2 = { version = "0.12.0", features = ["critical-section", "rt"], optional = true }
-esp32s2 = { version = "0.24.0", features = ["critical-section", "rt"], optional = true }
-esp32s3 = { version = "0.28.0", features = ["critical-section", "rt"], optional = true }
+esp32   = { version = "0.34.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
+esp32c2 = { version = "0.23.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
+esp32c3 = { version = "0.26.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
+esp32c6 = { version = "0.17.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
+esp32h2 = { version = "0.13.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
+esp32s2 = { version = "0.25.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
+esp32s3 = { version = "0.29.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ffbee35069d137ef611097d39fa7734c299ce124", optional = true }
 
 [target.'cfg(target_arch = "riscv32")'.dependencies]
-esp-riscv-rt = { version = "0.9.0", path = "../esp-riscv-rt" }
+riscv            = { version = "0.12.1" }
+esp-riscv-rt     = { version = "0.9.1", path = "../esp-riscv-rt" }
+critical-section = { version = "1.2.0", features = ["restore-state-u8"] }
 
 [target.'cfg(target_arch = "xtensa")'.dependencies]
-xtensa-lx-rt = { version = "0.17.0", path = "../xtensa-lx-rt" }
+xtensa-lx        = { version = "0.9.0", path = "../xtensa-lx" }
+xtensa-lx-rt     = { version = "0.17.2", path = "../xtensa-lx-rt" }
+critical-section = { version = "1.2.0", features = ["restore-state-u32"] }
 
 [build-dependencies]
 basic-toml   = "0.1.9"
 cfg-if       = "1.0.0"
 esp-build    = { version = "0.1.0", path = "../esp-build" }
 esp-metadata = { version = "0.4.0", path = "../esp-metadata" }
-esp-config   = { version = "0.1.0", path = "../esp-config", features = ["build"] }
-serde        = { version = "1.0.210", features = ["derive"] }
+esp-config   = { version = "0.2.0", path = "../esp-config", features = ["build"] }
+serde        = { version = "1.0.215", features = ["derive"] }
 
 [features]
 default = []
 
-riscv  = ["dep:riscv",     "critical-section/restore-state-u8"]
-xtensa = ["dep:xtensa-lx", "critical-section/restore-state-u32"]
-
 bluetooth = []
 
 usb-otg = ["dep:embassy-usb-driver", "dep:embassy-usb-synopsys-otg", "dep:esp-synopsys-usb-otg", "dep:usb-device"]
@@ -104,19 +107,19 @@ log = ["dep:log"]
 
 # Chip Support Feature Flags
 # Target the ESP32.
-esp32   = ["dep:esp32",   "xtensa", "xtensa-lx/spin", "xtensa-lx-rt/esp32"]
+esp32   = ["dep:esp32", "procmacros/rtc-slow", "xtensa-lx-rt/esp32"]
 # Target the ESP32-C2.
-esp32c2 = ["dep:esp32c2", "riscv",  "portable-atomic/unsafe-assume-single-core"]
+esp32c2 = ["dep:esp32c2", "portable-atomic/unsafe-assume-single-core"]
 # Target the ESP32-C3.
-esp32c3 = ["dep:esp32c3", "riscv",  "portable-atomic/unsafe-assume-single-core", "esp-riscv-rt/rtc-ram"]
+esp32c3 = ["dep:esp32c3", "esp-riscv-rt/rtc-ram", "portable-atomic/unsafe-assume-single-core"]
 # Target the ESP32-C6.
-esp32c6 = ["dep:esp32c6", "riscv",  "procmacros/has-lp-core", "esp-riscv-rt/rtc-ram"]
+esp32c6 = ["dep:esp32c6", "esp-riscv-rt/rtc-ram", "procmacros/has-lp-core"]
 # Target the ESP32-H2.
-esp32h2 = ["dep:esp32h2", "riscv", "esp-riscv-rt/rtc-ram"]
+esp32h2 = ["dep:esp32h2", "esp-riscv-rt/rtc-ram"]
 # Target the ESP32-S2.
-esp32s2 = ["dep:esp32s2", "xtensa", "portable-atomic/critical-section", "procmacros/has-ulp-core", "xtensa-lx-rt/esp32s2", "usb-otg"]
+esp32s2 = ["dep:esp32s2", "portable-atomic/critical-section", "procmacros/has-ulp-core", "procmacros/rtc-slow", "usb-otg", "xtensa-lx-rt/esp32s2"]
 # Target the ESP32-S3.
-esp32s3 = ["dep:esp32s3", "xtensa", "procmacros/has-ulp-core", "xtensa-lx/spin", "xtensa-lx-rt/esp32s3", "usb-otg"]
+esp32s3 = ["dep:esp32s3", "procmacros/has-ulp-core", "procmacros/rtc-slow", "usb-otg", "xtensa-lx-rt/esp32s3"]
 
 #! ### RISC-V Exclusive Feature Flags
 ## Move the stack to start of RAM to get zero-cost stack overflow protection
@@ -152,6 +155,19 @@ octal-psram = []
 # This feature is intended for testing; you probably don't want to enable it:
 ci = ["defmt", "bluetooth"]
 
+#! ### Unstable APIs
+#! Unstable APIs are drivers and features that are not yet ready for general use.
+#! They may be incomplete, have bugs, or be subject to change without notice.
+#! Unstable APIs are not covered by semver guarantees.
+
+## Enables APIs that are not stable and thus come with no stability guarantees.
+unstable = [
+    "dep:embassy-embedded-hal",
+    "dep:embedded-can",
+    "dep:embedded-io",
+    "dep:embedded-io-async",
+]
+
 [lints.clippy]
 mixed_attributes_style = "allow"
 

esp-hal/MIGRATING-0.20.md

@@ -230,7 +230,7 @@ We've replaced some usage of features with [esp-config](https://docs.rs/esp-conf
 # feature in Cargo.toml
 - esp-hal = { version = "0.20", features = ["place-spi-driver-in-ram"] }
 # key in .cargo/config.toml [env] section
-+ ESP_HAL_PLACE_SPI_DRIVER_IN_RAM=true
++ ESP_HAL_PLACE_SPI_DRIVER_IN_RAM="true"
 ```
 
 ## `Camera` driver now uses `DmaRxBuffer` and moves the driver into the transfer object.

esp-hal/MIGRATING-0.21.md

@@ -0,0 +1,471 @@
+# Migration Guide from 0.21.x to v0.22.x
+
+## IO changes
+
+### GPIO pins are now accessible via `Peripherals`
+
+```diff
+ let peripherals = esp_hal::init(Default::default());
+-let io = Io::new(peripherals.GPIO, peripherals.IOMUX);
+-let pin = io.pins.gpio5;
++let pin = peripherals.GPIO5;
+```
+
+### `Io` constructor changes
+
+- `new_with_priority` and `new_no_bind_interrupts` have been removed.
+  Use `set_priority` to configure the GPIO interrupt priority.
+  We no longer overwrite interrupt handlers set by user code during initialization.
+- `new` no longer takes `peripherals.GPIO`
+
+## Removed `async`-specific constructors
+
+The following async-specific constuctors have been removed:
+
+- `configure_for_async` DMA channel constructors
+- `TwaiConfiguration::new_async` and `TwaiConfiguration::new_async_no_transceiver`
+- `I2c::new_async`
+- `LcdCam::new_async`
+- `UsbSerialJtag::new_async`
+- `Rsa::new_async`
+- `Rmt::new_async`
+- `Uart::new_async`, `Uart::new_async_with_config`
+- `UartRx::new_async`, `UartRx::new_async_with_config`
+- `UartTx::new_async`, `UartTx::new_async_with_config`
+
+You can use the blocking counterparts, then call `into_async` on the returned peripheral instead.
+
+```diff
+-let mut config = twai::TwaiConfiguration::new_async(
++let mut config = twai::TwaiConfiguration::new(
+     peripherals.TWAI0,
+     loopback_pin.peripheral_input(),
+     loopback_pin,
+     twai::BaudRate::B1000K,
+     TwaiMode::SelfTest,
+-);
++).into_async();
+```
+
+Some drivers were implicitly configured to the asyncness of the DMA channel used to construct them.
+This is no longer the case, and the following drivers will always be created in blocking mode:
+
+- `i2s::master::I2s`
+- `spi::master::SpiDma` and `spi::master::SpiDmaBus`
+
+## Peripheral types are now optional
+
+You no longer have to specify the peripheral instance in the driver's type for the following
+peripherals:
+
+- SPI (both master and slave)
+- I2S
+- I2C
+- TWAI
+- UART
+
+```diff
+-Spi<'static, SPI2, FullDuplexMode>
++Spi<'static, FullDuplexMode>
+
+-SpiDma<'static, SPI2, HalfDuplexMode, Blocking>
++SpiDma<'static, HalfDuplexMode, Blocking>
+
+-I2sTx<'static, I2S0, Async>
++I2sTx<'static, Async>
+```
+
+Note that you may still specify the instance if you need to. To do this, we provide `_typed`
+versions of the constructors (for example: `new_typed`, `new_half_duplex_typed`). Please note that
+the peripheral instance has been moved to the last generic parameter position.
+
+```rust
+let spi: Spi<'static, FullDuplexMode, SPI2> = Spi::new_typed(peripherals.SPI2, 1.MHz(), SpiMode::Mode0);
+```
+
+## I2C changes
+
+The I2C master driver and related types have been moved to `esp_hal::i2c::master`.
+
+The `with_timeout` constructors have been removed. `new` and `new_typed` now take a `Config` struct
+with the available configuration options.
+
+- The default configuration is now:
+  - bus frequency: 100 kHz
+  - timeout: about 10 bus clock cycles
+
+The constructors no longer take pins. Use `with_sda` and `with_scl` instead.
+
+```diff
+-use esp_hal::i2c::I2c;
++use esp_hal::i2c::{Config, I2c};
+-let i2c = I2c::new_with_timeout(peripherals.I2C0, sda, scl, 100.kHz(), timeout);
++let i2c = I2c::new(
++    peripherals.I2C0,
++    {
++        let mut config = Config::default();
++        config.frequency = 100.kHz();
++        config.timeout = timeout;
++        config
++    },
++)
++.with_sda(sda)
++.with_scl(scl);
+```
+
+### The calculation of I2C timeout has changed
+
+Previously, I2C timeouts were counted in increments of I2C peripheral clock cycles. This meant that
+the configure value meant different lengths of time depending on the device. With this update, the
+I2C configuration now expects the timeout value in number of bus clock cycles, which is consistent
+between devices.
+
+ESP32 and ESP32-S2 use an exact number of clock cycles for its timeout. Other MCUs, however, use
+the `2^timeout` value internally, and the HAL rounds up the timeout to the next appropriate value.
+
+## Changes to half-duplex SPI
+
+The `HalfDuplexMode` and `FullDuplexMode` type parameters have been removed from SPI master and slave
+drivers. It is now possible to execute half-duplex and full-duplex operations on the same SPI bus.
+
+### Driver construction
+
+- The `Spi::new_half_duplex` constructor has been removed. Use `new` (or `new_typed`) instead.
+- The `with_pins` methods have been removed. Use the individual `with_*` functions instead.
+- The `with_mosi` and `with_miso` functions now take input-output peripheral signals to support half-duplex mode.
+
+```diff
+- let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
+-     .with_pins(sck, mosi, miso, sio2, sio3, cs);
++ let mut spi = Spi::new(peripherals.SPI2) // or new_with_config
++     .with_sck(sck)
++     .with_cs(cs)
++     .with_mosi(mosi)
++     .with_miso(miso)
++     .with_sio2(sio2)
++     .with_sio3(sio3);
+```
+
+### Transfer functions
+
+The `Spi<'_, SPI, HalfDuplexMode>::read` and `Spi<'_, SPI, HalfDuplexMode>::write` functions have been replaced by
+`half_duplex_read` and `half_duplex_write`.
+
+```diff
+ let mut data = [0u8; 2];
+ let transfer = spi
+-    .read(
++    .half_duplex_read(
+         SpiDataMode::Single,
+         Command::Command8(0x90, SpiDataMode::Single),
+         Address::Address24(0x000000, SpiDataMode::Single),
+         0,
+         &mut data,
+     )
+     .unwrap();
+
+ let transfer = spi
+-    .write(
++    .half_duplex_write(
+         SpiDataMode::Quad,
+         Command::Command8(write as u16, command_data_mode),
+         Address::Address24(
+             write as u32 | (write as u32) << 8 | (write as u32) << 16,
+             SpiDataMode::Quad,
+         ),
+         0,
+         dma_tx_buf,
+     )
+     .unwrap();
+```
+
+## Slave-mode SPI
+
+### Driver construction
+
+The constructors no longer accept pins. Use the `with_pin_name` setters instead.
+
+```diff
+ let mut spi = Spi::new(
+     peripherals.SPI2,
+-    sclk,
+-    mosi,
+-    miso,
+-    cs,
+     SpiMode::Mode0,
+-);
++)
++.with_sclk(sclk)
++.with_mosi(mosi)
++.with_miso(miso)
++.with_cs(cs);
+```
+
+## UART event listening
+
+The following functions have been removed:
+
+- `listen_at_cmd`
+- `unlisten_at_cmd`
+- `listen_tx_done`
+- `unlisten_tx_done`
+- `listen_rx_fifo_full`
+- `unlisten_rx_fifo_full`
+- `at_cmd_interrupt_set`
+- `tx_done_interrupt_set`
+- `rx_fifo_full_interrupt_set`
+- `reset_at_cmd_interrupt`
+- `reset_tx_done_interrupt`
+- `reset_rx_fifo_full_interrupt`
+
+You can now use the `UartInterrupt` enum and the corresponding `listen`, `unlisten`, `interrupts` and `clear_interrupts` functions.
+
+Use `interrupts` in place of `<INTERRUPT>_interrupt_set` and `clear_interrupts` in place of the old `reset_` functions.
+
+`UartInterrupt`:
+
+- `AtCmd`
+- `TxDone`
+- `RxFifoFull`
+
+Checking interrupt bits is now done using APIs provided by [enumset](https://docs.rs/enumset/1.1.5/enumset/index.html). For example, to see if
+a particular interrupt bit is set, use `contains`:
+
+```diff
+-serial.at_cmd_interrupt_set()
++serial.interupts().contains(UartInterrupt::AtCmd)
+```
+
+You can now listen/unlisten multiple interrupt bits at once:
+
+```diff
+-uart0.listen_at_cmd();
+-uart0.listen_rx_fifo_full();
++uart0.listen(UartInterrupt::AtCmd | UartConterrupt::RxFifoFull);
+```
+
+## I2S changes
+
+### The I2S driver has been moved to `i2s::master`
+
+```diff
+-use esp_hal::i2s::{DataFormat, I2s, Standard};
++use esp_hal::i2s::master::{DataFormat, I2s, Standard};
+```
+
+### Removed `i2s` traits
+
+The following traits have been removed:
+
+- `I2sWrite`
+- `I2sWriteDma`
+- `I2sRead`
+- `I2sReadDma`
+- `I2sWriteDmaAsync`
+- `I2sReadDmaAsync`
+
+You no longer have to import these to access their respective APIs. If you used these traits
+in your functions as generic parameters, you can use the `I2s` type directly instead.
+
+For example:
+
+```diff
+-fn foo(i2s: &mut impl I2sWrite) {
++fn foo(i2s: &mut I2s<'_, I2S0, Blocking>) {
+     // ...
+ }
+```
+
+## DMA related changes
+
+### Circular DMA transfer's `available` returns `Result<usize, DmaError>` now
+
+In case of any error you should drop the transfer and restart it.
+
+```diff
+     loop {
+-        let avail = transfer.available();
++        let avail = match transfer.available() {
++            Ok(avail) => avail,
++            Err(_) => {
++                core::mem::drop(transfer);
++                transfer = i2s_tx.write_dma_circular(&tx_buffer).unwrap();
++                continue;
++            },
++        };
+```
+
+### Channel, ChannelRx and ChannelTx types have changed
+
+- `Channel`'s `Async`/`Blocking` mode has been moved before the channel instance parameter.
+- `ChannelRx` and `ChannelTx` have gained a new `Async`/`Blocking` mode parameter.
+
+```diff
+-Channel<'d, DmaChannel0, Async>
++Channel<'d, Async, DmaChannel0>
+
+-ChannelRx<'d, DmaChannel0>
++ChannelRx<'d, Async, DmaChannel0>
+
+-ChannelTx<'d, DmaChannel0>
++ChannelTx<'d, Async, DmaChannel0>
+```
+
+## Removed `peripheral_input` and `into_peripheral_output` from GPIO pin types
+
+Creating peripheral interconnect signals now consume the GPIO pin used for the connection.
+
+The previous signal function have been replaced by `split`. This change affects the following APIs:
+
+- `GpioPin`
+- `AnyPin`
+
+```diff
+-let input_signal = gpioN.peripheral_input();
+-let output_signal = gpioN.into_peripheral_output();
++let (input_signal, output_signal) = gpioN.split();
+```
+
+`into_peripheral_output`, `split` (for output pins only) and `peripheral_input` have been added to
+the GPIO drivers (`Input`, `Output`, `OutputOpenDrain` and `Flex`) instead.
+
+## ETM changes
+
+- The types are no longer prefixed with `GpioEtm`, `TimerEtm` or `SysTimerEtm`. You can still use
+  import aliasses in case you need to differentiate due to name collisions
+  (e.g. `use esp_hal::gpio::etm::Event as GpioEtmEvent`).
+- The old task and event types have been replaced by `Task` and `Event`.
+- GPIO tasks and events are no longer generic.
+
+## Changes to peripheral configuration
+
+### The `uart::config` module has been removed
+
+The module's contents have been moved into `uart`.
+
+```diff
+-use esp_hal::uart::config::Config;
++use esp_hal::uart::Config;
+```
+
+If you work with multiple configurable peripherals, you may want to import the `uart` module and
+refer to the `Config` struct as `uart::Config`.
+
+### SPI drivers can now be configured using `spi::master::Config`
+
+- The old methods to change configuration have been removed.
+- The `new` and `new_typed` constructor no longer takes `frequency` and `mode`.
+- The default configuration is now:
+  - bus frequency: 1 MHz
+  - bit order: MSB first
+  - mode: SPI mode 0
+- There are new constructors (`new_with_config`, `new_typed_with_config`) and a new `apply_config` method to apply custom configuration.
+
+```diff
+-use esp_hal::spi::{master::Spi, SpiMode};
++use esp_hal::spi::{master::{Config, Spi}, SpiMode};
+-Spi::new(SPI2, 100.kHz(), SpiMode::Mode1);
++Spi::new_with_config(
++    SPI2,
++    Config {
++        frequency: 100.kHz(),
++        mode: SpiMode::Mode0,
++        ..Config::default()
++    },
++)
+```
+
+## LCD_CAM changes
+
+### I8080 driver split `set_byte_order()` into `set_8bits_order()` and `set_byte_order()`.
+
+If you were using an 8-bit bus.
+
+```diff
+- i8080.set_byte_order(ByteOrder::default());
++ i8080.set_8bits_order(ByteOrder::default());
+```
+
+If you were using an 16-bit bus, you don't need to change anything, `set_byte_order()` now works correctly.
+
+If you were sharing the bus between an 8-bit and 16-bit device, you will have to call the corresponding method when
+you switch between devices. Be sure to read the documentation of the new methods.
+
+### Mixed mode constructors
+
+It is no longer possible to construct `I8080` or `Camera` with an async-mode DMA channel.
+Convert the DMA channel into blocking before passing it to these constructors.
+
+```diff
+ let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
+ let channel = ctx
+     .dma
+     .channel0
+-    .configure(false, DmaPriority::Priority0)
+-    .into_async();
++    .configure(false, DmaPriority::Priority0);
+
+ let i8080 = I8080::new(
+     lcd_cam.lcd,
+     channel.tx,
+     pins,
+     20.MHz(),
+     Config::default(),
+ );
+```
+
+## `rmt::Channel::transmit` now returns `Result`, `PulseCode` is now `u32`
+
+When trying to send a one-shot transmission will fail if it doesn't end with an end-marker.
+
+```diff
+-    let mut data = [PulseCode {
+-        level1: true,
+-        length1: 200,
+-        level2: false,
+-        length2: 50,
+-    }; 20];
+-
+-    data[data.len() - 2] = PulseCode {
+-        level1: true,
+-        length1: 3000,
+-        level2: false,
+-        length2: 500,
+-    };
+-    data[data.len() - 1] = PulseCode::default();
++    let mut data = [PulseCode::new(true, 200, false, 50); 20];
++    data[data.len() - 2] = PulseCode::new(true, 3000, false, 500);
++    data[data.len() - 1] = PulseCode::empty();
+
+-        let transaction = channel.transmit(&data);
++        let transaction = channel.transmit(&data).unwrap();
+```
+
+
+## The `parl_io::NoClkPin` and `no_clk_pin()` have been removed
+
+You can use `gpio::NoPin` instead.
+
+```diff
+ use esp_hal:: {
+-   parl_io::no_clk_pin,
++   gpio::NoPin,
+ }
+
+-parl_io.rx.with_config(&mut rx_pins, no_clk_pin(), BitPackOrder::Msb, Some(0xfff))
++let mut rx_clk_pin = NoPin;
++parl_io.rx.with_config(&mut rx_pins, &mut rx_clk_pin, BitPackOrder::Msb, Some(0xfff))
+```
+
+## `get_` prefixes have been removed from functions
+
+In order to better comply with the Rust API Guidelines [getter names convention], we have removed the `get_` prefixes from all functions which previously had it. Due to the number of changes it's not practical to list all changes here, however if a function previous began with `get_`, you can simply remove this prefix.
+
+[getter names convention]: https://rust-lang.github.io/api-guidelines/naming.html#c-getter
+
+## The `get_core()` function has been removed in favour of `Cpu::current()`
+
+```diff
+- let core = esp_hal::get_core();
++ let core = esp_hal::Cpu::current();
+```

esp-hal/MIGRATING-0.22.md

@@ -0,0 +1,478 @@
+# Migration Guide from 0.22.x to v1.0.0-beta.0
+
+Starting with this release, unstable parts of esp-hal will be gated behind the `unstable` feature.
+The `unstable` feature itself is unstable, we might change the way we hide APIs without notice.
+Unstable APIs are not covered by semver guarantees, they may break even between patch releases.
+
+Please refer to the documentation to see which APIs are marked as unstable.
+
+## DMA changes
+
+### Accessing channel objects
+
+DMA channels are now available through the `Peripherals` struct, which is returned
+by `esp_hal::init()`. The channels themselves have been renamed to match other peripheral singletons.
+
+- ESP32-C2, C3, C6, H2 and S3: `channelX -> DMA_CHX`
+- ESP32 and S2: `spiXchannel -> DMA_SPIX`, `i2sXchannel -> DMA_I2SX`
+
+```diff
+-let dma = Dma::new(peripherals.DMA);
+-let channel = dma.channel2;
++let channel = peripherals.DMA_CH2;
+```
+
+### Channel configuration changes
+
+- `configure_for_async` and `configure` have been removed
+- PDMA devices (ESP32, ESP32-S2) provide no channel configurability
+- GDMA devices provide `set_priority` to change DMA in/out channel priority
+
+```diff
+ let mut spi = Spi::new_with_config(
+     peripherals.SPI2,
+     Config::default(),
+ )
+ // other setup
+-.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
++.with_dma(dma_channel);
+```
+
+```diff
++dma_channel.set_priority(DmaPriority::Priority1);
+ let mut spi = Spi::new_with_config(
+     peripherals.SPI2,
+     Config::default(),
+ )
+ // other setup
+-.with_dma(dma_channel.configure(false, DmaPriority::Priority1));
++.with_dma(dma_channel);
+```
+
+### Burst mode configuration
+
+Burst mode is now a property of buffers, instead of DMA channels. Configuration can be done by
+calling `set_burst_config` on buffers that support it. The configuration options and the
+corresponding `BurstConfig` type are device specfic.
+
+### Usability changes affecting applications
+
+Individual channels are no longer wrapped in `Channel`, but they implement the `DmaChannel` trait.
+This means that if you want to split them into an `rx` and a `tx` half (which is only supported on
+the H2, C6 and S3 currently), you can't move out of the channel but instead you need to call
+the `split` method.
+
+```diff
+-let tx = channel.tx;
++use esp_hal::dma::DmaChannel;
++let (rx, tx) = channel.split();
+```
+
+The `Channel` types remain available for use in peripheral drivers.
+
+It is now simpler to work with DMA channels in generic contexts. esp-hal now provides convenience
+traits and type aliasses to specify peripheral compatibility. The `ChannelCreator` types have been
+removed, further simplifying use.
+
+For example, previously you may have needed to write something like this to accept a DMA channel
+in a generic function:
+
+```rust
+fn new_foo<'d, T>(
+    dma_channel: ChannelCreator<2>, // It wasn't possible to accept a generic ChannelCreator.
+    peripheral: impl Peripheral<P = T> + 'd,
+)
+where
+    T: SomePeripheralInstance,
+    ChannelCreator<2>: DmaChannelConvert<<T as DmaEligible>::Dma>,
+{
+    let dma_channel = dma_channel.configure_for_async(false, DmaPriority::Priority0);
+
+    let driver = PeripheralDriver::new(peripheral, config).with_dma(dma_channel);
+
+    // ...
+}
+```
+
+From now on a similar, but more flexible implementation may look like:
+
+```rust
+fn new_foo<'d, T, CH>(
+    dma_channel: impl Peripheral<P = CH> + 'd,
+    peripheral: impl Peripheral<P = T> + 'd,
+)
+where
+    T: SomePeripheralInstance,
+    CH: DmaChannelFor<T>,
+{
+    // Optionally: dma_channel.set_priority(DmaPriority::Priority2);
+
+    let driver = PeripheralDriver::new(peripheral, config).with_dma(dma_channel);
+
+    // ...
+}
+```
+
+### Usability changes affecting third party peripheral drivers
+
+If you are writing a driver and need to store a channel in a structure, you can use one of the
+`ChannelFor` type aliasses.
+
+```diff
+ struct Aes<'d> {
+-    channel: ChannelTx<'d, Blocking, <AES as DmaEligible>::Dma>,
++    channel: ChannelTx<'d, Blocking, PeripheralTxChannel<AES>>,
+ }
+```
+
+## Timer changes
+
+The low level timers, `SystemTimer` and `TimerGroup` are now "dumb". They contain no logic for operating modes or trait implementations (except the low level `Timer` trait).
+
+### Timer drivers - `OneShotTimer` & `PeriodicTimer`
+
+Both drivers now have a `Mode` parameter. Both also type erase the underlying driver by default, call `new_typed` to retain the type.
+
+```diff
+- OneShotTimer<'static, systimer::Alarm>;
++ OneShotTimer<'static, Blocking>;
+- PeriodicTimer<'static, systimer::Alarm>;
++ PeriodicTimer<'static, Blocking>;
+```
+
+### SystemTimer
+
+```diff
+let systimer = SystemTimer::new(peripherals.SYSTIMER);
+- static UNIT0: StaticCell<SpecificUnit<'static, 0>> = StaticCell::new();
+- let unit0 = UNIT0.init(systimer.unit0);
+- let frozen_unit = FrozenUnit::new(unit0);
+- let alarm0 = Alarm::new(systimer.comparator0, &frozen_unit);
+- alarm0.set_period(1u32.secs());
++ let alarm0 = systimer.alarm0;
++ let mut timer = PeriodicTimer::new(alarm0);
++ timer.start(1u64.secs());
+```
+
+### TIMG
+
+Timer group timers have been type erased.
+
+```diff
+- timg::Timer<timg::Timer0<crate::peripherals::TIMG0>, Blocking>
++ timg::Timer
+```
+
+### ETM usage has changed
+
+Timer dependant ETM events should be created _prior_ to initializing the timer with the chosen driver.
+
+```diff
+let task = ...; // ETM task
+let syst = SystemTimer::new(peripherals.SYSTIMER);
+let alarm0 = syst.alarm0;
+- alarm0.load_value(1u64.millis()).unwrap();
+- alarm0.start();
+- let event = Event::new(&mut alarm0);
++ let event = Event::new(&alarm0);
++ let timer = OneShotTimer::new(alarm0);
++ timer.schedule(1u64.millis()).unwrap();
+let _configured_channel = channel0.setup(&event, &task);
+```
+
+## PSRAM is now initialized automatically
+
+Calling `esp_hal::initialize` will now configure PSRAM if either the `quad-psram` or `octal-psram`
+is enabled. To retrieve the address and size of the initialized external memory, use
+`esp_hal::psram::psram_raw_parts`, which returns a pointer and a length.
+
+```diff
+-let peripherals = esp_hal::init(esp_hal::Config::default());
+-let (start, size) = esp_hal::psram::init_psram(peripherals.PSRAM, psram_config);
++let peripherals = esp_hal::init({
++    let mut config = esp_hal::Config::default();
++    config.psram = psram_config;
++    config
++});
++let (start, size) = esp_hal::psram::psram_raw_parts(&peripherals.PSRAM, psram);
+```
+
+The usage of `esp_alloc::psram_allocator!` remains unchanged.
+
+## embedded-hal 0.2.\* is not supported anymore.
+
+As per https://github.com/rust-embedded/embedded-hal/pull/640, our driver no longer implements traits from `embedded-hal 0.2.x`.
+Analogs of all traits from the above mentioned version are available in `embedded-hal 1.x.x`
+
+```diff
+- use embedded_hal_02::can::Frame;
++ use embedded_can::Frame;
+```
+
+```diff
+- use embedded_hal_02::digital::v2::OutputPin;
+- use embedded_hal_02::digital::v2::ToggleableOutputPin;
++ use embedded_hal::digital::OutputPin;
++ use embedded_hal::digital::StatefulOutputPin;
+```
+
+```diff
+- use embedded_hal_02::serial::{Read, Write};
++ use embedded_hal_nb::serial::{Read, Write};
+```
+
+You might also want to check the full official `embedded-hal` migration guide:
+https://github.com/rust-embedded/embedded-hal/blob/master/docs/migrating-from-0.2-to-1.0.md
+
+## Interrupt related reshuffle
+
+```diff
+- use esp_hal::InterruptConfigurable;
+- use esp_hal::DEFAULT_INTERRUPT_HANDLER;
++ use esp_hal::interrupt::InterruptConfigurable;
++ use esp_hal::interrupt::DEFAULT_INTERRUPT_HANDLER;
+```
+
+## Driver constructors now take a configuration and are fallible
+
+The old `new_with_config` constructor have been removed, and `new` constructors now always take
+a configuration structure. They have also been updated to return a `ConfigError` if the configuration
+is not compatible with the hardware.
+
+```diff
+-let mut spi = Spi::new_with_config(
++let mut spi = Spi::new(
+     peripherals.SPI2,
+     Config {
+         frequency: 100.kHz(),
+         mode: SpiMode::_0,
+         ..Config::default()
+     },
+-);
++)
++.unwrap();
+```
+
+```diff
+ let mut spi = Spi::new(
+     peripherals.SPI2,
++    Config::default(),
+-);
++)
++.unwrap();
+```
+
+## Peripheral instance type parameters and `new_typed` constructors have been removed
+
+Call `new` instead and remove the type parameters if you've used them.
+
+```diff
+-let mut spi: Spi<'lt, SPI2> = Spi::new_typed(..).unwrap();
++let mut spi: Spi<'lt> = Spi::new(..).unwrap();
+```
+
+## LCD_CAM configuration changes
+
+- `cam` now has a `Config` strurct that contains frequency, bit/byte order, VSync filter options.
+- DPI, I8080: `frequency` has been moved into `Config`.
+
+```diff
++let mut cam_config = cam::Config::default();
++cam_config.frequency = 1u32.MHz();
+ cam::Camera::new(
+     lcd_cam.cam,
+     dma_rx_channel,
+     pins,
+-    1u32.MHz(),
++    cam_config,
+ )
+```
+
+## SpiDma now requires you specify the transfer length explicitly
+
+```diff
+  dma_tx_buf.set_length(5 /* or greater */);
+- spi_dma.write(dma_tx_buf);
++ spi_dma.write(5, dma_tx_buf);
+```
+
+```diff
+  dma_rx_buf.set_length(5 /* or greater */);
+- spi_dma.read(dma_rx_buf);
++ spi_dma.read(5, dma_rx_buf);
+```
+
+```diff
+  dma_rx_buf.set_length(5 /* or greater */);
+  dma_tx_buf.set_length(5 /* or greater */);
+- spi_dma.transfer(dma_rx_buf, dma_tx_buf);
++ spi_dma.transfer(5, dma_rx_buf, 5, dma_tx_buf);
+```
+
+## I2C Error changes
+
+To avoid abbreviations and contractions (as per the esp-hal guidelines), some error variants have changed
+
+```diff
+- Error::ExecIncomplete
++ Error::ExecutionIncomplete
+- Error::CommandNrExceeded
++ Error::CommandNumberExceeded
+- Error::ExceedingFifo
++ Error::FifoExceeded
+- Error::TimeOut
++ Error::Timeout
+- Error::InvalidZeroLength
++ Error::ZeroLengthInvalid
+```
+
+## The crate prelude has been removed
+
+The reexports that were previously part of the prelude are available through other paths:
+
+- `nb` is no longer re-exported. Please import the `nb` crate if you need it.
+- `ExtU64` and `RateExtU32` have been moved to `esp_hal::time`
+- `Clock` and `CpuClock`: `esp_hal::clock::{Clock, CpuClock}`
+- The following traits need to be individually imported when needed:
+  - `esp_hal::analog::dac::Instance`
+  - `esp_hal::gpio::Pin`
+  - `esp_hal::ledc::channel::ChannelHW`
+  - `esp_hal::ledc::channel::ChannelIFace`
+  - `esp_hal::ledc::timer::TimerHW`
+  - `esp_hal::ledc::timer::TimerIFace`
+  - `esp_hal::timer::timg::TimerGroupInstance`
+  - `esp_hal::timer::Timer`
+  - `esp_hal::interrupt::InterruptConfigurable`
+- The `entry` macro can be imported as `esp_hal::entry`, while other macros are found under `esp_hal::macros`
+
+## `AtCmdConfig` now uses builder-lite pattern
+
+```diff
+- uart0.set_at_cmd(AtCmdConfig::new(None, None, None, b'#', None));
++ uart0.set_at_cmd(AtCmdConfig::default().with_cmd_char(b'#'));
+```
+
+## Crate configuration changes
+
+To prevent ambiguity between configurations, we had to change the naming format of configuration
+keys. Before, we used `{prefix}_{key}`, which meant that esp-hal and esp-hal-\* configuration keys
+were impossible to tell apart. To fix this issue, we are changing the separator from one underscore
+character to `_CONFIG_`. This also means that users will have to change their `config.toml`
+configurations to match the new format.
+
+```diff
+ [env]
+-ESP_HAL_PLACE_SPI_DRIVER_IN_RAM="true"
++ESP_HAL_CONFIG_PLACE_SPI_DRIVER_IN_RAM="true"
+```
+
+## UART changes
+
+The `Config` struct's setters are now prefixed with `with_`. `parity_none`, `parity_even`,
+`parity_odd` have been replaced by `with_parity` that takes a `Parity` parameter.
+
+```diff
+ let config = Config::default()
+-    .rx_fifo_full_threshold(30)
++    .with_rx_fifo_full_threshold(30)
+-    .parity_even();
++    .with_parity(Parity::Even);
+```
+
+The `DataBits`, `Parity`, and `StopBits` enum variants are no longer prefixed with the name of the enum.
+
+e.g.
+
+```diff
+- DataBits::DataBits8
++ DataBits::_8
+- Parity::ParityNone
++ Parity::None
+- StopBits::Stop1
++ StopBits::_1
+```
+
+The previous blocking implementation of `read_bytes` has been removed, and the non-blocking `drain_fifo` has instead been renamed to `read_bytes` in its place.
+
+Any code which was previously using `read_bytes` to fill a buffer in a blocking manner will now need to implement the necessary logic to block until the buffer is filled in their application instead.
+
+The `Error` enum variant uses object+verb naming.
+
+e.g.
+
+```diff
+- RxGlichDetected
++ GlitchOccurred
+```
+
+RX/TX pin assignment moved from constructors to builder functions.
+
+e.g.
+
+```diff
+  let mut uart1 = Uart::new(
+      peripherals.UART1,
+-     Config::default(),
+-     peripherals.GPIO1,
+-     peripherals.GPIO2,
+- ).unwrap();
++     Config::default())
++     .unwrap()
++     .with_rx(peripherals.GPIO1)
++     .with_tx(peripherals.GPIO2);
+```
+
+## Spi `with_miso` has been split
+
+Previously, `with_miso` set up the provided pin as an input and output, which was necessary for half duplex.
+Full duplex does not require this, and it also creates an artificial restriction.
+
+If you were using half duplex SPI with `with_miso`,
+you should now use `with_sio1` instead to get the previous behavior.
+
+## CPU Clocks
+
+The specific CPU clock variants are renamed from e.g. `Clock80MHz` to `_80MHz`.
+
+```diff
+- CpuClock::Clock80MHz
++ CpuClock::_80MHz
+```
+
+Additionally the enum is marked as non-exhaustive.
+
+## SPI Changes
+
+The SPI mode variants are renamed from e.g. `Mode0` to `_0`.
+
+```diff
+- Mode::Mode0
++ Mode::_0
+```
+
+The Address and Command enums have similarly had their variants changed from e.g. `Address1` to `_1Bit` and `Command1` to `_1Bit` respectively:
+
+```diff
+- Address::Address1
++ Address::_1Bit
+- Command::Command1
++ Command::_1Bit
+```
+
+## GPIO Changes
+
+The GPIO drive strength variants are renamed from e.g. `I5mA` to `_5mA`.
+
+```diff
+-DriveStrength::I5mA
++DriveStrength::_5mA
+```
+
+## ADC Changes
+
+The ADC attenuation variants are renamed from e.g. `Attenuation0dB` to `_0dB`.
+
+```diff
+-Attenuation::Attenuation0dB
++Attenuation::_0dB
+```

esp-hal/README.md

@@ -2,7 +2,7 @@
 
 [![Crates.io](https://img.shields.io/crates/v/esp-hal?labelColor=1C2C2E&color=C96329&logo=Rust&style=flat-square)](https://crates.io/crates/esp-hal)
 [![docs.rs](https://img.shields.io/docsrs/esp-hal?labelColor=1C2C2E&color=C96329&logo=rust&style=flat-square)](https://docs.esp-rs.org/esp-hal)
-![MSRV](https://img.shields.io/badge/MSRV-1.76-blue?labelColor=1C2C2E&style=flat-square)
+![MSRV](https://img.shields.io/badge/MSRV-1.83-blue?labelColor=1C2C2E&style=flat-square)
 ![Crates.io](https://img.shields.io/crates/l/esp-hal?labelColor=1C2C2E&style=flat-square)
 [![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&labelColor=1C2C2E&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
 
@@ -46,9 +46,13 @@ For help getting started with this HAL, please refer to [The Rust on ESP Book] a
 [s2-trm]: https://www.espressif.com/sites/default/files/documentation/esp32-s2_technical_reference_manual_en.pdf
 [s3-trm]: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf
 
+## `unstable` feature
+
+The stable feature set is designed to remain consistent and reliable. Other parts guarded by the `unstable` feature, however, are still under active development and may undergo breaking changes and are disabled by default.
+
 ## Minimum Supported Rust Version (MSRV)
 
-This crate is guaranteed to compile on stable Rust 1.79 and up. It _might_
+This crate is guaranteed to compile on stable Rust 1.83 and up. It _might_
 compile with older versions but that may change in any new patch release.
 
 ## License

esp-hal/build.rs

@@ -11,16 +11,14 @@ use esp_build::assert_unique_used_features;
 use esp_config::{generate_config, Value};
 use esp_metadata::{Chip, Config};
 
-#[cfg(debug_assertions)]
-esp_build::warning! {"
-WARNING: use --release
-  We *strongly* recommend using release profile when building esp-hal.
-  The dev profile can potentially be one or more orders of magnitude
-  slower than release, and may cause issues with timing-senstive
-  peripherals and/or devices.
-"}
-
 fn main() -> Result<(), Box<dyn Error>> {
+    println!("cargo:rustc-check-cfg=cfg(is_debug_build)");
+    if let Ok(level) = std::env::var("OPT_LEVEL") {
+        if level == "0" || level == "1" {
+            println!("cargo:rustc-cfg=is_debug_build");
+        }
+    }
+
     // NOTE: update when adding new device support!
     // Ensure that exactly one chip has been specified:
     assert_unique_used_features!(
@@ -69,19 +67,57 @@ fn main() -> Result<(), Box<dyn Error>> {
     // Define all necessary configuration symbols for the configured device:
     config.define_symbols();
 
-    #[allow(unused_mut)]
-    let mut config_symbols = config.all().collect::<Vec<_>>();
-    #[cfg(feature = "flip-link")]
-    config_symbols.push("flip-link");
-
     // Place all linker scripts in `OUT_DIR`, and instruct Cargo how to find these
     // files:
     let out = PathBuf::from(env::var_os("OUT_DIR").unwrap());
     println!("cargo:rustc-link-search={}", out.display());
 
+    // emit config
+    let cfg = generate_config(
+        "esp_hal",
+        &[
+            (
+                "place-spi-driver-in-ram",
+                "Places the SPI driver in RAM for better performance",
+                Value::Bool(false),
+                None
+            ),
+            (
+                "spi-address-workaround",
+                "(ESP32 only) Enables a workaround for the issue where SPI in half-duplex mode incorrectly transmits the address on a single line if the data buffer is empty.",
+                Value::Bool(true),
+                None
+            ),
+            (
+                "place-switch-tables-in-ram",
+                "Places switch-tables, some lookup tables and constants related to interrupt handling into RAM - resulting in better performance but slightly more RAM consumption.",
+                Value::Bool(true),
+                None
+            ),
+            (
+                "place-anon-in-ram",
+                "Places anonymous symbols into RAM - resulting in better performance at the cost of significant more RAM consumption. Best to be combined with `place-switch-tables-in-ram`.",
+                Value::Bool(false),
+                None
+            ),
+        ],
+        true,
+    );
+
     // RISC-V and Xtensa devices each require some special handling and processing
     // of linker scripts:
 
+    #[allow(unused_mut)]
+    let mut config_symbols = config.all().collect::<Vec<_>>();
+    #[cfg(feature = "flip-link")]
+    config_symbols.push("flip-link");
+
+    for (key, value) in &cfg {
+        if let Value::Bool(true) = value {
+            config_symbols.push(key);
+        }
+    }
+
     if cfg!(feature = "esp32") || cfg!(feature = "esp32s2") || cfg!(feature = "esp32s3") {
         // Xtensa devices:
 
@@ -125,24 +161,6 @@ fn main() -> Result<(), Box<dyn Error>> {
     copy_dir_all(&config_symbols, "ld/sections", &out)?;
     copy_dir_all(&config_symbols, format!("ld/{device_name}"), &out)?;
 
-    // emit config
-    generate_config(
-        "esp_hal",
-        &[
-            (
-                "place-spi-driver-in-ram",
-                Value::Bool(false),
-                "Places the SPI driver in RAM for better performance",
-            ),
-            (
-                "spi-address-workaround",
-                Value::Bool(true),
-                "(ESP32 only) Enables a workaround for the issue where SPI in half-duplex mode incorrectly transmits the address on a single line if the data buffer is empty.",
-            ),
-        ],
-        true,
-    );
-
     Ok(())
 }
 

esp-hal/ld/README.md

@@ -0,0 +1,8 @@
+# ROM functions
+
+Files in the `rom` subdirectories are taken from esp-idf
+
+- DON'T include any `*newlib*` functions
+- systimer, wdt and mbedtls shouldn't be included
+- make sure to align the version you take the files from with esp-wifi-sys - NEVER randomly sync the files with other versions
+- some additional functions are needed from ROM - see `additional.ld` (these are usually defined in the `*newlib*` files)

esp-hal/ld/esp32/esp32.x

@@ -19,10 +19,10 @@ INCLUDE "fixups/rtc_fast_rwdata_dummy.x"
 /* END ESP32 fixups */
 
 /* Shared sections - ordering matters */
-INCLUDE "text.x"
-INCLUDE "rodata.x"
 INCLUDE "rwtext.x"
+INCLUDE "text.x"
 INCLUDE "rwdata.x"
+INCLUDE "rodata.x"
 INCLUDE "rtc_fast.x"
 INCLUDE "rtc_slow.x"
 INCLUDE "stack.x"

esp-hal/ld/esp32/rom-functions.x

@@ -1,34 +1,9 @@
-PROVIDE(ets_delay_us = 0x40008534);
-PROVIDE(ets_update_cpu_frequency_rom = 0x40008550);
-PROVIDE(rom_i2c_writeReg = 0x400041a4);
-PROVIDE(rom_i2c_writeReg_Mask = 0x400041fc);
-PROVIDE(rtc_get_reset_reason = 0x400081d4);
-PROVIDE(software_reset = 0x4000824c);
-PROVIDE(software_reset_cpu = 0x40008264);
+INCLUDE "rom/esp32.rom.api.ld"
+INCLUDE "rom/esp32.rom.eco3.ld"
+INCLUDE "rom/esp32.rom.ld"
+INCLUDE "rom/esp32.rom.libgcc.ld"
+INCLUDE "rom/esp32.rom.redefined.ld"
+INCLUDE "rom/esp32.rom.spiflash_legacy.ld"
+INCLUDE "rom/esp32.rom.syscalls.ld"
 
-PROVIDE ( ets_efuse_get_spiconfig = 0x40008658 );
-PROVIDE ( esp_rom_efuse_get_flash_gpio_info    = ets_efuse_get_spiconfig );
-PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
-PROVIDE ( gpio_matrix_out = 0x40009f0c );
-PROVIDE ( gpio_matrix_in = 0x40009edc );
-PROVIDE ( esp_rom_gpio_connect_in_signal  = gpio_matrix_in );
-PROVIDE ( esp_rom_spiflash_config_clk = 0x40062bc8 );
-PROVIDE ( g_rom_spiflash_dummy_len_plus = 0x3ffae290 );
-PROVIDE ( g_rom_flashchip = 0x3ffae270 );
-PROVIDE ( cache_sram_mmu_set_rom = 0x400097f4 );
-
-PROVIDE (esp_rom_crc32_be = 0x4005d024);
-PROVIDE (esp_rom_crc16_be = 0x4005d09c);
-PROVIDE (esp_rom_crc8_be = 0x4005d114);
-PROVIDE (esp_rom_crc32_le = 0x4005cfec);
-PROVIDE (esp_rom_crc16_le = 0x4005d05c);
-PROVIDE (esp_rom_crc8_le = 0x4005d0e0);
-
-PROVIDE (esp_rom_md5_init   = 0x4005da7c);
-PROVIDE (esp_rom_md5_update = 0x4005da9c);
-PROVIDE (esp_rom_md5_final  = 0x4005db1c);
-
-memcmp = 0x4000c260;
-memcpy = 0x4000c2c8;
-memmove = 0x4000c3c0;
-memset = 0x4000c44c;
+INCLUDE "rom/additional.ld"

esp-hal/ld/esp32/rom/additional.ld

@@ -0,0 +1,20 @@
+memcmp = 0x4000c260;
+memcpy = 0x4000c2c8;
+memmove = 0x4000c3c0;
+memset = 0x4000c44c;
+
+PROVIDE ( strcpy = 0x400013ac );
+PROVIDE ( abs = 0x40056340 );
+PROVIDE ( strncpy = 0x400015d4 );
+PROVIDE ( strncmp = 0x4000c5f4 );
+
+PROVIDE ( bzero = 0x4000c1f4 );
+
+PROVIDE ( strcat = 0x4000c518 );
+PROVIDE ( strcmp = 0x40001274 );
+PROVIDE ( strchr = 0x4000c53c );
+PROVIDE ( strlcpy = 0x4000c584 );
+PROVIDE ( strstr = 0x4000c674 );
+PROVIDE ( strcasecmp = 0x400011cc );
+
+PROVIDE ( memchr = 0x4000c244 );

esp-hal/ld/esp32/rom/esp32.rom.api.ld

@@ -0,0 +1,62 @@
+/**
+ * ROM APIs
+ */
+PROVIDE ( esp_rom_crc32_le = crc32_le );
+PROVIDE ( esp_rom_crc16_le = crc16_le );
+PROVIDE ( esp_rom_crc8_le  = crc8_le );
+PROVIDE ( esp_rom_crc32_be = crc32_be );
+PROVIDE ( esp_rom_crc16_be = crc16_be );
+PROVIDE ( esp_rom_crc8_be  = crc8_be );
+
+PROVIDE ( esp_rom_gpio_pad_select_gpio    = gpio_pad_select_gpio );
+PROVIDE ( esp_rom_gpio_pad_pullup_only    = gpio_pad_pullup );
+PROVIDE ( esp_rom_gpio_pad_set_drv        = gpio_pad_set_drv );
+PROVIDE ( esp_rom_gpio_pad_unhold         = gpio_pad_unhold );
+PROVIDE ( esp_rom_gpio_connect_in_signal  = gpio_matrix_in );
+PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
+
+PROVIDE ( esp_rom_efuse_mac_address_crc8       = esp_crc8 );
+PROVIDE ( esp_rom_efuse_get_flash_gpio_info    = ets_efuse_get_spiconfig );
+PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
+
+PROVIDE ( esp_rom_uart_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_uart_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
+PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
+PROVIDE ( esp_rom_uart_switch_buffer  = uart_buff_switch );
+
+PROVIDE ( esp_rom_output_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_output_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_output_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_output_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_output_rx_string      = UartRxString );
+PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_output_putc           = ets_write_char_uart );
+PROVIDE ( esp_rom_output_switch_buffer  = uart_buff_switch );
+
+/* wpa_supplicant re-implements the MD5 functions: MD5Init, MD5Update, MD5Final */
+/* so here we directly assign the symbols with the ROM API address */
+PROVIDE ( esp_rom_md5_init   = 0x4005da7c );
+PROVIDE ( esp_rom_md5_update = 0x4005da9c );
+PROVIDE ( esp_rom_md5_final  = 0x4005db1c );
+
+PROVIDE ( esp_rom_software_reset_system = software_reset );
+PROVIDE ( esp_rom_software_reset_cpu    = software_reset_cpu );
+
+PROVIDE ( esp_rom_printf   = ets_printf );
+PROVIDE ( esp_rom_delay_us = ets_delay_us );
+PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
+PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
+PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
+PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
+
+PROVIDE ( esp_rom_spiflash_set_bp = esp_rom_spiflash_lock );
+PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
+
+PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
+PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
+PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
+PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );

esp-hal/ld/esp32/rom/esp32.rom.eco3.ld

@@ -0,0 +1,10 @@
+/*
+ESP32 ECO3 ROM address table
+Secure Boot Version 2 API's imported from the ROM
+*/
+PROVIDE ( ets_secure_boot_verify_signature = 0x4006543c);
+PROVIDE ( ets_secure_boot_verify_boot_bootloader = 0x400655ec);
+PROVIDE ( ets_use_secure_boot_v2 = 0x4000f8d4);
+PROVIDE ( ets_rsa_pss_verify = 0x40065310);
+PROVIDE ( ets_mgf1_sha256 = 0x400651a8);
+PROVIDE ( ets_emsa_pss_verify = 0x4006520c);

esp-hal/ld/esp32/rom/esp32.rom.libgcc.ld

@@ -0,0 +1,94 @@
+/* Unlike other ROM functions which are exported using PROVIDE, which declares
+   weak symbols, these libgcc functions are exported using assignment,
+   which declares strong symbols. This is done so that ROM functions are always
+   used instead of the ones provided by libgcc.a.
+*/
+
+__absvdi2 = 0x4006387c;
+__absvsi2 = 0x40063868;
+__adddf3 = 0x40002590;
+__addsf3 = 0x400020e8;
+__addvdi3 = 0x40002cbc;
+__addvsi3 = 0x40002c98;
+__ashldi3 = 0x4000c818;
+__ashrdi3 = 0x4000c830;
+__bswapdi2 = 0x40064b08;
+__bswapsi2 = 0x40064ae0;
+__clrsbdi2 = 0x40064b7c;
+__clrsbsi2 = 0x40064b64;
+__clzdi2 = 0x4000ca50;
+__clzsi2 = 0x4000c7e8;
+__cmpdi2 = 0x40063820;
+__ctzdi2 = 0x4000ca64;
+__ctzsi2 = 0x4000c7f0;
+__divdc3 = 0x400645a4;
+__divdf3 = 0x40002954;
+__divdi3 = 0x4000ca84;
+__divsi3 = 0x4000c7b8;
+__eqdf2 = 0x400636a8;
+__eqsf2 = 0x40063374;
+__extendsfdf2 = 0x40002c34;
+__ffsdi2 = 0x4000ca2c;
+__ffssi2 = 0x4000c804;
+__fixdfdi = 0x40002ac4;
+__fixdfsi = 0x40002a78;
+__fixsfdi = 0x4000244c;
+__fixsfsi = 0x4000240c;
+__fixunsdfsi = 0x40002b30;
+__fixunssfdi = 0x40002504;
+__fixunssfsi = 0x400024ac;
+__floatdidf = 0x4000c988;
+__floatdisf = 0x4000c8c0;
+__floatsidf = 0x4000c944;
+__floatsisf = 0x4000c870;
+__floatundidf = 0x4000c978;
+__floatundisf = 0x4000c8b0;
+__floatunsidf = 0x4000c938;
+__floatunsisf = 0x4000c864;
+__gcc_bcmp = 0x40064a70;
+__gedf2 = 0x40063768;
+__gesf2 = 0x4006340c;
+__gtdf2 = 0x400636dc;
+__gtsf2 = 0x400633a0;
+__ledf2 = 0x40063704;
+__lesf2 = 0x400633c0;
+__lshrdi3 = 0x4000c84c;
+__ltdf2 = 0x40063790;
+__ltsf2 = 0x4006342c;
+__moddi3 = 0x4000cd4c;
+__modsi3 = 0x4000c7c0;
+__muldc3 = 0x40063c90;
+__muldf3 = 0x4006358c;
+__muldi3 = 0x4000c9fc;
+__mulsf3 = 0x400632c8;
+__mulsi3 = 0x4000c7b0;
+__mulvdi3 = 0x40002d78;
+__mulvsi3 = 0x40002d60;
+__nedf2 = 0x400636a8;
+__negdf2 = 0x400634a0;
+__negdi2 = 0x4000ca14;
+__negsf2 = 0x400020c0;
+__negvdi2 = 0x40002e98;
+__negvsi2 = 0x40002e78;
+__nesf2 = 0x40063374;
+__nsau_data = 0x3ff96544;
+__paritysi2 = 0x40002f3c;
+__popcount_tab = 0x3ff96544;
+__popcountdi2 = 0x40002ef8;
+__popcountsi2 = 0x40002ed0;
+__powidf2 = 0x400638e4;
+__subdf3 = 0x400026e4;
+__subsf3 = 0x400021d0;
+__subvdi3 = 0x40002d20;
+__subvsi3 = 0x40002cf8;
+__truncdfsf2 = 0x40002b90;
+__ucmpdi2 = 0x40063840;
+__udiv_w_sdiv = 0x40064bec;
+__udivdi3 = 0x4000cff8;
+__udivmoddi4 = 0x40064bf4;
+__udivsi3 = 0x4000c7c8;
+__umoddi3 = 0x4000d280;
+__umodsi3 = 0x4000c7d0;
+__umulsidi3 = 0x4000c7d8;
+__unorddf2 = 0x400637f4;
+__unordsf2 = 0x40063478;

esp-hal/ld/esp32/rom/esp32.rom.redefined.ld

@@ -0,0 +1,38 @@
+/*
+   ROM Functions defined in this file are not used in ESP-IDF as is,
+   and different definitions for functions with the same names are provided.
+   This file is not used when linking ESP-IDF and is intended for reference only
+*/
+
+PROVIDE ( abort = 0x4000bba4 );
+PROVIDE ( aes_128_cbc_decrypt = 0x4005cc7c );
+PROVIDE ( aes_128_cbc_encrypt = 0x4005cc18 );
+PROVIDE ( aes_unwrap = 0x4005ccf0 );
+PROVIDE ( base64_decode = 0x4005ced8 );
+PROVIDE ( base64_encode = 0x4005cdbc );
+PROVIDE ( ets_isr_mask = 0x400067fc );
+PROVIDE ( ets_isr_unmask = 0x40006808 );
+PROVIDE ( ets_timer_arm = 0x40008368 );
+PROVIDE ( ets_timer_arm_us = 0x400083ac );
+PROVIDE ( ets_timer_disarm = 0x400083ec );
+PROVIDE ( ets_timer_done = 0x40008428 );
+PROVIDE ( ets_timer_init = 0x400084e8 );
+PROVIDE ( ets_timer_handler_isr = 0x40008454 );
+PROVIDE ( ets_timer_setfn = 0x40008350 );
+PROVIDE ( hmac_md5 = 0x4005d264 );
+PROVIDE ( hmac_md5_vector = 0x4005d17c );
+PROVIDE ( hmac_sha1 = 0x40060acc );
+PROVIDE ( hmac_sha1_vector = 0x400609e4 );
+PROVIDE ( hmac_sha256 = 0x40060d58 );
+PROVIDE ( hmac_sha256_vector = 0x40060c84 );
+PROVIDE ( MD5Final = 0x4005db1c );
+PROVIDE ( MD5Init = 0x4005da7c );
+PROVIDE ( MD5Update = 0x4005da9c );
+PROVIDE ( md5_vector = 0x4005db80 );
+PROVIDE ( pbkdf2_sha1 = 0x40060ba4 );
+PROVIDE ( rc4_skip = 0x40060928 );
+PROVIDE ( sha1_prf = 0x40060ae8 );
+PROVIDE ( sha1_vector = 0x40060b64 );
+PROVIDE ( sha256_prf = 0x40060d70 );
+PROVIDE ( sha256_vector = 0x40060e08 );
+PROVIDE ( uart_tx_wait_idle = 0x40009278 );

esp-hal/ld/esp32/rom/esp32.rom.spiflash_legacy.ld

@@ -0,0 +1,29 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/*
+	Address table for SPI driver functions in ESP32 ROM.
+	These functions are only linked from ROM when SPI_FLASH_ROM_DRIVER_PATCH is not set in configuration.
+*/
+
+PROVIDE ( esp_rom_spiflash_write_encrypted = 0x40062e78 );
+PROVIDE ( esp_rom_spiflash_erase_area = 0x400631ac );
+PROVIDE ( esp_rom_spiflash_erase_block = 0x40062c4c );
+PROVIDE ( esp_rom_spiflash_erase_chip = 0x40062c14 );
+PROVIDE ( esp_rom_spiflash_erase_sector = 0x40062ccc );
+PROVIDE ( esp_rom_spiflash_attach = 0x40062a6c );
+PROVIDE ( esp_rom_spiflash_lock = 0x400628f0 );
+PROVIDE ( esp_rom_spiflash_read = 0x40062ed8 );
+PROVIDE ( esp_rom_spiflash_config_readmode = 0x40062b64 ); /* SPIMasterReadModeCnfig */
+PROVIDE ( esp_rom_spiflash_read_status = 0x4006226c );
+PROVIDE ( esp_rom_spiflash_read_statushigh = 0x40062448 );
+PROVIDE ( esp_rom_spiflash_write = 0x40062d50 );
+PROVIDE ( esp_rom_spiflash_enable_write = 0x40062320 );
+PROVIDE ( esp_rom_spiflash_write_status = 0x400622f0 );
+
+/* always using patched versions of these functions
+PROVIDE ( esp_rom_spiflash_wait_idle = 0x400622c0 );
+PROVIDE ( esp_rom_spiflash_unlock = 0x400????? );
+*/

esp-hal/ld/esp32/rom/esp32.rom.syscalls.ld

@@ -0,0 +1,66 @@
+/* These ROM functions call respective entries in the syscall table.
+   They are called by other ROM functions (mostly from newlib).
+   We don't link to them directly, since in IDF there are actual
+   implementations of these functions, with same names.
+
+   I.e.:
+
+   times (in ROM) -> _times_r (in ROM) -> syscall table entry _times_r -> _times_r (in IDF)
+
+   Hence the following entries are provided only for reference
+   and commented out.
+ */
+
+/*   <--- the following lines are commented out
+
+PROVIDE ( calloc = 0x4000bee4 );
+PROVIDE ( free = 0x4000beb8 );
+PROVIDE ( _free_r = 0x4000bbcc );
+PROVIDE ( _getpid_r = 0x4000bcfc );
+PROVIDE ( __getreent = 0x4000be8c );
+PROVIDE ( _gettimeofday_r = 0x4000bc58 );
+PROVIDE ( _kill_r = 0x4000bd10 );
+PROVIDE ( _lock_acquire = 0x4000be14 );
+PROVIDE ( _lock_acquire_recursive = 0x4000be28 );
+PROVIDE ( _lock_close = 0x4000bdec );
+PROVIDE ( _lock_close_recursive = 0x4000be00 );
+PROVIDE ( _lock_init = 0x4000bdc4 );
+PROVIDE ( _lock_init_recursive = 0x4000bdd8 );
+PROVIDE ( _lock_release = 0x4000be64 );
+PROVIDE ( _lock_release_recursive = 0x4000be78 );
+PROVIDE ( _lock_try_acquire = 0x4000be3c );
+PROVIDE ( _lock_try_acquire_recursive = 0x4000be50 );
+PROVIDE ( malloc = 0x4000bea0 );
+PROVIDE ( _malloc_r = 0x4000bbb4 );
+PROVIDE ( _raise_r = 0x4000bc70 );
+PROVIDE ( realloc = 0x4000becc );
+PROVIDE ( _realloc_r = 0x4000bbe0 );
+PROVIDE ( _sbrk_r = 0x4000bce4 );
+PROVIDE ( _system_r = 0x4000bc10 );
+PROVIDE ( _times_r = 0x4000bc40 );
+PROVIDE ( _close_r = 0x4000bd3c );
+PROVIDE ( _exit_r = 0x4000bd28 );
+PROVIDE ( _fstat_r = 0x4000bccc );
+PROVIDE ( _link_r = 0x4000bc9c );
+PROVIDE ( _lseek_r = 0x4000bd8c );
+PROVIDE ( _open_r = 0x4000bd54 );
+PROVIDE ( _read_r = 0x4000bda8 );
+PROVIDE ( _rename_r = 0x4000bc28 );
+PROVIDE ( _unlink_r = 0x4000bc84 );
+PROVIDE ( _write_r = 0x4000bd70 );
+
+    ---> end commented out block
+*/
+
+
+/* These are the non-reentrant versions of syscalls present in the ROM.
+   They call the reentrant versions, passing the pointer returned by __getreent
+   as the first argument.
+ */
+
+close = 0x40001778;
+open = 0x4000178c;
+read = 0x400017dc;
+sbrk = 0x400017f4;
+times = 0x40001808;
+write = 0x4000181c;

esp-hal/ld/esp32c2/esp32c2.x

@@ -80,10 +80,10 @@ PROVIDE(__global_pointer$ = _data_start + 0x800);
 /* end of esp32c2 fixups */
 
 /* Shared sections - ordering matters */
-INCLUDE "text.x"
-INCLUDE "rodata.x"
 INCLUDE "rwtext.x"
+INCLUDE "text.x"
 INCLUDE "rwdata.x"
+INCLUDE "rodata.x"
 INCLUDE "stack.x"
 INCLUDE "dram2.x"
 /* End of Shared sections */

esp-hal/ld/esp32c2/rom-functions.x

@@ -1,23 +1,8 @@
-PROVIDE(ets_delay_us = 0x40000044);
-PROVIDE(ets_update_cpu_frequency_rom = 0x40000774);
-PROVIDE(rom_i2c_writeReg = 0x400022f4);
-PROVIDE(rom_i2c_writeReg_Mask = 0x400022fc);
-PROVIDE(rtc_get_reset_reason = 0x40000018);
-PROVIDE(software_reset = 0x40000088);
-PROVIDE(software_reset_cpu = 0x4000008c);
+INCLUDE "rom/esp32c2.rom.api.ld"
+INCLUDE "rom/esp32c2.rom.heap.ld"
+INCLUDE "rom/esp32c2.rom.ld"
+INCLUDE "rom/esp32c2.rom.libgcc.ld"
+INCLUDE "rom/esp32c2.rom.rvfp.ld"
+INCLUDE "rom/esp32c2.rom.version.ld"
 
-PROVIDE(esp_rom_crc32_be = 0x40000808);
-PROVIDE(esp_rom_crc16_be = 0x4000080c);
-PROVIDE(esp_rom_crc8_be = 0x40000810);
-PROVIDE(esp_rom_crc32_le = 0x400007fc);
-PROVIDE(esp_rom_crc16_le = 0x40000800);
-PROVIDE(esp_rom_crc8_le = 0x40000804);
-
-PROVIDE(esp_rom_mbedtls_md5_starts_ret = 0x40002be4);
-PROVIDE(esp_rom_mbedtls_md5_update_ret = 0x40002be8);
-PROVIDE(esp_rom_mbedtls_md5_finish_ret = 0x40002bec);
-
-memset = 0x40000488;
-memcpy = 0x4000048c;
-memmove = 0x40000490;
-memcmp = 0x40000494;
+INCLUDE "rom/additional.ld"

esp-hal/ld/esp32c2/rom/additional.ld

@@ -0,0 +1,15 @@
+memset = 0x40000488;
+memcpy = 0x4000048c;
+memmove = 0x40000490;
+memcmp = 0x40000494;
+
+strcpy = 0x40000498;
+strncpy = 0x4000049c;
+strncmp = 0x400004a4;
+
+PROVIDE ( strcat = 0x4000050c );
+PROVIDE ( strcmp = 0x400004a0 );
+PROVIDE ( strchr = 0x40000514 );
+PROVIDE ( strlcpy = 0x40000524 );
+PROVIDE ( strstr = 0x400004ac );
+PROVIDE ( strcasecmp = 0x40000504 );

esp-hal/ld/esp32c2/rom/esp32c2.rom.api.ld

@@ -0,0 +1,69 @@
+/*
+ * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/** ROM APIs
+ */
+PROVIDE ( esp_rom_crc32_le = crc32_le );
+PROVIDE ( esp_rom_crc16_le = crc16_le );
+PROVIDE ( esp_rom_crc8_le  = crc8_le );
+PROVIDE ( esp_rom_crc32_be = crc32_be );
+PROVIDE ( esp_rom_crc16_be = crc16_be );
+PROVIDE ( esp_rom_crc8_be  = crc8_be );
+
+PROVIDE ( esp_rom_gpio_pad_select_gpio    = gpio_pad_select_gpio );
+PROVIDE ( esp_rom_gpio_pad_pullup_only    = gpio_pad_pullup );
+PROVIDE ( esp_rom_gpio_pad_set_drv        = gpio_pad_set_drv );
+PROVIDE ( esp_rom_gpio_pad_unhold         = gpio_pad_unhold );
+PROVIDE ( esp_rom_gpio_connect_in_signal  = gpio_matrix_in );
+PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
+
+PROVIDE ( esp_rom_efuse_mac_address_crc8       = esp_crc8 );
+PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
+
+PROVIDE ( esp_rom_uart_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_uart_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
+PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
+
+PROVIDE ( esp_rom_output_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_output_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_output_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_output_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_output_rx_string      = UartRxString );
+PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_output_putc           = ets_write_char_uart );
+
+PROVIDE ( esp_rom_mbedtls_md5_starts_ret = mbedtls_md5_starts_ret );
+PROVIDE ( esp_rom_mbedtls_md5_update_ret = mbedtls_md5_update_ret );
+PROVIDE ( esp_rom_mbedtls_md5_finish_ret = mbedtls_md5_finish_ret );
+
+PROVIDE ( esp_rom_software_reset_system = software_reset );
+PROVIDE ( esp_rom_software_reset_cpu    = software_reset_cpu );
+
+PROVIDE ( esp_rom_printf   = ets_printf );
+PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
+PROVIDE ( esp_rom_delay_us = ets_delay_us );
+PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
+PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
+PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
+PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
+
+PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach );
+PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
+PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
+PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
+
+PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
+PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
+PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
+PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
+
+PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
+PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
+PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
+PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );

esp-hal/ld/esp32c2/rom/esp32c2.rom.heap.ld

@@ -0,0 +1,75 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+/***************************************
+ Group heap
+ ***************************************/
+
+/* Functions */
+PROVIDE( tlsf_create = 0x400002dc );
+PROVIDE( tlsf_create_with_pool = 0x400002e0 );
+PROVIDE( tlsf_get_pool = 0x400002e4 );
+PROVIDE( tlsf_add_pool = 0x400002e8 );
+PROVIDE( tlsf_remove_pool = 0x400002ec );
+PROVIDE( tlsf_malloc = 0x400002f0 );
+PROVIDE( tlsf_memalign = 0x400002f4 );
+PROVIDE( tlsf_memalign_offs = 0x400002f8 );
+PROVIDE( tlsf_realloc = 0x400002fc );
+PROVIDE( tlsf_free = 0x40000300 );
+PROVIDE( tlsf_block_size = 0x40000304 );
+PROVIDE( tlsf_size = 0x40000308 );
+PROVIDE( tlsf_align_size = 0x4000030c );
+PROVIDE( tlsf_block_size_min = 0x40000310 );
+PROVIDE( tlsf_block_size_max = 0x40000314 );
+PROVIDE( tlsf_pool_overhead = 0x40000318 );
+PROVIDE( tlsf_alloc_overhead = 0x4000031c );
+PROVIDE( tlsf_walk_pool = 0x40000320 );
+PROVIDE( tlsf_check = 0x40000324 );
+PROVIDE( tlsf_check_pool = 0x40000328 );
+PROVIDE( tlsf_poison_fill_pfunc_set = 0x4000032c );
+PROVIDE( multi_heap_get_block_address_impl = 0x40000330 );
+PROVIDE( multi_heap_get_allocated_size_impl = 0x40000334 );
+PROVIDE( multi_heap_register_impl = 0x40000338 );
+PROVIDE( multi_heap_set_lock = 0x4000033c );
+PROVIDE( multi_heap_os_funcs_init = 0x40000340 );
+PROVIDE( multi_heap_internal_lock = 0x40000344 );
+PROVIDE( multi_heap_internal_unlock = 0x40000348 );
+PROVIDE( multi_heap_get_first_block = 0x4000034c );
+PROVIDE( multi_heap_get_next_block = 0x40000350 );
+PROVIDE( multi_heap_is_free = 0x40000354 );
+PROVIDE( multi_heap_malloc_impl = 0x40000358 );
+PROVIDE( multi_heap_free_impl = 0x4000035c );
+PROVIDE( multi_heap_realloc_impl = 0x40000360 );
+PROVIDE( multi_heap_aligned_alloc_impl_offs = 0x40000364 );
+PROVIDE( multi_heap_aligned_alloc_impl = 0x40000368 );
+PROVIDE( multi_heap_check = 0x4000036c );
+PROVIDE( multi_heap_dump = 0x40000370 );
+PROVIDE( multi_heap_free_size_impl = 0x40000374 );
+PROVIDE( multi_heap_minimum_free_size_impl = 0x40000378 );
+PROVIDE( multi_heap_get_info_impl = 0x4000037c );
+/* Data (.data, .bss, .rodata) */
+PROVIDE( heap_tlsf_table_ptr = 0x3fcdffec );
+
+/**
+ * Multi heap function
+ */
+
+PROVIDE (multi_heap_malloc = multi_heap_malloc_impl);
+PROVIDE (multi_heap_free = multi_heap_free_impl);
+PROVIDE (multi_heap_realloc = multi_heap_realloc_impl);
+PROVIDE (multi_heap_get_allocated_size = multi_heap_get_allocated_size_impl);
+PROVIDE (multi_heap_register = multi_heap_register_impl);
+PROVIDE (multi_heap_get_info = multi_heap_get_info_impl);
+PROVIDE (multi_heap_free_size = multi_heap_free_size_impl);
+PROVIDE (multi_heap_minimum_free_size = multi_heap_minimum_free_size_impl);
+PROVIDE (multi_heap_get_block_address = multi_heap_get_block_address_impl);
+PROVIDE (multi_heap_aligned_alloc = multi_heap_aligned_alloc_impl);
+PROVIDE (multi_heap_aligned_free = multi_heap_aligned_free_impl);
+PROVIDE (multi_heap_check = multi_heap_check);
+PROVIDE (multi_heap_set_lock = multi_heap_set_lock);
+PROVIDE (multi_heap_internal_lock = multi_heap_internal_lock);
+PROVIDE (multi_heap_internal_unlock = multi_heap_internal_unlock);

esp-hal/ld/esp32c2/rom/esp32c2.rom.libgcc.ld

@@ -0,0 +1,113 @@
+/*
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* ROM function interface esp32c2.rom.libgcc.ld for esp32c2
+ *
+ *
+ * Generated from ./interface-esp32c2.yml md5sum c679b6ed5e9f0a9c3e7b93e5e0f2a1a3
+ *
+ * Compatible with ROM where ECO version equal or greater to 1.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group libgcc
+ ***************************************/
+
+/* Functions */
+__absvdi2 = 0x400008a8;
+__absvsi2 = 0x400008ac;
+__adddf3 = 0x400008b0;
+__addsf3 = 0x400008b4;
+__addvdi3 = 0x400008b8;
+__addvsi3 = 0x400008bc;
+__ashldi3 = 0x400008c0;
+__ashrdi3 = 0x400008c4;
+__bswapdi2 = 0x400008c8;
+__bswapsi2 = 0x400008cc;
+__clear_cache = 0x400008d0;
+__clrsbdi2 = 0x400008d4;
+__clrsbsi2 = 0x400008d8;
+__clzdi2 = 0x400008dc;
+__clzsi2 = 0x400008e0;
+__cmpdi2 = 0x400008e4;
+__ctzdi2 = 0x400008e8;
+__ctzsi2 = 0x400008ec;
+__divdc3 = 0x400008f0;
+__divdf3 = 0x400008f4;
+__divdi3 = 0x400008f8;
+__divsc3 = 0x400008fc;
+__divsf3 = 0x40000900;
+__divsi3 = 0x40000904;
+__eqdf2 = 0x40000908;
+__eqsf2 = 0x4000090c;
+__extendsfdf2 = 0x40000910;
+__ffsdi2 = 0x40000914;
+__ffssi2 = 0x40000918;
+__fixdfdi = 0x4000091c;
+__fixdfsi = 0x40000920;
+__fixsfdi = 0x40000924;
+__fixsfsi = 0x40000928;
+__fixunsdfsi = 0x4000092c;
+__fixunssfdi = 0x40000930;
+__fixunssfsi = 0x40000934;
+__floatdidf = 0x40000938;
+__floatdisf = 0x4000093c;
+__floatsidf = 0x40000940;
+__floatsisf = 0x40000944;
+__floatundidf = 0x40000948;
+__floatundisf = 0x4000094c;
+__floatunsidf = 0x40000950;
+__floatunsisf = 0x40000954;
+__gcc_bcmp = 0x40000958;
+__gedf2 = 0x4000095c;
+__gesf2 = 0x40000960;
+__gtdf2 = 0x40000964;
+__gtsf2 = 0x40000968;
+__ledf2 = 0x4000096c;
+__lesf2 = 0x40000970;
+__lshrdi3 = 0x40000974;
+__ltdf2 = 0x40000978;
+__ltsf2 = 0x4000097c;
+__moddi3 = 0x40000980;
+__modsi3 = 0x40000984;
+__muldc3 = 0x40000988;
+__muldf3 = 0x4000098c;
+__muldi3 = 0x40000990;
+__mulsc3 = 0x40000994;
+__mulsf3 = 0x40000998;
+__mulsi3 = 0x4000099c;
+__mulvdi3 = 0x400009a0;
+__mulvsi3 = 0x400009a4;
+__nedf2 = 0x400009a8;
+__negdf2 = 0x400009ac;
+__negdi2 = 0x400009b0;
+__negsf2 = 0x400009b4;
+__negvdi2 = 0x400009b8;
+__negvsi2 = 0x400009bc;
+__nesf2 = 0x400009c0;
+__paritysi2 = 0x400009c4;
+__popcountdi2 = 0x400009c8;
+__popcountsi2 = 0x400009cc;
+__powidf2 = 0x400009d0;
+__powisf2 = 0x400009d4;
+__subdf3 = 0x400009d8;
+__subsf3 = 0x400009dc;
+__subvdi3 = 0x400009e0;
+__subvsi3 = 0x400009e4;
+__truncdfsf2 = 0x400009e8;
+__ucmpdi2 = 0x400009ec;
+__udivdi3 = 0x400009f0;
+__udivmoddi4 = 0x400009f4;
+__udivsi3 = 0x400009f8;
+__udiv_w_sdiv = 0x400009fc;
+__umoddi3 = 0x40000a00;
+__umodsi3 = 0x40000a04;
+__unorddf2 = 0x40000a08;
+__unordsf2 = 0x40000a0c;
+__extenddftf2 = 0x40000a10;
+__trunctfdf2 = 0x40000a14;

esp-hal/ld/esp32c2/rom/esp32c2.rom.rvfp.ld

@@ -0,0 +1,118 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32c2.rom.rvfp.ld esp32c2
+ *
+ *
+ * Generated from ./interface-esp32c2.yml md5sum c679b6ed5e9f0a9c3e7b93e5e0f2a1a3
+ *
+ * Compatible with ROM where ECO version equal or greater to 1.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group rvfplib
+ ***************************************/
+
+/* Functions */
+__adddf3 = 0x40000a18;
+__addsf3 = 0x40000a1c;
+__divsf3 = 0x40000a20;
+__eqdf2 = 0x40000a24;
+__eqsf2 = 0x40000a28;
+__extendsfdf2 = 0x40000a2c;
+__fixdfdi = 0x40000a30;
+__fixdfsi = 0x40000a34;
+__fixsfdi = 0x40000a38;
+__fixsfsi = 0x40000a3c;
+__fixunsdfsi = 0x40000a40;
+__fixunssfdi = 0x40000a44;
+__fixunssfsi = 0x40000a48;
+__floatdidf = 0x40000a4c;
+__floatdisf = 0x40000a50;
+__floatsidf = 0x40000a54;
+__floatsisf = 0x40000a58;
+__floatundidf = 0x40000a5c;
+__floatundisf = 0x40000a60;
+__floatunsidf = 0x40000a64;
+__floatunsisf = 0x40000a68;
+__gedf2 = 0x40000a6c;
+__gesf2 = 0x40000a70;
+__gtdf2 = 0x40000a74;
+__gtsf2 = 0x40000a78;
+__ledf2 = 0x40000a7c;
+__lesf2 = 0x40000a80;
+__ltdf2 = 0x40000a84;
+__ltsf2 = 0x40000a88;
+__muldf3 = 0x40000a8c;
+__mulsf3 = 0x40000a90;
+__nedf2 = 0x40000a94;
+__nesf2 = 0x40000a98;
+__subdf3 = 0x40000a9c;
+__subsf3 = 0x40000aa0;
+__truncdfsf2 = 0x40000aa4;
+
+/***************************************
+ Group libgcc
+***************************************/
+
+/* Functions */
+__absvdi2 = 0x400008a8;
+__absvsi2 = 0x400008ac;
+__addvdi3 = 0x400008b8;
+__addvsi3 = 0x400008bc;
+__ashldi3 = 0x400008c0;
+__ashrdi3 = 0x400008c4;
+__bswapdi2 = 0x400008c8;
+__bswapsi2 = 0x400008cc;
+__clear_cache = 0x400008d0;
+__clrsbdi2 = 0x400008d4;
+__clrsbsi2 = 0x400008d8;
+__clzdi2 = 0x400008dc;
+__clzsi2 = 0x400008e0;
+__cmpdi2 = 0x400008e4;
+__ctzdi2 = 0x400008e8;
+__ctzsi2 = 0x400008ec;
+__divdc3 = 0x400008f0;
+__divdf3 = 0x400008f4;
+__divdi3 = 0x400008f8;
+__divsc3 = 0x400008fc;
+__divsi3 = 0x40000904;
+__ffsdi2 = 0x40000914;
+__ffssi2 = 0x40000918;
+__gcc_bcmp = 0x40000958;
+__lshrdi3 = 0x40000974;
+__moddi3 = 0x40000980;
+__modsi3 = 0x40000984;
+__muldc3 = 0x40000988;
+__muldi3 = 0x40000990;
+__mulsc3 = 0x40000994;
+__mulsi3 = 0x4000099c;
+__mulvdi3 = 0x400009a0;
+__mulvsi3 = 0x400009a4;
+__negdf2 = 0x400009ac;
+__negdi2 = 0x400009b0;
+__negsf2 = 0x400009b4;
+__negvdi2 = 0x400009b8;
+__negvsi2 = 0x400009bc;
+__paritysi2 = 0x400009c4;
+__popcountdi2 = 0x400009c8;
+__popcountsi2 = 0x400009cc;
+__powidf2 = 0x400009d0;
+__powisf2 = 0x400009d4;
+__subvdi3 = 0x400009e0;
+__subvsi3 = 0x400009e4;
+__ucmpdi2 = 0x400009ec;
+__udivdi3 = 0x400009f0;
+__udivmoddi4 = 0x400009f4;
+__udivsi3 = 0x400009f8;
+__udiv_w_sdiv = 0x400009fc;
+__umoddi3 = 0x40000a00;
+__umodsi3 = 0x40000a04;
+__unorddf2 = 0x40000a08;
+__unordsf2 = 0x40000a0c;
+__extenddftf2 = 0x40000a10;
+__trunctfdf2 = 0x40000a14;

esp-hal/ld/esp32c2/rom/esp32c2.rom.version.ld

@@ -0,0 +1,14 @@
+/*
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* ROM version variables for esp32c2
+ *
+ * These addresses should be compatible with any ROM version for this chip.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+_rom_chip_id = 0x40000010;
+_rom_eco_version = 0x40000014;

esp-hal/ld/esp32c3/esp32c3.x

@@ -80,10 +80,10 @@ PROVIDE(__global_pointer$ = _data_start + 0x800);
 /* end of esp32c3 fixups */
 
 /* Shared sections - ordering matters */
-INCLUDE "text.x"
-INCLUDE "rodata.x"
 INCLUDE "rwtext.x"
+INCLUDE "text.x"
 INCLUDE "rwdata.x"
+INCLUDE "rodata.x"
 INCLUDE "rtc_fast.x"
 INCLUDE "stack.x"
 INCLUDE "dram2.x"

esp-hal/ld/esp32c3/rom-functions.x

@@ -1,30 +1,10 @@
-ets_printf = 0x40000040;
-PROVIDE(esp_rom_printf = ets_printf);
-PROVIDE(cache_invalidate_icache_all = 0x400004d8);
-PROVIDE(cache_suspend_icache = 0x40000524);
-PROVIDE(cache_resume_icache = 0x40000528);
-PROVIDE(cache_ibus_mmu_set = 0x40000560);
-PROVIDE(cache_dbus_mmu_set = 0x40000564);
-PROVIDE(ets_delay_us = 0x40000050);
-PROVIDE(ets_update_cpu_frequency_rom = 0x40000588);
-PROVIDE(rom_i2c_writeReg = 0x4000195c);
-PROVIDE(rom_i2c_writeReg_Mask = 0x40001960);
-PROVIDE(rtc_get_reset_reason = 0x40000018);
-PROVIDE(software_reset = 0x40000090);
-PROVIDE(software_reset_cpu = 0x40000094);
+INCLUDE "rom/esp32c3.rom.api.ld"
+INCLUDE "rom/esp32c3.rom.eco3.ld"
+/* TODO
+INCLUDE "rom/esp32c3.rom.eco7.ld"
+*/
+INCLUDE "rom/esp32c3.rom.ld"
+INCLUDE "rom/esp32c3.rom.libgcc.ld"
+INCLUDE "rom/esp32c3.rom.version.ld"
 
-PROVIDE(esp_rom_crc32_be = 0x4000062c);
-PROVIDE(esp_rom_crc16_be = 0x40000634);
-PROVIDE(esp_rom_crc8_be = 0x4000063c);
-PROVIDE(esp_rom_crc32_le = 0x40000628);
-PROVIDE(esp_rom_crc16_le = 0x40000630);
-PROVIDE(esp_rom_crc8_le = 0x40000638);
-
-PROVIDE(esp_rom_md5_init = 0x40000614);
-PROVIDE(esp_rom_md5_update = 0x40000618);
-PROVIDE(esp_rom_md5_final = 0x4000061c);
-
-memset = 0x40000354;
-memcpy = 0x40000358;
-memmove = 0x4000035c;
-memcmp = 0x40000360;
+INCLUDE "rom/additional.ld"

esp-hal/ld/esp32c3/rom/additional.ld

@@ -0,0 +1,21 @@
+memset = 0x40000354;
+memcpy = 0x40000358;
+memmove = 0x4000035c;
+memcmp = 0x40000360;
+
+strncmp = 0x40000370;
+strncpy = 0x40000368;
+strcpy = 0x40000364;
+
+abs = 0x40000424;
+
+PROVIDE(cache_dbus_mmu_set = 0x40000564);
+
+PROVIDE( strcat = 0x400003d8 );
+PROVIDE( strcmp = 0x4000036c );
+PROVIDE( strchr = 0x400003e0 );
+PROVIDE( strlcpy = 0x400003f0 );
+PROVIDE( strstr = 0x40000378 );
+PROVIDE( strcasecmp = 0x400003d0 );
+
+PROVIDE( memchr = 0x400003c8 );

esp-hal/ld/esp32c3/rom/esp32c3.rom.api.ld

@@ -0,0 +1,61 @@
+/**
+ * ROM APIs
+ */
+PROVIDE ( esp_rom_crc32_le = crc32_le );
+PROVIDE ( esp_rom_crc16_le = crc16_le );
+PROVIDE ( esp_rom_crc8_le  = crc8_le );
+PROVIDE ( esp_rom_crc32_be = crc32_be );
+PROVIDE ( esp_rom_crc16_be = crc16_be );
+PROVIDE ( esp_rom_crc8_be  = crc8_be );
+
+PROVIDE ( esp_rom_gpio_pad_select_gpio    = gpio_pad_select_gpio );
+PROVIDE ( esp_rom_gpio_pad_pullup_only    = gpio_pad_pullup );
+PROVIDE ( esp_rom_gpio_pad_set_drv        = gpio_pad_set_drv );
+PROVIDE ( esp_rom_gpio_pad_unhold         = gpio_pad_unhold );
+PROVIDE ( esp_rom_gpio_connect_in_signal  = gpio_matrix_in );
+PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
+
+PROVIDE ( esp_rom_efuse_mac_address_crc8       = esp_crc8 );
+PROVIDE ( esp_rom_efuse_get_flash_gpio_info    = ets_efuse_get_spiconfig );
+PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
+PROVIDE ( esp_rom_efuse_get_flash_wp_gpio      = ets_efuse_get_wp_pad );
+
+PROVIDE ( esp_rom_uart_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_uart_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
+
+PROVIDE ( esp_rom_output_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_output_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_output_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_output_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_output_rx_string      = UartRxString );
+
+PROVIDE ( esp_rom_md5_init   = MD5Init );
+PROVIDE ( esp_rom_md5_update = MD5Update );
+PROVIDE ( esp_rom_md5_final  = MD5Final );
+
+PROVIDE ( esp_rom_software_reset_system = software_reset );
+PROVIDE ( esp_rom_software_reset_cpu    = software_reset_cpu );
+
+PROVIDE ( esp_rom_printf   = ets_printf );
+PROVIDE ( esp_rom_delay_us = ets_delay_us );
+PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
+PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
+PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
+PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
+
+PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
+PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable );
+PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
+
+PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
+PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
+PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
+PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
+
+PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
+PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
+PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
+PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );

esp-hal/ld/esp32c3/rom/esp32c3.rom.eco3.ld

@@ -0,0 +1,129 @@
+/*
+ESP32C3 ECO3 ROM address table
+Version 3 API's imported from the ROM
+*/
+
+/*esf_buf_alloc_dynamic = 0x400015c0;*/
+/*esf_buf_recycle = 0x400015c4;*/
+/*lmacTxDone = 0x4000162c;*/
+/*ppMapTxQueue = 0x400016d8;*/
+/*rcGetSched = 0x40001764;*/
+wDevCheckBlockError = 0x400017b4;
+/*ppProcTxDone = 0x40001804;*/
+/*sta_input = rom_sta_input;*/
+
+/***************************************
+ Group rom_phy
+ ***************************************/
+
+/* Functions */
+rom_index_to_txbbgain = 0x40001964;
+rom_pbus_xpd_tx_on = 0x400019b0;
+rom_set_tx_dig_gain = 0x400019f0;
+rom_set_txcap_reg = 0x400019f4;
+rom_txbbgain_to_index = 0x40001a0c;
+rom_agc_reg_init = 0x40001a54;
+rom_bb_reg_init = 0x40001a58;
+rom_set_pbus_reg = 0x40001a70;
+rom_phy_xpd_rf = 0x40001a78;
+rom_write_txrate_power_offset = 0x40001a8c;
+rom_temp_to_power = 0x40001ab4;
+rom_open_i2c_xpd = 0x40001af8;
+rom_tsens_read_init = 0x40001b00;
+rom_tsens_code_read = 0x40001b04;
+rom_tsens_dac_cal = 0x40001b10;
+rom_pll_vol_cal = 0x40001b28;
+
+/***************************************
+   Group eco3_wifi
+ ***************************************/
+
+/* Functions */
+wdev_is_data_in_rxlist = 0x40001b2c;
+ppProcTxCallback = 0x40001b30;
+ieee80211_gettid = 0x40001b34;
+
+
+/***************************************
+   Group eco3_bluetooth
+ ***************************************/
+
+/* Functions */
+r_lld_legacy_adv_dynamic_pti_get = 0x40001b38;
+r_lld_legacy_adv_dynamic_pti_process = 0x40001b3c;
+r_lld_ext_adv_dynamic_pti_get = 0x40001b40;
+r_lld_ext_adv_dynamic_aux_pti_process = 0x40001b44;
+r_lld_ext_adv_dynamic_pti_process = 0x40001b48;
+r_lld_adv_ext_pkt_prepare_set = 0x40001b4c;
+r_lld_adv_ext_chain_connectable_construct = 0x40001b54;
+r_lld_adv_pkt_rx_connect_post = 0x40001b5c;
+r_lld_adv_start_init_evt_param = 0x40001b60;
+r_lld_adv_start_set_cs = 0x40001b64;
+/* r_lld_adv_start_update_filter_policy = 0x40001b68; */
+r_lld_adv_start_schedule_asap = 0x40001b6c;
+r_lld_con_tx_prog_new_packet_coex = 0x40001b70;
+r_lld_per_adv_dynamic_pti_get = 0x40001b78;
+r_lld_per_adv_evt_start_chm_upd = 0x40001b7c;
+r_lld_ext_scan_dynamic_pti_get = 0x40001b80;
+r_lld_sync_insert = 0x40001b88;
+r_sch_prog_ble_push = 0x40001b8c;
+r_sch_prog_bt_push = 0x40001b90;
+r_lld_init_evt_end_type_set = 0x40001b94;
+r_lld_init_evt_end_type_get = 0x40001b98;
+r_lld_adv_direct_adv_use_rpa_addr_state_set = 0x40001b9c;
+r_lld_adv_direct_adv_use_rpa_addr_state_get = 0x40001ba0;
+r_lld_init_evt_end_type_check_state_set = 0x40001ba4;
+r_lld_init_evt_end_type_check_state_get = 0x40001ba8;
+
+
+/***************************************
+   Group eco3_phy
+ ***************************************/
+
+/* Functions */
+rom_wrtie_pll_cap = 0x40001bac;
+rom_set_tx_gain_mem = 0x40001bb0;
+rom_bt_tx_dig_gain = 0x40001bb4;
+rom_bt_get_tx_gain = 0x40001bb8;
+rom_get_chan_target_power = 0x40001bbc;
+rom_get_tx_gain_value = 0x40001bc0;
+rom_wifi_tx_dig_gain = 0x40001bc4;
+rom_wifi_get_tx_gain = 0x40001bc8;
+rom_fe_i2c_reg_renew = 0x40001bcc;
+rom_wifi_agc_sat_gain = 0x40001bd0;
+rom_i2c_master_reset = 0x40001bd4;
+rom_bt_filter_reg = 0x40001bd8;
+rom_phy_bbpll_cal = 0x40001bdc;
+rom_i2c_sar2_init_code = 0x40001be0;
+rom_phy_param_addr = 0x40001be4;
+rom_phy_reg_init = 0x40001be8;
+rom_set_chan_reg = 0x40001bec;
+rom_phy_wakeup_init = 0x40001bf0;
+rom_phy_i2c_init1 = 0x40001bf4;
+rom_tsens_temp_read = 0x40001bf8;
+rom_bt_track_pll_cap = 0x40001bfc;
+rom_wifi_track_pll_cap = 0x40001c00;
+rom_wifi_set_tx_gain = 0x40001c04;
+rom_txpwr_cal_track = 0x40001c08;
+rom_tx_pwctrl_background = 0x40001c0c;
+rom_bt_set_tx_gain = 0x40001c10;
+rom_noise_check_loop = 0x40001c14;
+rom_phy_close_rf = 0x40001c18;
+rom_phy_xpd_tsens = 0x40001c1c;
+rom_phy_freq_mem_backup = 0x40001c20;
+rom_phy_ant_init = 0x40001c24;
+rom_bt_track_tx_power = 0x40001c28;
+rom_wifi_track_tx_power = 0x40001c2c;
+rom_phy_dig_reg_backup = 0x40001c30;
+chip726_phyrom_version_num = 0x40001c34;
+/* Data (.data, .bss, .rodata) */
+phy_param_rom = 0x3fcdf830;
+
+/***************************************
+   Group eco3_esp_flash
+ ***************************************/
+
+/* Functions */
+PROVIDE( esp_flash_read_chip_id = 0x40001c38 );
+PROVIDE( detect_spi_flash_chip = 0x40001c3c );
+PROVIDE( esp_rom_spiflash_write_disable = 0x40001c40 );

esp-hal/ld/esp32c3/rom/esp32c3.rom.eco7.ld

@@ -0,0 +1,240 @@
+/*
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+esf_buf_alloc = 0x400015bc;
+esf_buf_alloc_dynamic = 0x400015c0;
+esf_buf_recycle = 0x400015c4;
+/*hal_mac_tx_set_ppdu = 0x400015d4;*/
+ic_mac_deinit = 0x400015dc;
+lmacDiscardMSDU = 0x400015f4;
+/*lmacSetTxFrame = 0x40001628;*/
+lmacTxDone = 0x4000162c;
+lmacTxFrame = 0x40001630;
+mac_tx_set_htsig = 0x40001638;
+mac_tx_set_plcp1 = 0x40001640;
+pm_check_state = 0x40001648;
+/*pm_on_beacon_rx = 0x4000167c;*/
+/*pm_parse_beacon = 0x40001688;*/
+pm_process_tim = 0x4000168c;
+pm_rx_beacon_process = 0x40001690;
+pm_rx_data_process = 0x40001694;
+/* pm_sleep = 0x40001698;*/
+/* pm_tbtt_process = 0x400016a0;*/
+ppMapTxQueue = 0x400016d8;
+ppProcTxSecFrame = 0x400016dc;
+/*ppRxFragmentProc = 0x40001704;*/
+/* rcGetSched = 0x40001764;*/
+rcTxUpdatePer = 0x40001770;
+rcUpdateTxDone = 0x4000177c;
+wDevCheckBlockError = 0x400017b4;
+/* wDev_IndicateFrame = 0x400017c8;*/
+wDev_ProcessFiq = 0x400017f0;
+/*wDev_ProcessRxSucData = 0x400017f4;*/
+/*ppProcTxDone = 0x40001804;*/
+/*pm_tx_data_done_process = 0x40001808;*/
+ppMapWaitTxq = 0x40001810;
+/*ieee80211_encap_esfbuf = 0x4000185c;*/
+/*sta_input = 0x40001870;*/
+ieee80211_crypto_decap = 0x4000189c;
+ieee80211_decap = 0x400018a0;
+/*coex_core_timer_idx_get = 0x400018d0;*/
+rom1_chip_i2c_readReg = 0x40001924;
+rom1_chip_i2c_writeReg = 0x40001928;
+rom_index_to_txbbgain = 0x40001964;
+rom_pbus_xpd_tx_on = 0x400019b0;
+rom1_set_noise_floor = 0x400019e8;
+rom_set_tx_dig_gain = 0x400019f0;
+rom_set_txcap_reg = 0x400019f4;
+rom_txbbgain_to_index = 0x40001a0c;
+rom1_disable_wifi_agc = 0x40001a1c;
+rom1_enable_wifi_agc = 0x40001a20;
+rom1_tx_paon_set = 0x40001a44;
+rom_agc_reg_init = 0x40001a54;
+rom_bb_reg_init = 0x40001a58;
+rom1_set_pbus_reg = 0x40001a70;
+rom_phy_xpd_rf = 0x40001a78;
+rom_write_txrate_power_offset = 0x40001a8c;
+rom1_get_rate_fcc_index = 0x40001a90;
+rom1_read_sar2_code = 0x40001aa4;
+rom2_temp_to_power1 = 0x40001ab4;
+rom1_get_i2c_hostid = 0x40001ac8;
+rom_open_i2c_xpd = 0x40001af8;
+rom2_tsens_read_init1 = 0x40001b00;
+rom_tsens_code_read = 0x40001b04;
+rom_tsens_dac_cal = 0x40001b10;
+rom1_phy_en_hw_set_freq = 0x40001b20;
+rom1_phy_dis_hw_set_freq = 0x40001b24;
+rom_pll_vol_cal = 0x40001b28;
+
+rom1_bt_get_tx_gain = 0x40001bb8;
+rom1_get_chan_target_power = 0x40001bbc;
+rom2_get_tx_gain_value1 = 0x40001bc0;
+rom1_wifi_tx_dig_gain = 0x40001bc4;
+rom1_wifi_get_tx_gain = 0x40001bc8;
+rom1_fe_i2c_reg_renew = 0x40001bcc;
+rom1_i2c_master_reset = 0x40001bd4;
+rom1_phy_wakeup_init = 0x40001bf0;
+rom1_phy_i2c_init1 = 0x40001bf4;
+rom1_tsens_temp_read = 0x40001bf8;
+rom1_bt_track_pll_cap = 0x40001bfc;
+rom1_wifi_set_tx_gain = 0x40001c04;
+rom1_txpwr_cal_track = 0x40001c08;
+rom1_bt_set_tx_gain = 0x40001c10;
+rom1_phy_close_rf = 0x40001c18;
+
+
+/***************************************
+ Group eco7_uart
+ ***************************************/
+
+/* Functions */
+uart_tx_switch = 0x40001c44;
+
+
+/***************************************
+ Group eco7_bluetooth
+ ***************************************/
+
+/* Functions */
+r_lld_con_count_get = 0x40001c48;
+r_lld_update_con_offset = 0x40001c4c;
+r_lld_con_update_last_clock = 0x40001c50;
+r_lld_con_llcp_ind_info_clear = 0x40001c54;
+r_lld_con_update_terminte_info_init = 0x40001c58;
+r_lld_con_terminate_max_evt_update = 0x40001c5c;
+r_llc_pref_param_compute_eco = 0x40001ce8;
+r_llc_hci_con_upd_info_send_eco = 0x40001cec;
+r_llc_rem_encrypt_proc_continue_eco = 0x40001cf0;
+r_llc_start_eco = 0x40001cf8;
+r_lld_ext_adv_dynamic_aux_pti_process_eco = 0x40001cfc;
+r_lld_adv_start_eco = 0x40001d04;
+r_lld_con_evt_canceled_cbk_eco = 0x40001d08;
+r_lld_con_evt_time_update_eco = 0x40001d0c;
+r_lld_con_start_eco = 0x40001d10;
+r_lld_con_frm_isr_eco = 0x40001d14;
+r_lld_con_tx_eco = 0x40001d18;
+r_lld_ext_scan_dynamic_pti_process_eco = 0x40001d28;
+r_lld_scan_frm_eof_isr_eco = 0x40001d2c;
+r_lld_sync_start_eco = 0x40001d30;
+r_lld_sync_insert_eco = 0x40001d34;
+r_llm_adv_rep_flow_control_update_eco = 0x40001d38;
+r_llm_env_adv_dup_filt_init_eco = 0x40001d3c;
+r_llm_env_adv_dup_filt_deinit_eco = 0x40001d40;
+r_llm_adv_rep_flow_control_check_eco = 0x40001d44;
+r_llm_scan_start_eco = 0x40001d48;
+r_llm_update_duplicate_scan_count = 0x40001d4c;
+r_llc_hci_command_handler_pre = 0x40001d50;
+r_llc_hci_command_handler_get = 0x40001d54;
+r_llc_hci_command_handler_search = 0x40001d58;
+r_llc_llcp_pdu_handler_get_overwrite = 0x40001d5c;
+r_llc_llcp_pdu_handler_pre = 0x40001d60;
+r_llc_llcp_pdu_handler_end = 0x40001d64;
+r_llc_con_conflict_check = 0x40001d6c;
+r_sch_prog_hw_reset_try = 0x40001d70;
+r_sch_prog_et_state_reset = 0x40001d74;
+r_sch_prog_end_isr_handler = 0x40001d78;
+r_sch_plan_conflict_check = 0x40001d7c;
+r_rwble_isr_hw_fixed = 0x40001d80;
+r_bt_bb_recorrect_is_dead = 0x40001d84;
+r_bt_bb_restart_hw_recorrect = 0x40001d88;
+r_ke_task_handler_pre = 0x40001da0;
+r_ke_task_handler_end = 0x40001da4;
+r_lld_scan_frm_skip_isr_eco = 0x40001db0;
+r_lld_ext_scan_dynamic_pti_reset = 0x40001db4;
+r_llc_rem_phy_upd_proc_continue_eco = 0x40001db8;
+r_llm_get_preferred_phys = 0x40001dbc;
+r_lld_hw_cca_isr_eco = 0x40001dc0;
+r_lld_sw_cca_isr_eco = 0x40001dc4;
+r_lld_cca_chan_prn_e = 0x40001dc8;
+r_lld_cca_chan_prn_s = 0x40001dcc;
+r_lld_cca_chan_sel_remap = 0x40001dd0;
+r_lld_cca_chan_sel_1 = 0x40001dd4;
+r_lld_cca_chan_sel_2 = 0x40001dd8;
+r_lld_cca_set_thresh = 0x40001ddc;
+r_lld_cca_con_start = 0x40001de0;
+r_lld_cca_con_end = 0x40001de4;
+r_lld_cca_chm_restore = 0x40001de8;
+r_lld_cca_chan_unused_check = 0x40001dec;
+r_lld_cca_chm_update_check = 0x40001df0;
+r_lld_cca_busy_mode_handle = 0x40001df4;
+r_lld_cca_lbt_handle = 0x40001df8;
+r_lld_cca_scst_timeout_check = 0x40001dfc;
+r_lld_cca_chan_avl_timeout_check = 0x40001e00;
+
+r_lld_con_start_hook = 0x40001ca8;
+
+/* ble Functions eco */
+r_bt_bb_isr = 0x40000b9c;
+r_bt_rf_coex_conn_phy_coded_data_time_limit_en_get = 0x40000ba8;
+r_bt_rtp_get_txpwr_idx_by_act = 0x40000c00;
+r_btdm_task_post = 0x40000c14;
+r_btdm_task_post_from_isr = 0x40000c18;
+r_btdm_task_recycle = 0x40000c1c;
+r_hci_register_vendor_desc_tab = 0x40000d9c;
+r_ke_task_schedule = 0x40000e80;
+r_llc_hci_command_handler = 0x40000ef0;
+r_llc_loc_con_upd_proc_continue = 0x40000f60;
+r_llc_loc_phy_upd_proc_continue = 0x40000f78;
+r_llc_rem_con_upd_proc_continue = 0x40000fb4;
+r_lld_con_sched = 0x40001118;
+r_lld_con_stop = 0x40001124;
+r_lld_llcp_rx_ind_handler = 0x400011b0;
+r_lld_per_adv_sched = 0x400011f8;
+r_lld_scan_process_pkt_rx_adv_rep = 0x40001284;
+r_register_esp_vendor_cmd_handler = 0x40001400;
+r_rf_txpwr_cs_get = 0x40001428;
+r_rf_txpwr_dbm_get = 0x4000142c;
+r_sch_arb_event_start_isr = 0x400014f8;
+r_sch_plan_set = 0x40001534;
+r_sch_prog_end_isr = 0x40001538;
+r_lld_adv_ext_chain_scannable_construct = 0x40001b58;
+
+r_lld_scan_process_pkt_rx = 0x40001280;
+r_llm_le_features_get = 0x400013b0;
+
+/* ble functions rename */
+r_lld_init_start_hack = 0x400011a4;
+
+/* ble functions disable */
+/*
+r_lld_adv_frm_isr_eco = 0x40001d00;
+r_lld_res_list_clear = 0x40004638;
+r_lld_res_list_rem = 0x40004680;
+r_lld_adv_start_hook = 0x40001c80;
+r_lld_con_evt_start_cbk_eco = 0x40001d1c;
+r_lld_con_tx_prog_new_packet = 0x40001b74;
+r_lld_adv_ext_chain_none_construct = 0x40001b50;
+r_llc_llcp_send_eco = 0x40001cf4;
+r_llc_llcp_channel_map_ind_ack = 0x40001d68;
+r_rwble_isr = 0x40001464;
+r_lld_scan_start_eco = 0x40001d24;
+r_lld_scan_try_sched_eco = 0x40001dac;
+r_lld_scan_start_hook = 0x40001c74;
+r_lld_init_start_hook = 0x40001cb8;
+r_lld_scan_evt_start_cbk_eco = 0x40001d20;
+r_ke_task_handler_get_overwrite = 0x40001da8;
+*/
+
+
+/***************************************
+ Group eco7_phy
+ ***************************************/
+
+/* Functions */
+rom2_pll_cap_mem_update = 0x40001e04;
+rom2_phy_i2c_enter_critical = 0x40001e08;
+rom2_phy_i2c_exit_critical = 0x40001e0c;
+rom2_rfpll_cap_correct = 0x40001e10;
+rom2_write_pll_cap = 0x40001e14;
+rom2_read_pll_cap = 0x40001e18;
+rom2_tester_wifi_cali = 0x40001e1c;
+rom2_wait_hw_freq_busy = 0x40001e20;
+rom2_rfpll_cap_track = 0x40001e24;
+rom2_ulp_code_track = 0x40001e28;
+rom2_ulp_ext_code_set = 0x40001e2c;
+rom2_phy_set_tsens_power = 0x40001e30;
+rom2_phy_get_tsens_value = 0x40001e34;
+rom_mac_tx_chan_offset = 0x40001e38;
+rom_rx_gain_force = 0x40001e3c;

esp-hal/ld/esp32c3/rom/esp32c3.rom.libgcc.ld

@@ -0,0 +1,105 @@
+/* ROM function interface esp32c3.rom.libgcc.ld for esp32c3
+ *
+ *
+ * Generated from ./interface-esp32c3.yml md5sum 93b28a9e1fe42d212018eb4336849208
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group libgcc
+ ***************************************/
+
+/* Functions */
+__absvdi2 = 0x40000764;
+__absvsi2 = 0x40000768;
+__adddf3 = 0x4000076c;
+__addsf3 = 0x40000770;
+__addvdi3 = 0x40000774;
+__addvsi3 = 0x40000778;
+__ashldi3 = 0x4000077c;
+__ashrdi3 = 0x40000780;
+__bswapdi2 = 0x40000784;
+__bswapsi2 = 0x40000788;
+__clear_cache = 0x4000078c;
+__clrsbdi2 = 0x40000790;
+__clrsbsi2 = 0x40000794;
+__clzdi2 = 0x40000798;
+__clzsi2 = 0x4000079c;
+__cmpdi2 = 0x400007a0;
+__ctzdi2 = 0x400007a4;
+__ctzsi2 = 0x400007a8;
+__divdc3 = 0x400007ac;
+__divdf3 = 0x400007b0;
+__divdi3 = 0x400007b4;
+__divsc3 = 0x400007b8;
+__divsf3 = 0x400007bc;
+__divsi3 = 0x400007c0;
+__eqdf2 = 0x400007c4;
+__eqsf2 = 0x400007c8;
+__extendsfdf2 = 0x400007cc;
+__ffsdi2 = 0x400007d0;
+__ffssi2 = 0x400007d4;
+__fixdfdi = 0x400007d8;
+__fixdfsi = 0x400007dc;
+__fixsfdi = 0x400007e0;
+__fixsfsi = 0x400007e4;
+__fixunsdfsi = 0x400007e8;
+__fixunssfdi = 0x400007ec;
+__fixunssfsi = 0x400007f0;
+__floatdidf = 0x400007f4;
+__floatdisf = 0x400007f8;
+__floatsidf = 0x400007fc;
+__floatsisf = 0x40000800;
+__floatundidf = 0x40000804;
+__floatundisf = 0x40000808;
+__floatunsidf = 0x4000080c;
+__floatunsisf = 0x40000810;
+__gcc_bcmp = 0x40000814;
+__gedf2 = 0x40000818;
+__gesf2 = 0x4000081c;
+__gtdf2 = 0x40000820;
+__gtsf2 = 0x40000824;
+__ledf2 = 0x40000828;
+__lesf2 = 0x4000082c;
+__lshrdi3 = 0x40000830;
+__ltdf2 = 0x40000834;
+__ltsf2 = 0x40000838;
+__moddi3 = 0x4000083c;
+__modsi3 = 0x40000840;
+__muldc3 = 0x40000844;
+__muldf3 = 0x40000848;
+__muldi3 = 0x4000084c;
+__mulsc3 = 0x40000850;
+__mulsf3 = 0x40000854;
+__mulsi3 = 0x40000858;
+__mulvdi3 = 0x4000085c;
+__mulvsi3 = 0x40000860;
+__nedf2 = 0x40000864;
+__negdf2 = 0x40000868;
+__negdi2 = 0x4000086c;
+__negsf2 = 0x40000870;
+__negvdi2 = 0x40000874;
+__negvsi2 = 0x40000878;
+__nesf2 = 0x4000087c;
+__paritysi2 = 0x40000880;
+__popcountdi2 = 0x40000884;
+__popcountsi2 = 0x40000888;
+__powidf2 = 0x4000088c;
+__powisf2 = 0x40000890;
+__subdf3 = 0x40000894;
+__subsf3 = 0x40000898;
+__subvdi3 = 0x4000089c;
+__subvsi3 = 0x400008a0;
+__truncdfsf2 = 0x400008a4;
+__ucmpdi2 = 0x400008a8;
+__udivdi3 = 0x400008ac;
+__udivmoddi4 = 0x400008b0;
+__udivsi3 = 0x400008b4;
+__udiv_w_sdiv = 0x400008b8;
+__umoddi3 = 0x400008bc;
+__umodsi3 = 0x400008c0;
+__unorddf2 = 0x400008c4;
+__unordsf2 = 0x400008c8;

esp-hal/ld/esp32c3/rom/esp32c3.rom.version.ld

@@ -0,0 +1,8 @@
+/* ROM version variables for esp32c3
+ *
+ * These addresses should be compatible with any ROM version for this chip.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+_rom_chip_id = 0x40000010;
+_rom_eco_version = 0x40000014;

esp-hal/ld/esp32c6/esp32c6.x

@@ -72,10 +72,10 @@ INSERT BEFORE .rodata;
 /* end of esp32c6 fixups */
 
 /* Shared sections - ordering matters */
-INCLUDE "text.x"
 INCLUDE "rwtext.x"
-INCLUDE "rodata.x"
+INCLUDE "text.x"
 INCLUDE "rwdata.x"
+INCLUDE "rodata.x"
 INCLUDE "rtc_fast.x"
 INCLUDE "stack.x"
 INCLUDE "dram2.x"

esp-hal/ld/esp32c6/rom-functions.x

@@ -1,27 +1,13 @@
-ets_printf = 0x40000028;
-PROVIDE(esp_rom_printf = ets_printf);
-PROVIDE(cache_invalidate_icache_all = 0x4000064c);
-PROVIDE(cache_suspend_icache = 0x40000698);
-PROVIDE(cache_resume_icache = 0x4000069c);
-PROVIDE(ets_delay_us = 0x40000040);
-PROVIDE(ets_update_cpu_frequency_rom = 0x40000048);
-PROVIDE(rtc_get_reset_reason = 0x40000018);
-ets_update_cpu_frequency = 0x40000048;
-PROVIDE(software_reset = 0x40000090);
-PROVIDE(software_reset_cpu = 0x40000094);
+INCLUDE "rom/esp32c6.rom.api.ld"
+INCLUDE "rom/esp32c6.rom.coexist.ld"
+INCLUDE "rom/esp32c6.rom.heap.ld"
+INCLUDE "rom/esp32c6.rom.ld"
+INCLUDE "rom/esp32c6.rom.libgcc.ld"
+INCLUDE "rom/esp32c6.rom.net80211.ld"
+INCLUDE "rom/esp32c6.rom.phy.ld"
+INCLUDE "rom/esp32c6.rom.pp.ld"
+INCLUDE "rom/esp32c6.rom.rvfp.ld"
+INCLUDE "rom/esp32c6.rom.spiflash.ld"
+INCLUDE "rom/esp32c6.rom.version.ld"
 
-PROVIDE(esp_rom_crc32_be = 0x40000764);
-PROVIDE(esp_rom_crc16_be = 0x40000768);
-PROVIDE(esp_rom_crc8_be = 0x4000076c);
-PROVIDE(esp_rom_crc32_le = 0x40000758);
-PROVIDE(esp_rom_crc16_le = 0x4000075c);
-PROVIDE(esp_rom_crc8_le = 0x40000760);
-
-PROVIDE(esp_rom_md5_init = 0x4000074c);
-PROVIDE(esp_rom_md5_update = 0x40000750);
-PROVIDE(esp_rom_md5_final = 0x40000754);
-
-memset = 0x400004a8;
-memcpy = 0x400004ac;
-memmove = 0x400004b0;
-memcmp = 0x400004b4;
+INCLUDE "rom/additional.ld"

esp-hal/ld/esp32c6/rom/additional.ld

@@ -0,0 +1,17 @@
+memset = 0x400004a8;
+memcpy = 0x400004ac;
+memmove = 0x400004b0;
+memcmp = 0x400004b4;
+
+strncmp = 0x400004c4;
+strncpy = 0x400004bc;
+strcpy = 0x400004b8;
+
+abs = 0x40000578;
+
+PROVIDE(strcat = 0x4000052c);
+PROVIDE(strcmp = 0x400004c0);
+PROVIDE(strchr = 0x40000534);
+PROVIDE(strlcpy = 0x40000544);
+PROVIDE(strstr = 0x400004cc);
+PROVIDE(strcasecmp = 0x40000524);

esp-hal/ld/esp32c6/rom/esp32c6.rom.api.ld

@@ -0,0 +1,65 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/** ROM APIs
+ */
+
+PROVIDE ( esp_rom_crc32_le = crc32_le );
+PROVIDE ( esp_rom_crc16_le = crc16_le );
+PROVIDE ( esp_rom_crc8_le  = crc8_le );
+PROVIDE ( esp_rom_crc32_be = crc32_be );
+PROVIDE ( esp_rom_crc16_be = crc16_be );
+PROVIDE ( esp_rom_crc8_be  = crc8_be );
+
+PROVIDE ( esp_rom_gpio_pad_select_gpio    = gpio_pad_select_gpio );
+PROVIDE ( esp_rom_gpio_pad_pullup_only    = gpio_pad_pullup );
+PROVIDE ( esp_rom_gpio_pad_set_drv        = gpio_pad_set_drv );
+PROVIDE ( esp_rom_gpio_pad_unhold         = gpio_pad_unhold );
+PROVIDE ( esp_rom_gpio_connect_in_signal  = gpio_matrix_in );
+PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
+
+PROVIDE ( esp_rom_efuse_mac_address_crc8       = esp_crc8 );
+PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
+
+PROVIDE ( esp_rom_uart_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char2 );
+PROVIDE ( esp_rom_uart_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
+PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
+
+PROVIDE ( esp_rom_output_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_output_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_output_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_output_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_output_rx_string      = UartRxString );
+PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_output_putc           = ets_write_char_uart );
+
+PROVIDE ( esp_rom_md5_init   = MD5Init );
+PROVIDE ( esp_rom_md5_update = MD5Update );
+PROVIDE ( esp_rom_md5_final  = MD5Final );
+
+PROVIDE ( esp_rom_software_reset_system = software_reset );
+PROVIDE ( esp_rom_software_reset_cpu    = software_reset_cpu );
+
+PROVIDE ( esp_rom_printf   = ets_printf );
+PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
+PROVIDE ( esp_rom_delay_us = ets_delay_us );
+PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
+PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
+PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
+PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
+
+PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach );
+PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
+PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable );
+PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
+
+PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
+PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
+PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
+PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );

esp-hal/ld/esp32c6/rom/esp32c6.rom.coexist.ld

@@ -0,0 +1,47 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32c6.rom.coexist.ld for esp32c6
+ *
+ *
+ * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group rom_coexist
+ ***************************************/
+
+/* Functions */
+esp_coex_rom_version_get = 0x40000afc;
+coex_bt_release = 0x40000b00;
+coex_bt_request = 0x40000b04;
+coex_core_ble_conn_dyn_prio_get = 0x40000b08;
+/*coex_core_event_duration_get = 0x40000b0c;*/
+coex_core_pti_get = 0x40000b10;
+coex_core_release = 0x40000b14;
+coex_core_request = 0x40000b18;
+coex_core_status_get = 0x40000b1c;
+/*coex_core_timer_idx_get = 0x40000b20;*/
+coex_event_duration_get = 0x40000b24;
+coex_hw_timer_disable = 0x40000b28;
+coex_hw_timer_enable = 0x40000b2c;
+coex_hw_timer_set = 0x40000b30;
+coex_schm_interval_set = 0x40000b34;
+coex_schm_lock = 0x40000b38;
+coex_schm_unlock = 0x40000b3c;
+coex_status_get = 0x40000b40;
+coex_wifi_release = 0x40000b44;
+esp_coex_ble_conn_dynamic_prio_get = 0x40000b48;
+/* Data (.data, .bss, .rodata) */
+coex_env_ptr = 0x4087ffc4;
+coex_pti_tab_ptr = 0x4087ffc0;
+coex_schm_env_ptr = 0x4087ffbc;
+coexist_funcs = 0x4087ffb8;
+g_coa_funcs_p = 0x4087ffb4;
+g_coex_param_ptr = 0x4087ffb0;

esp-hal/ld/esp32c6/rom/esp32c6.rom.heap.ld

@@ -0,0 +1,80 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32c6.rom.heap.ld for esp32c6
+ *
+ *
+ * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group heap
+ ***************************************/
+
+/* Functions */
+tlsf_create = 0x400003fc;
+tlsf_create_with_pool = 0x40000400;
+tlsf_get_pool = 0x40000404;
+tlsf_add_pool = 0x40000408;
+tlsf_remove_pool = 0x4000040c;
+tlsf_malloc = 0x40000410;
+tlsf_memalign = 0x40000414;
+tlsf_memalign_offs = 0x40000418;
+tlsf_realloc = 0x4000041c;
+tlsf_free = 0x40000420;
+tlsf_block_size = 0x40000424;
+tlsf_size = 0x40000428;
+tlsf_align_size = 0x4000042c;
+tlsf_block_size_min = 0x40000430;
+tlsf_block_size_max = 0x40000434;
+tlsf_pool_overhead = 0x40000438;
+tlsf_alloc_overhead = 0x4000043c;
+tlsf_walk_pool = 0x40000440;
+tlsf_check = 0x40000444;
+tlsf_poison_fill_pfunc_set = 0x4000044c;
+tlsf_poison_check_pfunc_set = 0x40000450;
+multi_heap_get_block_address_impl = 0x40000454;
+multi_heap_get_allocated_size_impl = 0x40000458;
+multi_heap_register_impl = 0x4000045c;
+multi_heap_set_lock = 0x40000460;
+multi_heap_mutex_init = 0x40000464;
+multi_heap_internal_lock = 0x40000468;
+multi_heap_internal_unlock = 0x4000046c;
+multi_heap_get_first_block = 0x40000470;
+multi_heap_get_next_block = 0x40000474;
+multi_heap_is_free = 0x40000478;
+multi_heap_malloc_impl = 0x4000047c;
+multi_heap_free_impl = 0x40000480;
+multi_heap_realloc_impl = 0x40000484;
+multi_heap_aligned_alloc_impl_offs = 0x40000488;
+multi_heap_aligned_alloc_impl = 0x4000048c;
+multi_heap_check = 0x40000490;
+multi_heap_dump = 0x40000494;
+multi_heap_free_size_impl = 0x40000498;
+multi_heap_minimum_free_size_impl = 0x4000049c;
+multi_heap_get_info_impl = 0x400004a0;
+/* Data (.data, .bss, .rodata) */
+heap_tlsf_table_ptr = 0x4087ffd8;
+
+PROVIDE (multi_heap_malloc = multi_heap_malloc_impl);
+PROVIDE (multi_heap_free = multi_heap_free_impl);
+PROVIDE (multi_heap_realloc = multi_heap_realloc_impl);
+PROVIDE (multi_heap_get_allocated_size = multi_heap_get_allocated_size_impl);
+PROVIDE (multi_heap_register = multi_heap_register_impl);
+PROVIDE (multi_heap_get_info = multi_heap_get_info_impl);
+PROVIDE (multi_heap_free_size = multi_heap_free_size_impl);
+PROVIDE (multi_heap_minimum_free_size = multi_heap_minimum_free_size_impl);
+PROVIDE (multi_heap_get_block_address = multi_heap_get_block_address_impl);
+PROVIDE (multi_heap_aligned_alloc = multi_heap_aligned_alloc_impl);
+PROVIDE (multi_heap_aligned_free = multi_heap_aligned_free_impl);
+PROVIDE (multi_heap_check = multi_heap_check);
+PROVIDE (multi_heap_set_lock = multi_heap_set_lock);
+PROVIDE (multi_heap_os_funcs_init = multi_heap_mutex_init);
+PROVIDE (multi_heap_internal_lock = multi_heap_internal_lock);
+PROVIDE (multi_heap_internal_unlock = multi_heap_internal_unlock);

esp-hal/ld/esp32c6/rom/esp32c6.rom.ld

@@ -0,0 +1,439 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32c6.rom.ld for esp32c6
+ *
+ *
+ * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group common
+ ***************************************/
+
+/* Functions */
+rtc_get_reset_reason = 0x40000018;
+analog_super_wdt_reset_happened = 0x4000001c;
+rtc_get_wakeup_cause = 0x40000020;
+rtc_unhold_all_pads = 0x40000024;
+ets_printf = 0x40000028;
+ets_install_putc1 = 0x4000002c;
+ets_install_putc2 = 0x40000030;
+ets_install_uart_printf = 0x40000034;
+ets_install_usb_printf = 0x40000038;
+ets_get_printf_channel = 0x4000003c;
+ets_delay_us = 0x40000040;
+ets_get_cpu_frequency = 0x40000044;
+ets_update_cpu_frequency = 0x40000048;
+ets_install_lock = 0x4000004c;
+UartRxString = 0x40000050;
+UartGetCmdLn = 0x40000054;
+uart_tx_one_char = 0x40000058;
+uart_tx_one_char2 = 0x4000005c;
+uart_rx_one_char = 0x40000060;
+uart_rx_one_char_block = 0x40000064;
+uart_rx_intr_handler = 0x40000068;
+uart_rx_readbuff = 0x4000006c;
+uartAttach = 0x40000070;
+uart_tx_flush = 0x40000074;
+uart_tx_wait_idle = 0x40000078;
+uart_div_modify = 0x4000007c;
+ets_write_char_uart = 0x40000080;
+uart_tx_switch = 0x40000084;
+roundup2 = 0x40000088;
+multofup = 0x4000008c;
+software_reset = 0x40000090;
+software_reset_cpu = 0x40000094;
+ets_clk_assist_debug_clock_enable = 0x40000098;
+clear_super_wdt_reset_flag = 0x4000009c;
+disable_default_watchdog = 0x400000a0;
+esp_rom_set_rtc_wake_addr = 0x400000a4;
+esp_rom_get_rtc_wake_addr = 0x400000a8;
+send_packet = 0x400000ac;
+recv_packet = 0x400000b0;
+GetUartDevice = 0x400000b4;
+UartDwnLdProc = 0x400000b8;
+GetSecurityInfoProc = 0x400000bc;
+Uart_Init = 0x400000c0;
+ets_set_user_start = 0x400000c4;
+/* Data (.data, .bss, .rodata) */
+ets_rom_layout_p = 0x4004fffc;
+ets_ops_table_ptr = 0x4087fff8;
+g_saved_pc = 0x4087fffc;
+
+
+/***************************************
+ Group miniz
+ ***************************************/
+
+/* Functions */
+mz_adler32 = 0x400000c8;
+mz_free = 0x400000cc;
+tdefl_compress = 0x400000d0;
+tdefl_compress_buffer = 0x400000d4;
+tdefl_compress_mem_to_heap = 0x400000d8;
+tdefl_compress_mem_to_mem = 0x400000dc;
+tdefl_compress_mem_to_output = 0x400000e0;
+tdefl_get_adler32 = 0x400000e4;
+tdefl_get_prev_return_status = 0x400000e8;
+tdefl_init = 0x400000ec;
+tdefl_write_image_to_png_file_in_memory = 0x400000f0;
+tdefl_write_image_to_png_file_in_memory_ex = 0x400000f4;
+tinfl_decompress = 0x400000f8;
+tinfl_decompress_mem_to_callback = 0x400000fc;
+tinfl_decompress_mem_to_heap = 0x40000100;
+tinfl_decompress_mem_to_mem = 0x40000104;
+
+
+/***************************************
+ Group tjpgd
+ ***************************************/
+
+/* Functions */
+jd_prepare = 0x40000108;
+jd_decomp = 0x4000010c;
+
+
+/***************************************
+ Group spiflash_legacy
+ ***************************************/
+
+/* Functions */
+esp_rom_spiflash_wait_idle = 0x40000110;
+esp_rom_spiflash_write_encrypted = 0x40000114;
+esp_rom_spiflash_write_encrypted_dest = 0x40000118;
+esp_rom_spiflash_write_encrypted_enable = 0x4000011c;
+esp_rom_spiflash_write_encrypted_disable = 0x40000120;
+esp_rom_spiflash_erase_chip = 0x40000124;
+_esp_rom_spiflash_erase_sector = 0x40000128;
+_esp_rom_spiflash_erase_block = 0x4000012c;
+_esp_rom_spiflash_write = 0x40000130;
+_esp_rom_spiflash_read = 0x40000134;
+_esp_rom_spiflash_unlock = 0x40000138;
+_SPIEraseArea = 0x4000013c;
+_SPI_write_enable = 0x40000140;
+esp_rom_spiflash_erase_sector = 0x40000144;
+esp_rom_spiflash_erase_block = 0x40000148;
+esp_rom_spiflash_write = 0x4000014c;
+esp_rom_spiflash_read = 0x40000150;
+esp_rom_spiflash_unlock = 0x40000154;
+SPIEraseArea = 0x40000158;
+SPI_write_enable = 0x4000015c;
+esp_rom_spiflash_config_param = 0x40000160;
+esp_rom_spiflash_read_user_cmd = 0x40000164;
+esp_rom_spiflash_select_qio_pins = 0x40000168;
+esp_rom_spi_flash_auto_sus_res = 0x4000016c;
+esp_rom_spi_flash_send_resume = 0x40000170;
+esp_rom_spi_flash_update_id = 0x40000174;
+esp_rom_spiflash_config_clk = 0x40000178;
+esp_rom_spiflash_config_readmode = 0x4000017c;
+esp_rom_spiflash_read_status = 0x40000180;
+esp_rom_spiflash_read_statushigh = 0x40000184;
+esp_rom_spiflash_write_status = 0x40000188;
+spi_cache_mode_switch = 0x4000018c;
+spi_common_set_dummy_output = 0x40000190;
+spi_common_set_flash_cs_timing = 0x40000194;
+esp_rom_spi_set_address_bit_len = 0x40000198;
+SPILock = 0x4000019c;
+SPIMasterReadModeCnfig = 0x400001a0;
+SPI_Common_Command = 0x400001a4;
+SPI_WakeUp = 0x400001a8;
+SPI_block_erase = 0x400001ac;
+SPI_chip_erase = 0x400001b0;
+SPI_init = 0x400001b4;
+SPI_page_program = 0x400001b8;
+SPI_read_data = 0x400001bc;
+SPI_sector_erase = 0x400001c0;
+SelectSpiFunction = 0x400001c4;
+SetSpiDrvs = 0x400001c8;
+Wait_SPI_Idle = 0x400001cc;
+spi_dummy_len_fix = 0x400001d0;
+Disable_QMode = 0x400001d4;
+Enable_QMode = 0x400001d8;
+spi_flash_attach = 0x400001dc;
+spi_flash_get_chip_size = 0x400001e0;
+spi_flash_guard_set = 0x400001e4;
+spi_flash_guard_get = 0x400001e8;
+spi_flash_read_encrypted = 0x400001ec;
+/* Data (.data, .bss, .rodata) */
+rom_spiflash_legacy_funcs = 0x4087fff0;
+rom_spiflash_legacy_data = 0x4087ffec;
+g_flash_guard_ops = 0x4087fff4;
+
+/* Note: esp_rom_spiflash_write_disable was moved from esp32c6.rom.spiflash.ld */
+esp_rom_spiflash_write_disable = 0x40000278;
+
+
+/***************************************
+ Group cache
+ ***************************************/
+
+/* Functions */
+Cache_Get_ICache_Line_Size = 0x40000628;
+Cache_Get_Mode = 0x4000062c;
+Cache_Address_Through_Cache = 0x40000630;
+ROM_Boot_Cache_Init = 0x40000634;
+MMU_Set_Page_Mode = 0x40000638;
+MMU_Get_Page_Mode = 0x4000063c;
+Cache_Invalidate_ICache_Items = 0x40000640;
+Cache_Op_Addr = 0x40000644;
+Cache_Invalidate_Addr = 0x40000648;
+Cache_Invalidate_ICache_All = 0x4000064c;
+Cache_Mask_All = 0x40000650;
+Cache_UnMask_Dram0 = 0x40000654;
+Cache_Suspend_ICache_Autoload = 0x40000658;
+Cache_Resume_ICache_Autoload = 0x4000065c;
+Cache_Start_ICache_Preload = 0x40000660;
+Cache_ICache_Preload_Done = 0x40000664;
+Cache_End_ICache_Preload = 0x40000668;
+Cache_Config_ICache_Autoload = 0x4000066c;
+Cache_Enable_ICache_Autoload = 0x40000670;
+Cache_Disable_ICache_Autoload = 0x40000674;
+Cache_Enable_ICache_PreLock = 0x40000678;
+Cache_Disable_ICache_PreLock = 0x4000067c;
+Cache_Lock_ICache_Items = 0x40000680;
+Cache_Unlock_ICache_Items = 0x40000684;
+Cache_Lock_Addr = 0x40000688;
+Cache_Unlock_Addr = 0x4000068c;
+Cache_Disable_ICache = 0x40000690;
+Cache_Enable_ICache = 0x40000694;
+Cache_Suspend_ICache = 0x40000698;
+Cache_Resume_ICache = 0x4000069c;
+Cache_Freeze_ICache_Enable = 0x400006a0;
+Cache_Freeze_ICache_Disable = 0x400006a4;
+Cache_Set_IDROM_MMU_Size = 0x400006a8;
+Cache_Get_IROM_MMU_End = 0x400006ac;
+Cache_Get_DROM_MMU_End = 0x400006b0;
+Cache_MMU_Init = 0x400006b4;
+Cache_MSPI_MMU_Set = 0x400006b8;
+Cache_Travel_Tag_Memory = 0x400006bc;
+Cache_Get_Virtual_Addr = 0x400006c0;
+/* Data (.data, .bss, .rodata) */
+rom_cache_op_cb = 0x4087ffcc;
+rom_cache_internal_table_ptr = 0x4087ffc8;
+
+
+/***************************************
+ Group clock
+ ***************************************/
+
+/* Functions */
+ets_clk_get_xtal_freq = 0x400006c4;
+ets_clk_get_cpu_freq = 0x400006c8;
+ets_clk_apb_wait_ready = 0x400006cc;
+ets_clk_mspi_apb_wait_ready = 0x400006d0;
+
+
+/***************************************
+ Group gpio
+ ***************************************/
+
+/* Functions */
+gpio_input_get = 0x400006d4;
+gpio_matrix_in = 0x400006d8;
+gpio_matrix_out = 0x400006dc;
+gpio_output_disable = 0x400006e0;
+gpio_output_enable = 0x400006e4;
+gpio_output_set = 0x400006e8;
+gpio_pad_hold = 0x400006ec;
+gpio_pad_input_disable = 0x400006f0;
+gpio_pad_input_enable = 0x400006f4;
+gpio_pad_pulldown = 0x400006f8;
+gpio_pad_pullup = 0x400006fc;
+gpio_pad_select_gpio = 0x40000700;
+gpio_pad_set_drv = 0x40000704;
+gpio_pad_unhold = 0x40000708;
+gpio_pin_wakeup_disable = 0x4000070c;
+gpio_pin_wakeup_enable = 0x40000710;
+gpio_bypass_matrix_in = 0x40000714;
+
+
+/***************************************
+ Group interrupts
+ ***************************************/
+
+/* Functions */
+esprv_intc_int_set_priority = 0x40000718;
+esprv_intc_int_set_threshold = 0x4000071c;
+esprv_intc_int_enable = 0x40000720;
+esprv_intc_int_disable = 0x40000724;
+esprv_intc_int_set_type = 0x40000728;
+PROVIDE( intr_handler_set = 0x4000072c );
+intr_matrix_set = 0x40000730;
+ets_intr_lock = 0x40000734;
+ets_intr_unlock = 0x40000738;
+ets_isr_attach = 0x4000073c;
+ets_isr_mask = 0x40000740;
+ets_isr_unmask = 0x40000744;
+
+
+/***************************************
+ Group crypto
+ ***************************************/
+
+/* Functions */
+md5_vector = 0x40000748;
+MD5Init = 0x4000074c;
+MD5Update = 0x40000750;
+MD5Final = 0x40000754;
+crc32_le = 0x40000758;
+crc16_le = 0x4000075c;
+crc8_le = 0x40000760;
+crc32_be = 0x40000764;
+crc16_be = 0x40000768;
+crc8_be = 0x4000076c;
+esp_crc8 = 0x40000770;
+ets_sha_enable = 0x40000774;
+ets_sha_disable = 0x40000778;
+ets_sha_get_state = 0x4000077c;
+ets_sha_init = 0x40000780;
+ets_sha_process = 0x40000784;
+ets_sha_starts = 0x40000788;
+ets_sha_update = 0x4000078c;
+ets_sha_finish = 0x40000790;
+ets_sha_clone = 0x40000794;
+ets_hmac_enable = 0x40000798;
+ets_hmac_disable = 0x4000079c;
+ets_hmac_calculate_message = 0x400007a0;
+ets_hmac_calculate_downstream = 0x400007a4;
+ets_hmac_invalidate_downstream = 0x400007a8;
+ets_jtag_enable_temporarily = 0x400007ac;
+ets_aes_enable = 0x400007b0;
+ets_aes_disable = 0x400007b4;
+ets_aes_setkey = 0x400007b8;
+ets_aes_block = 0x400007bc;
+ets_aes_setkey_dec = 0x400007c0;
+ets_aes_setkey_enc = 0x400007c4;
+ets_bigint_enable = 0x400007c8;
+ets_bigint_disable = 0x400007cc;
+ets_bigint_multiply = 0x400007d0;
+ets_bigint_modmult = 0x400007d4;
+ets_bigint_modexp = 0x400007d8;
+ets_bigint_wait_finish = 0x400007dc;
+ets_bigint_getz = 0x400007e0;
+ets_ds_enable = 0x400007e4;
+ets_ds_disable = 0x400007e8;
+ets_ds_start_sign = 0x400007ec;
+ets_ds_is_busy = 0x400007f0;
+ets_ds_finish_sign = 0x400007f4;
+ets_ds_encrypt_params = 0x400007f8;
+ets_mgf1_sha256 = 0x400007fc;
+/* Data (.data, .bss, .rodata) */
+crc32_le_table_ptr = 0x4004fff8;
+crc16_le_table_ptr = 0x4004fff4;
+crc8_le_table_ptr = 0x4004fff0;
+crc32_be_table_ptr = 0x4004ffec;
+crc16_be_table_ptr = 0x4004ffe8;
+crc8_be_table_ptr = 0x4004ffe4;
+
+
+/***************************************
+ Group efuse
+ ***************************************/
+
+/* Functions */
+ets_efuse_read = 0x40000800;
+ets_efuse_program = 0x40000804;
+ets_efuse_clear_program_registers = 0x40000808;
+ets_efuse_write_key = 0x4000080c;
+ets_efuse_get_read_register_address = 0x40000810;
+ets_efuse_get_key_purpose = 0x40000814;
+ets_efuse_key_block_unused = 0x40000818;
+ets_efuse_find_unused_key_block = 0x4000081c;
+ets_efuse_rs_calculate = 0x40000820;
+ets_efuse_count_unused_key_blocks = 0x40000824;
+ets_efuse_secure_boot_enabled = 0x40000828;
+ets_efuse_secure_boot_aggressive_revoke_enabled = 0x4000082c;
+ets_efuse_cache_encryption_enabled = 0x40000830;
+ets_efuse_download_modes_disabled = 0x40000834;
+ets_efuse_find_purpose = 0x40000838;
+ets_efuse_force_send_resume = 0x4000083c;
+ets_efuse_get_flash_delay_us = 0x40000840;
+ets_efuse_get_mac = 0x40000844;
+ets_efuse_get_uart_print_control = 0x40000848;
+ets_efuse_direct_boot_mode_disabled = 0x4000084c;
+ets_efuse_security_download_modes_enabled = 0x40000850;
+ets_efuse_set_timing = 0x40000854;
+ets_efuse_jtag_disabled = 0x40000858;
+ets_efuse_usb_print_is_disabled = 0x4000085c;
+ets_efuse_usb_download_mode_disabled = 0x40000860;
+ets_efuse_usb_device_disabled = 0x40000864;
+ets_efuse_secure_boot_fast_wake_enabled = 0x40000868;
+
+
+/***************************************
+ Group secureboot
+ ***************************************/
+
+/* Functions */
+ets_emsa_pss_verify = 0x4000086c;
+ets_rsa_pss_verify = 0x40000870;
+ets_secure_boot_verify_bootloader_with_keys = 0x40000874;
+ets_secure_boot_verify_signature = 0x40000878;
+ets_secure_boot_read_key_digests = 0x4000087c;
+ets_secure_boot_revoke_public_key_digest = 0x40000880;
+
+
+/***************************************
+ Group usb_device_uart
+ ***************************************/
+
+/* Functions */
+usb_serial_device_rx_one_char = 0x40000a80;
+usb_serial_device_rx_one_char_block = 0x40000a84;
+usb_serial_device_tx_flush = 0x40000a88;
+usb_serial_device_tx_one_char = 0x40000a8c;
+
+
+/***************************************
+ Group lldesc
+ ***************************************/
+
+/* Functions */
+lldesc_build_chain = 0x40000a90;
+
+
+/***************************************
+ Group sip
+ ***************************************/
+
+/* Functions */
+sip_after_tx_complete = 0x40000a94;
+sip_alloc_to_host_evt = 0x40000a98;
+sip_download_begin = 0x40000a9c;
+sip_get_ptr = 0x40000aa0;
+sip_get_state = 0x40000aa4;
+sip_init_attach = 0x40000aa8;
+sip_install_rx_ctrl_cb = 0x40000aac;
+sip_install_rx_data_cb = 0x40000ab0;
+sip_is_active = 0x40000ab4;
+sip_post_init = 0x40000ab8;
+sip_reclaim_from_host_cmd = 0x40000abc;
+sip_reclaim_tx_data_pkt = 0x40000ac0;
+sip_send = 0x40000ac4;
+sip_to_host_chain_append = 0x40000ac8;
+sip_to_host_evt_send_done = 0x40000acc;
+
+
+/***************************************
+ Group slc
+ ***************************************/
+
+/* Functions */
+slc_add_credits = 0x40000ad0;
+slc_enable = 0x40000ad4;
+slc_from_host_chain_fetch = 0x40000ad8;
+slc_from_host_chain_recycle = 0x40000adc;
+slc_has_pkt_to_host = 0x40000ae0;
+slc_init_attach = 0x40000ae4;
+slc_init_credit = 0x40000ae8;
+slc_reattach = 0x40000aec;
+slc_send_to_host_chain = 0x40000af0;
+slc_set_host_io_max_window = 0x40000af4;
+slc_to_host_chain_recycle = 0x40000af8;

esp-hal/ld/esp32c6/rom/esp32c6.rom.libgcc.ld

@@ -0,0 +1,112 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32c6.rom.libgcc.ld for esp32c6
+ *
+ *
+ * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group libgcc
+ ***************************************/
+
+/* Functions */
+__absvdi2 = 0x40000884;
+__absvsi2 = 0x40000888;
+__adddf3 = 0x4000088c;
+__addsf3 = 0x40000890;
+__addvdi3 = 0x40000894;
+__addvsi3 = 0x40000898;
+__ashldi3 = 0x4000089c;
+__ashrdi3 = 0x400008a0;
+__bswapdi2 = 0x400008a4;
+__bswapsi2 = 0x400008a8;
+__clear_cache = 0x400008ac;
+__clrsbdi2 = 0x400008b0;
+__clrsbsi2 = 0x400008b4;
+__clzdi2 = 0x400008b8;
+__clzsi2 = 0x400008bc;
+__cmpdi2 = 0x400008c0;
+__ctzdi2 = 0x400008c4;
+__ctzsi2 = 0x400008c8;
+__divdc3 = 0x400008cc;
+__divdf3 = 0x400008d0;
+__divdi3 = 0x400008d4;
+__divsc3 = 0x400008d8;
+__divsf3 = 0x400008dc;
+__divsi3 = 0x400008e0;
+__eqdf2 = 0x400008e4;
+__eqsf2 = 0x400008e8;
+__extendsfdf2 = 0x400008ec;
+__ffsdi2 = 0x400008f0;
+__ffssi2 = 0x400008f4;
+__fixdfdi = 0x400008f8;
+__fixdfsi = 0x400008fc;
+__fixsfdi = 0x40000900;
+__fixsfsi = 0x40000904;
+__fixunsdfsi = 0x40000908;
+__fixunssfdi = 0x4000090c;
+__fixunssfsi = 0x40000910;
+__floatdidf = 0x40000914;
+__floatdisf = 0x40000918;
+__floatsidf = 0x4000091c;
+__floatsisf = 0x40000920;
+__floatundidf = 0x40000924;
+__floatundisf = 0x40000928;
+__floatunsidf = 0x4000092c;
+__floatunsisf = 0x40000930;
+__gcc_bcmp = 0x40000934;
+__gedf2 = 0x40000938;
+__gesf2 = 0x4000093c;
+__gtdf2 = 0x40000940;
+__gtsf2 = 0x40000944;
+__ledf2 = 0x40000948;
+__lesf2 = 0x4000094c;
+__lshrdi3 = 0x40000950;
+__ltdf2 = 0x40000954;
+__ltsf2 = 0x40000958;
+__moddi3 = 0x4000095c;
+__modsi3 = 0x40000960;
+__muldc3 = 0x40000964;
+__muldf3 = 0x40000968;
+__muldi3 = 0x4000096c;
+__mulsc3 = 0x40000970;
+__mulsf3 = 0x40000974;
+__mulsi3 = 0x40000978;
+__mulvdi3 = 0x4000097c;
+__mulvsi3 = 0x40000980;
+__nedf2 = 0x40000984;
+__negdf2 = 0x40000988;
+__negdi2 = 0x4000098c;
+__negsf2 = 0x40000990;
+__negvdi2 = 0x40000994;
+__negvsi2 = 0x40000998;
+__nesf2 = 0x4000099c;
+__paritysi2 = 0x400009a0;
+__popcountdi2 = 0x400009a4;
+__popcountsi2 = 0x400009a8;
+__powidf2 = 0x400009ac;
+__powisf2 = 0x400009b0;
+__subdf3 = 0x400009b4;
+__subsf3 = 0x400009b8;
+__subvdi3 = 0x400009bc;
+__subvsi3 = 0x400009c0;
+__truncdfsf2 = 0x400009c4;
+__ucmpdi2 = 0x400009c8;
+__udivdi3 = 0x400009cc;
+__udivmoddi4 = 0x400009d0;
+__udivsi3 = 0x400009d4;
+__udiv_w_sdiv = 0x400009d8;
+__umoddi3 = 0x400009dc;
+__umodsi3 = 0x400009e0;
+__unorddf2 = 0x400009e4;
+__unordsf2 = 0x400009e8;
+__extenddftf2 = 0x400009ec;
+__trunctfdf2 = 0x400009f0;

esp-hal/ld/esp32c6/rom/esp32c6.rom.net80211.ld

@@ -0,0 +1,67 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32c6.rom.net80211.ld for esp32c6
+ *
+ *
+ * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group rom_net80211
+ ***************************************/
+
+/* Functions */
+esp_net80211_rom_version_get = 0x40000b4c;
+ampdu_dispatch = 0x40000b50;
+ampdu_dispatch_all = 0x40000b54;
+ampdu_dispatch_as_many_as_possible = 0x40000b58;
+ampdu_dispatch_movement = 0x40000b5c;
+ampdu_dispatch_upto = 0x40000b60;
+chm_is_at_home_channel = 0x40000b64;
+cnx_node_is_existing = 0x40000b68;
+cnx_node_search = 0x40000b6c;
+ic_ebuf_recycle_rx = 0x40000b70;
+ic_ebuf_recycle_tx = 0x40000b74;
+ic_reset_rx_ba = 0x40000b78;
+ieee80211_align_eb = 0x40000b7c;
+/*ieee80211_ampdu_reorder = 0x40000b80;*/
+ieee80211_ampdu_start_age_timer = 0x40000b84;
+/*ieee80211_encap_esfbuf = 0x40000b88;*/
+ieee80211_is_tx_allowed = 0x40000b8c;
+ieee80211_output_pending_eb = 0x40000b90;
+/*ieee80211_output_process = 0x40000b94;*/
+//ieee80211_set_tx_desc = 0x40000b98;
+//sta_input = 0x40000b9c;
+wifi_get_macaddr = 0x40000ba0;
+wifi_rf_phy_disable = 0x40000ba4;
+wifi_rf_phy_enable = 0x40000ba8;
+ic_ebuf_alloc = 0x40000bac;
+/*ieee80211_classify = 0x40000bb0;*/
+ieee80211_copy_eb_header = 0x40000bb4;
+ieee80211_recycle_cache_eb = 0x40000bb8;
+ieee80211_search_node = 0x40000bbc;
+ieee80211_crypto_encap = 0x40000bc0;
+/* ieee80211_crypto_decap = 0x40000bc4; */
+ieee80211_decap = 0x40000bc8;
+wifi_is_started = 0x40000bcc;
+ieee80211_gettid = 0x40000bd0;
+//ieee80211_encap_esfbuf_htc = 0x40000bd4;
+/* Data (.data, .bss, .rodata) */
+net80211_funcs = 0x4087ffac;
+g_scan = 0x4087ffa8;
+g_chm = 0x4087ffa4;
+g_ic_ptr = 0x4087ffa0;
+g_hmac_cnt_ptr = 0x4087ff9c;
+g_tx_cacheq_ptr = 0x4087ff98;
+s_netstack_free = 0x4087ff94;
+mesh_rxcb = 0x4087ff90;
+sta_rxcb = 0x4087ff8c;
+g_itwt_fid = 0x4087ff88;
+esp_test_tx_addba_request = 0x4087ff84;

esp-hal/ld/esp32c6/rom/esp32c6.rom.phy.ld

@@ -0,0 +1,245 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32c6.rom.phy.ld for esp32c6
+ *
+ *
+ * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group rom_phy
+ ***************************************/
+
+/* Functions */
+phy_param_addr = 0x40001104;
+phy_get_romfuncs = 0x40001108;
+chip761_phyrom_version = 0x4000110c;
+chip761_phyrom_version_num = 0x40001110;
+get_rc_dout = 0x40001114;
+rc_cal = 0x40001118;
+rom_enter_critical_phy = 0x4000111c;
+rom_exit_critical_phy = 0x40001120;
+rom_set_chan_cal_interp = 0x40001124;
+rom_loopback_mode_en = 0x40001128;
+rom_bb_bss_cbw40 = 0x4000112c;
+abs_temp = 0x40001130;
+get_data_sat = 0x40001134;
+phy_byte_to_word = 0x40001138;
+set_chan_reg = 0x4000113c;
+i2c_master_reset = 0x40001140;
+rom_set_chan_freq_sw_start = 0x40001144;
+freq_module_resetn = 0x40001148;
+freq_chan_en_sw = 0x4000114c;
+write_chan_freq = 0x40001150;
+get_freq_mem_param = 0x40001154;
+get_freq_mem_addr = 0x40001158;
+bt_txpwr_freq = 0x4000115c;
+wr_rf_freq_mem = 0x40001160;
+read_rf_freq_mem = 0x40001164;
+freq_i2c_mem_write = 0x40001168;
+freq_num_get_data = 0x4000116c;
+freq_i2c_num_addr = 0x40001170;
+freq_i2c_write_set = 0x40001174;
+pll_dac_mem_update = 0x40001178;
+pll_cap_mem_update = 0x4000117c;
+get_rf_freq_cap = 0x40001180;
+get_rf_freq_init = 0x40001184;
+phy_en_hw_set_freq = 0x40001188;
+phy_dis_hw_set_freq = 0x4000118c;
+rom_pwdet_sar2_init = 0x40001190;
+rom_en_pwdet = 0x40001194;
+rom_get_sar_sig_ref = 0x40001198;
+rom_pwdet_tone_start = 0x4000119c;
+rom_pwdet_wait_idle = 0x400011a0;
+rom_read_sar_dout = 0x400011a4;
+get_tone_sar_dout = 0x400011a8;
+get_fm_sar_dout = 0x400011ac;
+txtone_linear_pwr = 0x400011b0;
+linear_to_db = 0x400011b4;
+get_power_db = 0x400011b8;
+meas_tone_pwr_db = 0x400011bc;
+pkdet_vol_start = 0x400011c0;
+read_sar2_code = 0x400011c4;
+get_sar2_vol = 0x400011c8;
+get_pll_vol = 0x400011cc;
+tx_pwctrl_bg_init = 0x400011d0;
+phy_pwdet_always_en = 0x400011d4;
+phy_pwdet_onetime_en = 0x400011d8;
+esp_tx_state_out_rom = 0x400011dc;
+ant_dft_cfg_rom = 0x400011e0;
+ant_wifitx_cfg_rom = 0x400011e4;
+ant_wifirx_cfg_rom = 0x400011e8;
+ant_bttx_cfg_rom = 0x400011ec;
+ant_btrx_cfg_rom = 0x400011f0;
+phy_chan_dump_cfg_rom = 0x400011f4;
+phy_enable_low_rate = 0x400011f8;
+phy_disable_low_rate = 0x400011fc;
+phy_is_low_rate_enabled = 0x40001200;
+phy_dig_reg_backup_rom = 0x40001204;
+phy_chan_filt_set_rom = 0x40001208;
+phy_rx11blr_cfg = 0x4000120c;
+set_cca_rom = 0x40001210;
+set_rx_sense_rom = 0x40001214;
+rx_gain_force_rom = 0x40001218;
+rom_rfpll_set_freq = 0x4000121c;
+mhz2ieee = 0x40001220;
+chan_to_freq = 0x40001224;
+restart_cal = 0x40001228;
+write_rfpll_sdm = 0x4000122c;
+wait_rfpll_cal_end = 0x40001230;
+set_rf_freq_offset = 0x40001234;
+set_rfpll_freq = 0x40001238;
+set_channel_rfpll_freq = 0x4000123c;
+rfpll_cap_correct = 0x40001240;
+rfpll_cap_init_cal = 0x40001244;
+write_pll_cap = 0x40001248;
+read_pll_cap = 0x4000124c;
+chip_v7_set_chan_ana = 0x40001250;
+freq_set_reg = 0x40001254;
+gen_rx_gain_table = 0x40001258;
+bt_txdc_cal = 0x4000125c;
+bt_txiq_cal = 0x40001260;
+txiq_cal_init = 0x40001264;
+txdc_cal_init = 0x40001268;
+txdc_cal = 0x4000126c;
+txiq_get_mis_pwr = 0x40001270;
+txiq_cover = 0x40001274;
+rfcal_txiq = 0x40001278;
+get_power_atten = 0x4000127c;
+pwdet_ref_code = 0x40001280;
+pwdet_code_cal = 0x40001284;
+rfcal_txcap = 0x40001288;
+tx_cap_init = 0x4000128c;
+rfcal_pwrctrl = 0x40001290;
+tx_pwctrl_init_cal = 0x40001294;
+tx_pwctrl_init = 0x40001298;
+bt_tx_pwctrl_init = 0x4000129c;
+rom_i2c_enter_critical = 0x400012a0;
+rom_i2c_exit_critical = 0x400012a4;
+rom_get_i2c_read_mask = 0x400012a8;
+rom_get_i2c_mst0_mask = 0x400012ac;
+rom_get_i2c_hostid = 0x400012b0;
+rom_chip_i2c_readReg_org = 0x400012b4;
+rom_chip_i2c_readReg = 0x400012b8;
+rom_chip_i2c_writeReg = 0x400012c0;
+rom_set_txcap_reg = 0x400012d0;
+i2c_paral_set_mst0 = 0x400012d4;
+i2c_paral_set_read = 0x400012d8;
+i2c_paral_read = 0x400012dc;
+i2c_paral_write = 0x400012e0;
+i2c_paral_write_num = 0x400012e4;
+i2c_paral_write_mask = 0x400012e8;
+i2c_sar2_init_code = 0x400012ec;
+rom_pbus_force_mode = 0x400012f0;
+rom_pbus_rd_addr = 0x400012f4;
+rom_pbus_rd_shift = 0x400012f8;
+rom_pbus_force_test = 0x400012fc;
+rom_pbus_rd = 0x40001300;
+rom_pbus_set_rxgain = 0x40001304;
+rom_pbus_xpd_rx_off = 0x40001308;
+rom_pbus_xpd_rx_on = 0x4000130c;
+rom_pbus_xpd_tx_off = 0x40001310;
+rom_pbus_xpd_tx_on = 0x40001314;
+rom_set_loopback_gain = 0x40001318;
+rom_txcal_debuge_mode = 0x4000131c;
+pbus_debugmode = 0x40001320;
+pbus_workmode = 0x40001324;
+pbus_set_dco = 0x40001328;
+txcal_work_mode = 0x4000132c;
+rom_start_tx_tone_step = 0x40001330;
+rom_stop_tx_tone = 0x40001334;
+disable_agc = 0x40001338;
+enable_agc = 0x4000133c;
+phy_disable_cca = 0x40001340;
+phy_enable_cca = 0x40001344;
+write_gain_mem = 0x40001348;
+bb_bss_cbw40_dig = 0x4000134c;
+cbw2040_cfg = 0x40001350;
+mac_tx_chan_offset = 0x40001354;
+tx_paon_set = 0x40001358;
+pwdet_reg_init = 0x4000135c;
+i2cmst_reg_init = 0x40001360;
+bt_gain_offset = 0x40001364;
+fe_reg_init = 0x40001368;
+mac_enable_bb = 0x4000136c;
+bb_wdg_cfg = 0x40001370;
+fe_txrx_reset = 0x40001374;
+set_rx_comp = 0x40001378;
+agc_reg_init = 0x4000137c;
+bb_reg_init = 0x40001380;
+open_i2c_xpd = 0x40001384;
+txiq_set_reg = 0x40001388;
+rxiq_set_reg = 0x4000138c;
+set_txclk_en = 0x40001390;
+set_rxclk_en = 0x40001394;
+bb_wdg_test_en = 0x40001398;
+noise_floor_auto_set = 0x4000139c;
+read_hw_noisefloor = 0x400013a0;
+iq_corr_enable = 0x400013a4;
+wifi_agc_sat_gain = 0x400013a8;
+phy_bbpll_cal = 0x400013ac;
+phy_ant_init = 0x400013b0;
+phy_set_bbfreq_init = 0x400013b4;
+wifi_fbw_sel = 0x400013b8;
+bt_filter_reg = 0x400013bc;
+phy_rx_sense_set = 0x400013c0;
+tx_state_set = 0x400013c4;
+phy_close_pa = 0x400013c8;
+phy_freq_correct = 0x400013cc;
+set_pbus_reg = 0x400013d0;
+wifi_rifs_mode_en = 0x400013d4;
+nrx_freq_set = 0x400013d8;
+fe_adc_on = 0x400013dc;
+phy_force_pwr_index = 0x400013e0;
+rom_iq_est_enable = 0x400013e4;
+rom_iq_est_disable = 0x400013e8;
+rom_bb_gain_index = 0x400013ec;
+rom_rfrx_gain_index = 0x400013f0;
+dc_iq_est = 0x400013f4;
+set_cal_rxdc = 0x400013f8;
+rxiq_get_mis = 0x400013fc;
+rxiq_cover_mg_mp = 0x40001400;
+rfcal_rxiq = 0x40001404;
+get_rfcal_rxiq_data = 0x40001408;
+get_dco_comp = 0x4000140c;
+pbus_rx_dco_cal = 0x40001410;
+rxdc_est_min = 0x40001414;
+pbus_rx_dco_cal_1step = 0x40001418;
+set_lb_txiq = 0x4000141c;
+set_rx_gain_cal_iq = 0x40001420;
+set_rx_gain_cal_dc = 0x40001424;
+spur_reg_write_one_tone = 0x40001428;
+spur_cal = 0x4000142c;
+spur_coef_cfg = 0x40001430;
+tsens_power_up = 0x40001434;
+tsens_read_init = 0x40001438;
+code_to_temp = 0x4000143c;
+tsens_index_to_dac = 0x40001440;
+tsens_index_to_offset = 0x40001444;
+tsens_dac_cal = 0x40001448;
+tsens_code_read = 0x4000144c;
+tsens_temp_read = 0x40001450;
+temp_to_power = 0x40001454;
+get_temp_init = 0x40001458;
+txbbgain_to_index = 0x4000145c;
+index_to_txbbgain = 0x40001460;
+bt_index_to_bb = 0x40001464;
+bt_bb_to_index = 0x40001468;
+bt_get_tx_gain = 0x4000146c;
+dig_gain_check = 0x40001470;
+wifi_get_tx_gain = 0x40001474;
+wifi_11g_rate_chg = 0x40001478;
+bt_chan_pwr_interp = 0x4000147c;
+get_rate_fcc_index = 0x40001480;
+get_chan_target_power = 0x40001484;
+get_tx_gain_value = 0x40001488;
+wifi_get_target_power = 0x4000148c;
+/* Data (.data, .bss, .rodata) */
+phy_param_rom = 0x4087fce8;

esp-hal/ld/esp32c6/rom/esp32c6.rom.pp.ld

@@ -0,0 +1,459 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32c6.rom.pp.ld for esp32c6
+ *
+ *
+ * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group rom_pp
+ ***************************************/
+
+/* Functions */
+esp_pp_rom_version_get = 0x40000bd8;
+ppCalTxopRTSThreshold = 0x40000bdc;
+RC_GetBlockAckTime = 0x40000be0;
+ebuf_list_remove = 0x40000be4;
+//esf_buf_alloc = 0x40000be8;
+//esf_buf_alloc_dynamic = 0x40000bec;
+//esf_buf_recycle = 0x40000bf0;
+GetAccess = 0x40000bf4;
+hal_mac_is_low_rate_enabled = 0x40000bf8;
+hal_mac_tx_get_blockack = 0x40000bfc;
+//hal_mac_tx_set_ppdu = 0x40000c00;
+ic_get_trc = 0x40000c04;
+//ic_mac_deinit = 0x40000c08;
+ic_mac_init = 0x40000c0c;
+ic_interface_enabled = 0x40000c10;
+is_lmac_idle = 0x40000c14;
+/*lmacAdjustTimestamp = 0x40000c18;*/
+lmacDiscardAgedMSDU = 0x40000c1c;
+/*lmacDiscardMSDU = 0x40000c20;*/
+/*lmacEndFrameExchangeSequence = 0x40000c24;*/
+lmacIsIdle = 0x40000c28;
+lmacIsLongFrame = 0x40000c2c;
+/*lmacMSDUAged = 0x40000c30;*/
+lmacPostTxComplete = 0x40000c34;
+lmacProcessAllTxTimeout = 0x40000c38;
+lmacProcessCollisions = 0x40000c3c;
+//lmacProcessRxSucData = 0x40000c40;
+lmacReachLongLimit = 0x40000c44;
+lmacReachShortLimit = 0x40000c48;
+lmacRecycleMPDU = 0x40000c4c;
+lmacRxDone = 0x40000c50;
+//lmacSetTxFrame = 0x40000c54;
+//lmacTxDone = 0x40000c58;
+//lmacTxFrame = 0x40000c5c;
+mac_tx_set_duration = 0x40000c60;
+//mac_tx_set_plcp0 = 0x40000c64;
+//mac_tx_set_plcp1 = 0x40000c68;
+mac_tx_set_plcp2 = 0x40000c6c;
+/* pm_check_state = 0x40000c70; */
+/* pm_disable_dream_timer = 0x40000c74; */
+pm_disable_sleep_delay_timer = 0x40000c78;
+/*pm_dream = 0x40000c7c;*/
+pm_mac_wakeup = 0x40000c80;
+pm_mac_sleep = 0x40000c84;
+//pm_enable_active_timer = 0x40000c88;
+pm_enable_sleep_delay_timer = 0x40000c8c;
+pm_local_tsf_process = 0x40000c90;
+//pm_set_beacon_filter = 0x40000c94;
+pm_is_in_wifi_slice_threshold = 0x40000c98;
+pm_is_waked = 0x40000c9c;
+//pm_keep_alive = 0x40000ca0;
+/* pm_on_beacon_rx = 0x40000ca4; */
+pm_on_data_rx = 0x40000ca8;
+//pm_on_tbtt = 0x40000cac;
+/* pm_parse_beacon = 0x40000cb0; */
+//pm_process_tim = 0x40000cb4;
+//pm_rx_beacon_process = 0x40000cb8;
+/* pm_rx_data_process = 0x40000cbc; */
+//pm_sleep = 0x40000cc0;
+pm_sleep_for = 0x40000cc4;
+//pm_tbtt_process = 0x40000cc8;
+ppAMPDU2Normal = 0x40000ccc;
+/* ppAssembleAMPDU = 0x40000cd0; */
+ppCalFrameTimes = 0x40000cd4;
+ppCalSubFrameLength = 0x40000cd8;
+//ppCalTxAMPDULength = 0x40000cdc;
+ppCheckTxAMPDUlength = 0x40000ce0;
+ppDequeueRxq_Locked = 0x40000ce4;
+ppDequeueTxQ = 0x40000ce8;
+ppEmptyDelimiterLength = 0x40000cec;
+ppEnqueueRxq = 0x40000cf0;
+ppEnqueueTxDone = 0x40000cf4;
+ppGetTxframe = 0x40000cf8;
+//ppMapTxQueue = 0x40000cfc;
+//ppProcTxSecFrame = 0x40000d00;
+ppProcessRxPktHdr = 0x40000d04;
+//ppProcessTxQ = 0x40000d08;
+ppRecordBarRRC = 0x40000d0c;
+ppRecycleAmpdu = 0x40000d10;
+ppRecycleRxPkt = 0x40000d14;
+//ppResortTxAMPDU = 0x40000d18;
+ppResumeTxAMPDU = 0x40000d1c;
+/*ppRxFragmentProc = 0x40000d20;*/
+//ppRxPkt = 0x40000d24;
+ppRxProtoProc = 0x40000d28;
+ppSearchTxQueue = 0x40000d2c;
+ppSearchTxframe = 0x40000d30;
+ppSelectNextQueue = 0x40000d34;
+ppSubFromAMPDU = 0x40000d38;
+//ppTask = 0x40000d3c;
+//ppTxPkt = 0x40000d40;
+ppTxProtoProc = 0x40000d44;
+ppTxqUpdateBitmap = 0x40000d48;
+/*pp_coex_tx_request = 0x40000d4c;*/
+pp_hdrsize = 0x40000d50;
+pp_post = 0x40000d54;
+pp_process_hmac_waiting_txq = 0x40000d58;
+rcGetAmpduSched = 0x40000d5c;
+rcUpdateRxDone = 0x40000d60;
+rc_get_trc = 0x40000d64;
+rc_get_trc_by_index = 0x40000d68;
+rcAmpduLowerRate = 0x40000d6c;
+rcampduuprate = 0x40000d70;
+rcClearCurAMPDUSched = 0x40000d74;
+rcClearCurSched = 0x40000d78;
+rcClearCurStat = 0x40000d7c;
+/*rcGetSched = 0x40000d80;*/
+rcLowerSched = 0x40000d84;
+rcSetTxAmpduLimit = 0x40000d88;
+rcTxUpdatePer = 0x40000d8c;
+rcUpdateAckSnr = 0x40000d90;
+/*rcUpdateRate = 0x40000d94;*/
+rcUpdateTxDone = 0x40000d98;
+rcUpdateTxDoneAmpdu2 = 0x40000d9c;
+rcUpSched = 0x40000da0;
+rssi_margin = 0x40000da4;
+rx11NRate2AMPDULimit = 0x40000da8;
+TRC_AMPDU_PER_DOWN_THRESHOLD = 0x40000dac;
+TRC_AMPDU_PER_UP_THRESHOLD = 0x40000db0;
+trc_calc_duration = 0x40000db4;
+trc_isTxAmpduOperational = 0x40000db8;
+trc_onAmpduOp = 0x40000dbc;
+TRC_PER_IS_GOOD = 0x40000dc0;
+trc_SetTxAmpduState = 0x40000dc4;
+trc_tid_isTxAmpduOperational = 0x40000dc8;
+trcAmpduSetState = 0x40000dcc;
+//wDevCheckBlockError = 0x40000dd0;
+/*wDev_AppendRxBlocks = 0x40000dd4;*/
+wDev_DiscardFrame = 0x40000dd8;
+wDev_GetNoiseFloor = 0x40000ddc;
+wDev_IndicateAmpdu = 0x40000de0;
+//wDev_IndicateFrame = 0x40000de4;
+wdev_mac_reg_load = 0x40000de8;
+wdev_mac_reg_store = 0x40000dec;
+wdev_mac_special_reg_load = 0x40000df0;
+wdev_mac_special_reg_store = 0x40000df4;
+wdev_mac_wakeup = 0x40000df8;
+wdev_mac_sleep = 0x40000dfc;
+hal_mac_is_dma_enable = 0x40000e00;
+//wDev_ProcessFiq = 0x40000e04;
+//wDev_ProcessRxSucData = 0x40000e08;
+//wdevProcessRxSucDataAll = 0x40000e0c;
+wdev_csi_len_align = 0x40000e10;
+ppDequeueTxDone_Locked = 0x40000e14;
+//ppProcTxDone = 0x40000e18;
+//pm_tx_data_done_process = 0x40000e1c;
+config_is_cache_tx_buf_enabled = 0x40000e20;
+//ppMapWaitTxq = 0x40000e24;
+ppProcessWaitingQueue = 0x40000e28;
+ppDisableQueue = 0x40000e2c;
+pm_allow_tx = 0x40000e30;
+//wdev_is_data_in_rxlist = 0x40000e34;
+ppProcTxCallback = 0x40000e38;
+//mac_tx_set_hesig = 0x40000e3c;
+ppCalPreFecPaddingFactor = 0x40000e40;
+//mac_tx_set_tb = 0x40000e44;
+//mac_tx_set_mplen = 0x40000e48;
+hal_get_tsf_timer = 0x40000e4c;
+ppTxPktForceWaked = 0x40000e50;
+lmacProcessLongFrameSuccess = 0x40000e54;
+lmacProcessShortFrameSuccess = 0x40000e58;
+//lmacDiscardFrameExchangeSequence = 0x40000e5c;
+lmacProcessTBSuccess = 0x40000e60;
+/*lmacProcessTxSuccess = 0x40000e64;*/
+lmacProcessAckTimeout = 0x40000e68;
+//lmacProcessTxComplete = 0x40000e6c;
+//ppRemoveHTC = 0x40000e70;
+get_estimated_batime = 0x40000e74;
+is_use_muedca = 0x40000e78;
+//hal_mac_tx_clr_mplen = 0x40000e7c;
+//hal_mac_get_txq_state = 0x40000e80;
+hal_mac_clr_txq_state = 0x40000e84;
+hal_mac_get_txq_complete = 0x40000e88;
+ht_get_min_subframe_len = 0x40000e8c;
+rx11ACRate2AMPDULimit = 0x40000e90;
+pwr_hal_clear_intr_status = 0x40000e94;
+pwr_hal_clear_mac_modem_beacon_miss_intr_filter = 0x40000e98;
+pwr_hal_clear_mac_modem_rx_beacon_info = 0x40000e9c;
+pwr_hal_clear_mac_modem_rx_beacon_miss_counter = 0x40000ea0;
+pwr_hal_clear_mac_modem_rx_beacon_sleep_counter = 0x40000ea4;
+pwr_hal_clear_mac_modem_state_wakeup_protect_signal = 0x40000ea8;
+pwr_hal_get_intr_raw_signal = 0x40000eac;
+pwr_hal_get_intr_status = 0x40000eb0;
+pwr_hal_get_mac_modem_beacon_miss_limit_exceeded_status = 0x40000eb4;
+pwr_hal_get_mac_modem_rx_beacon_location_state = 0x40000eb8;
+pwr_hal_get_mac_modem_rx_beacon_valid_state = 0x40000ebc;
+pwr_hal_get_mac_modem_state_sleep_limit_exceeded_status = 0x40000ec0;
+pwr_hal_set_beacon_filter_abort_disable = 0x40000ec4;
+pwr_hal_set_beacon_filter_abort_enable = 0x40000ec8;
+pwr_hal_set_beacon_filter_abort_length = 0x40000ecc;
+//pwr_hal_set_beacon_filter_broadcast_wakeup_disable = 0x40000ed0;
+//pwr_hal_set_beacon_filter_broadcast_wakeup_enable = 0x40000ed4;
+pwr_hal_set_beacon_filter_disable = 0x40000ed8;
+pwr_hal_set_beacon_filter_enable = 0x40000edc;
+pwr_hal_set_beacon_filter_force_dump_disable = 0x40000ee0;
+pwr_hal_set_beacon_filter_force_dump_enable = 0x40000ee4;
+pwr_hal_set_beacon_filter_force_dump_limit = 0x40000ee8;
+pwr_hal_set_beacon_filter_force_sync_disable = 0x40000eec;
+pwr_hal_set_beacon_filter_force_sync_enable = 0x40000ef0;
+pwr_hal_set_beacon_filter_force_sync_limit = 0x40000ef4;
+pwr_hal_set_beacon_filter_frame_crc_state = 0x40000ef8;
+pwr_hal_set_beacon_filter_soc_wakeup_and_intr_disable = 0x40000efc;
+pwr_hal_set_beacon_filter_soc_wakeup_and_intr_enable = 0x40000f00;
+pwr_hal_set_beacon_filter_unicast_wakeup_disable = 0x40000f04;
+pwr_hal_set_beacon_filter_unicast_wakeup_enable = 0x40000f08;
+pwr_hal_set_lpclk_cycle_time = 0x40000f0c;
+pwr_hal_set_lpclk_sync_disable = 0x40000f10;
+pwr_hal_set_lpclk_sync_enable = 0x40000f14;
+pwr_hal_set_mac_modem_beacon_miss_intr_disable = 0x40000f18;
+pwr_hal_set_mac_modem_beacon_miss_intr_enable = 0x40000f1c;
+pwr_hal_set_mac_modem_beacon_miss_limit = 0x40000f20;
+pwr_hal_set_mac_modem_beacon_miss_limit_exceeded_wakeup_disable = 0x40000f24;
+pwr_hal_set_mac_modem_beacon_miss_limit_exceeded_wakeup_enable = 0x40000f28;
+pwr_hal_set_mac_modem_beacon_miss_timeout = 0x40000f2c;
+pwr_hal_set_mac_modem_state_sleep_limit = 0x40000f30;
+pwr_hal_set_mac_modem_state_sleep_limit_exceeded_wakeup_disable = 0x40000f34;
+pwr_hal_set_mac_modem_state_sleep_limit_exceeded_wakeup_enable = 0x40000f38;
+pwr_hal_set_mac_modem_state_wakeup_protect_disable = 0x40000f3c;
+pwr_hal_set_mac_modem_state_wakeup_protect_early_time = 0x40000f40;
+pwr_hal_set_mac_modem_state_wakeup_protect_enable = 0x40000f44;
+pwr_hal_set_mac_modem_tbtt_auto_period_disable = 0x40000f48;
+pwr_hal_set_mac_modem_tbtt_auto_period_enable = 0x40000f4c;
+pwr_hal_set_mac_modem_tbtt_auto_period_interval = 0x40000f50;
+pwr_hal_set_modem_state_interface = 0x40000f54;
+hal_tsf_clear_soc_wakeup_request = 0x40000f58;
+tsf_hal_clear_mac_modem_rf_power_state = 0x40000f5c;
+tsf_hal_clear_soc_wakeup_request = 0x40000f60;
+tsf_hal_get_counter_value = 0x40000f64;
+tsf_hal_get_mac_modem_rf_power_state = 0x40000f68;
+tsf_hal_get_tbtt_interval = 0x40000f6c;
+tsf_hal_get_time = 0x40000f70;
+tsf_hal_get_timer_target = 0x40000f74;
+tsf_hal_is_tsf_enabled = 0x40000f78;
+tsf_hal_map_tbtt_target_to_rx_frame = 0x40000f7c;
+tsf_hal_map_tsf_to_bssid = 0x40000f80;
+tsf_hal_set_counter_value = 0x40000f84;
+tsf_hal_set_modem_wakeup_early_time = 0x40000f88;
+tsf_hal_set_rx_beacon_abort_tsf_time_deviation_sync_disable = 0x40000f8c;
+tsf_hal_set_rx_beacon_abort_tsf_time_deviation_sync_enable = 0x40000f90;
+tsf_hal_set_rx_beacon_fail_tsf_time_deviation_sync_disable = 0x40000f94;
+tsf_hal_set_rx_beacon_fail_tsf_time_deviation_sync_enable = 0x40000f98;
+tsf_hal_set_rx_beacon_success_tsf_time_deviation_sync_disable = 0x40000f9c;
+tsf_hal_set_rx_beacon_success_tsf_time_deviation_sync_enable = 0x40000fa0;
+tsf_hal_set_tbtt_disable = 0x40000fa4;
+tsf_hal_set_tbtt_early_time = 0x40000fa8;
+tsf_hal_set_tbtt_enable = 0x40000fac;
+tsf_hal_set_tbtt_interval = 0x40000fb0;
+tsf_hal_set_tbtt_intr_disable = 0x40000fb4;
+tsf_hal_set_tbtt_intr_enable = 0x40000fb8;
+tsf_hal_set_tbtt_modem_wakeup_disable = 0x40000fbc;
+tsf_hal_set_tbtt_modem_wakeup_enable = 0x40000fc0;
+tsf_hal_set_tbtt_rf_ctrl_disable = 0x40000fc4;
+tsf_hal_set_tbtt_rf_ctrl_enable = 0x40000fc8;
+tsf_hal_set_tbtt_rf_ctrl_wait_cycles = 0x40000fcc;
+tsf_hal_set_tbtt_soc_wakeup_disable = 0x40000fd0;
+tsf_hal_set_tbtt_soc_wakeup_enable = 0x40000fd4;
+/*tsf_hal_set_tbtt_start_time = 0x40000fd8;*/
+tsf_hal_set_time = 0x40000fdc;
+tsf_hal_set_timer_disable = 0x40000fe0;
+tsf_hal_set_timer_enable = 0x40000fe4;
+tsf_hal_set_timer_intr_disable = 0x40000fe8;
+tsf_hal_set_timer_intr_enable = 0x40000fec;
+tsf_hal_set_timer_modem_wakeup_disable = 0x40000ff0;
+tsf_hal_set_timer_modem_wakeup_enable = 0x40000ff4;
+tsf_hal_set_timer_rf_ctrl_disable = 0x40000ff8;
+tsf_hal_set_timer_rf_ctrl_enable = 0x40000ffc;
+tsf_hal_set_timer_rf_ctrl_wait_cycles = 0x40001000;
+tsf_hal_set_timer_soc_wakeup_disable = 0x40001004;
+tsf_hal_set_timer_soc_wakeup_enable = 0x40001008;
+tsf_hal_set_timer_target = 0x4000100c;
+tsf_hal_set_tsf_disable = 0x40001010;
+tsf_hal_set_tsf_enable = 0x40001014;
+tsf_hal_set_tsf_time_deviation = 0x40001018;
+tsf_hal_set_tsf_time_deviation_sync_disable = 0x4000101c;
+tsf_hal_set_tsf_time_deviation_sync_enable = 0x40001020;
+tsf_hal_unmap_tbtt_target_to_rx_frame = 0x40001024;
+//ppSelectTxFormat = 0x40001028;
+//ppCertSetRate = 0x4000102c;
+//ppHEAMPDU2Normal = 0x40001030;
+//ppCalTxHEAMPDULength = 0x40001034;
+//ppCalTxHESMPDULength = 0x40001038;
+rcGetRate = 0x4000103c;
+rcGetDCMMaxRate = 0x40001040;
+//rcGetSMPDURate = 0x40001044;
+ppDirectRecycleAmpdu = 0x40001048;
+//ppCheckTxHEAMPDUlength = 0x4000104c;
+//rx11AXRate2AMPDULimit = 0x40001050;
+//ppRegressAmpdu = 0x40001054;
+//ppCalDeliNum = 0x40001058;
+ppAdd2AMPDUTail = 0x4000105c;
+esp_test_disable_tx_statistics = 0x40001060;
+esp_test_enable_tx_statistics = 0x40001064;
+esp_test_clr_tx_statistics = 0x40001068;
+esp_test_get_tx_statistics = 0x4000106c;
+esp_test_clr_tx_tb_statistics = 0x40001070;
+esp_test_get_tx_tb_statistics = 0x40001074;
+test_tx_fail_statistics = 0x40001078;
+//test_tx_succ_statistics = 0x4000107c;
+//esp_test_tx_process_complete = 0x40001080;
+//esp_test_tx_process_txq_state = 0x40001084;
+esp_test_tx_enab_statistics = 0x40001088;
+esp_test_tx_tb_complete = 0x4000108c;
+esp_test_tx_count_retry = 0x40001090;
+esp_test_tx_count_collision = 0x40001094;
+esp_test_tx_count_timeout = 0x40001098;
+hal_enable_tx_statistics = 0x4000109c;
+test_rx_process_complete_noeb = 0x400010a0;
+test_rx_process_complete_retry = 0x400010a4;
+esp_test_rx_process_complete = 0x400010a8;
+esp_test_clr_rx_statistics = 0x400010ac;
+esp_test_get_rx_statistics = 0x400010b0;
+test_free_rx_statistics = 0x400010b4;
+esp_test_set_rx_error_occurs = 0x400010b8;
+esp_test_get_rx_error_occurs = 0x400010bc;
+esp_test_clr_rx_error_occurs = 0x400010c0;
+esp_test_disable_rx_statistics = 0x400010c4;
+esp_test_enable_rx_statistics = 0x400010c8;
+hal_enable_rx_statistics = 0x400010cc;
+get_user_num = 0x400010d0;
+mumimo_spatial_cfg_get_nsts = 0x400010d4;
+mumimo_spatial_cfg_get_nsts_tot = 0x400010d8;
+test_mumimo_get_heltf_num = 0x400010dc;
+test_mimo_update_user_info = 0x400010e0;
+test_parse_rx_mu_mimo = 0x400010e4;
+test_nonmimo_update_user_info = 0x400010e8;
+test_parse_rx_mu_nonmimo = 0x400010ec;
+esp_test_rx_parse_mu = 0x400010f0;
+esp_test_get_rx_mu_statistics = 0x400010f4;
+esp_test_clr_rx_mu_statistics = 0x400010f8;
+esp_test_enable_rx_mu_statistics = 0x400010fc;
+esp_test_disable_rx_mu_statistics = 0x40001100;
+/* Data (.data, .bss, .rodata) */
+our_instances_ptr = 0x4004ffe0;
+pTxRx = 0x4087ff80;
+lmacConfMib_ptr = 0x4087ff7c;
+our_wait_eb = 0x4087ff78;
+our_tx_eb = 0x4087ff74;
+pp_wdev_funcs = 0x4087ff70;
+g_osi_funcs_p = 0x4087ff6c;
+wDevCtrl_ptr = 0x4087ff68;
+g_wdev_last_desc_reset_ptr = 0x4004ffdc;
+wDevMacSleep_ptr = 0x4087ff64;
+g_lmac_cnt_ptr = 0x4087ff60;
+our_controls_ptr = 0x4004ffd8;
+pp_sig_cnt_ptr = 0x4087ff5c;
+g_eb_list_desc_ptr = 0x4087ff58;
+s_fragment_ptr = 0x4087ff54;
+if_ctrl_ptr = 0x4087ff50;
+g_intr_lock_mux = 0x4087ff4c;
+g_wifi_global_lock = 0x4087ff48;
+s_wifi_queue = 0x4087ff44;
+pp_task_hdl = 0x4087ff40;
+s_pp_task_create_sem = 0x4087ff3c;
+s_pp_task_del_sem = 0x4087ff38;
+g_wifi_menuconfig_ptr = 0x4087ff34;
+xphyQueue = 0x4087ff30;
+ap_no_lr_ptr = 0x4087ff2c;
+rc11BSchedTbl_ptr = 0x4087ff28;
+rc11NSchedTbl_ptr = 0x4087ff24;
+rcLoRaSchedTbl_ptr = 0x4087ff20;
+BasicOFDMSched_ptr = 0x4087ff1c;
+trc_ctl_ptr = 0x4087ff18;
+g_pm_cnt_ptr = 0x4087ff14;
+g_pm_ptr = 0x4087ff10;
+g_pm_cfg_ptr = 0x4087ff0c;
+g_esp_mesh_quick_funcs_ptr = 0x4087ff08;
+g_txop_queue_status_ptr = 0x4087ff04;
+g_mac_sleep_en_ptr = 0x4087ff00;
+g_mesh_is_root_ptr = 0x4087fefc;
+g_mesh_topology_ptr = 0x4087fef8;
+g_mesh_init_ps_type_ptr = 0x4087fef4;
+g_mesh_is_started_ptr = 0x4087fef0;
+g_config_func = 0x4087feec;
+g_net80211_tx_func = 0x4087fee8;
+g_timer_func = 0x4087fee4;
+s_michael_mic_failure_cb = 0x4087fee0;
+wifi_sta_rx_probe_req = 0x4087fedc;
+g_tx_done_cb_func = 0x4087fed8;
+g_per_conn_trc = 0x4087fe8c;
+s_encap_amsdu_func = 0x4087fe88;
+rx_beacon_count = 0x4087fe84;
+rx_beacon_sw_parse = 0x4087fe80;
+rx_beacon_hw_parse = 0x4087fe7c;
+rx_beacon_tim_count = 0x4087fe78;
+rx_beacon_tim_udata = 0x4087fe74;
+rx_beacon_tim_udata_bitmap = 0x4087fe70;
+rx_beacon_tim_bdata = 0x4087fe6c;
+rx_beacon_tim_bdata_bitmapctl = 0x4087fe68;
+rx_beacon_tim_bdata_bitmap_trans = 0x4087fe64;
+rx_beacon_tim_bdata_bitmap_mbssid_self = 0x4087fe60;
+rx_beacon_tim_bdata_bitmap_mbssid_other = 0x4087fe5c;
+rx_beacon_dtim_tim = 0x4087fe58;
+rx_beacon_dtim_tim_mcast = 0x4087fe54;
+amdpu_delay_time_ms = 0x4087fd08;
+ampdu_delay_packet = 0x4087fd04;
+ampdu_delay = 0x4087fe51;
+first_ampdu = 0x4087fe50;
+s_ht_ampdu_density_us = 0x4087fd02;
+s_ht_ampdu_density = 0x4087fd01;
+s_running_phy_type = 0x4087fd00;
+complete_ena_tb_seqno = 0x4087fe4c;
+complete_ena_tb_final = 0x4087fe48;
+complete_ena_tb_count = 0x4087fe44;
+s_itwt_state = 0x4087fe40;
+g_dbg_interp_tsf = 0x4087fe3c;
+g_dbg_interp_tsf_end = 0x4087fe38;
+g_dbg_closrf_tsf = 0x4087fe34;
+g_dbg_closrf_idx = 0x4087fe30;
+g_dbg_closrf_blk = 0x4087fe2c;
+s_he_min_len_bytes = 0x4087fdf0;
+s_he_dcm_min_len_bytes = 0x4087fdd0;
+s_mplen_low_bitmap = 0x4087fdc0;
+s_mplen_high_bitmap = 0x4087fdb0;
+s_mplen_vi_bitmap = 0x4087fdac;
+s_mplen_bk_bitmap = 0x4087fda8;
+esp_wifi_cert_tx_mcs = 0x4087fcfc;
+esp_wifi_cert_tx_bcc = 0x4087fcf8;
+//esp_wifi_cert_tx_ltf = 0x4087fcf4;
+//esp_wifi_cert_tx_gi = 0x4087fcf0;
+esp_wifi_cert_tx_nss = 0x4087fcec;
+esp_test_tx_statistics_aci_bitmap = 0x4087fda4;
+esp_test_tx_statistics = 0x4087fd94;
+esp_test_tx_tb_statistics = 0x4087fd84;
+esp_test_tx_fail_statistics = 0x4087fd24;
+esp_test_rx_statistics = 0x4087fd1c;
+esp_test_rx_mu_statistics = 0x4087fd18;
+esp_test_mu_print_ru_allocation = 0x4087fd14;
+sigb_ru_allocation_user_num = 0x4004ffc8;
+sigb_common_ru_allocation = 0x4004ff38;
+mu_mimo_special_cfg_user_num_2 = 0x4004fee8;
+mu_mimo_special_cfg_user_num_3 = 0x4004fe80;
+mu_mimo_special_cfg_user_num_4 = 0x4004fe28;
+mu_mimo_special_cfg_user_num_5 = 0x4004fdf0;
+mu_mimo_special_cfg_user_num_6 = 0x4004fdd0;
+mu_mimo_special_cfg_user_num_7 = 0x4004fdc0;
+mu_mimo_special_cfg_user_num_8 = 0x4004fdb8;
+esp_test_rx_error_occurs = 0x4087fd10;
+g_pp_tx_pkt_num = 0x4087fd0c;
+he_max_apep_length = 0x4004fd40;

esp-hal/ld/esp32c6/rom/esp32c6.rom.rvfp.ld

@@ -0,0 +1,118 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32c6.rom.rvfp.ld for esp32c6
+ *
+ *
+ * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group rvfplib
+ ***************************************/
+
+/* Functions */
+__adddf3 = 0x400009f4;
+__addsf3 = 0x400009f8;
+__eqdf2 = 0x400009fc;
+__eqsf2 = 0x40000a00;
+__extendsfdf2 = 0x40000a04;
+__fixdfdi = 0x40000a08;
+__fixdfsi = 0x40000a0c;
+__fixsfdi = 0x40000a10;
+__fixsfsi = 0x40000a14;
+__fixunsdfsi = 0x40000a18;
+__fixunssfdi = 0x40000a1c;
+__fixunssfsi = 0x40000a20;
+__floatdidf = 0x40000a24;
+__floatdisf = 0x40000a28;
+__floatsidf = 0x40000a2c;
+__floatsisf = 0x40000a30;
+__floatundidf = 0x40000a34;
+__floatundisf = 0x40000a38;
+__floatunsidf = 0x40000a3c;
+__floatunsisf = 0x40000a40;
+__gedf2 = 0x40000a44;
+__gesf2 = 0x40000a48;
+__gtdf2 = 0x40000a4c;
+__gtsf2 = 0x40000a50;
+__ledf2 = 0x40000a54;
+__lesf2 = 0x40000a58;
+__ltdf2 = 0x40000a5c;
+__ltsf2 = 0x40000a60;
+__muldf3 = 0x40000a64;
+__mulsf3 = 0x40000a68;
+__nedf2 = 0x40000a6c;
+__nesf2 = 0x40000a70;
+__subdf3 = 0x40000a74;
+__subsf3 = 0x40000a78;
+__truncdfsf2 = 0x40000a7c;
+
+/***************************************
+ Group libgcc
+***************************************/
+
+/* Functions */
+__absvdi2 = 0x40000884;
+__absvsi2 = 0x40000888;
+__addvdi3 = 0x40000894;
+__addvsi3 = 0x40000898;
+__ashldi3 = 0x4000089c;
+__ashrdi3 = 0x400008a0;
+__bswapdi2 = 0x400008a4;
+__bswapsi2 = 0x400008a8;
+__clear_cache = 0x400008ac;
+__clrsbdi2 = 0x400008b0;
+__clrsbsi2 = 0x400008b4;
+__clzdi2 = 0x400008b8;
+__clzsi2 = 0x400008bc;
+__cmpdi2 = 0x400008c0;
+__ctzdi2 = 0x400008c4;
+__ctzsi2 = 0x400008c8;
+__divdc3 = 0x400008cc;
+__divdf3 = 0x400008d0;
+__divdi3 = 0x400008d4;
+__divsc3 = 0x400008d8;
+__divsf3 = 0x400008dc;
+__divsi3 = 0x400008e0;
+__ffsdi2 = 0x400008f0;
+__ffssi2 = 0x400008f4;
+__gcc_bcmp = 0x40000934;
+__lshrdi3 = 0x40000950;
+__moddi3 = 0x4000095c;
+__modsi3 = 0x40000960;
+__muldc3 = 0x40000964;
+__muldi3 = 0x4000096c;
+__mulsc3 = 0x40000970;
+__mulsi3 = 0x40000978;
+__mulvdi3 = 0x4000097c;
+__mulvsi3 = 0x40000980;
+__negdf2 = 0x40000988;
+__negdi2 = 0x4000098c;
+__negsf2 = 0x40000990;
+__negvdi2 = 0x40000994;
+__negvsi2 = 0x40000998;
+__paritysi2 = 0x400009a0;
+__popcountdi2 = 0x400009a4;
+__popcountsi2 = 0x400009a8;
+__powidf2 = 0x400009ac;
+__powisf2 = 0x400009b0;
+__subvdi3 = 0x400009bc;
+__subvsi3 = 0x400009c0;
+__ucmpdi2 = 0x400009c8;
+__udivdi3 = 0x400009cc;
+__udivmoddi4 = 0x400009d0;
+__udivsi3 = 0x400009d4;
+__udiv_w_sdiv = 0x400009d8;
+__umoddi3 = 0x400009dc;
+__umodsi3 = 0x400009e0;
+__unorddf2 = 0x400009e4;
+__unordsf2 = 0x400009e8;
+__extenddftf2 = 0x400009ec;
+__trunctfdf2 = 0x400009f0;

esp-hal/ld/esp32c6/rom/esp32c6.rom.spiflash.ld

@@ -0,0 +1,165 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32c6.rom.spiflash.ld for esp32c6
+ *
+ *
+ * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group spi_flash_cache
+ ***************************************/
+
+/* Functions */
+spi_flash_disable_cache = 0x400001f0;
+spi_flash_restore_cache = 0x400001f4;
+spi_flash_cache_enabled = 0x400001f8;
+esp_enable_cache_flash_wrap = 0x40000200;
+
+
+/***************************************
+ Group spi_flash_mmap
+ ***************************************/
+
+/* Functions */
+spi_flash_mmap_os_func_set = 0x40000204;
+spi_flash_mmap_page_num_init = 0x40000208;
+spi_flash_mmap = 0x4000020c;
+spi_flash_mmap_pages = 0x40000210;
+spi_flash_munmap = 0x40000214;
+spi_flash_mmap_dump = 0x40000218;
+spi_flash_check_and_flush_cache = 0x4000021c;
+spi_flash_mmap_get_free_pages = 0x40000220;
+spi_flash_cache2phys = 0x40000224;
+spi_flash_phys2cache = 0x40000228;
+
+
+/***************************************
+ Group esp_flash
+ ***************************************/
+
+/* Functions */
+esp_flash_chip_driver_initialized = 0x4000022c;
+esp_flash_read_id = 0x40000230;
+esp_flash_get_size = 0x40000234;
+esp_flash_erase_chip = 0x40000238;
+esp_flash_erase_region = 0x4000023c;
+esp_flash_get_chip_write_protect = 0x40000240;
+esp_flash_set_chip_write_protect = 0x40000244;
+esp_flash_get_protectable_regions = 0x40000248;
+esp_flash_get_protected_region = 0x4000024c;
+esp_flash_set_protected_region = 0x40000250;
+esp_flash_read = 0x40000254;
+esp_flash_write = 0x40000258;
+esp_flash_write_encrypted = 0x4000025c;
+esp_flash_read_encrypted = 0x40000260;
+esp_flash_get_io_mode = 0x40000264;
+esp_flash_set_io_mode = 0x40000268;
+spi_flash_boot_attach = 0x4000026c;
+esp_flash_read_chip_id = 0x40000270;
+detect_spi_flash_chip = 0x40000274;
+/* esp_rom_spiflash_write_disable = 0x40000278; */
+esp_flash_suspend_cmd_init = 0x4000027c;
+/* Data (.data, .bss, .rodata) */
+esp_flash_default_chip = 0x4087ffe8;
+esp_flash_api_funcs = 0x4087ffe4;
+
+
+/***************************************
+ Group spi_flash_chips
+ ***************************************/
+
+/* Functions */
+spi_flash_chip_generic_probe = 0x40000280;
+spi_flash_chip_generic_detect_size = 0x40000284;
+spi_flash_chip_generic_write = 0x40000288;
+spi_flash_chip_generic_write_encrypted = 0x4000028c;
+spi_flash_chip_generic_set_write_protect = 0x40000290;
+spi_flash_common_write_status_16b_wrsr = 0x40000294;
+spi_flash_chip_generic_reset = 0x40000298;
+spi_flash_chip_generic_erase_chip = 0x4000029c;
+spi_flash_chip_generic_erase_sector = 0x400002a0;
+spi_flash_chip_generic_erase_block = 0x400002a4;
+spi_flash_chip_generic_page_program = 0x400002a8;
+spi_flash_chip_generic_get_write_protect = 0x400002ac;
+spi_flash_common_read_status_16b_rdsr_rdsr2 = 0x400002b0;
+spi_flash_chip_generic_read_reg = 0x400002b4;
+spi_flash_chip_generic_yield = 0x400002b8;
+spi_flash_generic_wait_host_idle = 0x400002bc;
+spi_flash_chip_generic_wait_idle = 0x400002c0;
+spi_flash_chip_generic_config_host_io_mode = 0x400002c4;
+spi_flash_chip_generic_read = 0x400002c8;
+spi_flash_common_read_status_8b_rdsr2 = 0x400002cc;
+spi_flash_chip_generic_get_io_mode = 0x400002d0;
+spi_flash_common_read_status_8b_rdsr = 0x400002d4;
+spi_flash_common_write_status_8b_wrsr = 0x400002d8;
+spi_flash_common_write_status_8b_wrsr2 = 0x400002dc;
+spi_flash_common_set_io_mode = 0x400002e0;
+spi_flash_chip_generic_set_io_mode = 0x400002e4;
+spi_flash_chip_generic_read_unique_id = 0x400002e8;
+spi_flash_chip_generic_get_caps = 0x400002ec;
+spi_flash_chip_generic_suspend_cmd_conf = 0x400002f0;
+spi_flash_chip_gd_get_io_mode = 0x400002f4;
+spi_flash_chip_gd_probe = 0x400002f8;
+spi_flash_chip_gd_set_io_mode = 0x400002fc;
+/* Data (.data, .bss, .rodata) */
+spi_flash_chip_generic_config_data = 0x4087ffe0;
+spi_flash_encryption = 0x4087ffdc;
+
+
+/***************************************
+ Group memspi_host
+ ***************************************/
+
+/* Functions */
+memspi_host_read_id_hs = 0x40000300;
+memspi_host_read_status_hs = 0x40000304;
+memspi_host_flush_cache = 0x40000308;
+memspi_host_erase_chip = 0x4000030c;
+memspi_host_erase_sector = 0x40000310;
+memspi_host_erase_block = 0x40000314;
+memspi_host_program_page = 0x40000318;
+memspi_host_read = 0x4000031c;
+memspi_host_set_write_protect = 0x40000320;
+memspi_host_set_max_read_len = 0x40000324;
+memspi_host_read_data_slicer = 0x40000328;
+memspi_host_write_data_slicer = 0x4000032c;
+
+
+/***************************************
+ Group hal_spiflash
+ ***************************************/
+
+/* Functions */
+spi_flash_hal_poll_cmd_done = 0x40000330;
+spi_flash_hal_device_config = 0x40000334;
+spi_flash_hal_configure_host_io_mode = 0x40000338;
+spi_flash_hal_common_command = 0x4000033c;
+spi_flash_hal_read = 0x40000340;
+spi_flash_hal_erase_chip = 0x40000344;
+spi_flash_hal_erase_sector = 0x40000348;
+spi_flash_hal_erase_block = 0x4000034c;
+spi_flash_hal_program_page = 0x40000350;
+spi_flash_hal_set_write_protect = 0x40000354;
+spi_flash_hal_host_idle = 0x40000358;
+spi_flash_hal_check_status = 0x4000035c;
+spi_flash_hal_setup_read_suspend = 0x40000360;
+spi_flash_hal_setup_auto_suspend_mode = 0x40000364;
+spi_flash_hal_setup_auto_resume_mode = 0x40000368;
+spi_flash_hal_disable_auto_suspend_mode = 0x4000036c;
+spi_flash_hal_disable_auto_resume_mode = 0x40000370;
+spi_flash_hal_resume = 0x40000374;
+spi_flash_hal_suspend = 0x40000378;
+spi_flash_encryption_hal_enable = 0x4000037c;
+spi_flash_encryption_hal_disable = 0x40000380;
+spi_flash_encryption_hal_prepare = 0x40000384;
+spi_flash_encryption_hal_done = 0x40000388;
+spi_flash_encryption_hal_destroy = 0x4000038c;
+spi_flash_encryption_hal_check = 0x40000390;

esp-hal/ld/esp32c6/rom/esp32c6.rom.version.ld

@@ -0,0 +1,13 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM version variables for esp32c6
+ *
+ * These addresses should be compatible with any ROM version for this chip.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+_rom_chip_id = 0x40000010;
+_rom_eco_version = 0x40000014;

esp-hal/ld/esp32h2/esp32h2.x

@@ -65,10 +65,10 @@ SECTIONS {
 INSERT BEFORE .rodata;
 
 /* Shared sections - ordering matters */
-INCLUDE "text.x"
 INCLUDE "rwtext.x"
-INCLUDE "rodata.x"
+INCLUDE "text.x"
 INCLUDE "rwdata.x"
+INCLUDE "rodata.x"
 INCLUDE "rtc_fast.x"
 INCLUDE "stack.x"
 INCLUDE "dram2.x"

esp-hal/ld/esp32h2/rom-functions.x

@@ -1,27 +1,8 @@
-ets_printf = 0x40000028;
-PROVIDE(esp_rom_printf = ets_printf);
-PROVIDE(cache_invalidate_icache_all = 0x40000620);
-PROVIDE(cache_suspend_icache = 0x4000066c);
-PROVIDE(cache_resume_icache = 0x40000670);
-PROVIDE(ets_delay_us = 0x40000040);
-PROVIDE(ets_update_cpu_frequency_rom = 0x40000048);
-PROVIDE(rtc_get_reset_reason = 0x40000018);
-ets_update_cpu_frequency = 0x40000048;
-PROVIDE(software_reset = 0x40000090);
-PROVIDE(software_reset_cpu = 0x40000094);
+INCLUDE "rom/esp32h2.rom.api.ld"
+INCLUDE "rom/esp32h2.rom.heap.ld"
+INCLUDE "rom/esp32h2.rom.ld"
+INCLUDE "rom/esp32h2.rom.libgcc.ld"
+INCLUDE "rom/esp32h2.rom.spiflash.ld"
+INCLUDE "rom/esp32h2.rom.version.ld"
 
-PROVIDE(esp_rom_crc32_be = 0x40000730);
-PROVIDE(esp_rom_crc16_be = 0x40000734);
-PROVIDE(esp_rom_crc8_be = 0x40000738);
-PROVIDE(esp_rom_crc32_le = 0x40000724);
-PROVIDE(esp_rom_crc16_le = 0x40000728);
-PROVIDE(esp_rom_crc8_le = 0x4000072c);
-
-PROVIDE(esp_rom_md5_init = 0x40000718);
-PROVIDE(esp_rom_md5_update = 0x4000071c);
-PROVIDE(esp_rom_md5_final = 0x40000720);
-
-memset = 0x400004a0;
-memcpy = 0x400004a4;
-memmove = 0x400004a8;
-memcmp = 0x400004ac;
+INCLUDE "rom/additional.ld"

esp-hal/ld/esp32h2/rom/additional.ld

@@ -0,0 +1,19 @@
+memset = 0x400004a0;
+memcpy = 0x400004a4;
+memmove = 0x400004a8;
+memcmp = 0x400004ac;
+
+strncmp = 0x400004bc;
+strncpy = 0x400004b4;
+strcpy = 0x400004b0;
+
+abs = 0x40000570;
+
+PROVIDE( strcat = 0x40000524 );
+PROVIDE( strcmp = 0x400004b8 );
+PROVIDE( strchr = 0x4000052c );
+PROVIDE( strlcpy = 0x4000053c );
+PROVIDE( strstr = 0x400004c4 );
+PROVIDE( strcasecmp = 0x4000051c );
+
+PROVIDE( memchr = 0x40000514 );

esp-hal/ld/esp32h2/rom/esp32h2.rom.api.ld

@@ -0,0 +1,65 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/** ROM APIs
+ */
+
+PROVIDE ( esp_rom_crc32_le = crc32_le );
+PROVIDE ( esp_rom_crc16_le = crc16_le );
+PROVIDE ( esp_rom_crc8_le  = crc8_le );
+PROVIDE ( esp_rom_crc32_be = crc32_be );
+PROVIDE ( esp_rom_crc16_be = crc16_be );
+PROVIDE ( esp_rom_crc8_be  = crc8_be );
+
+PROVIDE ( esp_rom_gpio_pad_select_gpio    = gpio_pad_select_gpio );
+PROVIDE ( esp_rom_gpio_pad_pullup_only    = gpio_pad_pullup );
+PROVIDE ( esp_rom_gpio_pad_set_drv        = gpio_pad_set_drv );
+PROVIDE ( esp_rom_gpio_pad_unhold         = gpio_pad_unhold );
+PROVIDE ( esp_rom_gpio_connect_in_signal  = gpio_matrix_in );
+PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
+
+PROVIDE ( esp_rom_efuse_mac_address_crc8       = esp_crc8 );
+PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
+
+PROVIDE ( esp_rom_uart_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_uart_tx_one_char    = uart_tx_one_char2 );
+PROVIDE ( esp_rom_uart_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
+PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
+
+PROVIDE ( esp_rom_output_flush_tx       = uart_tx_flush );
+PROVIDE ( esp_rom_output_tx_one_char    = uart_tx_one_char );
+PROVIDE ( esp_rom_output_tx_wait_idle   = uart_tx_wait_idle );
+PROVIDE ( esp_rom_output_rx_one_char    = uart_rx_one_char );
+PROVIDE ( esp_rom_output_rx_string      = UartRxString );
+PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_output_putc           = ets_write_char_uart );
+
+PROVIDE ( esp_rom_md5_init   = MD5Init );
+PROVIDE ( esp_rom_md5_update = MD5Update );
+PROVIDE ( esp_rom_md5_final  = MD5Final );
+
+PROVIDE ( esp_rom_software_reset_system   = software_reset );
+PROVIDE ( esp_rom_software_reset_cpu   = software_reset_cpu );
+
+PROVIDE ( esp_rom_printf   = ets_printf );
+PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
+PROVIDE ( esp_rom_delay_us = ets_delay_us );
+PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
+PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
+PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
+PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
+
+PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach );
+PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
+PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable );
+PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
+
+PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
+PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
+PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
+PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );

esp-hal/ld/esp32h2/rom/esp32h2.rom.heap.ld

@@ -0,0 +1,80 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32h2.rom.heap.ld for esp32h2
+ *
+ *
+ * Generated from ./target/esp32h2/interface-esp32h2.yml md5sum c0ad4e113e5b29bb9d799f10f03edbc1
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group heap
+ ***************************************/
+
+/* Functions */
+tlsf_create = 0x400003f4;
+tlsf_create_with_pool = 0x400003f8;
+tlsf_get_pool = 0x400003fc;
+tlsf_add_pool = 0x40000400;
+tlsf_remove_pool = 0x40000404;
+tlsf_malloc = 0x40000408;
+tlsf_memalign = 0x4000040c;
+tlsf_memalign_offs = 0x40000410;
+tlsf_realloc = 0x40000414;
+tlsf_free = 0x40000418;
+tlsf_block_size = 0x4000041c;
+tlsf_size = 0x40000420;
+tlsf_align_size = 0x40000424;
+tlsf_block_size_min = 0x40000428;
+tlsf_block_size_max = 0x4000042c;
+tlsf_pool_overhead = 0x40000430;
+tlsf_alloc_overhead = 0x40000434;
+tlsf_walk_pool = 0x40000438;
+tlsf_check = 0x4000043c;
+tlsf_poison_fill_pfunc_set = 0x40000444;
+tlsf_poison_check_pfunc_set = 0x40000448;
+multi_heap_get_block_address_impl = 0x4000044c;
+multi_heap_get_allocated_size_impl = 0x40000450;
+multi_heap_register_impl = 0x40000454;
+multi_heap_set_lock = 0x40000458;
+multi_heap_os_funcs_init = 0x4000045c;
+multi_heap_internal_lock = 0x40000460;
+multi_heap_internal_unlock = 0x40000464;
+multi_heap_get_first_block = 0x40000468;
+multi_heap_get_next_block = 0x4000046c;
+multi_heap_is_free = 0x40000470;
+multi_heap_malloc_impl = 0x40000474;
+multi_heap_free_impl = 0x40000478;
+multi_heap_realloc_impl = 0x4000047c;
+multi_heap_aligned_alloc_impl_offs = 0x40000480;
+multi_heap_aligned_alloc_impl = 0x40000484;
+multi_heap_check = 0x40000488;
+multi_heap_dump = 0x4000048c;
+multi_heap_free_size_impl = 0x40000490;
+multi_heap_minimum_free_size_impl = 0x40000494;
+multi_heap_get_info_impl = 0x40000498;
+/* Data (.data, .bss, .rodata) */
+heap_tlsf_table_ptr = 0x4084ffd8;
+
+PROVIDE (multi_heap_malloc = multi_heap_malloc_impl);
+PROVIDE (multi_heap_free = multi_heap_free_impl);
+PROVIDE (multi_heap_realloc = multi_heap_realloc_impl);
+PROVIDE (multi_heap_get_allocated_size = multi_heap_get_allocated_size_impl);
+PROVIDE (multi_heap_register = multi_heap_register_impl);
+PROVIDE (multi_heap_get_info = multi_heap_get_info_impl);
+PROVIDE (multi_heap_free_size = multi_heap_free_size_impl);
+PROVIDE (multi_heap_minimum_free_size = multi_heap_minimum_free_size_impl);
+PROVIDE (multi_heap_get_block_address = multi_heap_get_block_address_impl);
+PROVIDE (multi_heap_aligned_alloc = multi_heap_aligned_alloc_impl);
+PROVIDE (multi_heap_aligned_free = multi_heap_aligned_free_impl);
+PROVIDE (multi_heap_check = multi_heap_check);
+PROVIDE (multi_heap_set_lock = multi_heap_set_lock);
+PROVIDE (multi_heap_os_funcs_init = multi_heap_mutex_init);
+PROVIDE (multi_heap_internal_lock = multi_heap_internal_lock);
+PROVIDE (multi_heap_internal_unlock = multi_heap_internal_unlock);

esp-hal/ld/esp32h2/rom/esp32h2.rom.ld

@@ -0,0 +1,379 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32h2.rom.ld for esp32h2
+ *
+ *
+ * Generated from ./target/esp32h2/interface-esp32h2.yml md5sum c0ad4e113e5b29bb9d799f10f03edbc1
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group common
+ ***************************************/
+
+/* Functions */
+rtc_get_reset_reason = 0x40000018;
+analog_super_wdt_reset_happened = 0x4000001c;
+rtc_get_wakeup_cause = 0x40000020;
+rtc_unhold_all_pads = 0x40000024;
+ets_printf = 0x40000028;
+ets_install_putc1 = 0x4000002c;
+ets_install_putc2 = 0x40000030;
+ets_install_uart_printf = 0x40000034;
+ets_install_usb_printf = 0x40000038;
+ets_get_printf_channel = 0x4000003c;
+ets_delay_us = 0x40000040;
+ets_get_cpu_frequency = 0x40000044;
+ets_update_cpu_frequency = 0x40000048;
+ets_install_lock = 0x4000004c;
+UartRxString = 0x40000050;
+UartGetCmdLn = 0x40000054;
+uart_tx_one_char = 0x40000058;
+uart_tx_one_char2 = 0x4000005c;
+uart_rx_one_char = 0x40000060;
+uart_rx_one_char_block = 0x40000064;
+uart_rx_intr_handler = 0x40000068;
+uart_rx_readbuff = 0x4000006c;
+uartAttach = 0x40000070;
+uart_tx_flush = 0x40000074;
+uart_tx_wait_idle = 0x40000078;
+uart_div_modify = 0x4000007c;
+ets_write_char_uart = 0x40000080;
+uart_tx_switch = 0x40000084;
+roundup2 = 0x40000088;
+multofup = 0x4000008c;
+software_reset = 0x40000090;
+software_reset_cpu = 0x40000094;
+ets_clk_assist_debug_clock_enable = 0x40000098;
+clear_super_wdt_reset_flag = 0x4000009c;
+disable_default_watchdog = 0x400000a0;
+esp_rom_set_rtc_wake_addr = 0x400000a4;
+esp_rom_get_rtc_wake_addr = 0x400000a8;
+send_packet = 0x400000ac;
+recv_packet = 0x400000b0;
+GetUartDevice = 0x400000b4;
+UartDwnLdProc = 0x400000b8;
+GetSecurityInfoProc = 0x400000bc;
+Uart_Init = 0x400000c0;
+ets_set_user_start = 0x400000c4;
+/* Data (.data, .bss, .rodata) */
+ets_rom_layout_p = 0x4001fffc;
+ets_ops_table_ptr = 0x4084fff8;
+g_saved_pc = 0x4084fffc;
+
+
+/***************************************
+ Group miniz
+ ***************************************/
+
+/* Functions */
+mz_adler32 = 0x400000c8;
+mz_free = 0x400000cc;
+tdefl_compress = 0x400000d0;
+tdefl_compress_buffer = 0x400000d4;
+tdefl_compress_mem_to_heap = 0x400000d8;
+tdefl_compress_mem_to_mem = 0x400000dc;
+tdefl_compress_mem_to_output = 0x400000e0;
+tdefl_get_adler32 = 0x400000e4;
+tdefl_get_prev_return_status = 0x400000e8;
+tdefl_init = 0x400000ec;
+tdefl_write_image_to_png_file_in_memory = 0x400000f0;
+tdefl_write_image_to_png_file_in_memory_ex = 0x400000f4;
+tinfl_decompress = 0x400000f8;
+tinfl_decompress_mem_to_callback = 0x400000fc;
+tinfl_decompress_mem_to_heap = 0x40000100;
+tinfl_decompress_mem_to_mem = 0x40000104;
+
+
+/***************************************
+ Group spiflash_legacy
+ ***************************************/
+
+/* Functions */
+esp_rom_spiflash_wait_idle = 0x40000108;
+esp_rom_spiflash_write_encrypted = 0x4000010c;
+esp_rom_spiflash_write_encrypted_dest = 0x40000110;
+esp_rom_spiflash_write_encrypted_enable = 0x40000114;
+esp_rom_spiflash_write_encrypted_disable = 0x40000118;
+esp_rom_spiflash_erase_chip = 0x4000011c;
+_esp_rom_spiflash_erase_sector = 0x40000120;
+_esp_rom_spiflash_erase_block = 0x40000124;
+_esp_rom_spiflash_write = 0x40000128;
+_esp_rom_spiflash_read = 0x4000012c;
+_esp_rom_spiflash_unlock = 0x40000130;
+_SPIEraseArea = 0x40000134;
+_SPI_write_enable = 0x40000138;
+esp_rom_spiflash_erase_sector = 0x4000013c;
+esp_rom_spiflash_erase_block = 0x40000140;
+esp_rom_spiflash_write = 0x40000144;
+esp_rom_spiflash_read = 0x40000148;
+esp_rom_spiflash_unlock = 0x4000014c;
+SPIEraseArea = 0x40000150;
+SPI_write_enable = 0x40000154;
+esp_rom_spiflash_config_param = 0x40000158;
+esp_rom_spiflash_read_user_cmd = 0x4000015c;
+esp_rom_spiflash_select_qio_pins = 0x40000160;
+esp_rom_spi_flash_auto_sus_res = 0x40000164;
+esp_rom_spi_flash_send_resume = 0x40000168;
+esp_rom_spi_flash_update_id = 0x4000016c;
+esp_rom_spiflash_config_clk = 0x40000170;
+esp_rom_spiflash_config_readmode = 0x40000174;
+esp_rom_spiflash_read_status = 0x40000178;
+esp_rom_spiflash_read_statushigh = 0x4000017c;
+esp_rom_spiflash_write_status = 0x40000180;
+spi_cache_mode_switch = 0x40000184;
+spi_common_set_dummy_output = 0x40000188;
+spi_common_set_flash_cs_timing = 0x4000018c;
+esp_rom_spi_set_address_bit_len = 0x40000190;
+SPILock = 0x40000194;
+SPIMasterReadModeCnfig = 0x40000198;
+SPI_Common_Command = 0x4000019c;
+SPI_WakeUp = 0x400001a0;
+SPI_block_erase = 0x400001a4;
+SPI_chip_erase = 0x400001a8;
+SPI_init = 0x400001ac;
+SPI_page_program = 0x400001b0;
+SPI_read_data = 0x400001b4;
+SPI_sector_erase = 0x400001b8;
+SelectSpiFunction = 0x400001bc;
+SetSpiDrvs = 0x400001c0;
+Wait_SPI_Idle = 0x400001c4;
+spi_dummy_len_fix = 0x400001c8;
+Disable_QMode = 0x400001cc;
+Enable_QMode = 0x400001d0;
+spi_flash_attach = 0x400001d4;
+spi_flash_get_chip_size = 0x400001d8;
+spi_flash_guard_set = 0x400001dc;
+spi_flash_guard_get = 0x400001e0;
+spi_flash_read_encrypted = 0x400001e4;
+/* Data (.data, .bss, .rodata) */
+rom_spiflash_legacy_funcs = 0x4084fff0;
+rom_spiflash_legacy_data = 0x4084ffec;
+g_flash_guard_ops = 0x4084fff4;
+
+/* Note: esp_rom_spiflash_write_disable was moved from esp32c6.rom.spiflash.ld */
+esp_rom_spiflash_write_disable = 0x40000270;
+
+/***************************************
+ Group cache
+ ***************************************/
+
+/* Functions */
+Cache_Get_ICache_Line_Size = 0x400005fc;
+Cache_Get_Mode = 0x40000600;
+Cache_Address_Through_Cache = 0x40000604;
+ROM_Boot_Cache_Init = 0x40000608;
+MMU_Set_Page_Mode = 0x4000060c;
+MMU_Get_Page_Mode = 0x40000610;
+Cache_Invalidate_ICache_Items = 0x40000614;
+Cache_Op_Addr = 0x40000618;
+Cache_Invalidate_Addr = 0x4000061c;
+Cache_Invalidate_ICache_All = 0x40000620;
+Cache_Mask_All = 0x40000624;
+Cache_UnMask_Dram0 = 0x40000628;
+Cache_Suspend_ICache_Autoload = 0x4000062c;
+Cache_Resume_ICache_Autoload = 0x40000630;
+Cache_Start_ICache_Preload = 0x40000634;
+Cache_ICache_Preload_Done = 0x40000638;
+Cache_End_ICache_Preload = 0x4000063c;
+Cache_Config_ICache_Autoload = 0x40000640;
+Cache_Enable_ICache_Autoload = 0x40000644;
+Cache_Disable_ICache_Autoload = 0x40000648;
+Cache_Enable_ICache_PreLock = 0x4000064c;
+Cache_Disable_ICache_PreLock = 0x40000650;
+Cache_Lock_ICache_Items = 0x40000654;
+Cache_Unlock_ICache_Items = 0x40000658;
+Cache_Lock_Addr = 0x4000065c;
+Cache_Unlock_Addr = 0x40000660;
+Cache_Disable_ICache = 0x40000664;
+Cache_Enable_ICache = 0x40000668;
+Cache_Suspend_ICache = 0x4000066c;
+Cache_Resume_ICache = 0x40000670;
+Cache_Freeze_ICache_Enable = 0x40000674;
+Cache_Freeze_ICache_Disable = 0x40000678;
+Cache_Set_IDROM_MMU_Size = 0x4000067c;
+Cache_Get_IROM_MMU_End = 0x40000680;
+Cache_Get_DROM_MMU_End = 0x40000684;
+Cache_MMU_Init = 0x40000688;
+Cache_MSPI_MMU_Set = 0x4000068c;
+Cache_Travel_Tag_Memory = 0x40000690;
+Cache_Get_Virtual_Addr = 0x40000694;
+/* Data (.data, .bss, .rodata) */
+rom_cache_op_cb = 0x4084ffcc;
+rom_cache_internal_table_ptr = 0x4084ffc8;
+
+
+/***************************************
+ Group clock
+ ***************************************/
+
+/* Functions */
+ets_clk_get_xtal_freq = 0x40000698;
+ets_clk_get_cpu_freq = 0x4000069c;
+
+
+/***************************************
+ Group gpio
+ ***************************************/
+
+/* Functions */
+gpio_input_get = 0x400006a0;
+gpio_matrix_in = 0x400006a4;
+gpio_matrix_out = 0x400006a8;
+gpio_output_disable = 0x400006ac;
+gpio_output_enable = 0x400006b0;
+gpio_output_set = 0x400006b4;
+gpio_pad_hold = 0x400006b8;
+gpio_pad_input_disable = 0x400006bc;
+gpio_pad_input_enable = 0x400006c0;
+gpio_pad_pulldown = 0x400006c4;
+gpio_pad_pullup = 0x400006c8;
+gpio_pad_select_gpio = 0x400006cc;
+gpio_pad_set_drv = 0x400006d0;
+gpio_pad_unhold = 0x400006d4;
+gpio_pin_wakeup_disable = 0x400006d8;
+gpio_pin_wakeup_enable = 0x400006dc;
+gpio_bypass_matrix_in = 0x400006e0;
+
+
+/***************************************
+ Group interrupts
+ ***************************************/
+
+/* Functions */
+esprv_intc_int_set_priority = 0x400006e4;
+esprv_intc_int_set_threshold = 0x400006e8;
+esprv_intc_int_enable = 0x400006ec;
+esprv_intc_int_disable = 0x400006f0;
+esprv_intc_int_set_type = 0x400006f4;
+PROVIDE( intr_handler_set = 0x400006f8 );
+intr_matrix_set = 0x400006fc;
+ets_intr_lock = 0x40000700;
+ets_intr_unlock = 0x40000704;
+ets_isr_attach = 0x40000708;
+ets_isr_mask = 0x4000070c;
+ets_isr_unmask = 0x40000710;
+
+
+/***************************************
+ Group crypto
+ ***************************************/
+
+/* Functions */
+md5_vector = 0x40000714;
+MD5Init = 0x40000718;
+MD5Update = 0x4000071c;
+MD5Final = 0x40000720;
+crc32_le = 0x40000724;
+crc16_le = 0x40000728;
+crc8_le = 0x4000072c;
+crc32_be = 0x40000730;
+crc16_be = 0x40000734;
+crc8_be = 0x40000738;
+esp_crc8 = 0x4000073c;
+ets_sha_enable = 0x40000740;
+ets_sha_disable = 0x40000744;
+ets_sha_get_state = 0x40000748;
+ets_sha_init = 0x4000074c;
+ets_sha_process = 0x40000750;
+ets_sha_starts = 0x40000754;
+ets_sha_update = 0x40000758;
+ets_sha_finish = 0x4000075c;
+ets_sha_clone = 0x40000760;
+ets_hmac_enable = 0x40000764;
+ets_hmac_disable = 0x40000768;
+ets_hmac_calculate_message = 0x4000076c;
+ets_hmac_calculate_downstream = 0x40000770;
+ets_hmac_invalidate_downstream = 0x40000774;
+ets_jtag_enable_temporarily = 0x40000778;
+ets_aes_enable = 0x4000077c;
+ets_aes_disable = 0x40000780;
+ets_aes_setkey = 0x40000784;
+ets_aes_block = 0x40000788;
+ets_aes_setkey_dec = 0x4000078c;
+ets_aes_setkey_enc = 0x40000790;
+ets_bigint_enable = 0x40000794;
+ets_bigint_disable = 0x40000798;
+ets_bigint_multiply = 0x4000079c;
+ets_bigint_modmult = 0x400007a0;
+ets_bigint_modexp = 0x400007a4;
+ets_bigint_wait_finish = 0x400007a8;
+ets_bigint_getz = 0x400007ac;
+ets_ds_enable = 0x400007b0;
+ets_ds_disable = 0x400007b4;
+ets_ds_start_sign = 0x400007b8;
+ets_ds_is_busy = 0x400007bc;
+ets_ds_finish_sign = 0x400007c0;
+ets_ds_encrypt_params = 0x400007c4;
+ets_mgf1_sha256 = 0x400007c8;
+/* Data (.data, .bss, .rodata) */
+crc32_le_table_ptr = 0x4001fff8;
+crc16_le_table_ptr = 0x4001fff4;
+crc8_le_table_ptr = 0x4001fff0;
+crc32_be_table_ptr = 0x4001ffec;
+crc16_be_table_ptr = 0x4001ffe8;
+crc8_be_table_ptr = 0x4001ffe4;
+
+
+/***************************************
+ Group efuse
+ ***************************************/
+
+/* Functions */
+ets_efuse_read = 0x400007cc;
+ets_efuse_program = 0x400007d0;
+ets_efuse_clear_program_registers = 0x400007d4;
+ets_efuse_write_key = 0x400007d8;
+ets_efuse_get_read_register_address = 0x400007dc;
+ets_efuse_get_key_purpose = 0x400007e0;
+ets_efuse_key_block_unused = 0x400007e4;
+ets_efuse_find_unused_key_block = 0x400007e8;
+ets_efuse_rs_calculate = 0x400007ec;
+ets_efuse_count_unused_key_blocks = 0x400007f0;
+ets_efuse_secure_boot_enabled = 0x400007f4;
+ets_efuse_secure_boot_aggressive_revoke_enabled = 0x400007f8;
+ets_efuse_cache_encryption_enabled = 0x400007fc;
+ets_efuse_download_modes_disabled = 0x40000800;
+ets_efuse_find_purpose = 0x40000804;
+ets_efuse_force_send_resume = 0x40000808;
+ets_efuse_get_flash_delay_us = 0x4000080c;
+ets_efuse_get_mac = 0x40000810;
+ets_efuse_get_uart_print_control = 0x40000814;
+ets_efuse_direct_boot_mode_disabled = 0x40000818;
+ets_efuse_security_download_modes_enabled = 0x4000081c;
+ets_efuse_jtag_disabled = 0x40000820;
+ets_efuse_usb_print_is_disabled = 0x40000824;
+ets_efuse_usb_download_mode_disabled = 0x40000828;
+ets_efuse_usb_device_disabled = 0x4000082c;
+ets_efuse_secure_boot_fast_wake_enabled = 0x40000830;
+
+
+/***************************************
+ Group secureboot
+ ***************************************/
+
+/* Functions */
+ets_emsa_pss_verify = 0x40000834;
+ets_rsa_pss_verify = 0x40000838;
+ets_ecdsa_verify = 0x4000083c;
+ets_secure_boot_verify_bootloader_with_keys = 0x40000840;
+ets_secure_boot_verify_signature = 0x40000844;
+ets_secure_boot_read_key_digests = 0x40000848;
+ets_secure_boot_revoke_public_key_digest = 0x4000084c;
+
+
+/***************************************
+ Group usb_device_uart
+ ***************************************/
+
+/* Functions */
+usb_serial_device_rx_one_char = 0x400009c0;
+usb_serial_device_rx_one_char_block = 0x400009c4;
+usb_serial_device_tx_flush = 0x400009c8;
+usb_serial_device_tx_one_char = 0x400009cc;

esp-hal/ld/esp32h2/rom/esp32h2.rom.libgcc.ld

@@ -0,0 +1,112 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32h2.rom.libgcc.ld for esp32h2
+ *
+ *
+ * Generated from ./target/esp32h2/interface-esp32h2.yml md5sum c0ad4e113e5b29bb9d799f10f03edbc1
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group libgcc
+ ***************************************/
+
+/* Functions */
+__absvdi2 = 0x40000850;
+__absvsi2 = 0x40000854;
+__adddf3 = 0x40000858;
+__addsf3 = 0x4000085c;
+__addvdi3 = 0x40000860;
+__addvsi3 = 0x40000864;
+__ashldi3 = 0x40000868;
+__ashrdi3 = 0x4000086c;
+__bswapdi2 = 0x40000870;
+__bswapsi2 = 0x40000874;
+__clear_cache = 0x40000878;
+__clrsbdi2 = 0x4000087c;
+__clrsbsi2 = 0x40000880;
+__clzdi2 = 0x40000884;
+__clzsi2 = 0x40000888;
+__cmpdi2 = 0x4000088c;
+__ctzdi2 = 0x40000890;
+__ctzsi2 = 0x40000894;
+__divdc3 = 0x40000898;
+__divdf3 = 0x4000089c;
+__divdi3 = 0x400008a0;
+__divsc3 = 0x400008a4;
+__divsf3 = 0x400008a8;
+__divsi3 = 0x400008ac;
+__eqdf2 = 0x400008b0;
+__eqsf2 = 0x400008b4;
+__extendsfdf2 = 0x400008b8;
+__ffsdi2 = 0x400008bc;
+__ffssi2 = 0x400008c0;
+__fixdfdi = 0x400008c4;
+__fixdfsi = 0x400008c8;
+__fixsfdi = 0x400008cc;
+__fixsfsi = 0x400008d0;
+__fixunsdfsi = 0x400008d4;
+__fixunssfdi = 0x400008d8;
+__fixunssfsi = 0x400008dc;
+__floatdidf = 0x400008e0;
+__floatdisf = 0x400008e4;
+__floatsidf = 0x400008e8;
+__floatsisf = 0x400008ec;
+__floatundidf = 0x400008f0;
+__floatundisf = 0x400008f4;
+__floatunsidf = 0x400008f8;
+__floatunsisf = 0x400008fc;
+__gcc_bcmp = 0x40000900;
+__gedf2 = 0x40000904;
+__gesf2 = 0x40000908;
+__gtdf2 = 0x4000090c;
+__gtsf2 = 0x40000910;
+__ledf2 = 0x40000914;
+__lesf2 = 0x40000918;
+__lshrdi3 = 0x4000091c;
+__ltdf2 = 0x40000920;
+__ltsf2 = 0x40000924;
+__moddi3 = 0x40000928;
+__modsi3 = 0x4000092c;
+__muldc3 = 0x40000930;
+__muldf3 = 0x40000934;
+__muldi3 = 0x40000938;
+__mulsc3 = 0x4000093c;
+__mulsf3 = 0x40000940;
+__mulsi3 = 0x40000944;
+__mulvdi3 = 0x40000948;
+__mulvsi3 = 0x4000094c;
+__nedf2 = 0x40000950;
+__negdf2 = 0x40000954;
+__negdi2 = 0x40000958;
+__negsf2 = 0x4000095c;
+__negvdi2 = 0x40000960;
+__negvsi2 = 0x40000964;
+__nesf2 = 0x40000968;
+__paritysi2 = 0x4000096c;
+__popcountdi2 = 0x40000970;
+__popcountsi2 = 0x40000974;
+__powidf2 = 0x40000978;
+__powisf2 = 0x4000097c;
+__subdf3 = 0x40000980;
+__subsf3 = 0x40000984;
+__subvdi3 = 0x40000988;
+__subvsi3 = 0x4000098c;
+__truncdfsf2 = 0x40000990;
+__ucmpdi2 = 0x40000994;
+__udivdi3 = 0x40000998;
+__udivmoddi4 = 0x4000099c;
+__udivsi3 = 0x400009a0;
+__udiv_w_sdiv = 0x400009a4;
+__umoddi3 = 0x400009a8;
+__umodsi3 = 0x400009ac;
+__unorddf2 = 0x400009b0;
+__unordsf2 = 0x400009b4;
+__extenddftf2 = 0x400009b8;
+__trunctfdf2 = 0x400009bc;

esp-hal/ld/esp32h2/rom/esp32h2.rom.spiflash.ld

@@ -0,0 +1,164 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32h2.rom.spiflash.ld for esp32h2
+ *
+ *
+ * Generated from ./target/esp32h2/interface-esp32h2.yml md5sum c0ad4e113e5b29bb9d799f10f03edbc1
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group spi_flash_cache
+ ***************************************/
+
+/* Functions */
+spi_flash_disable_cache = 0x400001e8;
+spi_flash_restore_cache = 0x400001ec;
+spi_flash_cache_enabled = 0x400001f0;
+esp_enable_cache_flash_wrap = 0x400001f8;
+
+
+/***************************************
+ Group spi_flash_mmap
+ ***************************************/
+
+/* Functions */
+spi_flash_mmap_os_func_set = 0x400001fc;
+spi_flash_mmap_page_num_init = 0x40000200;
+spi_flash_mmap = 0x40000204;
+spi_flash_mmap_pages = 0x40000208;
+spi_flash_munmap = 0x4000020c;
+spi_flash_mmap_dump = 0x40000210;
+spi_flash_check_and_flush_cache = 0x40000214;
+spi_flash_mmap_get_free_pages = 0x40000218;
+spi_flash_cache2phys = 0x4000021c;
+spi_flash_phys2cache = 0x40000220;
+
+
+/***************************************
+ Group esp_flash
+ ***************************************/
+
+/* Functions */
+esp_flash_chip_driver_initialized = 0x40000224;
+esp_flash_read_id = 0x40000228;
+esp_flash_get_size = 0x4000022c;
+esp_flash_erase_chip = 0x40000230;
+esp_flash_erase_region = 0x40000234;
+esp_flash_get_chip_write_protect = 0x40000238;
+esp_flash_set_chip_write_protect = 0x4000023c;
+esp_flash_get_protectable_regions = 0x40000240;
+esp_flash_get_protected_region = 0x40000244;
+esp_flash_set_protected_region = 0x40000248;
+esp_flash_read = 0x4000024c;
+esp_flash_write = 0x40000250;
+esp_flash_write_encrypted = 0x40000254;
+esp_flash_read_encrypted = 0x40000258;
+esp_flash_get_io_mode = 0x4000025c;
+esp_flash_set_io_mode = 0x40000260;
+spi_flash_boot_attach = 0x40000264;
+esp_flash_read_chip_id = 0x40000268;
+detect_spi_flash_chip = 0x4000026c;
+esp_flash_suspend_cmd_init = 0x40000274;
+/* Data (.data, .bss, .rodata) */
+esp_flash_default_chip = 0x4084ffe8;
+esp_flash_api_funcs = 0x4084ffe4;
+
+
+/***************************************
+ Group spi_flash_chips
+ ***************************************/
+
+/* Functions */
+spi_flash_chip_generic_probe = 0x40000278;
+spi_flash_chip_generic_detect_size = 0x4000027c;
+spi_flash_chip_generic_write = 0x40000280;
+spi_flash_chip_generic_write_encrypted = 0x40000284;
+spi_flash_chip_generic_set_write_protect = 0x40000288;
+spi_flash_common_write_status_16b_wrsr = 0x4000028c;
+spi_flash_chip_generic_reset = 0x40000290;
+spi_flash_chip_generic_erase_chip = 0x40000294;
+spi_flash_chip_generic_erase_sector = 0x40000298;
+spi_flash_chip_generic_erase_block = 0x4000029c;
+spi_flash_chip_generic_page_program = 0x400002a0;
+spi_flash_chip_generic_get_write_protect = 0x400002a4;
+spi_flash_common_read_status_16b_rdsr_rdsr2 = 0x400002a8;
+spi_flash_chip_generic_read_reg = 0x400002ac;
+spi_flash_chip_generic_yield = 0x400002b0;
+spi_flash_generic_wait_host_idle = 0x400002b4;
+spi_flash_chip_generic_wait_idle = 0x400002b8;
+spi_flash_chip_generic_config_host_io_mode = 0x400002bc;
+spi_flash_chip_generic_read = 0x400002c0;
+spi_flash_common_read_status_8b_rdsr2 = 0x400002c4;
+spi_flash_chip_generic_get_io_mode = 0x400002c8;
+spi_flash_common_read_status_8b_rdsr = 0x400002cc;
+spi_flash_common_write_status_8b_wrsr = 0x400002d0;
+spi_flash_common_write_status_8b_wrsr2 = 0x400002d4;
+spi_flash_common_set_io_mode = 0x400002d8;
+spi_flash_chip_generic_set_io_mode = 0x400002dc;
+spi_flash_chip_generic_read_unique_id = 0x400002e0;
+spi_flash_chip_generic_get_caps = 0x400002e4;
+spi_flash_chip_generic_suspend_cmd_conf = 0x400002e8;
+spi_flash_chip_gd_get_io_mode = 0x400002ec;
+spi_flash_chip_gd_probe = 0x400002f0;
+spi_flash_chip_gd_set_io_mode = 0x400002f4;
+/* Data (.data, .bss, .rodata) */
+spi_flash_chip_generic_config_data = 0x4084ffe0;
+spi_flash_encryption = 0x4084ffdc;
+
+
+/***************************************
+ Group memspi_host
+ ***************************************/
+
+/* Functions */
+memspi_host_read_id_hs = 0x400002f8;
+memspi_host_read_status_hs = 0x400002fc;
+memspi_host_flush_cache = 0x40000300;
+memspi_host_erase_chip = 0x40000304;
+memspi_host_erase_sector = 0x40000308;
+memspi_host_erase_block = 0x4000030c;
+memspi_host_program_page = 0x40000310;
+memspi_host_read = 0x40000314;
+memspi_host_set_write_protect = 0x40000318;
+memspi_host_set_max_read_len = 0x4000031c;
+memspi_host_read_data_slicer = 0x40000320;
+memspi_host_write_data_slicer = 0x40000324;
+
+
+/***************************************
+ Group hal_spiflash
+ ***************************************/
+
+/* Functions */
+spi_flash_hal_poll_cmd_done = 0x40000328;
+spi_flash_hal_device_config = 0x4000032c;
+spi_flash_hal_configure_host_io_mode = 0x40000330;
+spi_flash_hal_common_command = 0x40000334;
+spi_flash_hal_read = 0x40000338;
+spi_flash_hal_erase_chip = 0x4000033c;
+spi_flash_hal_erase_sector = 0x40000340;
+spi_flash_hal_erase_block = 0x40000344;
+spi_flash_hal_program_page = 0x40000348;
+spi_flash_hal_set_write_protect = 0x4000034c;
+spi_flash_hal_host_idle = 0x40000350;
+spi_flash_hal_check_status = 0x40000354;
+spi_flash_hal_setup_read_suspend = 0x40000358;
+spi_flash_hal_setup_auto_suspend_mode = 0x4000035c;
+spi_flash_hal_setup_auto_resume_mode = 0x40000360;
+spi_flash_hal_disable_auto_suspend_mode = 0x40000364;
+spi_flash_hal_disable_auto_resume_mode = 0x40000368;
+spi_flash_hal_resume = 0x4000036c;
+spi_flash_hal_suspend = 0x40000370;
+spi_flash_encryption_hal_enable = 0x40000374;
+spi_flash_encryption_hal_disable = 0x40000378;
+spi_flash_encryption_hal_prepare = 0x4000037c;
+spi_flash_encryption_hal_done = 0x40000380;
+spi_flash_encryption_hal_destroy = 0x40000384;
+spi_flash_encryption_hal_check = 0x40000388;

esp-hal/ld/esp32h2/rom/esp32h2.rom.version.ld

@@ -0,0 +1,13 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM version variables for esp32h2
+ *
+ * These addresses should be compatible with any ROM version for this chip.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+_rom_chip_id = 0x40000010;
+_rom_eco_version = 0x40000014;

esp-hal/ld/esp32s2/esp32s2.x

@@ -27,10 +27,10 @@ INCLUDE "fixups/rtc_fast_rwdata_dummy.x"
 /* End of fixups for esp32s2 */
 
 /* Shared sections - ordering matters */
-INCLUDE "text.x"
-INCLUDE "rodata.x"
 INCLUDE "rwtext.x"
+INCLUDE "text.x"
 INCLUDE "rwdata.x"
+INCLUDE "rodata.x"
 INCLUDE "rtc_fast.x"
 INCLUDE "rtc_slow.x"
 INCLUDE "stack.x"

esp-hal/ld/esp32s2/rom-functions.x

@@ -1,34 +1,6 @@
-PROVIDE(ets_delay_us = 0x4000d888);
-PROVIDE(ets_update_cpu_frequency_rom = 0x4000d8a4);
-PROVIDE(rom_i2c_writeReg = 0x4000a9a8);
-PROVIDE(rom_i2c_writeReg_Mask = 0x4000aa00);
-PROVIDE(rtc_get_reset_reason = 0x4000ff58);
-PROVIDE(software_reset = 0x40010068);
-PROVIDE(software_reset_cpu = 0x40010080);
+INCLUDE "rom/esp32s2.rom.api.ld"
+INCLUDE "rom/esp32s2.rom.ld"
+INCLUDE "rom/esp32s2.rom.libgcc.ld"
+INCLUDE "rom/esp32s2.rom.spiflash_legacy.ld"
 
-PROVIDE ( cache_dbus_mmu_set = 0x40018eb0 );
-PROVIDE ( Cache_Allocate_SRAM = 0x40018d6c );
-PROVIDE ( Cache_Invalidate_DCache_All = 0x4001842c );
-PROVIDE ( Cache_Set_DCache_Mode = 0x40018074 );
-PROVIDE ( ets_efuse_get_spiconfig = 0x4000e4a0 );
-PROVIDE ( esp_rom_efuse_get_flash_gpio_info    = ets_efuse_get_spiconfig );
-PROVIDE ( esp_rom_efuse_get_flash_wp_gpio      = ets_efuse_get_wp_pad );
-PROVIDE ( ets_efuse_get_wp_pad = 0x4000e444 );
-PROVIDE ( esp_rom_spiflash_select_qio_pins = SelectSpiQIO );
-PROVIDE ( SelectSpiQIO = 0x40015b88 );
-PROVIDE ( esp_rom_spi_set_op_mode = 0x400179e8 );
-PROVIDE ( esp_rom_spi_cmd_start = 0x40017ba8 );
-PROVIDE ( esp_rom_spi_cmd_config = 0x40017c58 );
-
-PROVIDE(esp_rom_crc32_le = 0x400119dc);
-PROVIDE(esp_rom_crc16_le = 0x40011a10);
-PROVIDE(esp_rom_crc8_le = 0x40011a4c);
-
-PROVIDE(esp_rom_md5_final = 0x4000530c);
-PROVIDE(esp_rom_md5_init = 0x4000526c);
-PROVIDE(esp_rom_md5_update = 0x4000528c);
-
-memcmp = 0x4001ab40;
-memcpy = 0x4001aba8;
-memmove = 0x4001acb0;
-memset = 0x4001ad3c;
+INCLUDE "rom/additional.ld"