* Mark interconnect as unstable
* Explicitly set unstable feature in HIL tests
* WIP append feature set name to artifact
* Add name to feature sets, build all combinations
* Fix tests
* Provide a looping executor for stable async tests
* Fix usb serial jtag
* Hide interconnect types
* Add with_rx() and with_tx() methods to UART drivers
* changelog
* migration guide
* forgotten tests
* fmt
* fix H2 example
* Use the same calling order of calling TX and RX as before
* HIL(QOL): Add missing timeouts to various tests
* Increase timeouts for ECC
* Use global timeout in hil tests
* sha: increase test_digest_of_size_1_to_200 timeout from 10 to 15 seconds
* Add a derive procmacro to implement the Builder Lite pattern for a struct
* Add `#[non_exhaustive]` and derive `BuilderLite` where necessary in I2C module
* Add `#[non_exhaustive]` and derive `BuilderLite` where necessary in UART module
* Add `#[non_exhaustive]` and derive `BuilderLite` where necessary in SPI module
* Update `CHANGELOG.md`
* Fix build errors in HIL tests
* Fix generated doc comments
* Return a `ParseError` rather than panicking
* Add a method to set the value to `None` for `Option` types
* Print panic messages using semihosting
* Don't use defmt's asserts
* Make RA_OFFSET available without panic-handler
* Re-add defmt imports where missing
* Revert unintended test change
* Initialise hal in critical-section test
* Disable defmt in tests by default
* Refactor test_send_receive_different_baud_rates_and_clock_sources
* Don't rely on external connections for UART test
* Enable (failing) RcFast for C2/C3
* Make sure fast clock is enabled
* i2c hil test
* pin
* fmt
* Test
* WIP (gpio test left)
* Finalize the CODE part (to be cleaned up)
fmt
* Smaller cleanup
* cleanup
* rebase
* fix
* getting last chips ready
* Addressing reviews
* Rework hal initialization
* Turn sw interrupt control into a virtual peripheral
* Return a tuple instead of a named struct
* Fix docs
* Remove SystemClockControl
* Move software interrupts under interrupt
* Re-document what's left in system
* Update time docs
* Update sw int docs
* Introduce Config
* Fix tests
* Remove redundant inits
* Doc
* Clean up examples&tests
* Update tests
* Add changelog entry
* Start migration guide
* Restore some convenience-imports
* Remove Config from prelude
* Build HIL tests for ESP32 in CI, fix resulting build errors
* Fix some warnings in the `hil-test` package
* Fix warnings in examples
* Remove "esp_" prefix from Wi-Fi example file names
* Resolve the last of the known warnings
* Convert `SoftwareInterrupt` to a unit struct
* Remove the `SystemExt` trait and rename `SystemParts` to `SystemControl`
* Update all examples an HIL tests to reflect previous API changes
* Clean up imports in `hil-test` package, address `clippy` lint warnings
* Update `CHANGELOG.md`
* Refactor testing, add defmt, add async gpio test
* Add test to ensure the some edge case pins can be used in async mode
* Add test for pin0
* clippy
* update test to use constants extracted from esp-idf's soc module
* address review comments
* simplify test to just initialize one pin as async
* changelog
* uart: allow driver to init as blocking or async
* adds a mode type param to Uart types
* remove #[interrupt] usage
* add constructor for blocking and async modes
* blocking constructor takes optional interrupt
* async chooses the correct handler to bind at runtime
* moves interrupt enable for uart into the driver
* changelog
