* Create the `hil-test` package * Add a simple integration test to verify basic GPIO functionality * WIP * feat: Update with esp-hal unification * build: Update dependencies * feat: Add a simple CI workflow test * ci: Avoid using a gh-hosted-runner to build * ci: Remove building bins in gh-hosted-runner * ci: Remove HIL Gpio CI test * ci: Test all the available tests * test: Add spi_full_duplex test * docs: Add documentation * test: Add uart test * style: Remove unused imports * docs: Update wiring, document H2 VM * ci: Enable H2 tests * ci: Add rust-cache action * docs: Document H2 vm * test: Add timeout * ci: Enable ESP32-C3 tests * feat: Add timeouts * feat: Add aes test * ci: Avoid running CI workflow when we change hil-test stuff * test: Remove warnings * feat: Address feedback * feat: Update features names and spi methods * ci: Remove rust-cache action * Update HIL to probe-rs#2292 (#1307) * feat: Update probe-rs/embedded-test to probe-rs#2292 * feat: Remove lib * ci: Use a matrix * ci: Enable ESP32C3 * feat: Add a way to cfg away test for unsuported peripherals * ci: Update trigger conditions * feat: Update pins to make it work on s3 * feat: Changes enabling S3 * feat: Remove log feature * feat: Adapt for rebase * feat: Remove env * feat: enable S3 * chore: Remove todo * build: Pin dependencies * feat: Add target alias * docs: Update readme * fix: Fix traits imports after rebase. Use debug * build: Remove lto * feat: Build tests on release mode --------- Co-authored-by: Jesse Braham <jesse@beta7.io>
74 lines
1.6 KiB
Rust
74 lines
1.6 KiB
Rust
//! UART Test
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//!
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//! Folowing pins are used:
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//! TX GPIP2
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//! RX GPIO4
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//!
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//! Connect TX (GPIO2) and RX (GPIO4) pins.
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#![no_std]
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#![no_main]
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use defmt_rtt as _;
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use embedded_hal_02::serial::{Read, Write};
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use esp_hal::{
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clock::ClockControl,
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gpio::IO,
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peripherals::{Peripherals, UART0},
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prelude::*,
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uart::{
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config::{Config, DataBits, Parity, StopBits},
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TxRxPins,
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Uart,
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},
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};
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use nb::block;
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struct Context {
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uart: Uart<'static, UART0>,
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}
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impl Context {
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pub fn init() -> Self {
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let peripherals = Peripherals::take();
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let system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
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let pins = TxRxPins::new_tx_rx(
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io.pins.gpio2.into_push_pull_output(),
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io.pins.gpio4.into_floating_input(),
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);
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let config = Config {
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baudrate: 115200,
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data_bits: DataBits::DataBits8,
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parity: Parity::ParityNone,
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stop_bits: StopBits::STOP1,
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};
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let uart = Uart::new_with_config(peripherals.UART0, config, Some(pins), &clocks);
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Context { uart }
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}
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}
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#[cfg(test)]
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#[embedded_test::tests]
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mod tests {
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use defmt::assert_eq;
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use super::*;
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#[init]
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fn init() -> Context {
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Context::init()
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}
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#[test]
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#[timeout(3)]
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fn test_send_receive(mut ctx: Context) {
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ctx.uart.write(0x42).ok();
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let read = block!(ctx.uart.read());
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assert_eq!(read, Ok(0x42));
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}
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}
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