* Print panic messages using semihosting
* Don't use defmt's asserts
* Make RA_OFFSET available without panic-handler
* Re-add defmt imports where missing
* Revert unintended test change
* Initialise hal in critical-section test
* Disable defmt in tests by default
* Fix QSPI mode on non-ESP32
* Update tests to count pulses on pins separately
* Fix ESP32 addressing phase issue
* Use defmt's assert
* Set fastrd bit
* Apply pulldowns to define signal level when not driven
* Transfer address bits in data phase on ESP32
* Changelog
* Use a separate buffer for the address, make the workaround configurable
* Remove now-unnecessary additions
* Force SpiDma to remain Send
* Clarify wording, remove prefix
* Clean up manual register manipulation
* Fix byte order
* support psram in DmaTxBuf
* add example that sometimes works :-(
* fmt
* cleanups
* allow chunk_size upto (including) 4095
* this test is passing for me now
* remove chunk_size and compute based on block_size
* return error in `prepare_transfer` if psram is found on non-esp32s3
add `dma_tx_buffer` macro
* missing parens
* changelog
* default 4092 for esp32 & fmt
* no errors anymode
* use block_size is_some to flag invalid psram in prepare_transfer
* drop block_size from macro, the buffer allocation was not being aligned - its not needed for dram anyway.
* missed macro example
* use defmt::Format that decodes owner like Debug
* fix typo
* DmaTxBuf: its an error if buffer is in psram and block_size is none
* DmaTxBuf: its an error if buffer is in psram and block_size is none
* update for PSRAM feature changes
* address alignment comments
add simple test
* fmt
* better alignment test
* revert alignment test
---------
Co-authored-by: Juraj Sadel <juraj.sadel@espressif.com>
* Update `hil-test` package dependencies, add simple test for async delay with `SYSTIMER`
* Implement `embedded_hal_async::delay::DelayNs` for the `TIMGx` timers
* Improve tests slightly
* Update `CHANGELOG.md`
* Enable `delay` and `delay_async` tests for the ESP32-H2
* Fix error in `delay_async` test after rebasing
* ESP32 does not have `SYSTIMER`, so don't try to test it :)
* Protect int_ena modifications with INT_ENA_LOCK, clear int_clr in ISRs, move interrupt binds from Future constructor into new_async constructor
* Fix wrong imports
* Address reviews: Remove duplicated/useless code and add HIL test for delay_us and delay_ms
* Implement DelayNs on Target instead of Periodic
* clean dead code
* fix after rebase
* fix build errors
* More accurate nanos to ticks calculation
* Fix wrong handler passed to set_interrupt_handler()
* Update esp-hal/src/timer/timg.rs
Co-authored-by: Dániel Buga <bugadani@gmail.com>
* cleanup left over
---------
Co-authored-by: Juraj Sadel <juraj.sadel@espressif.com>
Co-authored-by: Juraj Sadel <jurajsadel@gmail.com>
Co-authored-by: Dániel Buga <bugadani@gmail.com>
* Some more gpio cleanup
* Allow TWAI loopback using the same pin, enable ESP32
* Impl Format for ErrorKind
* Generic frame constructors
* More TWAI cleanups
* Fix signals
* Set self-reception bit
* Teach users to use const blocks
* Fix resetting TWAI
* Set opmode when starting
* Apply errata workaround
* Fix ESP32 baudrate
* Clean up read_frame a bit
* Changelog
* Clean up clippy
* Fix compile errors
---------
Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>
* per TRM the TX clock should only be re-enabled after tx_start
* CHANGELOG
* added tests to check the for the correct number of clocks during valid
* parl_io: fix test for esp32h2
* tests: parl_io: h2 PCNT does not like 20MHz
* Clean up qspi test cfgs, enable on ESP32
* Correct comments
* Clean up init_spi_data_mode
* Fix qspi_write on ESP32
* Further cleanup in SPI driver
* Clean up qspi_read
* Fix qspi_write_read test on ESP32
* Merge QSPI tests
* Clean up test
* Attempt to fix test GPIO assingment
* Update esp-hal/src/spi/master.rs
Co-authored-by: Dominic Fischer <14130965+Dominaezzz@users.noreply.github.com>
* Update esp-hal/src/spi/master.rs
* Make sure pins have no internal pullups
---------
Co-authored-by: Dominic Fischer <14130965+Dominaezzz@users.noreply.github.com>
* Cfg features, not devices
* Remove InterruptBinder
* Clean up allow(declare_interior_mutable_const)
* Small embassy cleanup
* Enable dma-macros for 32 and S2
* Use MEM2MEM1 on C2
* Remove esp32-specific code from test
* feat: Allow configuring the watchdogs in the init config
* docs: Update changelog
* refactor: Remove unnecesary unsafe
* feat: Add a config module
* test: Add some init tests
* style: Rename all ocurrences to esp_hal::config::Config::default()
* style: Fix format
* fix: Doc errors
* revert: Move Config struct to lib.rs
* tests: Add default config test
* test: Add a test with CpuClock::max()
* test: Add timg1 test
* feat: Move Config struct to config module and reexport it in lib.rs
* fix: Fix init compilation for C2
* revert: Move Config struct to config module and reexport it in lib.rs
* fix: Use proper timergroup
* Re-enable tests
* Clean up
* Pass two lengths to configure_datalen
* Add Dominic's test changes
* Ensure DMA buffers are properly aligned
* Impl Format on DmaDescriptor
* Fix waiting for transaction to complete
* Fix DMA transfers
* Changelog
* Avoid explicit panic in test case
* Remove redundant test case
* Reintroduce wait for ESP32
* Refactor test_send_receive_different_baud_rates_and_clock_sources
* Don't rely on external connections for UART test
* Enable (failing) RcFast for C2/C3
* Make sure fast clock is enabled
* Recover from I2C errors (the hard way)
* Adjust test to cover the problematic case
* Replace macro-usage
* CHANGELOG.md entry
* Appease Clippy
* TIL: `Result::inspect_err` exists
* Turn public `recover` into private `internal_recover`
* Allow accessing signal list via ErasedPin
* Replace AnyPin with more flexible signal config
* Update tests and examples
* Fix enable_from_gpio value
* Access signals from pin drivers
* DummyPin is not a pin
* Remove redundant public fns
* Various fixes, rename ErasedPin
* Changelog
* rustfmt
* Update i8080
* Typos and endless recursion
* Drop Pin suffix from traits
* Extract AF conversion
* Touch up changelog
* Clean up spi tests
* Refactor pull resistor handling
* Don't disable configured output functionality
* Clean up TODO
* Tweak docs
* Clean up examples
* Remove type erased gpio structs
* Implement Peripheral for ErasedPin
* Simpler type erasing, accept ErasedPin in pin drivers, remove type erased drivers
* Reformulate pin drivers using Flex
* Erase gpio types by default
* Accept any pin in AnyPin
* Add changelog and migration guide
* Fix tests and examples
* Undo rename of clone_unchecked
* i2c hil test
* pin
* fmt
* Test
* WIP (gpio test left)
* Finalize the CODE part (to be cleaned up)
fmt
* Smaller cleanup
* cleanup
* rebase
* fix
* getting last chips ready
* Addressing reviews
* Rework hal initialization
* Turn sw interrupt control into a virtual peripheral
* Return a tuple instead of a named struct
* Fix docs
* Remove SystemClockControl
* Move software interrupts under interrupt
* Re-document what's left in system
* Update time docs
* Update sw int docs
* Introduce Config
* Fix tests
* Remove redundant inits
* Doc
* Clean up examples&tests
* Update tests
* Add changelog entry
* Start migration guide
* Restore some convenience-imports
* Remove Config from prelude
* Update package dependencies and bump version numbers
* Update `CHANGELOG.md` for each package to be published
* Remember to update `xtensa-lx-rt` too :)
* Add and use TrapFrame::new() in esp-wifi
* Bump `xtensa-lx-rt` by minor instead of patch, as there are breaking changes
---------
Co-authored-by: Dániel Buga <bugadani@gmail.com>
* RSA cleanup & API consistency change, part 2
* RSA cleanup & API consistency change, part 3
* Add async tests
* Fix async for ESP32
* Merge impl blocks
* Backtrack on some mutability changes
* Use Acquire/Release ordering
* Fwd to write_multi_start instead of duplicating impl
* use `State` for both blocking and async operations, remove async version of SpiDmaBus in favour of being generic over the mode
* reuse wait_for_idle more
* changelog
* rename generic params for consistency
* Add duplex mode to SpiDmaBus
* implement HalfDuplexReadWrite for SpiDmaBus
* Docs on new async APIs
* Limit half duplex transfers to the capacity of the DmaBuf
* docs
* rebase tests
* address review comments
* remove duplex traits from spi
* fix tests
* spi docs rejig
* s/InUse/TemporarilyRemoved/g
