Commit Graph

8 Commits

Author SHA1 Message Date
Dániel Buga
848029b152
Test all feature sets (#2901)
* Mark interconnect as unstable

* Explicitly set unstable feature in HIL tests

* WIP append feature set name to artifact

* Add name to feature sets, build all combinations

* Fix tests

* Provide a looping executor for stable async tests

* Fix usb serial jtag

* Hide interconnect types
2025-01-09 13:58:14 +00:00
Juraj Sadel
d54f8440a5
HIL(QOL): Use global timeout instead of timeout macros (#2489)
* HIL(QOL): Add missing timeouts to various tests

* Increase timeouts for ECC

* Use global timeout in hil tests

* sha: increase test_digest_of_size_1_to_200 timeout from 10 to 15 seconds
2024-12-04 12:03:39 +00:00
Dániel Buga
c7a2368845
Print test panics using semihosting (#2257)
* Print panic messages using semihosting

* Don't use defmt's asserts

* Make RA_OFFSET available without panic-handler

* Re-add defmt imports where missing

* Revert unintended test change

* Initialise hal in critical-section test

* Disable defmt in tests by default
2024-10-04 06:31:39 +00:00
liebman
cf9050d5d7
Support PSRAM in DmaTxBuf (#2161)
* support psram in DmaTxBuf

* add example that sometimes works :-(

* fmt

* cleanups

* allow chunk_size upto (including) 4095

* this test is passing for me now

* remove chunk_size and compute based on block_size

* return error in `prepare_transfer` if psram is found on non-esp32s3
add `dma_tx_buffer` macro

* missing parens

* changelog

* default 4092 for esp32 & fmt

* no errors anymode

* use block_size is_some to flag invalid psram in prepare_transfer

* drop block_size from macro, the buffer allocation was not being aligned - its not needed for dram anyway.

* missed macro example

* use defmt::Format that decodes owner like Debug

* fix typo

* DmaTxBuf: its an error if buffer is in psram and block_size is none

* DmaTxBuf: its an error if buffer is in psram and block_size is none

* update for PSRAM feature changes

* address alignment comments
add simple test

* fmt

* better alignment test

* revert alignment test

---------

Co-authored-by: Juraj Sadel <juraj.sadel@espressif.com>
2024-09-24 15:21:58 +00:00
Dániel Buga
d4e463b3ff
Slight general cleanup, enable dma-macros test, allow using virtual mem2mem channel on c2 (#2200)
* Cfg features, not devices

* Remove InterruptBinder

* Clean up allow(declare_interior_mutable_const)

* Small embassy cleanup

* Enable dma-macros for 32 and S2

* Use MEM2MEM1 on C2

* Remove esp32-specific code from test
2024-09-20 15:04:18 +00:00
Sergio Gasquez Arcos
b5f0246129
Reordered RX-TX pairs to be consistent (#2074)
* feat: Update rx-tx order in i2s

* feat: Update rx-tx order in dma macros

* feat: Update rx-tx order in spi

* feat: Update rx-tx order in aes

* feat: Update rx-tx order in mem2mem

* feat: Update rx-tx order in twai and split methods

* feat: Update rx-tx order in twai

* feat: Update rx-tx order in twai and uart docs

* docs: Add sentence about order

* docs: Update changelog

* feat: Update rx-tx order in embassy_interrupt_spi_dma tests

* style: Rustfmt

* docs: Migrating guide

* fix: Typo

Co-authored-by: Dániel Buga <bugadani@gmail.com>

* fix: Diff

Co-authored-by: Dániel Buga <bugadani@gmail.com>

* fix: Tests rx-tx order

* fix: Update new_with_default_pins order

* feat: Update rx/tx order in hil_test::common_test_pins!

* feat: Update dma_extmem2mem example

* fix: Revert deleted input arg

* style: rustfmt

* feat: Disable test_asymmetric_dma_transfer for S2

---------

Co-authored-by: Dániel Buga <bugadani@gmail.com>
2024-09-06 09:56:10 +00:00
Dániel Buga
ec130877b7
Disable RTT polling in HIL tests by default (#1960)
* Disable defmt-rtt by default

* Update i2s test based on changes done to async

* fmt

* Update readme

* Update more tests
2024-08-19 13:47:22 +00:00
liebman
1631f22083
support dma chunk sizes other than 4092 (#1758)
* support dma chunk sizes other than 4092

* fmt

* update CHANGELOG

* fix 0 size static assert

* review changes:
- `.div_ceil()`
- return errors for bad chunk size and buffer sizes in Mem2Mem constructors
- correct 0 chunk size check in descripter macros

* dma: clear the mem2mem bit when channel is configured instead of in Drop
2024-07-15 12:00:33 +00:00