* Refactor the `spi` and `spi_slave` modules into a single `spi` module
* Update import paths in examples as needed
* Extract some common types from `spi::master` into the root `spi` module
* Fix imports in examples (again)
* Documentation fixes/improvements
* Remove unnecessary re-exports
* Update `CHANGELOG.md`
* Duplicate spi to spi_slave
* Restore spi
* Add barebones SPI slave mode, DMA only.
This setup allows registering buffers for future transactions the master
does (lowering cs, toggling sclk, and raising cs again). The transfer
struct returned from the registration API will complete its wait() or
return true from is_done() after cs has been raised.
Copied from spi.rs, so most of the changes are deleting code that
handles e.g. segmented transfers or synchronous operations.
Fix non-c3 devices' builds
* Limit spi_slave to non-pdma devices
* SPI slave DMA example
Ensure the API "feels" right.
Since there's no way to route GPIOs to other peripherals, we choose four
other wires and bit-bang SPI for the master side, relying on the person
running the example to connect the bus. This way we ensure the slave
code works, since we created the master ourselves.
Also, it's not really possible to use a second ESP device as the master
anyway: all the digital lines have glitches on startup, and those
glitches cause the slave's DMA engine to skip descriptors (it thinks
they're intended CS indicators); this causes it to lose data.
Then, fix the bitbang master (recording the progression here)
- When bitbanging, iterate the bits by "for _ in 0..8", instead of the
broken "for _ in [0..8]". The latter only runs the iteration once,
since there's only one list given ... and because the code uses _
instead of a real loop variable, type checking didn't save us.
- When bitbanging, send the bits out (and read them in) MSB first, since
that's actually how we have the slave configured.
* Add changelog entry
* Split DMA prepare_transfer into two fns.
The first does everything but write to the start bit and check for an
error. The second does those. We need 2 fns because the SPI slave needs
to start the transfer only after resetting the various afifo hardware
components (if it starts the transfer before, the first 8 bytes will be
lost when that reset happens).
Use the split fns everywhere.
Also split flush(). It needs to be pollable, so split it into one fn that
polls and one that waits until the poll returns clear. Also call the poll
fn from the is_done() fn, so we don't trample in-progress transfers.
* Make example code fill rx buffer before transfer
This way we can tell if it's ever touching certain bytes - 0xff is never
added to the master transmit buffer.
While I'm changing this, make the slave tx buffer never contain 0xff
either (go from 254 to 0).
---------
Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>
* Ensure that uart is configured to account for clock changes, not just boot defaults
* fix examples
* changelog
---------
Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>
* Add support for splitting esp32 uart into TX and RX
* Keeps existing API for uart, but wraps it in Tx and Rx sub-types
* Adds split() method similar to embassy-rs nRF/stm32/rp for getting indepdendent TX and RX
parts
* Implements e-h traits for TX and RX types
* Add esp32s3 example
* finish implementing
* rebase examples
* declare new examples
* fix fmt
* rebase on 0.12.0
* fix fmt
* fix fmt
* merge embassy_serial_split example with embassy_serial
* fix changelog
* fix changelog
* Add ECC driver for ESP32C2 and ESP32C6
* Add ECC example for ESP32C2 and ESP32C6
* Add and modify dependencies
* ESP32H2: Add ECC driver support
* ESP32H2: Add ECC example
* ESP32C2 and ESP32C6: clean examples
* changelog
* refactor: remove enable_interrupt() and clear_interrupt()
* refactor: remove ugly if/else logic for padding
* Executor related touchups
* Make log optional
* Add defmt feature and derive on Debug structs
* Test both log drivers
* Update esp-println
* Document defmt msrv
* Executor related touchups
* Fix typos
* Clean up DAC, remove hidden public API
* Clean up ADC
* Clean up analog peripheral reexports
* Properly hide rmt macros
* Remove the old `pulse_control` driver
* Update `esp-hal-smartled` to use the new `rmt` driver instead
* Update the `hello_rgb` example for each chip
* Update CHANGELOG
* Create issue_handler.yml
* No longer re-export `embedded-hal`, hide exported macros in documentation
* Add simple package-level documentation for each HAL package
* Clean up/simplify re-exports
* Fix the examples that I broke
* Ensure top-level modules/types/functions have doc comments
* Update CHANGELOG
* Re-export the `soc::psram` module where available
---------
Co-authored-by: Sergio Gasquez Arcos <sergio.gasquez@gmail.com>
* Add README, improve documentation for `esp-hal-procmacros`
* Improve documentation for `esp-hal-smartled`
* Use esp-rs logo for all packages' documentation
* Add additional `cfg` gates to re-exports in `esp-hal-common`
This leaves only `clock`, `delay`, `peripheral`, `prelude`, `rom`, and `soc` *not* behind `cfg`s
* Simplify the prelude, update its `cfg`s, and re-export some missing traits
* Update various dependencies
* Extract the `esp-hal-smartled` package
This (finally) eliminates the `esp_hal_common::utils` module!
* Remove all references to the old `smartled` feature from CI
* Move some linker scripts into `esp-hal-common` and update the build script
* Move `EspDefaultHandler` and `DefaultHandler` definitions into `esp-hal-common`
* Re-export everything from `esp-hal-common`
* Add a couple cfg symbols, cleanup/organize some exports/modules
* Create an `soc` module with a submodule for each chip, move `peripherals` in
* Move the `cpu_control` module into `soc`
* Move the `efuse` module into `soc`
* Refactor type definitions from `gpio` module into `soc`
* Put all embassy-related files in a common directory
* Change visibility of `GpioPin` constructor
* Create the `esp32c6-hal` package
* Teach `esp-hal-common` about the ESP32-C6
* Get a number of peripheral drivers building for the ESP32-C6
bckup
initial clocks_ii
* Create the `esp32c6-hal` package
C6: update
* Simplify and fix the linker script
update
* C6: add I2S
* Create the `esp32c6-hal` package
* Teach `esp-hal-common` about the ESP32-C6
* Get a number of peripheral drivers building for the ESP32-C6
bckup
initial clocks_ii
* Create the `esp32c6-hal` package
* C6: update
* Simplify and fix the linker script
* update
* C6: add I2S
* update
* C6 Interrupts
* C6: Update build.rs, linker scripts and initial examples
* C6: RMT
* Fix interrupt handling
* Fix `ClockControl::configure`
* C6: revert to I2S0 instead of just I2S
* C6: rebase and update
* RTC not buildable
* Implement RWDT and SWD disable
* C6: working LEDC
* C6: working RMT
* C6: add aes
* C6: add mcpwm
* C6: add rtc_cntln - not finished
* C6: update and formatting
* C6: add pcnt
* C6: add examples and format
* Remove inline assembly, fix interrupts and linker scripts
* Remove unused features, update cargo config for atomic emu, misc cleanup
* Get ADC building and example "working" (as much as it ever does)
* Remove a bunch of unused constants which were copied from ESP-IDF
* The `mcpwm` example now works correctly
* Get `TWAI` peripheral driver building for C6
* Clean up the `rtc_cntl` module and get all the other HALs building again
* Add the C6 to our CI workflow
* Fix various things that have been missed when rebasing
Still missing a few examples (`clock_monitor`, `embassy_spi`, `ram`)
* C6: Small updates in wdt (#1)
* C6: Update WDT
* C6: Update examples with WDT update
* Update `esp-println` dependency to fix build errors
* Fix formatting issues causing pre-commit hook to fail
* Get some more examples working
* Working `ram` example
* Sync with changes in `main` after rebasing
* Working `embassy_spi` example
* Use a git dependency for the PAC until we publish a release
* Fix I2S for ESP32-C6
* Fix esp32c6 direct boot (#4)
* Add direct boot support for C6
* Fix direct boot for c6
- Actually copy into rtc ram
- remove dummy section that is no longer needed (was just a waste of
flash space)
- Move RTC stuff before the no load sections
* Update RWDT and refactor RTC (#3)
* C6: Update RWDT and add example, refactor RTC and add not-really-good example
* Update based on review comments, resolve bunch of warnings and run cargo fmt
* Update C6 esp-pacs rev commit
* Fix clocks_ll/esp32c6.rs
* Fix riscv interrupts
* Remove clock_monitor example for now
* RAM example works in direct-boot mode
* Add a TODO for &mut TIMG0 and cargo fmt
* Fix linker script after a bad rebase
* Update CI and Cargo.toml embassy required features
* use riscv32imac-unknown-none-elf target for C6 in CI
* change default target to riscv32imac-unknown-none-elf
* add riscv32imac-unknown-none-elf target to MSRV job
* another cleanup
---------
Co-authored-by: bjoernQ <bjoern.quentin@mobile-j.de>
Co-authored-by: Jesse Braham <jesse@beta7.io>
* Make required changes to include new `RADIO` peripheral
* Use published versions of PAC and `esp-println`
* Use the correct target extensions (`imac`)
* Fix the super watchdog timer, plus a few more examples
* Fix UART clock configuration
* Make sure to sync UART registers when configuring AT cmd detection
* Disable APM in direct-boot mode
* Address a number of review comments
* Fix `SPI` clocks and `rtc_watchdog` example (#6)
* fix SPI clocks
* run cargo fmt
* Add comment about used default clk src
* Fix rtc_watchdog example in BL mode
* run cargo fmt
* Update rtc_watchdog example that it works in DB mode
* README and example fixes/cleanup
* Add I2C peripheral enable and reset
* Fix `ApbSarAdc` configuration in `system.rs`
---------
Co-authored-by: bjoernQ <bjoern.quentin@mobile-j.de>
Co-authored-by: Juraj Sadel <juraj.sadel@espressif.com>
Co-authored-by: Juraj Sadel <jurajsadel@gmail.com>
Co-authored-by: Scott Mabin <scott@mabez.dev>
* Allow the creation of peripherals _not_ from the pac in the peripherals macro
* Add RADIO peripheral
- Remove DerefMut hack, replace with proper Sealed impls
- Add RADIO peripheral for all chips
* Add RADIO peripheral with split method into each radio feature
* ground work for async dma (gdma only atm)
* Add async DMA (GDMA) - esp32c3/esp32c2
* Add Async SPI impl for esp32c3/c2
* Remove private modules from DMA
* add async spi example for esp32c3
* Switch to assoc wakers instead of a static array
* add support for esp32/esp32s2
* add support for esp32s3
* run fmt
* add c2 example, fix CI
* Remove redundant comments
* Update PACs and modify `esp-hal-common` to use new `esp-riscv-rt` package
* Update `esp32c2-hal` and `esp32c3-hal` to use `esp-riscv-rt` as well
* Update all RISC-V examples to use `esp-riscv-rt`
* Update RISC-V trap frame handling according to review feedback
* Add `is_listening` to `Pin` trait
* Add `Wait` impl for Gpio Input
* Add GPIO wait example for C3
* Ensure correct bank is accessed in interrupt
* Add esp32c2 wait example
* Add esp32s3 wait example
* Add esp32s2 wait example
* Add esp32 wait example
* Run fmt
* Add example to cargo tomls
* Add top level docs for embassy examples
* Mention the higher MSRV for async in the README
---------
Co-authored-by: Jesse Braham <jesse@beta7.io>
* start of pulse counter implementation
* implement interrupts
implement pcnt for esp32, esp32s2, and esp32s3
* implement pcnt for esp32s2
* fix esp32 PCNT signal names
* update PCNT register/fields for cleaned up PAC
* implement events/get_events (choosing what events interrupt)
* added pcnt example: simple encoder configuration
* restrict pcnt::channel::Channel::new() to super
* PcntPin -> PcntSignal
added range checks for thresholds and limits
* PcntSource is a better name I think
* handle error for PCNT Unit configure() in example
* update pac versions for status register change
* cargo fmt
* cargo fmt (examples)
* PcntSource now only stores the source id.
add a critical section to protect the ctrl & isr_en registers
* cargo fmt
* wip: initial implementation of transmission only.
* Moved TWAI to its own directory and added initial reception of packets.
* Added extended id transmit and receive.
* Added maybe better code for making packet filters.
* Fixed bug with ids and improved methods of copying data to the peripheral.
* Added some guards against Bus Off
* Added reception of remote frames.
* Clean up of comments, etc
* Updated TWAI naming and cleaned up example a bit.
* Updated bitselector to include better unpacking methods.
* Add embedded-can and limit initial TWAI implementation to esp32c3.
* Added embedded-can to esp32c3 twai example.
* Switched twai filter to using bytestrings.
Co-authored-by: dimi <dimi.polonski@gmail.com>
* Implemented new() for twai filters.
* Clean up TWAI docs and example.
* Fix filter constructors and add examples.
* pre driver PeripheralRef update.
* PeripheralRef/twai
* Format comments with nightly rustfmt.
* Add gpio PeripheralRef and use volatile for direct register access.
Co-authored-by: dimi <dimi.polonski@gmail.com>
* Peripheral ref/sha (#312)
* Add SHA to list of peripherals to be created
* Refactor SHA peripheral to use PeripheralRef
* Update SHA examples to get them building again
* Fix async time drivers
* Fix usb otg
* Fix s3
Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>
* Add the peripheral module plus some helper macros in preparation
* peripheral macro
* Add peripheral generation macro
* Fixes after rebase
* Update the signature of Peripherals::take
* syncronise hello world example
* fmt the entire repo
Co-authored-by: Jesse Braham <jesse@beta7.io>
