Commit Graph

471 Commits

Author SHA1 Message Date
Scott Mabin
7ab9d91f26
move rwtext after other RAM data sections (#464) 2023-03-31 14:27:53 +01:00
Juraj Sadel
40bf086a0c
Add PeripheralClockControl argument to timg, wdt, sha, usb-serial-jtag and uart constructors (#463)
* PeripheralClockControl timer

* Add PeripheralClockControl to timg, wdt, sha, usb-serial-jtag and uart

* ESP32 updated examples

* ESP32C2 updated examples

* ESP32C3 updated examples

* ESP32S2 updated examples

* ESP32S3 updated examples

* ESP32C6 updated examples

* cargo fmt
2023-03-31 09:51:34 +02:00
Jesse Braham
aa235365b2 ESP32-C3: Disable usb_pad_enable when setting GPIO18/19 to input/output 2023-03-30 06:40:41 -07:00
Jesse Braham
a9104020fc
Minor documentation improvements (#460)
* Add README, improve documentation for `esp-hal-procmacros`

* Improve documentation for `esp-hal-smartled`

* Use esp-rs logo for all packages' documentation
2023-03-30 06:05:28 -07:00
Björn Quentin
a677abd3e8
Merge pull request #458 from bjoernQ/fix-c6-ieee802154-clock-enable
Fix 802.15.4 clock enabling (ESP32-C6)
2023-03-28 15:31:02 +02:00
bjoernQ
01f35245f8 Fix 802.15.4 clock enabling (ESP32-C6) 2023-03-28 13:41:21 +02:00
Jesse Braham
aac83644af New releases for all packages 2023-03-27 10:38:46 -07:00
Björn Quentin
b3435f88d9
Merge pull request #456 from bjoernQ/radio-related-clocks
Add support for radio peripheral clock control
2023-03-27 13:22:51 +02:00
bjoernQ
4bd05d9032 Fix typo 2023-03-27 13:01:36 +02:00
bjoernQ
94bbdac00e Add support for radio peripheral clock control 2023-03-27 10:26:45 +02:00
Juraj Sadel
0244c6d6fc
Feature/reset functionalities (#452)
* add `software_reset`, `software_reset_cpu` and `rtc_get_wakeup_cause`

* Add SOC wakeup symbols

* Add SleepSource and WakeupReason enums and get_wakeup_cause() function

* Add other SOC wakeups

* fixups and fmt

* address review comments

* Update symbols in WakeupReason enum

* fmt

---------

Co-authored-by: Anthony Grondin <104731965+AnthonyGrondin@users.noreply.github.com>
2023-03-24 20:37:24 +01:00
Björn Quentin
91ded64b16
Merge pull request #454 from MabezDev/esp32-dram-linker-fix
ESP32 DRAM linker fix
2023-03-24 16:59:42 +01:00
Scott Mabin
192f4678db Apply fix to esp32s2 & esp32s3 2023-03-24 15:50:23 +00:00
Scott Mabin
3444476eb2 ESP32 DRAM linker fix
The ROM code _data_ section is loaded into the middle of the DRAM
address space, unlike the other chips where it is loaded at the end.
Therefore subtracting the previously "reserved" section from heap end
could actually corrupt the ROM data section.

For the ESP32, the DRAM block has been split into two individual
segments, with some reserved segments in the middle (addresses taken
from esp-idf). At the moment we don't use the second segment at all in
esp-hal, but we could utilize it in esp-wifi for placing the internal
allocator for example.
2023-03-24 14:49:45 +00:00
Björn Quentin
8f6a0c91e9
Merge pull request #453 from vojty/patch-1
Update README.md to use esp-rs/esp-template
2023-03-24 08:51:03 +01:00
Tomáš Vojtášek
0fd5a02c66
Update README.md to use esp-rs/esp-template 2023-03-23 19:51:19 +01:00
Björn Quentin
15ce2d1452
Merge pull request #450 from MabezDev/esp-wifi-linker-script-fixes
esp32c3/c2: use rwtext.wifi in dummy section calculation
2023-03-23 15:39:23 +01:00
Scott Mabin
0b02619e37 esp32c3/c2: use rwtext.wifi in dummy section calculation 2023-03-23 12:45:30 +00:00
Björn Quentin
593dcb875b
Merge pull request #444 from bjoernQ/feature/spi-half-duplex
Half-duplex SPI
2023-03-23 08:35:25 +01:00
Jesse Braham
1ab40d41a7 Update PACs to newest versions 2023-03-22 09:33:36 -07:00
bjoernQ
ba75b151c3 Fix embassy_spi example 2023-03-22 09:06:37 +01:00
bjoernQ
6c7875afef Half-duplex SPI 2023-03-21 15:44:16 +01:00
Scott Mabin
9a5a546228
Unify linker scripts (#443)
* esp32 & esp32s2 sharing scripts

* add wokwi files

* Add fixup section for esp32s2, fix ordering of sectino includes

* Remove debug asm file

* Use shared linker scripts for s3 with fixups

* Add external.x sections back

* Move ld scripts into esp-hal-common

* esp32c3 unified linker scripts

- rework original c3 script to use the xtensa named sections
  (e.g, _SECTIONNAME_start)
- Add fixups in esp32c3 specific linker
- Remove useless text section start and end (not required when using any
  form of bootloader)

* Add RTC alias'. Move some shared fixups to a file

* comment and cleanup

* unify c2 linker script

* unify c6 linker script

* remove debug configs

* use new esp-riscv-rt

* fmt

* align db symbol names

* fix s3 db
2023-03-20 08:12:14 -07:00
Jesse Braham
536adac991
Clean up cfg gating and prelude module (#442)
* Add additional `cfg` gates to re-exports in `esp-hal-common`

This leaves only `clock`, `delay`, `peripheral`, `prelude`, `rom`, and `soc` *not* behind `cfg`s

* Simplify the prelude, update its `cfg`s, and re-export some missing traits

* Update various dependencies
2023-03-20 11:22:55 +00:00
Jesse Braham
2eeb3dbc5b
Load config for each device from a TOML files instead of hard-coding in build script (#415)
* Move chip metadata into TOML files and update build script to consume them

* Make necessary changes to get all examples building again
2023-03-16 06:41:14 -07:00
Juraj Sadel
2e97c7b5c9 Disable SWDT in sha, systimer and aes C2/C3/C6 examples 2023-03-15 07:20:13 -07:00
Juraj Sadel
ec6220f23e Fix warnings and clean a bit rtc module 2023-03-14 09:02:37 -07:00
bjoernQ
5b2729b75d Remove r0 dependency 2023-03-14 08:27:43 -07:00
Jesse Braham
a0b72bdfa5 Use latest PACs and make required changes 2023-03-14 06:23:58 -07:00
Jesse Braham
20cdf81bd6 Check the esp-hal-smartled package in CI
This does *not* verify MSRV or clippy at this time
2023-03-10 08:06:11 -08:00
Jesse Braham
728ce24109
Hide the second core in the Cpu enum for single-core devices (#432) 2023-03-10 10:52:14 +00:00
Jesse Braham
5747ddee14
Extract the esp-hal-smartled package (#429)
* Extract the `esp-hal-smartled` package

This (finally) eliminates the `esp_hal_common::utils` module!

* Remove all references to the old `smartled` feature from CI
2023-03-10 10:36:07 +00:00
Björn Quentin
c1fa400e7c
RISCV: Separate PLIC and non-PLIC (#428)
* RISCV: Separate PLIC and non-PLIC

* De-duplicate code

* Write 0 to INTR_MAP again to disable peripheral interrupts

* Limit visibility of `get_assigned_cpu_interrupt`
2023-03-09 10:57:49 -08:00
Scott Mabin
c01317e8f3 Use T::clone_unchecked instead of self to avoid infinite recursion 2023-03-08 09:17:51 -08:00
Jesse Braham
f7830e2750
Reduce duplication, simplify re-exports, and general cleanup/organization (#424)
* Move some linker scripts into `esp-hal-common` and update the build script

* Move `EspDefaultHandler` and `DefaultHandler` definitions into `esp-hal-common`

* Re-export everything from `esp-hal-common`

* Add a couple cfg symbols, cleanup/organize some exports/modules
2023-03-08 06:35:59 -08:00
Scott Mabin
fd4e8e2778 ensure _heap_end symbol excludes reserved for boot section 2023-03-07 07:33:04 -08:00
Jesse Braham
72b9bcb015 Re-export Peripheral 2023-03-07 06:42:29 -08:00
Sergio Gasquez Arcos
15d986f260
Merge pull request #422 from SergioGasquez/main
Update Xtensa install instructions
2023-03-07 11:07:39 +01:00
Sergio Gasquez
1076f54462 docs: 📝 Add comma 2023-03-07 10:36:29 +01:00
Sergio Gasquez
1f69d29316 docs: 📝 Fix typo 2023-03-07 10:35:19 +01:00
Sergio Gasquez
d8c41b47af docs: 📝 Update install instructions 2023-03-07 10:34:52 +01:00
dimi
3d49ed7294 fix MCPWM typos 2023-03-06 06:46:49 -08:00
Scott Mabin
edfa9c83fd radio impls
- also add blanket impls for &mut Sealed and &mut Peripheral
2023-03-01 08:51:34 -08:00
Gustavo Henrique Nihei
453a7ac3f0
[ESP32-C3] Restore MCUboot build after moving to esp-riscv-rt (#417)
* esp32c3-hal: Fix operations on EXTMEM peripheral

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* esp32c3-hal: Restore MCUboot build after moving to esp-riscv-rt

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* esp32c3-hal: Fix location of .data linker output section

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* ci: Enable MCUboot build for ESP32-C3

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

---------

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-03-01 14:10:35 +00:00
Jesse Braham
dc0911aa0d Use latest version of esp-backtrace for all devices 2023-02-28 09:25:55 -08:00
Jesse Braham
39b4db0cf9 Add examples for the RNG peripheral for all supported devices 2023-02-28 07:58:38 -08:00
Jesse Braham
984b7fc042
Refactor chip-specific code into esp_hal_common::soc module (#412)
* Create an `soc` module with a submodule for each chip, move `peripherals` in

* Move the `cpu_control` module into `soc`

* Move the `efuse` module into `soc`

* Refactor type definitions from `gpio` module into `soc`

* Put all embassy-related files in a common directory

* Change visibility of `GpioPin` constructor
2023-02-28 07:49:41 -08:00
Björn Quentin
84288d6867
Merge pull request #411 from bjoernQ/fix/esp32c6-add-exports
Add more exports for ESP32-C6
2023-02-28 12:52:09 +01:00
bjoernQ
7cf7d8eeac Add more exports for ESP32-C6 2023-02-28 11:34:01 +01:00
bjoernQ
3ae95674e9 Fix spi.dma_write 2023-02-27 09:26:00 -08:00