* Fix a bunch of `clippy` warnings in the `esp-hal` build script
* Resolve most clippy warnings for ESP32 (no features)
* Do the same for ESP32-S2/S3...
* Same for C2/C3...
* CI check for clippy now actually works (and passes!) for Xtensa
* RISC-V chips (except P4) now pass clippy in CI
* Add some safety doc comments which I forgot to write
* The `PwmPeripheral` trait is no longer `unsafe`, and is instead now sealed
* Add `rt-riscv` and `rt-xtensa` features to `esp-hal-common` to allow enabling/disable runtime support
* Update the CI workflow to check the chip-specific HAL packages without default features
* Update `CHANGELOG.md`
* Update to latest version of `checkout` action
* Re-order jobs to match order on filesystem
* Check all features of `esp-riscv-rt`
* Check both `esp32s2` and `esp32s3` feature for `esp-ulp-riscv-hal`
* Add a `ci` feature to `esp-riscv-rt` to making testing easier
* RISC-V executors
* Add multiprio example to RISC-V SoCs
* Check new examples
* Hack in support for generic queue
* Reserve SoftwareInterrupt0 for multicore thread-mode executors
* Merge interrupt executors
* Merge thread-mode executors
* Document the new features and expand on time drivers
* Main tasks don't have to return !
* Unify multiprio examples
* Undo C6 log output change
* Async read implementation for usb serial jtag
* Check the example in ci
* Add the example's required features
* Add changelog entry
* Improve the example
* Add examples for other boards
* Fix changelog
* Add required features for examples
* Make sure examples can build with defmt
* Remove duplicate example checks
* Fix examples
* Add changelog entry
* Actually build some examples with defmt feature enabled
* Add the defmt linker script in each package's build script
* Unify the xtal frequency features for ESP32 and ESP32-C2
* Group and re-organize features for `esp-hal-common`
* Update `esp-hal-smartled` and fix its CI check
* Update `CHANGELOG.md`
* Update feature names in documentation
* Bump MSRV to 1.67, check with `defmt` feature enabled in MSRV checks where applicable
* Add `esp32c6-lp-hal-procmacros` package to VS Code workspace
* Update `CHANGELOG.md`
* Macro to load LP core code
* Fix imports, add CHANGELOG.md entry
* Avoid code warning
* Omit path from function signature
* More error checking
* Clippy fix
* Include the ELF used by the lp_core_basic example
* Make object dependency optional
* Use 1.65 for RISCV MSRV check
* Use RUSTC_BOOTSTRAP for RISCV MSRV check
* Remove the pre-compiled LP core example
* Pin toml_edit in esp32c6-lp-hal-procmacro
* Executor related touchups
* Make log optional
* Add defmt feature and derive on Debug structs
* Test both log drivers
* Update esp-println
* Document defmt msrv
* direct vectoring support added
* provide minimal handlers for hooking the vector table directly
* changed direct vectoring interrupt enable interface to map to CPU interrupt
* direct vectoring interrupt nesting
* removed unused dependency
* added tentative c2 and c6 support for direct vector table hooking
* added direct vectoring examples
* added direct vectoring examples
* updated changelog
* added direct vectoring to CI
* Added H2 support and example, moved helpers to esp-hal-common
* Added H2 direct vectoring example to CI
* Removed remnants of removed feature
* C6 and H2 examples fixed
* C6 and H2 examples fixed
* C6 and H2 examples fixed
* Comment fixed
* Added preemption flag to RT
---------
Co-authored-by: Scott Mabin <scott@mabez.dev>
* Update the `GDMA` driver to support the ESP32-H2
* Update the `SPI` driver to support the ESP32-H2
* Add `SPI` examples for ESP32-H2
* Update CHANGELOG
* Remove copy-pasted references to ESP32-C6
* Update GPIO pins used in SPI examples, add `qspi_flash` example
* Update SPI clock configuration to produce correct clock rate
* Correct comment regarding clock source frequency
Co-authored-by: Sergio Gasquez Arcos <sergio.gasquez@gmail.com>
* H2: Add PLL_48M_CLK src to ClockControl and RawClocks
* H2: Use PLL_48M_CLK as SPI clk src
* H2: cleanup commented block in SPI driver
* H2: update docs comment in embassy_spi example
* fmt
* Add a new line in embassy_spi example
---------
Co-authored-by: Sergio Gasquez Arcos <sergio.gasquez@gmail.com>
Co-authored-by: Juraj Sadel <juraj.sadel@espressif.com>
* Small refactor to extract functions for setting up reads/writes
* Implement async capabilities for `I2C` driver
* Add async I2C examples for each supported chip
* Update CHANGELOG
