[DMA 7/8]: Remove Dma, move channels to Peripherals (#2545)
* Move DMA channels into Peripherals * Initialize DMA in the critical section needed for clock management * Update esp-hal/MIGRATING-0.22.md Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com> --------- Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>
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@ -23,7 +23,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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### Changed
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### Changed
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- DMA channel objects now implement `Peripheral` (#2526)
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- In addition to taking by value, peripheral drivers can now mutably borrow DMA channel objects. (#2526)
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- DMA channel objects are no longer wrapped in `Channel`. The `Channel` drivers are now managed by DMA enabled peripheral drivers. (#2526)
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- DMA channel objects are no longer wrapped in `Channel`. The `Channel` drivers are now managed by DMA enabled peripheral drivers. (#2526)
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- The `Dpi` driver and `DpiTransfer` now have a `Mode` type parameter. The driver's asyncness is determined by the asyncness of the `Lcd` used to create it. (#2526)
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- The `Dpi` driver and `DpiTransfer` now have a `Mode` type parameter. The driver's asyncness is determined by the asyncness of the `Lcd` used to create it. (#2526)
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- `dma::{Channel, ChannelRx, ChannelTx}::set_priority` for GDMA devices (#2403)
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- `dma::{Channel, ChannelRx, ChannelTx}::set_priority` for GDMA devices (#2403)
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@ -35,6 +35,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- `SystemTimer`s `Alarm`s are now type erased (#2576)
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- `SystemTimer`s `Alarm`s are now type erased (#2576)
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- `TimerGroup` `Timer`s are now type erased (#2581)
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- `TimerGroup` `Timer`s are now type erased (#2581)
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- PSRAM is now initialized automatically if `quad-psram` or `octal-psram` is enabled (#2546)
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- PSRAM is now initialized automatically if `quad-psram` or `octal-psram` is enabled (#2546)
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- DMA channels are now available via the `Peripherals` struct, and have been renamed accordingly. (#2545)
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### Fixed
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### Fixed
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@ -46,6 +47,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- `SysTimerAlarms` has been removed, alarms are now part of the `SystemTimer` struct (#2576)
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- `SysTimerAlarms` has been removed, alarms are now part of the `SystemTimer` struct (#2576)
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- `FrozenUnit`, `AnyUnit`, `SpecificUnit`, `SpecificComparator`, `AnyComparator` have been removed from `systimer` (#2576)
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- `FrozenUnit`, `AnyUnit`, `SpecificUnit`, `SpecificComparator`, `AnyComparator` have been removed from `systimer` (#2576)
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- `esp_hal::psram::psram_range` (#2546)
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- `esp_hal::psram::psram_range` (#2546)
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- The `Dma` structure has been removed. (#2545)
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## [0.22.0] - 2024-11-20
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## [0.22.0] - 2024-11-20
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@ -2,6 +2,20 @@
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## DMA changes
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## DMA changes
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### Accessing channel objects
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DMA channels are now available through the `Peripherals` struct, which is returned
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by `esp_hal::init()`. The channels themselves have been renamed to match other peripheral singletons.
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- ESP32-C2, C3, C6, H2 and S3: `channelX -> DMA_CHX`
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- ESP32 and S2: `spiXchannel -> DMA_SPIX`, `i2sXchannel -> DMA_I2SX`
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```diff
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-let dma = Dma::new(peripherals.DMA);
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-let channel = dma.channel2;
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+let channel = peripherals.DMA_CH2;
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```
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### Configuration changes
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### Configuration changes
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- `configure_for_async` and `configure` have been removed
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- `configure_for_async` and `configure` have been removed
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@ -14,13 +14,14 @@
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//!
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//!
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//! <em>PS: Note that the number of DMA channels is chip-specific.</em>
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//! <em>PS: Note that the number of DMA channels is chip-specific.</em>
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use critical_section::CriticalSection;
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use crate::{
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use crate::{
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dma::*,
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dma::*,
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interrupt::Priority,
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interrupt::Priority,
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macros::handler,
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macros::handler,
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peripheral::{Peripheral, PeripheralRef},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::Interrupt,
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peripherals::Interrupt,
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system::{self, PeripheralClockControl},
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};
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};
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/// An arbitrary GDMA channel
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/// An arbitrary GDMA channel
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@ -776,53 +777,10 @@ crate::impl_dma_eligible! {
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}
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}
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}
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}
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/// GDMA Peripheral
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pub(super) fn init_dma(_cs: CriticalSection<'_>) {
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///
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let dma = unsafe { crate::soc::peripherals::DMA::steal() };
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/// This offers the available DMA channels.
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dma.misc_conf().modify(|_, w| w.ahbm_rst_inter().set_bit());
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pub struct Dma<'d> {
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dma.misc_conf()
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_inner: PeripheralRef<'d, crate::peripherals::DMA>,
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.modify(|_, w| w.ahbm_rst_inter().clear_bit());
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/// Channel 0
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dma.misc_conf().modify(|_, w| w.clk_en().set_bit());
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pub channel0: DmaChannel0,
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/// Channel 1
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#[cfg(not(esp32c2))]
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pub channel1: DmaChannel1,
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/// Channel 2
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#[cfg(not(esp32c2))]
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pub channel2: DmaChannel2,
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/// Channel 3
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#[cfg(esp32s3)]
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pub channel3: DmaChannel3,
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/// Channel 4
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#[cfg(esp32s3)]
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pub channel4: DmaChannel4,
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}
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impl<'d> Dma<'d> {
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/// Create a DMA instance.
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pub fn new(dma: impl Peripheral<P = crate::peripherals::DMA> + 'd) -> Dma<'d> {
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crate::into_ref!(dma);
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if PeripheralClockControl::enable(system::Peripheral::Gdma) {
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PeripheralClockControl::reset(system::Peripheral::Gdma);
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}
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dma.misc_conf().modify(|_, w| w.ahbm_rst_inter().set_bit());
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dma.misc_conf()
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.modify(|_, w| w.ahbm_rst_inter().clear_bit());
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dma.misc_conf().modify(|_, w| w.clk_en().set_bit());
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unsafe {
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Dma {
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_inner: dma,
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channel0: DmaChannel0::steal(),
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#[cfg(not(esp32c2))]
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channel1: DmaChannel1::steal(),
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#[cfg(not(esp32c2))]
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channel2: DmaChannel2::steal(),
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#[cfg(esp32s3)]
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channel3: DmaChannel3::steal(),
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#[cfg(esp32s3)]
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channel4: DmaChannel4::steal(),
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}
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}
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}
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}
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}
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@ -19,10 +19,8 @@
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#![doc = crate::before_snippet!()]
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#![doc = crate::before_snippet!()]
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//! # use esp_hal::dma_buffers;
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//! # use esp_hal::dma_buffers;
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//! # use esp_hal::spi::{master::{Config, Spi}, SpiMode};
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//! # use esp_hal::spi::{master::{Config, Spi}, SpiMode};
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//! # use esp_hal::dma::Dma;
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#![cfg_attr(pdma, doc = "let dma_channel = peripherals.DMA_SPI2;")]
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//! let dma = Dma::new(peripherals.DMA);
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#![cfg_attr(gdma, doc = "let dma_channel = peripherals.DMA_CH0;")]
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#![cfg_attr(any(esp32, esp32s2), doc = "let dma_channel = dma.spi2channel;")]
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#![cfg_attr(not(any(esp32, esp32s2)), doc = "let dma_channel = dma.channel0;")]
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//! let sclk = peripherals.GPIO0;
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//! let sclk = peripherals.GPIO0;
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//! let miso = peripherals.GPIO2;
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//! let miso = peripherals.GPIO2;
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//! let mosi = peripherals.GPIO4;
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//! let mosi = peripherals.GPIO4;
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@ -70,6 +68,7 @@ use crate::{
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peripheral::{Peripheral, PeripheralRef},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::Interrupt,
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peripherals::Interrupt,
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soc::is_slice_in_dram,
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soc::is_slice_in_dram,
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system,
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Async,
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Async,
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Blocking,
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Blocking,
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Cpu,
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Cpu,
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@ -1665,7 +1664,7 @@ impl<DEG: DmaChannel> DmaChannelConvert<DEG> for DEG {
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#[cfg_attr(pdma, doc = "")]
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#[cfg_attr(pdma, doc = "")]
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#[cfg_attr(
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#[cfg_attr(
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pdma,
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pdma,
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doc = "Note that using mismatching channels (e.g. trying to use `spi2channel` with SPI3) may compile, but will panic in runtime."
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doc = "Note that using mismatching channels (e.g. trying to use `DMA_SPI2` with SPI3) may compile, but will panic in runtime."
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)]
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)]
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#[cfg_attr(pdma, doc = "")]
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#[cfg_attr(pdma, doc = "")]
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/// ## Example
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/// ## Example
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@ -1679,7 +1678,6 @@ impl<DEG: DmaChannel> DmaChannelConvert<DEG> for DEG {
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/// use esp_hal::dma::DmaChannelFor;
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/// use esp_hal::dma::DmaChannelFor;
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/// use esp_hal::peripheral::Peripheral;
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/// use esp_hal::peripheral::Peripheral;
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/// use esp_hal::Blocking;
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/// use esp_hal::Blocking;
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/// use esp_hal::dma::Dma;
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///
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///
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/// fn configures_spi_dma<'d, S, CH>(
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/// fn configures_spi_dma<'d, S, CH>(
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/// spi: Spi<'d, Blocking, S>,
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/// spi: Spi<'d, Blocking, S>,
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@ -1691,10 +1689,8 @@ impl<DEG: DmaChannel> DmaChannelConvert<DEG> for DEG {
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/// {
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/// {
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/// spi.with_dma(channel)
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/// spi.with_dma(channel)
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/// }
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/// }
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///
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#[cfg_attr(pdma, doc = "let dma_channel = peripherals.DMA_SPI2;")]
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/// let dma = Dma::new(peripherals.DMA);
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#[cfg_attr(gdma, doc = "let dma_channel = peripherals.DMA_CH0;")]
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#[cfg_attr(pdma, doc = "let dma_channel = dma.spi2channel;")]
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#[cfg_attr(gdma, doc = "let dma_channel = dma.channel0;")]
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#[doc = ""]
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#[doc = ""]
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/// let spi = Spi::new_with_config(
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/// let spi = Spi::new_with_config(
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/// peripherals.SPI2,
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/// peripherals.SPI2,
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@ -1802,6 +1798,21 @@ pub trait Rx: crate::private::Sealed {
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fn waker(&self) -> &'static crate::asynch::AtomicWaker;
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fn waker(&self) -> &'static crate::asynch::AtomicWaker;
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}
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}
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// NOTE(p4): because the P4 has two different GDMAs, we won't be able to use
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// `GenericPeripheralGuard`.
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cfg_if::cfg_if! {
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if #[cfg(pdma)] {
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type PeripheralGuard = system::GenericPeripheralGuard<{ system::Peripheral::Dma as u8}>;
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} else {
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type PeripheralGuard = system::GenericPeripheralGuard<{ system::Peripheral::Gdma as u8}>;
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}
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}
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fn create_guard(_ch: &impl RegisterAccess) -> PeripheralGuard {
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// NOTE(p4): this function will read the channel's DMA peripheral from `_ch`
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system::GenericPeripheralGuard::new_with(init_dma)
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}
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// DMA receive channel
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// DMA receive channel
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#[non_exhaustive]
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#[non_exhaustive]
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#[doc(hidden)]
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#[doc(hidden)]
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@ -1812,6 +1823,7 @@ where
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{
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{
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pub(crate) rx_impl: PeripheralRef<'a, CH>,
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pub(crate) rx_impl: PeripheralRef<'a, CH>,
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pub(crate) _phantom: PhantomData<M>,
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pub(crate) _phantom: PhantomData<M>,
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pub(crate) _guard: PeripheralGuard,
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}
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}
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impl<'a, CH> ChannelRx<'a, Blocking, CH>
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impl<'a, CH> ChannelRx<'a, Blocking, CH>
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@ -1821,6 +1833,9 @@ where
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/// Creates a new RX channel half.
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/// Creates a new RX channel half.
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pub fn new(rx_impl: impl Peripheral<P = CH> + 'a) -> Self {
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pub fn new(rx_impl: impl Peripheral<P = CH> + 'a) -> Self {
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crate::into_ref!(rx_impl);
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crate::into_ref!(rx_impl);
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let _guard = create_guard(&*rx_impl);
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#[cfg(gdma)]
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#[cfg(gdma)]
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// clear the mem2mem mode to avoid failed DMA if this
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// clear the mem2mem mode to avoid failed DMA if this
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// channel was previously used for a mem2mem transfer.
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// channel was previously used for a mem2mem transfer.
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@ -1836,6 +1851,7 @@ where
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Self {
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Self {
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rx_impl,
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rx_impl,
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_phantom: PhantomData,
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_phantom: PhantomData,
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_guard,
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}
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}
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}
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}
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@ -1848,6 +1864,7 @@ where
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ChannelRx {
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ChannelRx {
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rx_impl: self.rx_impl,
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rx_impl: self.rx_impl,
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_phantom: PhantomData,
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_phantom: PhantomData,
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_guard: self._guard,
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}
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}
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}
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}
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@ -1878,6 +1895,7 @@ where
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ChannelRx {
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ChannelRx {
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rx_impl: self.rx_impl,
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rx_impl: self.rx_impl,
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_phantom: PhantomData,
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_phantom: PhantomData,
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_guard: self._guard,
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}
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}
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}
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}
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}
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}
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@ -2095,6 +2113,7 @@ where
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{
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{
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pub(crate) tx_impl: PeripheralRef<'a, CH>,
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pub(crate) tx_impl: PeripheralRef<'a, CH>,
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pub(crate) _phantom: PhantomData<M>,
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pub(crate) _phantom: PhantomData<M>,
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pub(crate) _guard: PeripheralGuard,
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}
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}
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impl<'a, CH> ChannelTx<'a, Blocking, CH>
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impl<'a, CH> ChannelTx<'a, Blocking, CH>
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@ -2104,6 +2123,9 @@ where
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/// Creates a new TX channel half.
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/// Creates a new TX channel half.
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pub fn new(tx_impl: impl Peripheral<P = CH> + 'a) -> Self {
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pub fn new(tx_impl: impl Peripheral<P = CH> + 'a) -> Self {
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crate::into_ref!(tx_impl);
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crate::into_ref!(tx_impl);
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let _guard = create_guard(&*tx_impl);
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if let Some(interrupt) = tx_impl.peripheral_interrupt() {
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if let Some(interrupt) = tx_impl.peripheral_interrupt() {
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for cpu in Cpu::all() {
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for cpu in Cpu::all() {
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crate::interrupt::disable(cpu, interrupt);
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crate::interrupt::disable(cpu, interrupt);
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@ -2113,6 +2135,7 @@ where
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Self {
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Self {
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tx_impl,
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tx_impl,
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_phantom: PhantomData,
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_phantom: PhantomData,
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_guard,
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}
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}
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}
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}
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@ -2125,6 +2148,7 @@ where
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ChannelTx {
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ChannelTx {
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tx_impl: self.tx_impl,
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tx_impl: self.tx_impl,
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_phantom: PhantomData,
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_phantom: PhantomData,
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_guard: self._guard,
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}
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}
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}
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}
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@ -2155,6 +2179,7 @@ where
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ChannelTx {
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ChannelTx {
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tx_impl: self.tx_impl,
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tx_impl: self.tx_impl,
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_phantom: PhantomData,
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_phantom: PhantomData,
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_guard: self._guard,
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}
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}
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}
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}
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}
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}
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@ -11,6 +11,7 @@
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//! [SPI]: ../spi/index.html
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//! [SPI]: ../spi/index.html
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//! [I2S]: ../i2s/index.html
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//! [I2S]: ../i2s/index.html
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use critical_section::CriticalSection;
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use portable_atomic::{AtomicBool, Ordering};
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use portable_atomic::{AtomicBool, Ordering};
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use crate::{
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use crate::{
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@ -20,7 +21,6 @@ use crate::{
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macros::handler,
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macros::handler,
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peripheral::{Peripheral, PeripheralRef},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::Interrupt,
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peripherals::Interrupt,
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system::{self, PeripheralClockControl},
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};
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};
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type SpiRegisterBlock = crate::peripherals::spi2::RegisterBlock;
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type SpiRegisterBlock = crate::peripherals::spi2::RegisterBlock;
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@ -876,52 +876,18 @@ crate::impl_dma_eligible!([I2s0DmaChannel] I2S0 => I2s0);
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#[cfg(i2s1)]
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#[cfg(i2s1)]
|
||||||
crate::impl_dma_eligible!([I2s1DmaChannel] I2S1 => I2s1);
|
crate::impl_dma_eligible!([I2s1DmaChannel] I2S1 => I2s1);
|
||||||
|
|
||||||
/// DMA Peripheral
|
pub(super) fn init_dma(_cs: CriticalSection<'_>) {
|
||||||
///
|
#[cfg(esp32)]
|
||||||
/// This offers the available DMA channels.
|
{
|
||||||
pub struct Dma<'d> {
|
// (only) on ESP32 we need to configure DPORT for the SPI DMA channels
|
||||||
_inner: PeripheralRef<'d, crate::peripherals::DMA>,
|
// This assignes the DMA channels to the SPI peripherals, which is more
|
||||||
/// DMA channel for SPI2
|
// restrictive than necessary but we currently support the same
|
||||||
pub spi2channel: Spi2DmaChannel,
|
// number of SPI peripherals as SPI DMA channels so it's not a big
|
||||||
/// DMA channel for SPI3
|
// deal.
|
||||||
pub spi3channel: Spi3DmaChannel,
|
let dport = unsafe { crate::peripherals::DPORT::steal() };
|
||||||
/// DMA channel for I2S0
|
dport
|
||||||
pub i2s0channel: I2s0DmaChannel,
|
.spi_dma_chan_sel()
|
||||||
/// DMA channel for I2S1
|
.modify(|_, w| unsafe { w.spi2_dma_chan_sel().bits(1).spi3_dma_chan_sel().bits(2) });
|
||||||
#[cfg(i2s1)]
|
|
||||||
pub i2s1channel: I2s1DmaChannel,
|
|
||||||
}
|
|
||||||
|
|
||||||
impl<'d> Dma<'d> {
|
|
||||||
/// Create a DMA instance.
|
|
||||||
pub fn new(dma: impl Peripheral<P = crate::peripherals::DMA> + 'd) -> Dma<'d> {
|
|
||||||
if PeripheralClockControl::enable(system::Peripheral::Dma) {
|
|
||||||
PeripheralClockControl::reset(system::Peripheral::Dma);
|
|
||||||
}
|
|
||||||
|
|
||||||
#[cfg(esp32)]
|
|
||||||
{
|
|
||||||
// (only) on ESP32 we need to configure DPORT for the SPI DMA channels
|
|
||||||
// This assignes the DMA channels to the SPI peripherals, which is more
|
|
||||||
// restrictive than necessary but we currently support the same
|
|
||||||
// number of SPI peripherals as SPI DMA channels so it's not a big
|
|
||||||
// deal.
|
|
||||||
let dport = unsafe { &*crate::peripherals::DPORT::PTR };
|
|
||||||
dport.spi_dma_chan_sel().modify(|_, w| unsafe {
|
|
||||||
w.spi2_dma_chan_sel().bits(1).spi3_dma_chan_sel().bits(2)
|
|
||||||
});
|
|
||||||
}
|
|
||||||
|
|
||||||
unsafe {
|
|
||||||
Dma {
|
|
||||||
_inner: dma.into_ref(),
|
|
||||||
spi2channel: Spi2DmaChannel::steal(),
|
|
||||||
spi3channel: Spi3DmaChannel::steal(),
|
|
||||||
i2s0channel: I2s0DmaChannel::steal(),
|
|
||||||
#[cfg(i2s1)]
|
|
||||||
i2s1channel: I2s1DmaChannel::steal(),
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -31,10 +31,11 @@
|
|||||||
#![doc = crate::before_snippet!()]
|
#![doc = crate::before_snippet!()]
|
||||||
//! # use esp_hal::i2s::master::{I2s, Standard, DataFormat};
|
//! # use esp_hal::i2s::master::{I2s, Standard, DataFormat};
|
||||||
//! # use esp_hal::dma_buffers;
|
//! # use esp_hal::dma_buffers;
|
||||||
//! # use esp_hal::dma::Dma;
|
#![cfg_attr(any(esp32, esp32s2), doc = "let dma_channel = peripherals.DMA_I2S0;")]
|
||||||
//! let dma = Dma::new(peripherals.DMA);
|
#![cfg_attr(
|
||||||
#![cfg_attr(any(esp32, esp32s2), doc = "let dma_channel = dma.i2s0channel;")]
|
not(any(esp32, esp32s2)),
|
||||||
#![cfg_attr(not(any(esp32, esp32s2)), doc = "let dma_channel = dma.channel0;")]
|
doc = "let dma_channel = peripherals.DMA_CH0;"
|
||||||
|
)]
|
||||||
//! let (mut rx_buffer, rx_descriptors, _, tx_descriptors) =
|
//! let (mut rx_buffer, rx_descriptors, _, tx_descriptors) =
|
||||||
//! dma_buffers!(0, 4 * 4092);
|
//! dma_buffers!(0, 4 * 4092);
|
||||||
//!
|
//!
|
||||||
|
|||||||
@ -39,7 +39,7 @@
|
|||||||
//!
|
//!
|
||||||
//! ```rust, no_run
|
//! ```rust, no_run
|
||||||
#![doc = crate::before_snippet!()]
|
#![doc = crate::before_snippet!()]
|
||||||
//! # use esp_hal::dma::{Dma, DmaTxBuf};
|
//! # use esp_hal::dma::DmaTxBuf;
|
||||||
//! # use esp_hal::dma_buffers;
|
//! # use esp_hal::dma_buffers;
|
||||||
//! # use esp_hal::delay::Delay;
|
//! # use esp_hal::delay::Delay;
|
||||||
//! # use esp_hal::i2s::parallel::{I2sParallel, TxEightBits};
|
//! # use esp_hal::i2s::parallel::{I2sParallel, TxEightBits};
|
||||||
@ -48,8 +48,7 @@
|
|||||||
//! const BUFFER_SIZE: usize = 256;
|
//! const BUFFER_SIZE: usize = 256;
|
||||||
//!
|
//!
|
||||||
//! let delay = Delay::new();
|
//! let delay = Delay::new();
|
||||||
//! let dma = Dma::new(peripherals.DMA);
|
//! let dma_channel = peripherals.DMA_I2S1;
|
||||||
//! let dma_channel = dma.i2s1channel;
|
|
||||||
//! let i2s = peripherals.I2S1;
|
//! let i2s = peripherals.I2S1;
|
||||||
//! let clock = peripherals.GPIO25;
|
//! let clock = peripherals.GPIO25;
|
||||||
//!
|
//!
|
||||||
|
|||||||
@ -19,10 +19,6 @@
|
|||||||
//! # use esp_hal::lcd_cam::{cam::{Camera, RxEightBits}, LcdCam};
|
//! # use esp_hal::lcd_cam::{cam::{Camera, RxEightBits}, LcdCam};
|
||||||
//! # use fugit::RateExtU32;
|
//! # use fugit::RateExtU32;
|
||||||
//! # use esp_hal::dma_rx_stream_buffer;
|
//! # use esp_hal::dma_rx_stream_buffer;
|
||||||
//! # use esp_hal::dma::Dma;
|
|
||||||
//!
|
|
||||||
//! # let dma = Dma::new(peripherals.DMA);
|
|
||||||
//! # let channel = dma.channel0;
|
|
||||||
//!
|
//!
|
||||||
//! # let dma_buf = dma_rx_stream_buffer!(20 * 1000, 1000);
|
//! # let dma_buf = dma_rx_stream_buffer!(20 * 1000, 1000);
|
||||||
//!
|
//!
|
||||||
@ -44,7 +40,7 @@
|
|||||||
//! let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
//! let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
||||||
//! let mut camera = Camera::new(
|
//! let mut camera = Camera::new(
|
||||||
//! lcd_cam.cam,
|
//! lcd_cam.cam,
|
||||||
//! channel,
|
//! peripherals.DMA_CH0,
|
||||||
//! data_pins,
|
//! data_pins,
|
||||||
//! 20u32.MHz(),
|
//! 20u32.MHz(),
|
||||||
//! )
|
//! )
|
||||||
|
|||||||
@ -24,11 +24,8 @@
|
|||||||
//! # }
|
//! # }
|
||||||
//! # };
|
//! # };
|
||||||
//! # use esp_hal::dma_loop_buffer;
|
//! # use esp_hal::dma_loop_buffer;
|
||||||
//! # use esp_hal::dma::{Dma, DmaPriority};
|
|
||||||
//!
|
|
||||||
//! # let dma = Dma::new(peripherals.DMA);
|
|
||||||
//! # let channel = dma.channel0;
|
|
||||||
//!
|
//!
|
||||||
|
//! # let channel = peripherals.DMA_CH0;
|
||||||
//! # let mut dma_buf = dma_loop_buffer!(32);
|
//! # let mut dma_buf = dma_loop_buffer!(32);
|
||||||
//!
|
//!
|
||||||
//! let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
//! let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
||||||
|
|||||||
@ -17,10 +17,7 @@
|
|||||||
#![doc = crate::before_snippet!()]
|
#![doc = crate::before_snippet!()]
|
||||||
//! # use esp_hal::lcd_cam::{LcdCam, lcd::i8080::{Config, I8080, TxEightBits}};
|
//! # use esp_hal::lcd_cam::{LcdCam, lcd::i8080::{Config, I8080, TxEightBits}};
|
||||||
//! # use esp_hal::dma_tx_buffer;
|
//! # use esp_hal::dma_tx_buffer;
|
||||||
//! # use esp_hal::dma::{Dma, DmaTxBuf};
|
//! # use esp_hal::dma::DmaTxBuf;
|
||||||
//!
|
|
||||||
//! # let dma = Dma::new(peripherals.DMA);
|
|
||||||
//! # let channel = dma.channel0;
|
|
||||||
//!
|
//!
|
||||||
//! # let mut dma_buf = dma_tx_buffer!(32678).unwrap();
|
//! # let mut dma_buf = dma_tx_buffer!(32678).unwrap();
|
||||||
//!
|
//!
|
||||||
@ -38,7 +35,7 @@
|
|||||||
//!
|
//!
|
||||||
//! let mut i8080 = I8080::new(
|
//! let mut i8080 = I8080::new(
|
||||||
//! lcd_cam.lcd,
|
//! lcd_cam.lcd,
|
||||||
//! channel,
|
//! peripherals.DMA_CH0,
|
||||||
//! tx_pins,
|
//! tx_pins,
|
||||||
//! 20.MHz(),
|
//! 20.MHz(),
|
||||||
//! Config::default(),
|
//! Config::default(),
|
||||||
|
|||||||
@ -16,15 +16,13 @@
|
|||||||
//! ```rust, no_run
|
//! ```rust, no_run
|
||||||
#![doc = crate::before_snippet!()]
|
#![doc = crate::before_snippet!()]
|
||||||
//! # use esp_hal::delay::Delay;
|
//! # use esp_hal::delay::Delay;
|
||||||
//! # use esp_hal::dma::Dma;
|
|
||||||
//! # use esp_hal::dma_buffers;
|
//! # use esp_hal::dma_buffers;
|
||||||
//! # use esp_hal::gpio::NoPin;
|
//! # use esp_hal::gpio::NoPin;
|
||||||
//! # use esp_hal::parl_io::{BitPackOrder, ParlIoRxOnly, RxFourBits};
|
//! # use esp_hal::parl_io::{BitPackOrder, ParlIoRxOnly, RxFourBits};
|
||||||
//!
|
//!
|
||||||
//! // Initialize DMA buffer and descriptors for data reception
|
//! // Initialize DMA buffer and descriptors for data reception
|
||||||
//! let (rx_buffer, rx_descriptors, _, _) = dma_buffers!(32000, 0);
|
//! let (rx_buffer, rx_descriptors, _, _) = dma_buffers!(32000, 0);
|
||||||
//! let dma = Dma::new(peripherals.DMA);
|
//! let dma_channel = peripherals.DMA_CH0;
|
||||||
//! let dma_channel = dma.channel0;
|
|
||||||
//!
|
//!
|
||||||
//! // Configure the 4-bit input pins and clock pin
|
//! // Configure the 4-bit input pins and clock pin
|
||||||
//! let mut rx_pins = RxFourBits::new(
|
//! let mut rx_pins = RxFourBits::new(
|
||||||
@ -74,14 +72,12 @@
|
|||||||
//! ```rust, no_run
|
//! ```rust, no_run
|
||||||
#![doc = crate::before_snippet!()]
|
#![doc = crate::before_snippet!()]
|
||||||
//! # use esp_hal::delay::Delay;
|
//! # use esp_hal::delay::Delay;
|
||||||
//! # use esp_hal::dma::Dma;
|
|
||||||
//! # use esp_hal::dma_buffers;
|
//! # use esp_hal::dma_buffers;
|
||||||
//! # use esp_hal::parl_io::{BitPackOrder, ParlIoTxOnly, TxFourBits, SampleEdge, ClkOutPin, TxPinConfigWithValidPin};
|
//! # use esp_hal::parl_io::{BitPackOrder, ParlIoTxOnly, TxFourBits, SampleEdge, ClkOutPin, TxPinConfigWithValidPin};
|
||||||
//!
|
//!
|
||||||
//! // Initialize DMA buffer and descriptors for data reception
|
//! // Initialize DMA buffer and descriptors for data reception
|
||||||
//! let (_, _, tx_buffer, tx_descriptors) = dma_buffers!(0, 32000);
|
//! let (_, _, tx_buffer, tx_descriptors) = dma_buffers!(0, 32000);
|
||||||
//! let dma = Dma::new(peripherals.DMA);
|
//! let dma_channel = peripherals.DMA_CH0;
|
||||||
//! let dma_channel = dma.channel0;
|
|
||||||
//!
|
//!
|
||||||
//! // Configure the 4-bit input pins and clock pin
|
//! // Configure the 4-bit input pins and clock pin
|
||||||
//! let tx_pins = TxFourBits::new(
|
//! let tx_pins = TxFourBits::new(
|
||||||
|
|||||||
@ -246,10 +246,15 @@ mod peripheral_macros {
|
|||||||
peripherals: [
|
peripherals: [
|
||||||
$(
|
$(
|
||||||
$name:ident <= $from_pac:tt $(($($interrupt:ident),*))?
|
$name:ident <= $from_pac:tt $(($($interrupt:ident),*))?
|
||||||
), *$(,)?
|
),* $(,)?
|
||||||
],
|
],
|
||||||
pins: [
|
pins: [
|
||||||
$( ( $pin:literal, $($pin_tokens:tt)* ) )*
|
$( ( $pin:literal, $($pin_tokens:tt)* ) )*
|
||||||
|
],
|
||||||
|
dma_channels: [
|
||||||
|
$(
|
||||||
|
$channel_name:ident : $channel_ty:path
|
||||||
|
),* $(,)?
|
||||||
]
|
]
|
||||||
) => {
|
) => {
|
||||||
|
|
||||||
@ -280,6 +285,11 @@ mod peripheral_macros {
|
|||||||
#[doc = concat!("GPIO", stringify!($pin))]
|
#[doc = concat!("GPIO", stringify!($pin))]
|
||||||
pub [<GPIO $pin>]: $crate::gpio::GpioPin<$pin>,
|
pub [<GPIO $pin>]: $crate::gpio::GpioPin<$pin>,
|
||||||
)*
|
)*
|
||||||
|
|
||||||
|
$(
|
||||||
|
#[doc = concat!(stringify!($channel_name), " DMA channel.")]
|
||||||
|
pub $channel_name: $crate::dma::$channel_ty,
|
||||||
|
)*
|
||||||
}
|
}
|
||||||
|
|
||||||
impl Peripherals {
|
impl Peripherals {
|
||||||
@ -313,6 +323,10 @@ mod peripheral_macros {
|
|||||||
$(
|
$(
|
||||||
[<GPIO $pin>]: $crate::gpio::GpioPin::<$pin>::steal(),
|
[<GPIO $pin>]: $crate::gpio::GpioPin::<$pin>::steal(),
|
||||||
)*
|
)*
|
||||||
|
|
||||||
|
$(
|
||||||
|
$channel_name: $crate::dma::$channel_ty::steal(),
|
||||||
|
)*
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@ -30,7 +30,6 @@ crate::peripherals! {
|
|||||||
CPU_CTRL <= virtual,
|
CPU_CTRL <= virtual,
|
||||||
DAC1 <= virtual,
|
DAC1 <= virtual,
|
||||||
DAC2 <= virtual,
|
DAC2 <= virtual,
|
||||||
DMA <= virtual,
|
|
||||||
EFUSE <= EFUSE,
|
EFUSE <= EFUSE,
|
||||||
FLASH_ENCRYPTION <= FLASH_ENCRYPTION,
|
FLASH_ENCRYPTION <= FLASH_ENCRYPTION,
|
||||||
FRC_TIMER <= FRC_TIMER,
|
FRC_TIMER <= FRC_TIMER,
|
||||||
@ -112,5 +111,11 @@ crate::peripherals! {
|
|||||||
(37, [Input, Analog, RtcIoInput])
|
(37, [Input, Analog, RtcIoInput])
|
||||||
(38, [Input, Analog, RtcIoInput])
|
(38, [Input, Analog, RtcIoInput])
|
||||||
(39, [Input, Analog, RtcIoInput])
|
(39, [Input, Analog, RtcIoInput])
|
||||||
|
],
|
||||||
|
dma_channels: [
|
||||||
|
DMA_SPI2: Spi2DmaChannel,
|
||||||
|
DMA_SPI3: Spi3DmaChannel,
|
||||||
|
DMA_I2S0: I2s0DmaChannel,
|
||||||
|
DMA_I2S1: I2s1DmaChannel,
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
|
|||||||
@ -25,7 +25,6 @@ crate::peripherals! {
|
|||||||
APB_CTRL <= APB_CTRL,
|
APB_CTRL <= APB_CTRL,
|
||||||
ASSIST_DEBUG <= ASSIST_DEBUG,
|
ASSIST_DEBUG <= ASSIST_DEBUG,
|
||||||
BT <= virtual,
|
BT <= virtual,
|
||||||
DMA <= DMA (DMA_CH0),
|
|
||||||
ECC <= ECC,
|
ECC <= ECC,
|
||||||
EFUSE <= EFUSE,
|
EFUSE <= EFUSE,
|
||||||
EXTMEM <= EXTMEM,
|
EXTMEM <= EXTMEM,
|
||||||
@ -72,5 +71,8 @@ crate::peripherals! {
|
|||||||
(18, [Input, Output])
|
(18, [Input, Output])
|
||||||
(19, [Input, Output])
|
(19, [Input, Output])
|
||||||
(20, [Input, Output] (0 => U0RXD) ())
|
(20, [Input, Output] (0 => U0RXD) ())
|
||||||
|
],
|
||||||
|
dma_channels: [
|
||||||
|
DMA_CH0: DmaChannel0,
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
|
|||||||
@ -27,7 +27,6 @@ crate::peripherals! {
|
|||||||
APB_CTRL <= APB_CTRL,
|
APB_CTRL <= APB_CTRL,
|
||||||
ASSIST_DEBUG <= ASSIST_DEBUG,
|
ASSIST_DEBUG <= ASSIST_DEBUG,
|
||||||
BT <= virtual,
|
BT <= virtual,
|
||||||
DMA <= DMA (DMA_CH0,DMA_CH1,DMA_CH2),
|
|
||||||
DS <= DS,
|
DS <= DS,
|
||||||
EFUSE <= EFUSE,
|
EFUSE <= EFUSE,
|
||||||
EXTMEM <= EXTMEM,
|
EXTMEM <= EXTMEM,
|
||||||
@ -85,5 +84,10 @@ crate::peripherals! {
|
|||||||
(19, [Input, Output])
|
(19, [Input, Output])
|
||||||
(20, [Input, Output] (0 => U0RXD) ())
|
(20, [Input, Output] (0 => U0RXD) ())
|
||||||
(21, [Input, Output] () (0 => U0TXD))
|
(21, [Input, Output] () (0 => U0TXD))
|
||||||
|
],
|
||||||
|
dma_channels: [
|
||||||
|
DMA_CH0: DmaChannel0,
|
||||||
|
DMA_CH1: DmaChannel1,
|
||||||
|
DMA_CH2: DmaChannel2,
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
|
|||||||
@ -26,7 +26,6 @@ crate::peripherals! {
|
|||||||
ASSIST_DEBUG <= ASSIST_DEBUG,
|
ASSIST_DEBUG <= ASSIST_DEBUG,
|
||||||
ATOMIC <= ATOMIC,
|
ATOMIC <= ATOMIC,
|
||||||
BT <= virtual,
|
BT <= virtual,
|
||||||
DMA <= DMA (DMA_IN_CH0,DMA_IN_CH1,DMA_IN_CH2,DMA_OUT_CH0,DMA_OUT_CH1,DMA_OUT_CH2),
|
|
||||||
DS <= DS,
|
DS <= DS,
|
||||||
ECC <= ECC,
|
ECC <= ECC,
|
||||||
EFUSE <= EFUSE,
|
EFUSE <= EFUSE,
|
||||||
@ -130,5 +129,10 @@ crate::peripherals! {
|
|||||||
(28, [Input, Output] (0 => SPIHD) (0 => SPIHD))
|
(28, [Input, Output] (0 => SPIHD) (0 => SPIHD))
|
||||||
(29, [Input, Output] () (0 => SPICLK_MUX))
|
(29, [Input, Output] () (0 => SPICLK_MUX))
|
||||||
(30, [Input, Output] (0 => SPID) (0 => SPID))
|
(30, [Input, Output] (0 => SPID) (0 => SPID))
|
||||||
|
],
|
||||||
|
dma_channels: [
|
||||||
|
DMA_CH0: DmaChannel0,
|
||||||
|
DMA_CH1: DmaChannel1,
|
||||||
|
DMA_CH2: DmaChannel2,
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
|
|||||||
@ -25,7 +25,6 @@ crate::peripherals! {
|
|||||||
AES <= AES,
|
AES <= AES,
|
||||||
ASSIST_DEBUG <= ASSIST_DEBUG,
|
ASSIST_DEBUG <= ASSIST_DEBUG,
|
||||||
BT <= virtual,
|
BT <= virtual,
|
||||||
DMA <= DMA (DMA_IN_CH0,DMA_IN_CH1,DMA_IN_CH2,DMA_OUT_CH0,DMA_OUT_CH1,DMA_OUT_CH2),
|
|
||||||
DS <= DS,
|
DS <= DS,
|
||||||
ECC <= ECC,
|
ECC <= ECC,
|
||||||
EFUSE <= EFUSE,
|
EFUSE <= EFUSE,
|
||||||
@ -117,5 +116,10 @@ crate::peripherals! {
|
|||||||
(25, [Input, Output] () (2 => FSPICS3))
|
(25, [Input, Output] () (2 => FSPICS3))
|
||||||
(26, [Input, Output] () (2 => FSPICS4))
|
(26, [Input, Output] () (2 => FSPICS4))
|
||||||
(27, [Input, Output] () (2 => FSPICS5))
|
(27, [Input, Output] () (2 => FSPICS5))
|
||||||
|
],
|
||||||
|
dma_channels: [
|
||||||
|
DMA_CH0: DmaChannel0,
|
||||||
|
DMA_CH1: DmaChannel1,
|
||||||
|
DMA_CH2: DmaChannel2,
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
|
|||||||
@ -26,7 +26,6 @@ crate::peripherals! {
|
|||||||
AES <= AES,
|
AES <= AES,
|
||||||
DAC1 <= virtual,
|
DAC1 <= virtual,
|
||||||
DAC2 <= virtual,
|
DAC2 <= virtual,
|
||||||
DMA <= virtual,
|
|
||||||
DEDICATED_GPIO <= DEDICATED_GPIO,
|
DEDICATED_GPIO <= DEDICATED_GPIO,
|
||||||
DS <= DS,
|
DS <= DS,
|
||||||
EFUSE <= EFUSE,
|
EFUSE <= EFUSE,
|
||||||
@ -115,5 +114,10 @@ crate::peripherals! {
|
|||||||
(44, [Input, Output])
|
(44, [Input, Output])
|
||||||
(45, [Input, Output])
|
(45, [Input, Output])
|
||||||
(46, [Input, Output])
|
(46, [Input, Output])
|
||||||
|
],
|
||||||
|
dma_channels: [
|
||||||
|
DMA_SPI2: Spi2DmaChannel,
|
||||||
|
DMA_SPI3: Spi3DmaChannel,
|
||||||
|
DMA_I2S0: I2s0DmaChannel,
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
|
|||||||
@ -28,7 +28,6 @@ crate::peripherals! {
|
|||||||
ASSIST_DEBUG <= ASSIST_DEBUG,
|
ASSIST_DEBUG <= ASSIST_DEBUG,
|
||||||
BT <= virtual,
|
BT <= virtual,
|
||||||
CPU_CTRL <= virtual,
|
CPU_CTRL <= virtual,
|
||||||
DMA <= DMA (DMA_IN_CH0,DMA_IN_CH1,DMA_IN_CH2,DMA_IN_CH3,DMA_IN_CH4,DMA_OUT_CH0,DMA_OUT_CH1,DMA_OUT_CH2,DMA_OUT_CH3,DMA_OUT_CH4),
|
|
||||||
DS <= DS,
|
DS <= DS,
|
||||||
EFUSE <= EFUSE,
|
EFUSE <= EFUSE,
|
||||||
EXTMEM <= EXTMEM,
|
EXTMEM <= EXTMEM,
|
||||||
@ -126,5 +125,12 @@ crate::peripherals! {
|
|||||||
(46, [Input, Output])
|
(46, [Input, Output])
|
||||||
(47, [Input, Output])
|
(47, [Input, Output])
|
||||||
(48, [Input, Output])
|
(48, [Input, Output])
|
||||||
|
],
|
||||||
|
dma_channels: [
|
||||||
|
DMA_CH0: DmaChannel0,
|
||||||
|
DMA_CH1: DmaChannel1,
|
||||||
|
DMA_CH2: DmaChannel2,
|
||||||
|
DMA_CH3: DmaChannel3,
|
||||||
|
DMA_CH4: DmaChannel4,
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
|
|||||||
@ -18,10 +18,8 @@
|
|||||||
//! # use esp_hal::dma_buffers;
|
//! # use esp_hal::dma_buffers;
|
||||||
//! # use esp_hal::spi::SpiMode;
|
//! # use esp_hal::spi::SpiMode;
|
||||||
//! # use esp_hal::spi::slave::Spi;
|
//! # use esp_hal::spi::slave::Spi;
|
||||||
//! # use esp_hal::dma::Dma;
|
#![cfg_attr(pdma, doc = "let dma_channel = peripherals.DMA_SPI2;")]
|
||||||
//! let dma = Dma::new(peripherals.DMA);
|
#![cfg_attr(gdma, doc = "let dma_channel = peripherals.DMA_CH0;")]
|
||||||
#![cfg_attr(pdma, doc = "let dma_channel = dma.spi2channel;")]
|
|
||||||
#![cfg_attr(gdma, doc = "let dma_channel = dma.channel0;")]
|
|
||||||
//! let sclk = peripherals.GPIO0;
|
//! let sclk = peripherals.GPIO0;
|
||||||
//! let miso = peripherals.GPIO1;
|
//! let miso = peripherals.GPIO1;
|
||||||
//! let mosi = peripherals.GPIO2;
|
//! let mosi = peripherals.GPIO2;
|
||||||
|
|||||||
@ -5,10 +5,9 @@
|
|||||||
//! This `system` module defines the available radio peripherals and provides an
|
//! This `system` module defines the available radio peripherals and provides an
|
||||||
//! interface to control and configure radio clocks.
|
//! interface to control and configure radio clocks.
|
||||||
|
|
||||||
use core::sync::atomic::Ordering;
|
use core::cell::RefCell;
|
||||||
|
|
||||||
use critical_section::CriticalSection;
|
use critical_section::{CriticalSection, Mutex};
|
||||||
use portable_atomic::AtomicUsize;
|
|
||||||
use strum::{EnumCount, EnumIter, IntoEnumIterator};
|
use strum::{EnumCount, EnumIter, IntoEnumIterator};
|
||||||
|
|
||||||
use crate::peripherals::SYSTEM;
|
use crate::peripherals::SYSTEM;
|
||||||
@ -145,19 +144,22 @@ impl Peripheral {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static PERIPHERAL_REF_COUNT: [AtomicUsize; Peripheral::COUNT] =
|
static PERIPHERAL_REF_COUNT: Mutex<RefCell<[usize; Peripheral::COUNT]>> =
|
||||||
[const { AtomicUsize::new(0) }; Peripheral::COUNT];
|
Mutex::new(RefCell::new([0; Peripheral::COUNT]));
|
||||||
|
|
||||||
/// Disable all peripherals.
|
/// Disable all peripherals.
|
||||||
///
|
///
|
||||||
/// Peripherals listed in [KEEP_ENABLED] are NOT disabled.
|
/// Peripherals listed in [KEEP_ENABLED] are NOT disabled.
|
||||||
pub(crate) fn disable_peripherals() {
|
pub(crate) fn disable_peripherals() {
|
||||||
for p in Peripheral::iter() {
|
// Take the critical section up front to avoid taking it multiple times.
|
||||||
if KEEP_ENABLED.contains(&p) {
|
critical_section::with(|cs| {
|
||||||
continue;
|
for p in Peripheral::iter() {
|
||||||
|
if KEEP_ENABLED.contains(&p) {
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
PeripheralClockControl::enable_forced_with_cs(p, false, true, cs);
|
||||||
}
|
}
|
||||||
PeripheralClockControl::enable_forced(p, false, true);
|
})
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Debug)]
|
#[derive(Debug)]
|
||||||
@ -166,13 +168,18 @@ pub(crate) struct PeripheralGuard {
|
|||||||
}
|
}
|
||||||
|
|
||||||
impl PeripheralGuard {
|
impl PeripheralGuard {
|
||||||
pub(crate) fn new(p: Peripheral) -> Self {
|
pub(crate) fn new_with(p: Peripheral, init: fn()) -> Self {
|
||||||
if !KEEP_ENABLED.contains(&p) && PeripheralClockControl::enable(p) {
|
if !KEEP_ENABLED.contains(&p) && PeripheralClockControl::enable(p) {
|
||||||
PeripheralClockControl::reset(p);
|
PeripheralClockControl::reset(p);
|
||||||
|
init();
|
||||||
}
|
}
|
||||||
|
|
||||||
Self { peripheral: p }
|
Self { peripheral: p }
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pub(crate) fn new(p: Peripheral) -> Self {
|
||||||
|
Self::new_with(p, || {})
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl Drop for PeripheralGuard {
|
impl Drop for PeripheralGuard {
|
||||||
@ -187,14 +194,23 @@ impl Drop for PeripheralGuard {
|
|||||||
pub(crate) struct GenericPeripheralGuard<const P: u8> {}
|
pub(crate) struct GenericPeripheralGuard<const P: u8> {}
|
||||||
|
|
||||||
impl<const P: u8> GenericPeripheralGuard<P> {
|
impl<const P: u8> GenericPeripheralGuard<P> {
|
||||||
pub(crate) fn new() -> Self {
|
pub(crate) fn new_with(init: fn(CriticalSection<'_>)) -> Self {
|
||||||
let peripheral = unwrap!(Peripheral::try_from(P));
|
let peripheral = unwrap!(Peripheral::try_from(P));
|
||||||
if !KEEP_ENABLED.contains(&peripheral) && PeripheralClockControl::enable(peripheral) {
|
critical_section::with(|cs| {
|
||||||
PeripheralClockControl::reset(peripheral);
|
if !KEEP_ENABLED.contains(&peripheral)
|
||||||
}
|
&& PeripheralClockControl::enable_with_cs(peripheral, cs)
|
||||||
|
{
|
||||||
|
PeripheralClockControl::reset(peripheral);
|
||||||
|
init(cs);
|
||||||
|
}
|
||||||
|
});
|
||||||
|
|
||||||
Self {}
|
Self {}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pub(crate) fn new() -> Self {
|
||||||
|
Self::new_with(|_| {})
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<const P: u8> Drop for GenericPeripheralGuard<P> {
|
impl<const P: u8> Drop for GenericPeripheralGuard<P> {
|
||||||
@ -211,7 +227,7 @@ pub(crate) struct PeripheralClockControl;
|
|||||||
|
|
||||||
#[cfg(not(any(esp32c6, esp32h2)))]
|
#[cfg(not(any(esp32c6, esp32h2)))]
|
||||||
impl PeripheralClockControl {
|
impl PeripheralClockControl {
|
||||||
fn enable_internal(peripheral: Peripheral, enable: bool, _cs: &CriticalSection<'_>) {
|
fn enable_internal(peripheral: Peripheral, enable: bool, _cs: CriticalSection<'_>) {
|
||||||
debug!("Enable {:?} {}", peripheral, enable);
|
debug!("Enable {:?} {}", peripheral, enable);
|
||||||
|
|
||||||
let system = unsafe { &*SYSTEM::PTR };
|
let system = unsafe { &*SYSTEM::PTR };
|
||||||
@ -595,7 +611,7 @@ impl PeripheralClockControl {
|
|||||||
|
|
||||||
#[cfg(any(esp32c6, esp32h2))]
|
#[cfg(any(esp32c6, esp32h2))]
|
||||||
impl PeripheralClockControl {
|
impl PeripheralClockControl {
|
||||||
fn enable_internal(peripheral: Peripheral, enable: bool, _cs: &CriticalSection<'_>) {
|
fn enable_internal(peripheral: Peripheral, enable: bool, _cs: CriticalSection<'_>) {
|
||||||
debug!("Enable {:?} {}", peripheral, enable);
|
debug!("Enable {:?} {}", peripheral, enable);
|
||||||
let system = unsafe { &*SYSTEM::PTR };
|
let system = unsafe { &*SYSTEM::PTR };
|
||||||
|
|
||||||
@ -971,6 +987,16 @@ impl PeripheralClockControl {
|
|||||||
Self::enable_forced(peripheral, true, false)
|
Self::enable_forced(peripheral, true, false)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// Enables the given peripheral.
|
||||||
|
///
|
||||||
|
/// This keeps track of enabling a peripheral - i.e. a peripheral
|
||||||
|
/// is only enabled with the first call attempt to enable it.
|
||||||
|
///
|
||||||
|
/// Returns `true` if it actually enabled the peripheral.
|
||||||
|
pub(crate) fn enable_with_cs(peripheral: Peripheral, cs: CriticalSection<'_>) -> bool {
|
||||||
|
Self::enable_forced_with_cs(peripheral, true, false, cs)
|
||||||
|
}
|
||||||
|
|
||||||
/// Disables the given peripheral.
|
/// Disables the given peripheral.
|
||||||
///
|
///
|
||||||
/// This keeps track of disabling a peripheral - i.e. it only
|
/// This keeps track of disabling a peripheral - i.e. it only
|
||||||
@ -984,34 +1010,43 @@ impl PeripheralClockControl {
|
|||||||
}
|
}
|
||||||
|
|
||||||
pub(crate) fn enable_forced(peripheral: Peripheral, enable: bool, force: bool) -> bool {
|
pub(crate) fn enable_forced(peripheral: Peripheral, enable: bool, force: bool) -> bool {
|
||||||
critical_section::with(|cs| {
|
critical_section::with(|cs| Self::enable_forced_with_cs(peripheral, enable, force, cs))
|
||||||
if !force {
|
}
|
||||||
if enable {
|
|
||||||
let prev =
|
|
||||||
PERIPHERAL_REF_COUNT[peripheral as usize].fetch_add(1, Ordering::Relaxed);
|
|
||||||
if prev > 0 {
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
let prev =
|
|
||||||
PERIPHERAL_REF_COUNT[peripheral as usize].fetch_sub(1, Ordering::Relaxed);
|
|
||||||
assert!(prev != 0);
|
|
||||||
if prev > 1 {
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
};
|
|
||||||
} else if !enable {
|
|
||||||
assert!(PERIPHERAL_REF_COUNT[peripheral as usize].swap(0, Ordering::Relaxed) == 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
if !enable {
|
pub(crate) fn enable_forced_with_cs(
|
||||||
Self::reset(peripheral);
|
peripheral: Peripheral,
|
||||||
}
|
enable: bool,
|
||||||
|
force: bool,
|
||||||
|
cs: CriticalSection<'_>,
|
||||||
|
) -> bool {
|
||||||
|
let mut ref_counts = PERIPHERAL_REF_COUNT.borrow_ref_mut(cs);
|
||||||
|
let ref_count = &mut ref_counts[peripheral as usize];
|
||||||
|
if !force {
|
||||||
|
if enable {
|
||||||
|
let prev = *ref_count;
|
||||||
|
*ref_count += 1;
|
||||||
|
if prev > 0 {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
let prev = *ref_count;
|
||||||
|
*ref_count -= 1;
|
||||||
|
if prev > 1 {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
assert!(prev != 0);
|
||||||
|
};
|
||||||
|
} else if !enable {
|
||||||
|
assert!(*ref_count == 0);
|
||||||
|
}
|
||||||
|
|
||||||
Self::enable_internal(peripheral, enable, &cs);
|
if !enable {
|
||||||
|
Self::reset(peripheral);
|
||||||
|
}
|
||||||
|
|
||||||
true
|
Self::enable_internal(peripheral, enable, cs);
|
||||||
})
|
|
||||||
|
true
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -9,12 +9,7 @@
|
|||||||
use aligned::{Aligned, A64};
|
use aligned::{Aligned, A64};
|
||||||
use esp_alloc as _;
|
use esp_alloc as _;
|
||||||
use esp_backtrace as _;
|
use esp_backtrace as _;
|
||||||
use esp_hal::{
|
use esp_hal::{delay::Delay, dma::Mem2Mem, dma_descriptors_chunk_size, prelude::*};
|
||||||
delay::Delay,
|
|
||||||
dma::{Dma, Mem2Mem},
|
|
||||||
dma_descriptors_chunk_size,
|
|
||||||
prelude::*,
|
|
||||||
};
|
|
||||||
use log::{error, info};
|
use log::{error, info};
|
||||||
extern crate alloc;
|
extern crate alloc;
|
||||||
|
|
||||||
@ -67,11 +62,10 @@ fn main() -> ! {
|
|||||||
let mut intram_buffer = dma_buffer_aligned!(DATA_SIZE, A64);
|
let mut intram_buffer = dma_buffer_aligned!(DATA_SIZE, A64);
|
||||||
let (rx_descriptors, tx_descriptors) = dma_descriptors_chunk_size!(DATA_SIZE, CHUNK_SIZE);
|
let (rx_descriptors, tx_descriptors) = dma_descriptors_chunk_size!(DATA_SIZE, CHUNK_SIZE);
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
let dma_peripheral = peripherals.SPI2;
|
let dma_peripheral = peripherals.SPI2;
|
||||||
|
|
||||||
let mut mem2mem = Mem2Mem::new_with_chunk_size(
|
let mut mem2mem = Mem2Mem::new_with_chunk_size(
|
||||||
dma.channel0,
|
peripherals.DMA_CH0,
|
||||||
dma_peripheral,
|
dma_peripheral,
|
||||||
rx_descriptors,
|
rx_descriptors,
|
||||||
tx_descriptors,
|
tx_descriptors,
|
||||||
|
|||||||
@ -7,12 +7,7 @@
|
|||||||
#![no_main]
|
#![no_main]
|
||||||
|
|
||||||
use esp_backtrace as _;
|
use esp_backtrace as _;
|
||||||
use esp_hal::{
|
use esp_hal::{delay::Delay, dma::Mem2Mem, dma_buffers, prelude::*};
|
||||||
delay::Delay,
|
|
||||||
dma::{Dma, Mem2Mem},
|
|
||||||
dma_buffers,
|
|
||||||
prelude::*,
|
|
||||||
};
|
|
||||||
use log::{error, info};
|
use log::{error, info};
|
||||||
|
|
||||||
const DATA_SIZE: usize = 1024 * 10;
|
const DATA_SIZE: usize = 1024 * 10;
|
||||||
@ -27,14 +22,21 @@ fn main() -> ! {
|
|||||||
|
|
||||||
let (mut rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(DATA_SIZE);
|
let (mut rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(DATA_SIZE);
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
cfg_if::cfg_if! {
|
||||||
#[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))]
|
if #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] {
|
||||||
let dma_peripheral = peripherals.SPI2;
|
let dma_peripheral = peripherals.SPI2;
|
||||||
#[cfg(not(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3")))]
|
} else {
|
||||||
let dma_peripheral = peripherals.MEM2MEM1;
|
let dma_peripheral = peripherals.MEM2MEM1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
let mut mem2mem =
|
let mut mem2mem = Mem2Mem::new(
|
||||||
Mem2Mem::new(dma.channel0, dma_peripheral, rx_descriptors, tx_descriptors).unwrap();
|
peripherals.DMA_CH0,
|
||||||
|
dma_peripheral,
|
||||||
|
rx_descriptors,
|
||||||
|
tx_descriptors,
|
||||||
|
)
|
||||||
|
.unwrap();
|
||||||
|
|
||||||
for i in 0..core::mem::size_of_val(tx_buffer) {
|
for i in 0..core::mem::size_of_val(tx_buffer) {
|
||||||
tx_buffer[i] = (i % 256) as u8;
|
tx_buffer[i] = (i % 256) as u8;
|
||||||
|
|||||||
@ -22,7 +22,7 @@ use embassy_executor::Spawner;
|
|||||||
use embassy_time::{Duration, Timer};
|
use embassy_time::{Duration, Timer};
|
||||||
use esp_backtrace as _;
|
use esp_backtrace as _;
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::*,
|
dma::{DmaRxBuf, DmaTxBuf},
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
prelude::*,
|
prelude::*,
|
||||||
spi::{
|
spi::{
|
||||||
@ -45,13 +45,11 @@ async fn main(_spawner: Spawner) {
|
|||||||
let mosi = peripherals.GPIO4;
|
let mosi = peripherals.GPIO4;
|
||||||
let cs = peripherals.GPIO5;
|
let cs = peripherals.GPIO5;
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
|
if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
|
||||||
let dma_channel = dma.spi2channel;
|
let dma_channel = peripherals.DMA_SPI2;
|
||||||
} else {
|
} else {
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -25,7 +25,7 @@
|
|||||||
use esp_backtrace as _;
|
use esp_backtrace as _;
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
delay::Delay,
|
delay::Delay,
|
||||||
dma::{Dma, DmaBufBlkSize, DmaRxBuf, DmaTxBuf},
|
dma::{DmaBufBlkSize, DmaRxBuf, DmaTxBuf},
|
||||||
peripheral::Peripheral,
|
peripheral::Peripheral,
|
||||||
prelude::*,
|
prelude::*,
|
||||||
spi::{
|
spi::{
|
||||||
@ -67,9 +67,6 @@ fn main() -> ! {
|
|||||||
let miso = unsafe { mosi.clone_unchecked() };
|
let miso = unsafe { mosi.clone_unchecked() };
|
||||||
let cs = peripherals.GPIO38;
|
let cs = peripherals.GPIO38;
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
let dma_channel = dma.channel0;
|
|
||||||
|
|
||||||
let (_, tx_descriptors) =
|
let (_, tx_descriptors) =
|
||||||
esp_hal::dma_descriptors_chunk_size!(0, DMA_BUFFER_SIZE, DMA_CHUNK_SIZE);
|
esp_hal::dma_descriptors_chunk_size!(0, DMA_BUFFER_SIZE, DMA_CHUNK_SIZE);
|
||||||
let tx_buffer = dma_alloc_buffer!(DMA_BUFFER_SIZE, DMA_ALIGNMENT as usize);
|
let tx_buffer = dma_alloc_buffer!(DMA_BUFFER_SIZE, DMA_ALIGNMENT as usize);
|
||||||
@ -103,7 +100,7 @@ fn main() -> ! {
|
|||||||
.with_miso(miso)
|
.with_miso(miso)
|
||||||
.with_mosi(mosi)
|
.with_mosi(mosi)
|
||||||
.with_cs(cs)
|
.with_cs(cs)
|
||||||
.with_dma(dma_channel);
|
.with_dma(peripherals.DMA_CH0);
|
||||||
|
|
||||||
delay.delay_millis(100); // delay to let the above messages display
|
delay.delay_millis(100); // delay to let the above messages display
|
||||||
|
|
||||||
|
|||||||
@ -32,7 +32,6 @@
|
|||||||
use esp_backtrace as _;
|
use esp_backtrace as _;
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
delay::Delay,
|
delay::Delay,
|
||||||
dma::Dma,
|
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
gpio::{Input, Level, Output, Pull},
|
gpio::{Input, Level, Output, Pull},
|
||||||
prelude::*,
|
prelude::*,
|
||||||
@ -54,12 +53,11 @@ fn main() -> ! {
|
|||||||
let slave_mosi = peripherals.GPIO2;
|
let slave_mosi = peripherals.GPIO2;
|
||||||
let slave_cs = peripherals.GPIO3;
|
let slave_cs = peripherals.GPIO3;
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(feature = "esp32s2")] {
|
if #[cfg(feature = "esp32s2")] {
|
||||||
let dma_channel = dma.spi2channel;
|
let dma_channel = peripherals.DMA_SPI2;
|
||||||
} else {
|
} else {
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -7,7 +7,6 @@
|
|||||||
|
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
aes::{dma::CipherMode, Aes, Mode},
|
aes::{dma::CipherMode, Aes, Mode},
|
||||||
dma::Dma,
|
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
peripherals::Peripherals,
|
peripherals::Peripherals,
|
||||||
};
|
};
|
||||||
@ -27,8 +26,7 @@ mod tests {
|
|||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_aes_128_dma_encryption(peripherals: Peripherals) {
|
fn test_aes_128_dma_encryption(peripherals: Peripherals) {
|
||||||
let dma = Dma::new(peripherals.DMA);
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
let dma_channel = dma.channel0;
|
|
||||||
|
|
||||||
let (mut output, rx_descriptors, input, tx_descriptors) = dma_buffers!(DMA_BUFFER_SIZE);
|
let (mut output, rx_descriptors, input, tx_descriptors) = dma_buffers!(DMA_BUFFER_SIZE);
|
||||||
|
|
||||||
@ -66,8 +64,7 @@ mod tests {
|
|||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_aes_128_dma_decryption(peripherals: Peripherals) {
|
fn test_aes_128_dma_decryption(peripherals: Peripherals) {
|
||||||
let dma = Dma::new(peripherals.DMA);
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
let dma_channel = dma.channel0;
|
|
||||||
|
|
||||||
let (mut output, rx_descriptors, input, tx_descriptors) = dma_buffers!(DMA_BUFFER_SIZE);
|
let (mut output, rx_descriptors, input, tx_descriptors) = dma_buffers!(DMA_BUFFER_SIZE);
|
||||||
|
|
||||||
@ -104,8 +101,7 @@ mod tests {
|
|||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_aes_256_dma_encryption(peripherals: Peripherals) {
|
fn test_aes_256_dma_encryption(peripherals: Peripherals) {
|
||||||
let dma = Dma::new(peripherals.DMA);
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
let dma_channel = dma.channel0;
|
|
||||||
|
|
||||||
let (mut output, rx_descriptors, input, tx_descriptors) = dma_buffers!(DMA_BUFFER_SIZE);
|
let (mut output, rx_descriptors, input, tx_descriptors) = dma_buffers!(DMA_BUFFER_SIZE);
|
||||||
|
|
||||||
@ -143,8 +139,7 @@ mod tests {
|
|||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_aes_256_dma_decryption(peripherals: Peripherals) {
|
fn test_aes_256_dma_decryption(peripherals: Peripherals) {
|
||||||
let dma = Dma::new(peripherals.DMA);
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
let dma_channel = dma.channel0;
|
|
||||||
|
|
||||||
let (mut output, rx_descriptors, input, tx_descriptors) = dma_buffers!(DMA_BUFFER_SIZE);
|
let (mut output, rx_descriptors, input, tx_descriptors) = dma_buffers!(DMA_BUFFER_SIZE);
|
||||||
|
|
||||||
|
|||||||
@ -6,7 +6,7 @@
|
|||||||
#![no_main]
|
#![no_main]
|
||||||
|
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::{AnyGdmaChannel, Dma, DmaChannelConvert, DmaError, Mem2Mem},
|
dma::{AnyGdmaChannel, DmaChannelConvert, DmaError, Mem2Mem},
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
dma_buffers_chunk_size,
|
dma_buffers_chunk_size,
|
||||||
dma_descriptors,
|
dma_descriptors,
|
||||||
@ -37,8 +37,7 @@ mod tests {
|
|||||||
fn init() -> Context {
|
fn init() -> Context {
|
||||||
let peripherals = esp_hal::init(esp_hal::Config::default());
|
let peripherals = esp_hal::init(esp_hal::Config::default());
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
let dma_channel = dma.channel0;
|
|
||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(any(esp32c2, esp32c6, esp32h2))] {
|
if #[cfg(any(esp32c2, esp32c6, esp32h2))] {
|
||||||
|
|||||||
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
use embassy_time::{Duration, Instant, Ticker};
|
use embassy_time::{Duration, Instant, Ticker};
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::{Dma, DmaRxBuf, DmaTxBuf},
|
dma::{DmaRxBuf, DmaTxBuf},
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
interrupt::{software::SoftwareInterruptControl, Priority},
|
interrupt::{software::SoftwareInterruptControl, Priority},
|
||||||
peripheral::Peripheral,
|
peripheral::Peripheral,
|
||||||
@ -83,7 +83,6 @@ mod test {
|
|||||||
#[timeout(3)]
|
#[timeout(3)]
|
||||||
async fn dma_does_not_lock_up_when_used_in_different_executors() {
|
async fn dma_does_not_lock_up_when_used_in_different_executors() {
|
||||||
let peripherals = esp_hal::init(esp_hal::Config::default());
|
let peripherals = esp_hal::init(esp_hal::Config::default());
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(systimer)] {
|
if #[cfg(systimer)] {
|
||||||
@ -104,12 +103,12 @@ mod test {
|
|||||||
}
|
}
|
||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(pdma)] {
|
if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
|
||||||
let dma_channel1 = dma.spi2channel;
|
let dma_channel1 = peripherals.DMA_SPI2;
|
||||||
let dma_channel2 = dma.spi3channel;
|
let dma_channel2 = peripherals.DMA_SPI3;
|
||||||
} else {
|
} else {
|
||||||
let dma_channel1 = dma.channel0;
|
let dma_channel1 = peripherals.DMA_CH0;
|
||||||
let dma_channel2 = dma.channel1;
|
let dma_channel2 = peripherals.DMA_CH1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -253,7 +252,6 @@ mod test {
|
|||||||
}
|
}
|
||||||
|
|
||||||
let peripherals = esp_hal::init(esp_hal::Config::default());
|
let peripherals = esp_hal::init(esp_hal::Config::default());
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(systimer)] {
|
if #[cfg(systimer)] {
|
||||||
@ -275,9 +273,9 @@ mod test {
|
|||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(pdma)] {
|
if #[cfg(pdma)] {
|
||||||
let dma_channel = dma.spi2channel;
|
let dma_channel = peripherals.DMA_SPI2;
|
||||||
} else {
|
} else {
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -12,7 +12,6 @@
|
|||||||
|
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
delay::Delay,
|
delay::Delay,
|
||||||
dma::Dma,
|
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
gpio::{AnyPin, NoPin, Pin},
|
gpio::{AnyPin, NoPin, Pin},
|
||||||
i2s::master::{DataFormat, I2s, I2sTx, Standard},
|
i2s::master::{DataFormat, I2s, I2sTx, Standard},
|
||||||
@ -112,13 +111,11 @@ mod tests {
|
|||||||
fn init() -> Context {
|
fn init() -> Context {
|
||||||
let peripherals = esp_hal::init(esp_hal::Config::default());
|
let peripherals = esp_hal::init(esp_hal::Config::default());
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(any(esp32, esp32s2))] {
|
if #[cfg(pdma)] {
|
||||||
let dma_channel = dma.i2s0channel;
|
let dma_channel = peripherals.DMA_I2S0;
|
||||||
} else {
|
} else {
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -6,7 +6,7 @@
|
|||||||
#![no_main]
|
#![no_main]
|
||||||
|
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::{Dma, DmaChannel, DmaRxBuf, DmaTxBuf},
|
dma::{DmaChannel, DmaRxBuf, DmaTxBuf},
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
gpio::Level,
|
gpio::Level,
|
||||||
lcd_cam::{
|
lcd_cam::{
|
||||||
@ -55,10 +55,9 @@ mod tests {
|
|||||||
fn test_camera_can_receive_from_rgb(ctx: Context) {
|
fn test_camera_can_receive_from_rgb(ctx: Context) {
|
||||||
let peripherals = ctx.peripherals;
|
let peripherals = ctx.peripherals;
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
||||||
|
|
||||||
let (rx_channel, tx_channel) = dma.channel2.split();
|
let (rx_channel, tx_channel) = peripherals.DMA_CH2.split();
|
||||||
|
|
||||||
let (vsync_in, vsync_out) = peripherals.GPIO6.split();
|
let (vsync_in, vsync_out) = peripherals.GPIO6.split();
|
||||||
let (hsync_in, hsync_out) = peripherals.GPIO7.split();
|
let (hsync_in, hsync_out) = peripherals.GPIO7.split();
|
||||||
|
|||||||
@ -6,7 +6,7 @@
|
|||||||
#![no_main]
|
#![no_main]
|
||||||
|
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::{Dma, DmaTxBuf},
|
dma::{DmaChannel0, DmaTxBuf},
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
gpio::{GpioPin, NoPin},
|
gpio::{GpioPin, NoPin},
|
||||||
lcd_cam::{
|
lcd_cam::{
|
||||||
@ -38,7 +38,7 @@ struct Context<'d> {
|
|||||||
lcd_cam: LcdCam<'d, Blocking>,
|
lcd_cam: LcdCam<'d, Blocking>,
|
||||||
pcnt: Pcnt<'d>,
|
pcnt: Pcnt<'d>,
|
||||||
pins: Pins,
|
pins: Pins,
|
||||||
dma: Dma<'d>,
|
dma: DmaChannel0,
|
||||||
dma_buf: DmaTxBuf,
|
dma_buf: DmaTxBuf,
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -50,7 +50,6 @@ mod tests {
|
|||||||
#[init]
|
#[init]
|
||||||
fn init() -> Context<'static> {
|
fn init() -> Context<'static> {
|
||||||
let peripherals = esp_hal::init(esp_hal::Config::default());
|
let peripherals = esp_hal::init(esp_hal::Config::default());
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
||||||
let pcnt = Pcnt::new(peripherals.PCNT);
|
let pcnt = Pcnt::new(peripherals.PCNT);
|
||||||
|
|
||||||
@ -59,7 +58,7 @@ mod tests {
|
|||||||
|
|
||||||
Context {
|
Context {
|
||||||
lcd_cam,
|
lcd_cam,
|
||||||
dma,
|
dma: peripherals.DMA_CH0,
|
||||||
pcnt,
|
pcnt,
|
||||||
pins: Pins {
|
pins: Pins {
|
||||||
GPIO8: peripherals.GPIO8,
|
GPIO8: peripherals.GPIO8,
|
||||||
@ -76,13 +75,7 @@ mod tests {
|
|||||||
fn test_i8080_8bit(ctx: Context<'static>) {
|
fn test_i8080_8bit(ctx: Context<'static>) {
|
||||||
let pins = TxEightBits::new(NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin);
|
let pins = TxEightBits::new(NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin);
|
||||||
|
|
||||||
let i8080 = I8080::new(
|
let i8080 = I8080::new(ctx.lcd_cam.lcd, ctx.dma, pins, 20.MHz(), Config::default());
|
||||||
ctx.lcd_cam.lcd,
|
|
||||||
ctx.dma.channel0,
|
|
||||||
pins,
|
|
||||||
20.MHz(),
|
|
||||||
Config::default(),
|
|
||||||
);
|
|
||||||
|
|
||||||
let xfer = i8080.send(Command::<u8>::None, 0, ctx.dma_buf).unwrap();
|
let xfer = i8080.send(Command::<u8>::None, 0, ctx.dma_buf).unwrap();
|
||||||
xfer.wait().0.unwrap();
|
xfer.wait().0.unwrap();
|
||||||
@ -139,15 +132,9 @@ mod tests {
|
|||||||
NoPin,
|
NoPin,
|
||||||
);
|
);
|
||||||
|
|
||||||
let mut i8080 = I8080::new(
|
let mut i8080 = I8080::new(ctx.lcd_cam.lcd, ctx.dma, pins, 20.MHz(), Config::default())
|
||||||
ctx.lcd_cam.lcd,
|
.with_cs(cs_signal)
|
||||||
ctx.dma.channel0,
|
.with_ctrl_pins(NoPin, NoPin);
|
||||||
pins,
|
|
||||||
20.MHz(),
|
|
||||||
Config::default(),
|
|
||||||
)
|
|
||||||
.with_cs(cs_signal)
|
|
||||||
.with_ctrl_pins(NoPin, NoPin);
|
|
||||||
|
|
||||||
// This is to make the test values look more intuitive.
|
// This is to make the test values look more intuitive.
|
||||||
i8080.set_bit_order(BitOrder::Inverted);
|
i8080.set_bit_order(BitOrder::Inverted);
|
||||||
@ -238,7 +225,6 @@ mod tests {
|
|||||||
.channel0
|
.channel0
|
||||||
.set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
|
.set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
|
||||||
|
|
||||||
let channel = ctx.dma.channel0;
|
|
||||||
let pins = TxSixteenBits::new(
|
let pins = TxSixteenBits::new(
|
||||||
NoPin,
|
NoPin,
|
||||||
NoPin,
|
NoPin,
|
||||||
@ -258,7 +244,7 @@ mod tests {
|
|||||||
unit3_signal,
|
unit3_signal,
|
||||||
);
|
);
|
||||||
|
|
||||||
let mut i8080 = I8080::new(ctx.lcd_cam.lcd, channel, pins, 20.MHz(), Config::default())
|
let mut i8080 = I8080::new(ctx.lcd_cam.lcd, ctx.dma, pins, 20.MHz(), Config::default())
|
||||||
.with_cs(cs_signal)
|
.with_cs(cs_signal)
|
||||||
.with_ctrl_pins(NoPin, NoPin);
|
.with_ctrl_pins(NoPin, NoPin);
|
||||||
|
|
||||||
|
|||||||
@ -7,7 +7,7 @@
|
|||||||
#![no_main]
|
#![no_main]
|
||||||
|
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::{Dma, DmaTxBuf},
|
dma::{DmaChannel0, DmaTxBuf},
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
gpio::NoPin,
|
gpio::NoPin,
|
||||||
lcd_cam::{
|
lcd_cam::{
|
||||||
@ -23,7 +23,7 @@ const DATA_SIZE: usize = 1024 * 10;
|
|||||||
|
|
||||||
struct Context<'d> {
|
struct Context<'d> {
|
||||||
lcd_cam: LcdCam<'d, Async>,
|
lcd_cam: LcdCam<'d, Async>,
|
||||||
dma: Dma<'d>,
|
dma: DmaChannel0,
|
||||||
dma_buf: DmaTxBuf,
|
dma_buf: DmaTxBuf,
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -36,14 +36,13 @@ mod tests {
|
|||||||
async fn init() -> Context<'static> {
|
async fn init() -> Context<'static> {
|
||||||
let peripherals = esp_hal::init(esp_hal::Config::default());
|
let peripherals = esp_hal::init(esp_hal::Config::default());
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
let lcd_cam = LcdCam::new(peripherals.LCD_CAM).into_async();
|
let lcd_cam = LcdCam::new(peripherals.LCD_CAM).into_async();
|
||||||
let (_, _, tx_buffer, tx_descriptors) = dma_buffers!(0, DATA_SIZE);
|
let (_, _, tx_buffer, tx_descriptors) = dma_buffers!(0, DATA_SIZE);
|
||||||
let dma_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
|
let dma_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
|
||||||
|
|
||||||
Context {
|
Context {
|
||||||
lcd_cam,
|
lcd_cam,
|
||||||
dma,
|
dma: peripherals.DMA_CH0,
|
||||||
dma_buf,
|
dma_buf,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -52,13 +51,7 @@ mod tests {
|
|||||||
async fn test_i8080_8bit(ctx: Context<'static>) {
|
async fn test_i8080_8bit(ctx: Context<'static>) {
|
||||||
let pins = TxEightBits::new(NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin);
|
let pins = TxEightBits::new(NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin);
|
||||||
|
|
||||||
let i8080 = I8080::new(
|
let i8080 = I8080::new(ctx.lcd_cam.lcd, ctx.dma, pins, 20.MHz(), Config::default());
|
||||||
ctx.lcd_cam.lcd,
|
|
||||||
ctx.dma.channel0,
|
|
||||||
pins,
|
|
||||||
20.MHz(),
|
|
||||||
Config::default(),
|
|
||||||
);
|
|
||||||
|
|
||||||
let mut transfer = i8080.send(Command::<u8>::None, 0, ctx.dma_buf).unwrap();
|
let mut transfer = i8080.send(Command::<u8>::None, 0, ctx.dma_buf).unwrap();
|
||||||
|
|
||||||
|
|||||||
@ -7,7 +7,7 @@
|
|||||||
#[cfg(esp32c6)]
|
#[cfg(esp32c6)]
|
||||||
use esp_hal::parl_io::{TxPinConfigWithValidPin, TxSixteenBits};
|
use esp_hal::parl_io::{TxPinConfigWithValidPin, TxSixteenBits};
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::{Dma, DmaChannel0},
|
dma::DmaChannel0,
|
||||||
gpio::{
|
gpio::{
|
||||||
interconnect::{InputSignal, OutputSignal},
|
interconnect::{InputSignal, OutputSignal},
|
||||||
NoPin,
|
NoPin,
|
||||||
@ -57,8 +57,7 @@ mod tests {
|
|||||||
let (valid_loopback, valid) = valid.split();
|
let (valid_loopback, valid) = valid.split();
|
||||||
let pcnt = Pcnt::new(peripherals.PCNT);
|
let pcnt = Pcnt::new(peripherals.PCNT);
|
||||||
let pcnt_unit = pcnt.unit0;
|
let pcnt_unit = pcnt.unit0;
|
||||||
let dma = Dma::new(peripherals.DMA);
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
let dma_channel = dma.channel0;
|
|
||||||
|
|
||||||
let parl_io = peripherals.PARL_IO;
|
let parl_io = peripherals.PARL_IO;
|
||||||
|
|
||||||
|
|||||||
@ -9,7 +9,7 @@
|
|||||||
#[cfg(esp32c6)]
|
#[cfg(esp32c6)]
|
||||||
use esp_hal::parl_io::{TxPinConfigWithValidPin, TxSixteenBits};
|
use esp_hal::parl_io::{TxPinConfigWithValidPin, TxSixteenBits};
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::{Dma, DmaChannel0},
|
dma::DmaChannel0,
|
||||||
gpio::{
|
gpio::{
|
||||||
interconnect::{InputSignal, OutputSignal},
|
interconnect::{InputSignal, OutputSignal},
|
||||||
NoPin,
|
NoPin,
|
||||||
@ -59,8 +59,7 @@ mod tests {
|
|||||||
let (valid_loopback, valid) = valid.split();
|
let (valid_loopback, valid) = valid.split();
|
||||||
let pcnt = Pcnt::new(peripherals.PCNT);
|
let pcnt = Pcnt::new(peripherals.PCNT);
|
||||||
let pcnt_unit = pcnt.unit0;
|
let pcnt_unit = pcnt.unit0;
|
||||||
let dma = Dma::new(peripherals.DMA);
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
let dma_channel = dma.channel0;
|
|
||||||
|
|
||||||
let parl_io = peripherals.PARL_IO;
|
let parl_io = peripherals.PARL_IO;
|
||||||
|
|
||||||
|
|||||||
@ -8,7 +8,7 @@
|
|||||||
#[cfg(pcnt)]
|
#[cfg(pcnt)]
|
||||||
use esp_hal::pcnt::{channel::EdgeMode, unit::Unit, Pcnt};
|
use esp_hal::pcnt::{channel::EdgeMode, unit::Unit, Pcnt};
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::{Dma, DmaRxBuf, DmaTxBuf},
|
dma::{DmaRxBuf, DmaTxBuf},
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
gpio::{AnyPin, Input, Level, Output, Pull},
|
gpio::{AnyPin, Input, Level, Output, Pull},
|
||||||
prelude::*,
|
prelude::*,
|
||||||
@ -192,13 +192,11 @@ mod tests {
|
|||||||
let _ = Input::new(&mut pin_mirror, Pull::Down);
|
let _ = Input::new(&mut pin_mirror, Pull::Down);
|
||||||
let _ = Input::new(&mut unconnected_pin, Pull::Down);
|
let _ = Input::new(&mut unconnected_pin, Pull::Down);
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(any(esp32, esp32s2))] {
|
if #[cfg(pdma)] {
|
||||||
let dma_channel = dma.spi2channel;
|
let dma_channel = peripherals.DMA_SPI2;
|
||||||
} else {
|
} else {
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -12,7 +12,7 @@ use embedded_hal::spi::SpiBus;
|
|||||||
#[cfg(pcnt)]
|
#[cfg(pcnt)]
|
||||||
use embedded_hal_async::spi::SpiBus as SpiBusAsync;
|
use embedded_hal_async::spi::SpiBus as SpiBusAsync;
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::{Dma, DmaDescriptor, DmaRxBuf, DmaTxBuf},
|
dma::{DmaDescriptor, DmaRxBuf, DmaTxBuf},
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
gpio::{Level, NoPin},
|
gpio::{Level, NoPin},
|
||||||
peripheral::Peripheral,
|
peripheral::Peripheral,
|
||||||
@ -61,13 +61,11 @@ mod tests {
|
|||||||
let sclk = peripherals.GPIO0;
|
let sclk = peripherals.GPIO0;
|
||||||
let (_, mosi) = hil_test::common_test_pins!(peripherals);
|
let (_, mosi) = hil_test::common_test_pins!(peripherals);
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(any(esp32, esp32s2))] {
|
if #[cfg(pdma)] {
|
||||||
let dma_channel = dma.spi2channel;
|
let dma_channel = peripherals.DMA_SPI2;
|
||||||
} else {
|
} else {
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -6,7 +6,7 @@
|
|||||||
#![no_main]
|
#![no_main]
|
||||||
|
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::{Dma, DmaRxBuf, DmaTxBuf},
|
dma::{DmaRxBuf, DmaTxBuf},
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
gpio::{Level, Output},
|
gpio::{Level, Output},
|
||||||
prelude::*,
|
prelude::*,
|
||||||
@ -38,13 +38,11 @@ mod tests {
|
|||||||
|
|
||||||
let miso_mirror = Output::new(miso_mirror, Level::High);
|
let miso_mirror = Output::new(miso_mirror, Level::High);
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
|
if #[cfg(pdma)] {
|
||||||
let dma_channel = dma.spi2channel;
|
let dma_channel = peripherals.DMA_SPI2;
|
||||||
} else {
|
} else {
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -6,7 +6,7 @@
|
|||||||
#![no_main]
|
#![no_main]
|
||||||
|
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::{Dma, DmaRxBuf, DmaTxBuf},
|
dma::{DmaRxBuf, DmaTxBuf},
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
gpio::interconnect::InputSignal,
|
gpio::interconnect::InputSignal,
|
||||||
pcnt::{channel::EdgeMode, unit::Unit, Pcnt},
|
pcnt::{channel::EdgeMode, unit::Unit, Pcnt},
|
||||||
@ -39,13 +39,12 @@ mod tests {
|
|||||||
let (mosi, _) = hil_test::common_test_pins!(peripherals);
|
let (mosi, _) = hil_test::common_test_pins!(peripherals);
|
||||||
|
|
||||||
let pcnt = Pcnt::new(peripherals.PCNT);
|
let pcnt = Pcnt::new(peripherals.PCNT);
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
|
if #[cfg(pdma)] {
|
||||||
let dma_channel = dma.spi2channel;
|
let dma_channel = peripherals.DMA_SPI2;
|
||||||
} else {
|
} else {
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -7,7 +7,7 @@
|
|||||||
use defmt::error;
|
use defmt::error;
|
||||||
use esp_alloc as _;
|
use esp_alloc as _;
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::{Dma, DmaBufBlkSize, DmaRxBuf, DmaTxBuf},
|
dma::{DmaBufBlkSize, DmaRxBuf, DmaTxBuf},
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
dma_descriptors_chunk_size,
|
dma_descriptors_chunk_size,
|
||||||
gpio::interconnect::InputSignal,
|
gpio::interconnect::InputSignal,
|
||||||
@ -57,9 +57,8 @@ mod tests {
|
|||||||
let (mosi, _) = hil_test::common_test_pins!(peripherals);
|
let (mosi, _) = hil_test::common_test_pins!(peripherals);
|
||||||
|
|
||||||
let pcnt = Pcnt::new(peripherals.PCNT);
|
let pcnt = Pcnt::new(peripherals.PCNT);
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
|
|
||||||
let (mosi_loopback, mosi) = mosi.split();
|
let (mosi_loopback, mosi) = mosi.split();
|
||||||
|
|
||||||
|
|||||||
@ -9,7 +9,6 @@
|
|||||||
#![no_main]
|
#![no_main]
|
||||||
|
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::Dma,
|
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
gpio::{Input, Level, Output, Pull},
|
gpio::{Input, Level, Output, Pull},
|
||||||
peripheral::Peripheral,
|
peripheral::Peripheral,
|
||||||
@ -107,13 +106,11 @@ mod tests {
|
|||||||
let (sclk_pin, _) = hil_test::common_test_pins!(peripherals);
|
let (sclk_pin, _) = hil_test::common_test_pins!(peripherals);
|
||||||
let cs_pin = hil_test::unconnected_pin!(peripherals);
|
let cs_pin = hil_test::unconnected_pin!(peripherals);
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(any(esp32, esp32s2))] {
|
if #[cfg(pdma)] {
|
||||||
let dma_channel = dma.spi2channel;
|
let dma_channel = peripherals.DMA_SPI2;
|
||||||
} else {
|
} else {
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -20,7 +20,6 @@
|
|||||||
use embassy_executor::Spawner;
|
use embassy_executor::Spawner;
|
||||||
use esp_backtrace as _;
|
use esp_backtrace as _;
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::Dma,
|
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
i2s::master::{DataFormat, I2s, Standard},
|
i2s::master::{DataFormat, I2s, Standard},
|
||||||
prelude::*,
|
prelude::*,
|
||||||
@ -36,11 +35,13 @@ async fn main(_spawner: Spawner) {
|
|||||||
let timg0 = TimerGroup::new(peripherals.TIMG0);
|
let timg0 = TimerGroup::new(peripherals.TIMG0);
|
||||||
esp_hal_embassy::init(timg0.timer0);
|
esp_hal_embassy::init(timg0.timer0);
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
cfg_if::cfg_if! {
|
||||||
#[cfg(any(feature = "esp32", feature = "esp32s2"))]
|
if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
|
||||||
let dma_channel = dma.i2s0channel;
|
let dma_channel = peripherals.DMA_I2S0;
|
||||||
#[cfg(not(any(feature = "esp32", feature = "esp32s2")))]
|
} else {
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
let (rx_buffer, rx_descriptors, _, tx_descriptors) = dma_buffers!(4092 * 4, 0);
|
let (rx_buffer, rx_descriptors, _, tx_descriptors) = dma_buffers!(4092 * 4, 0);
|
||||||
|
|
||||||
|
|||||||
@ -34,7 +34,6 @@
|
|||||||
use embassy_executor::Spawner;
|
use embassy_executor::Spawner;
|
||||||
use esp_backtrace as _;
|
use esp_backtrace as _;
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
dma::Dma,
|
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
i2s::master::{DataFormat, I2s, Standard},
|
i2s::master::{DataFormat, I2s, Standard},
|
||||||
prelude::*,
|
prelude::*,
|
||||||
@ -58,11 +57,13 @@ async fn main(_spawner: Spawner) {
|
|||||||
let timg0 = TimerGroup::new(peripherals.TIMG0);
|
let timg0 = TimerGroup::new(peripherals.TIMG0);
|
||||||
esp_hal_embassy::init(timg0.timer0);
|
esp_hal_embassy::init(timg0.timer0);
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
cfg_if::cfg_if! {
|
||||||
#[cfg(any(feature = "esp32", feature = "esp32s2"))]
|
if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
|
||||||
let dma_channel = dma.i2s0channel;
|
let dma_channel = peripherals.DMA_I2S0;
|
||||||
#[cfg(not(any(feature = "esp32", feature = "esp32s2")))]
|
} else {
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
let (_, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(0, 32000);
|
let (_, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(0, 32000);
|
||||||
|
|
||||||
|
|||||||
@ -28,7 +28,6 @@
|
|||||||
use esp_backtrace as _;
|
use esp_backtrace as _;
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
delay::Delay,
|
delay::Delay,
|
||||||
dma::Dma,
|
|
||||||
dma_rx_stream_buffer,
|
dma_rx_stream_buffer,
|
||||||
i2c::{
|
i2c::{
|
||||||
self,
|
self,
|
||||||
@ -47,8 +46,6 @@ use esp_println::{print, println};
|
|||||||
fn main() -> ! {
|
fn main() -> ! {
|
||||||
let peripherals = esp_hal::init(esp_hal::Config::default());
|
let peripherals = esp_hal::init(esp_hal::Config::default());
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
let dma_rx_buf = dma_rx_stream_buffer!(20 * 1000, 1000);
|
let dma_rx_buf = dma_rx_stream_buffer!(20 * 1000, 1000);
|
||||||
|
|
||||||
let cam_siod = peripherals.GPIO4;
|
let cam_siod = peripherals.GPIO4;
|
||||||
@ -69,7 +66,7 @@ fn main() -> ! {
|
|||||||
);
|
);
|
||||||
|
|
||||||
let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
||||||
let camera = Camera::new(lcd_cam.cam, dma.channel0, cam_data_pins, 20u32.MHz())
|
let camera = Camera::new(lcd_cam.cam, peripherals.DMA_CH0, cam_data_pins, 20u32.MHz())
|
||||||
.with_master_clock(cam_xclk)
|
.with_master_clock(cam_xclk)
|
||||||
.with_pixel_clock(cam_pclk)
|
.with_pixel_clock(cam_pclk)
|
||||||
.with_ctrl_pins(cam_vsync, cam_href);
|
.with_ctrl_pins(cam_vsync, cam_href);
|
||||||
|
|||||||
@ -34,7 +34,6 @@ use core::iter::{empty, once};
|
|||||||
use esp_backtrace as _;
|
use esp_backtrace as _;
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
delay::Delay,
|
delay::Delay,
|
||||||
dma::Dma,
|
|
||||||
dma_loop_buffer,
|
dma_loop_buffer,
|
||||||
gpio::{Level, Output},
|
gpio::{Level, Output},
|
||||||
i2c,
|
i2c,
|
||||||
@ -70,8 +69,7 @@ fn main() -> ! {
|
|||||||
.with_sda(peripherals.GPIO47)
|
.with_sda(peripherals.GPIO47)
|
||||||
.with_scl(peripherals.GPIO48);
|
.with_scl(peripherals.GPIO48);
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
let tx_channel = peripherals.DMA_CH2;
|
||||||
let tx_channel = dma.channel2;
|
|
||||||
let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
||||||
|
|
||||||
let mut expander = Tca9554::new(i2c);
|
let mut expander = Tca9554::new(i2c);
|
||||||
|
|||||||
@ -25,7 +25,7 @@
|
|||||||
use esp_backtrace as _;
|
use esp_backtrace as _;
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
delay::Delay,
|
delay::Delay,
|
||||||
dma::{Dma, DmaTxBuf},
|
dma::DmaTxBuf,
|
||||||
dma_tx_buffer,
|
dma_tx_buffer,
|
||||||
gpio::{Input, Level, Output, Pull},
|
gpio::{Input, Level, Output, Pull},
|
||||||
lcd_cam::{
|
lcd_cam::{
|
||||||
@ -47,8 +47,6 @@ fn main() -> ! {
|
|||||||
let lcd_wr = peripherals.GPIO47; // Write clock
|
let lcd_wr = peripherals.GPIO47; // Write clock
|
||||||
let lcd_te = peripherals.GPIO48; // Frame sync
|
let lcd_te = peripherals.GPIO48; // Frame sync
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
let dma_tx_buf = dma_tx_buffer!(4000).unwrap();
|
let dma_tx_buf = dma_tx_buffer!(4000).unwrap();
|
||||||
|
|
||||||
let delay = Delay::new();
|
let delay = Delay::new();
|
||||||
@ -71,7 +69,7 @@ fn main() -> ! {
|
|||||||
let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
|
||||||
let i8080 = I8080::new(
|
let i8080 = I8080::new(
|
||||||
lcd_cam.lcd,
|
lcd_cam.lcd,
|
||||||
dma.channel0,
|
peripherals.DMA_CH0,
|
||||||
tx_pins,
|
tx_pins,
|
||||||
20.MHz(),
|
20.MHz(),
|
||||||
Config::default(),
|
Config::default(),
|
||||||
|
|||||||
@ -30,7 +30,7 @@
|
|||||||
use esp_backtrace as _;
|
use esp_backtrace as _;
|
||||||
use esp_hal::{
|
use esp_hal::{
|
||||||
delay::Delay,
|
delay::Delay,
|
||||||
dma::{Dma, DmaRxBuf, DmaTxBuf},
|
dma::{DmaRxBuf, DmaTxBuf},
|
||||||
dma_buffers,
|
dma_buffers,
|
||||||
prelude::*,
|
prelude::*,
|
||||||
spi::{
|
spi::{
|
||||||
@ -63,13 +63,11 @@ fn main() -> ! {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
let dma = Dma::new(peripherals.DMA);
|
|
||||||
|
|
||||||
cfg_if::cfg_if! {
|
cfg_if::cfg_if! {
|
||||||
if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
|
if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
|
||||||
let dma_channel = dma.spi2channel;
|
let dma_channel = peripherals.DMA_SPI2;
|
||||||
} else {
|
} else {
|
||||||
let dma_channel = dma.channel0;
|
let dma_channel = peripherals.DMA_CH0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user