* Move DMA channels into Peripherals * Initialize DMA in the critical section needed for clock management * Update esp-hal/MIGRATING-0.22.md Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com> --------- Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>
79 lines
2.5 KiB
Rust
79 lines
2.5 KiB
Rust
//! # Peripheral Instances
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//!
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//! This module creates singleton instances for each of the various peripherals,
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//! and re-exports them to allow users to access and use them in their
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//! applications.
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//!
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//! Should be noted that that the module also re-exports the [Interrupt] enum
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//! from the PAC, allowing users to handle interrupts associated with these
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//! peripherals.
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use esp32c2 as pac;
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// We need to export this for users to use
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pub use pac::Interrupt;
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// We need to export this in the hal for the drivers to use
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pub(crate) use self::peripherals::*;
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// Note that certain are marked with `virtual` in the invocation of the
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// `peripherals!` macro below. Basically, this indicates there's no physical
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// peripheral (no `PSRAM`, `RADIO`, etc. peripheral in the PACs), so we're
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// creating "virtual peripherals" for them.
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crate::peripherals! {
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peripherals: [
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ADC1 <= virtual,
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APB_CTRL <= APB_CTRL,
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ASSIST_DEBUG <= ASSIST_DEBUG,
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BT <= virtual,
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ECC <= ECC,
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EFUSE <= EFUSE,
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EXTMEM <= EXTMEM,
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I2C0 <= I2C0,
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INTERRUPT_CORE0 <= INTERRUPT_CORE0,
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IO_MUX <= IO_MUX,
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LEDC <= LEDC,
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LPWR <= RTC_CNTL,
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RADIO_CLK <= virtual,
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RNG <= RNG,
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SENSITIVE <= SENSITIVE,
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SHA <= SHA,
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SPI0 <= SPI0,
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SPI1 <= SPI1,
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SPI2 <= SPI2 (SPI2),
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SYSTEM <= SYSTEM,
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SYSTIMER <= SYSTIMER,
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SW_INTERRUPT <= virtual,
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TIMG0 <= TIMG0,
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UART0 <= UART0,
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UART1 <= UART1,
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WIFI <= virtual,
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XTS_AES <= XTS_AES,
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MEM2MEM1 <= virtual,
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MEM2MEM2 <= virtual,
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MEM2MEM3 <= virtual,
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MEM2MEM4 <= virtual,
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MEM2MEM5 <= virtual,
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MEM2MEM6 <= virtual,
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MEM2MEM8 <= virtual,
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],
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pins: [
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(0, [Input, Output, Analog, RtcIo])
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(1, [Input, Output, Analog, RtcIo])
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(2, [Input, Output, Analog, RtcIo] (2 => FSPIQ) (2 => FSPIQ))
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(3, [Input, Output, Analog, RtcIo])
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(4, [Input, Output, Analog, RtcIo] (2 => FSPIHD) (2 => FSPIHD))
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(5, [Input, Output, Analog, RtcIo] (2 => FSPIWP) (2 => FSPIWP))
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(6, [Input, Output] (2 => FSPICLK) (2 => FSPICLK_MUX))
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(7, [Input, Output] (2 => FSPID) (2 => FSPID))
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(8, [Input, Output])
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(9, [Input, Output])
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(10, [Input, Output] (2 => FSPICS0) (2 => FSPICS0))
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(18, [Input, Output])
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(19, [Input, Output])
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(20, [Input, Output] (0 => U0RXD) ())
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],
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dma_channels: [
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DMA_CH0: DmaChannel0,
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]
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}
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