Use both timers in TIMG0 for embassy time driver when able (#609)
* Use both timers in `TIMG0` for embassy time driver when able * Update CHANGELOG
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@ -50,6 +50,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- Move core interrupt handling from Flash to RAM for RISC-V chips (ESP32-H2, ESP32-C2, ESP32-C3, ESP32-C6) (#541)
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- Change LED pin to GPIO2 in ESP32 blinky example (#581)
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- Udpate ESP32-H2 and C6 ESP32-clocks and remove i2c_clock for all chips but ESP32 (#592)
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- Use both timers in `TIMG0` for embassy time driver when able (#609)
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### Fixed
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@ -9,7 +9,10 @@ use crate::{
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timer::{Timer, Timer0},
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};
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#[cfg(not(any(esp32, esp32s2, esp32s3)))]
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pub const ALARM_COUNT: usize = 1;
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#[cfg(any(esp32, esp32s2, esp32s3))]
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pub const ALARM_COUNT: usize = 2;
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pub type TimerInner = Timer0<TIMG0>;
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pub type TimerType = Timer<TimerInner>;
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@ -49,16 +52,25 @@ impl EmbassyTimer {
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pub fn init(clocks: &Clocks, mut timer: TimerType) {
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use crate::{interrupt, interrupt::Priority};
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// set divider to get a 1mhz clock. abp (80mhz) / 80 = 1mhz... // TODO assert
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// abp clock is the source and its at the correct speed for the divider
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// set divider to get a 1mhz clock. APB (80mhz) / 80 = 1mhz...
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// TODO: assert APB clock is the source and its at the correct speed for the
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// divider
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timer.set_divider(clocks.apb_clock.to_MHz() as u16);
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interrupt::enable(peripherals::Interrupt::TG0_T0_LEVEL, Priority::max()).unwrap();
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#[cfg(any(esp32, esp32s2, esp32s3))]
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interrupt::enable(peripherals::Interrupt::TG0_T1_LEVEL, Priority::max()).unwrap();
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#[interrupt]
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fn TG0_T0_LEVEL() {
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DRIVER.on_interrupt(0);
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}
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#[cfg(any(esp32, esp32s2, esp32s3))]
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#[interrupt]
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fn TG0_T1_LEVEL() {
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DRIVER.on_interrupt(1);
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}
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}
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pub(crate) fn set_alarm(
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