Remove embedded-hal 0.2.x impls and dependency from esp-lp-hal package (#2609)

* removed eh02 dependencies, sh*tcode, not yet tested properly,copy-pasted

* changelog entry

* Don't implement eh1 traits
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Kirill Mikhailov 2024-11-27 15:54:00 +01:00 committed by GitHub
parent cfb83b153d
commit aeda6ac00a
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10 changed files with 16 additions and 144 deletions

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@ -14,6 +14,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
### Fixed ### Fixed
### Removed ### Removed
- Remove embedded-hal 0.2.x impls and dependency from esp-lp-hal package (#2609)
## 0.1.0 - 2024-07-15 ## 0.1.0 - 2024-07-15

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@ -28,7 +28,6 @@ test = false
cfg-if = "1.0.0" cfg-if = "1.0.0"
document-features = "0.2.10" document-features = "0.2.10"
embedded-hal = { version = "1.0.0", optional = true } embedded-hal = { version = "1.0.0", optional = true }
embedded-hal-02 = { version = "0.2.7", optional = true, features = ["unproven"], package = "embedded-hal" }
embedded-hal-nb = { version = "1.0.0", optional = true } embedded-hal-nb = { version = "1.0.0", optional = true }
embedded-io = { version = "0.6.1", optional = true } embedded-io = { version = "0.6.1", optional = true }
esp32c6-lp = { version = "0.3.0", features = ["critical-section"], optional = true } esp32c6-lp = { version = "0.3.0", features = ["critical-section"], optional = true }
@ -63,8 +62,6 @@ esp32s2 = ["dep:esp32s2-ulp", "procmacros/is-ulp-core"]
esp32s3 = ["dep:esp32s3-ulp", "procmacros/is-ulp-core"] esp32s3 = ["dep:esp32s3-ulp", "procmacros/is-ulp-core"]
#! ### Trait Implementation Feature Flags #! ### Trait Implementation Feature Flags
## Implement the traits defined in the `0.2.x` release of `embedded-hal`.
embedded-hal-02 = ["dep:embedded-hal-02"]
## Implement the traits defined in the `1.0.0` releases of `embedded-hal` and ## Implement the traits defined in the `1.0.0` releases of `embedded-hal` and
## `embedded-hal-nb` for the relevant peripherals. ## `embedded-hal-nb` for the relevant peripherals.
embedded-hal = ["dep:embedded-hal", "dep:embedded-hal-nb"] embedded-hal = ["dep:embedded-hal", "dep:embedded-hal-nb"]
@ -73,15 +70,15 @@ embedded-io = ["dep:embedded-io"]
[[example]] [[example]]
name = "blinky" name = "blinky"
required-features = ["embedded-hal-02"] required-features = []
[[example]] [[example]]
name = "i2c" name = "i2c"
required-features = ["embedded-hal-02", "esp32c6"] required-features = ["esp32c6"]
[[example]] [[example]]
name = "uart" name = "uart"
required-features = ["embedded-hal-02", "esp32c6"] required-features = ["esp32c6"]
[lints.rust] [lints.rust]
unexpected_cfgs = "allow" unexpected_cfgs = "allow"

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@ -12,7 +12,7 @@ Implements a number of blocking and, where applicable, async traits from the var
For help getting started with this HAL, please refer to [The Rust on ESP Book] and the [documentation]. For help getting started with this HAL, please refer to [The Rust on ESP Book] and the [documentation].
[embedded-hal]: https://github.com/rust-embedded/embedded-hal [embedded-hal]: https://docs.rs/embedded-hal/latest/embedded_hal/
[the rust on esp book]: https://docs.esp-rs.org/book/ [the rust on esp book]: https://docs.esp-rs.org/book/
## [Documentation] ## [Documentation]

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@ -7,12 +7,10 @@
//! //!
//! Make sure the LP RAM is cleared before loading the code. //! Make sure the LP RAM is cleared before loading the code.
//% FEATURES: embedded-hal-02
#![no_std] #![no_std]
#![no_main] #![no_main]
use embedded_hal_02::{blocking::delay::DelayMs, digital::v2::OutputPin}; use embedded_hal::{delay::DelayNs, digital::OutputPin};
use esp_lp_hal::{delay::Delay, gpio::Output, prelude::*}; use esp_lp_hal::{delay::Delay, gpio::Output, prelude::*};
use panic_halt as _; use panic_halt as _;

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@ -8,12 +8,10 @@
//! - SCL => GPIO7 //! - SCL => GPIO7
//% CHIPS: esp32c6 //% CHIPS: esp32c6
//% FEATURES: embedded-hal-02
#![no_std] #![no_std]
#![no_main] #![no_main]
use embedded_hal_02::blocking::i2c::WriteRead;
use esp_lp_hal::{i2c::LpI2c, prelude::*}; use esp_lp_hal::{i2c::LpI2c, prelude::*};
use panic_halt as _; use panic_halt as _;

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@ -6,14 +6,13 @@
//! logs from LP_UART. Make sure the LP RAM is cleared before loading the code. //! logs from LP_UART. Make sure the LP RAM is cleared before loading the code.
//% CHIPS: esp32c6 //% CHIPS: esp32c6
//% FEATURES: embedded-hal-02
#![no_std] #![no_std]
#![no_main] #![no_main]
use core::fmt::Write; use core::fmt::Write;
use embedded_hal_02::blocking::delay::DelayMs; use embedded_hal::delay::DelayNs;
use esp_lp_hal::{delay::Delay, prelude::*, uart::LpUart}; use esp_lp_hal::{delay::Delay, prelude::*, uart::LpUart};
use panic_halt as _; use panic_halt as _;

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@ -74,30 +74,6 @@ fn cycles() -> u64 {
cycles as u64 cycles as u64
} }
#[cfg(feature = "embedded-hal-02")]
impl embedded_hal_02::blocking::delay::DelayUs<u64> for Delay {
#[inline(always)]
fn delay_us(&mut self, us: u64) {
self.delay_micros(us as u32);
}
}
#[cfg(feature = "embedded-hal-02")]
impl embedded_hal_02::blocking::delay::DelayUs<u32> for Delay {
#[inline(always)]
fn delay_us(&mut self, us: u32) {
self.delay_micros(us);
}
}
#[cfg(feature = "embedded-hal-02")]
impl embedded_hal_02::blocking::delay::DelayMs<u32> for Delay {
#[inline(always)]
fn delay_ms(&mut self, ms: u32) {
self.delay_millis(ms);
}
}
#[cfg(feature = "embedded-hal")] #[cfg(feature = "embedded-hal")]
impl embedded_hal::delay::DelayNs for Delay { impl embedded_hal::delay::DelayNs for Delay {
#[inline(always)] #[inline(always)]

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@ -86,48 +86,6 @@ pub unsafe fn conjure_input<const PIN: u8>() -> Option<Input<PIN>> {
} }
} }
#[cfg(feature = "embedded-hal-02")]
impl<const PIN: u8> embedded_hal_02::digital::v2::InputPin for Input<PIN> {
type Error = core::convert::Infallible;
fn is_high(&self) -> Result<bool, Self::Error> {
Ok(self.input_state())
}
fn is_low(&self) -> Result<bool, Self::Error> {
Ok(!self.is_high()?)
}
}
#[cfg(feature = "embedded-hal-02")]
impl<const PIN: u8> embedded_hal_02::digital::v2::OutputPin for Output<PIN> {
type Error = core::convert::Infallible;
fn set_low(&mut self) -> Result<(), Self::Error> {
self.set_output(false);
Ok(())
}
fn set_high(&mut self) -> Result<(), Self::Error> {
self.set_output(true);
Ok(())
}
}
#[cfg(feature = "embedded-hal-02")]
impl<const PIN: u8> embedded_hal_02::digital::v2::StatefulOutputPin for Output<PIN> {
fn is_set_high(&self) -> Result<bool, Self::Error> {
Ok(self.output_state())
}
fn is_set_low(&self) -> Result<bool, Self::Error> {
Ok(!self.is_set_high()?)
}
}
#[cfg(feature = "embedded-hal-02")]
impl<const PIN: u8> embedded_hal_02::digital::v2::toggleable::Default for Output<PIN> {}
#[cfg(feature = "embedded-hal")] #[cfg(feature = "embedded-hal")]
impl<const PIN: u8> embedded_hal::digital::ErrorType for Input<PIN> { impl<const PIN: u8> embedded_hal::digital::ErrorType for Input<PIN> {
type Error = core::convert::Infallible; type Error = core::convert::Infallible;

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@ -187,7 +187,8 @@ pub struct LpI2c {
} }
impl LpI2c { impl LpI2c {
fn master_write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> { /// Writes bytes to slave with address `addr`
pub fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> {
let mut cmd_iterator = CommandRegister::COMD0; let mut cmd_iterator = CommandRegister::COMD0;
// If SCL is busy, reset the Master FSM // If SCL is busy, reset the Master FSM
@ -272,7 +273,8 @@ impl LpI2c {
Ok(()) Ok(())
} }
fn master_read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error> { /// Reads enough bytes from slave with `addr` to fill `buffer`
pub fn read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error> {
// Check size constraints // Check size constraints
if buffer.len() > 254 { if buffer.len() > 254 {
return Err(Error::ExceedingFifo); return Err(Error::ExceedingFifo);
@ -370,17 +372,14 @@ impl LpI2c {
Ok(()) Ok(())
} }
fn master_write_read( /// Writes bytes to slave with address `addr` and then reads enough bytes
&mut self, /// to fill `buffer` *in a single transaction*
addr: u8, pub fn write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> {
bytes: &[u8],
buffer: &mut [u8],
) -> Result<(), Error> {
// It would be possible to combine the write and read in one transaction, but // It would be possible to combine the write and read in one transaction, but
// filling the tx fifo with the current code is somewhat slow even in release // filling the tx fifo with the current code is somewhat slow even in release
// mode which can cause issues. // mode which can cause issues.
self.master_write(addr, bytes)?; self.write(addr, bytes)?;
self.master_read(addr, buffer)?; self.read(addr, buffer)?;
Ok(()) Ok(())
} }
@ -468,35 +467,3 @@ impl LpI2c {
Ok(()) Ok(())
} }
} }
#[cfg(feature = "embedded-hal-02")]
impl embedded_hal_02::blocking::i2c::Read for LpI2c {
type Error = Error;
fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
self.master_read(address, buffer)
}
}
#[cfg(feature = "embedded-hal-02")]
impl embedded_hal_02::blocking::i2c::Write for LpI2c {
type Error = Error;
fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Self::Error> {
self.master_write(addr, bytes)
}
}
#[cfg(feature = "embedded-hal-02")]
impl embedded_hal_02::blocking::i2c::WriteRead for LpI2c {
type Error = Error;
fn write_read(
&mut self,
address: u8,
bytes: &[u8],
buffer: &mut [u8],
) -> Result<(), Self::Error> {
self.master_write_read(address, bytes, buffer)
}
}

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@ -231,28 +231,6 @@ impl core::fmt::Write for LpUart {
} }
} }
#[cfg(feature = "embedded-hal-02")]
impl embedded_hal_02::serial::Read<u8> for LpUart {
type Error = Error;
fn read(&mut self) -> nb::Result<u8, Self::Error> {
self.read_byte()
}
}
#[cfg(feature = "embedded-hal-02")]
impl embedded_hal_02::serial::Write<u8> for LpUart {
type Error = Error;
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
self.write_byte(word)
}
fn flush(&mut self) -> nb::Result<(), Self::Error> {
self.flush_tx()
}
}
#[cfg(feature = "embedded-hal")] #[cfg(feature = "embedded-hal")]
impl embedded_hal_nb::serial::ErrorType for LpUart { impl embedded_hal_nb::serial::ErrorType for LpUart {
type Error = Error; type Error = Error;