edd03717d2
* ci: Enable C3, H2, S2 and S3 HIL tests * feat: Disable H2 * test: Disable S2 * ci: Update test folder * docs: Update setup * revert: Revert S2 changes * ci: Update hil tests targets * test: Adapt uart test for S2 * ci: Enable H2 HIL * feat: Filter unsupported targets for the tests failing * test: Filter failing targets * ci: Remove the test folder * test: Filter S2 * feat: Add supported targets * feat: Remove TODOs and format code * docs: Remove outdated comment * feat: Add run-elfs xtask subcommand
78 lines
1.9 KiB
Rust
78 lines
1.9 KiB
Rust
//! UART Test
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//!
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//! Folowing pins are used:
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//! TX GPIP2
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//! RX GPIO4
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//!
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//! Connect TX (GPIO2) and RX (GPIO4) pins.
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//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
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#![no_std]
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#![no_main]
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use defmt_rtt as _;
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use esp_backtrace as _;
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use esp_hal::{
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clock::ClockControl,
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gpio::Io,
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peripherals::{Peripherals, UART0},
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system::SystemControl,
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uart::{config::Config, TxRxPins, Uart, UartRx, UartTx},
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Async,
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};
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struct Context {
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tx: UartTx<'static, UART0, Async>,
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rx: UartRx<'static, UART0, Async>,
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}
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impl Context {
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pub fn init() -> Self {
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let peripherals = Peripherals::take();
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let system = SystemControl::new(peripherals.SYSTEM);
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
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let pins = TxRxPins::new_tx_rx(
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io.pins.gpio2.into_push_pull_output(),
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io.pins.gpio4.into_floating_input(),
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);
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let uart =
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Uart::new_async_with_config(peripherals.UART0, Config::default(), Some(pins), &clocks);
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let (tx, rx) = uart.split();
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Context { rx, tx }
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}
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}
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#[cfg(test)]
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#[embedded_test::tests(executor = esp_hal::embassy::executor::thread::Executor::new())]
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mod tests {
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use defmt::assert_eq;
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use super::*;
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#[init]
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async fn init() -> Context {
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Context::init()
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}
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#[test]
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#[timeout(3)]
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async fn test_send_receive(mut ctx: Context) {
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const SEND: &[u8] = &*b"Hello ESP32";
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let mut buf = [0u8; SEND.len()];
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// Drain the FIFO to clear previous message:
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ctx.tx.flush_async().await.unwrap();
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while ctx.rx.drain_fifo(&mut buf[..]) > 0 {}
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ctx.tx.write_async(&SEND).await.unwrap();
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ctx.tx.flush_async().await.unwrap();
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ctx.rx.read_async(&mut buf[..]).await.unwrap();
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assert_eq!(&buf[..], SEND);
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}
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}
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