e5cd1bd33e
* Add `esp32p4` feature to `esp-hal-procmacros` * Add `esp32p4` feature to `esp-hal-common` * Create the `esp32p4-hal` package * Add ESP32-P4 to CI workflow * Fix a silly typo :) * Update `CHANGELOG.md`
97 lines
1.5 KiB
TOML
97 lines
1.5 KiB
TOML
[device]
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arch = "riscv"
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cores = "multi_core"
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peripherals = [
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# Peripherals available in the PAC:
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# "adc",
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# "aes",
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# "assist_debug",
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# "axi_dma",
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# "axi_icm",
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# "bitscrambler",
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# "cache",
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# "dma",
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# "ds",
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# "ecc",
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# "ecdsa",
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# "efuse",
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# "gpio_sd",
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# "gpio",
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# "h264_dma",
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# "h264",
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# "hmac",
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# "hp_sys_clkrst",
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"hp_sys",
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# "i2c0",
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# "i2c1",
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# "i2s0",
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# "i2s1",
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# "i2s2",
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# "i3c_mst_mem",
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# "i3c_mst",
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# "i3c_slv",
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"interrupt_core0",
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"interrupt_core1",
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# "io_mux",
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# "isp",
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# "jpeg",
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# "lcd_cam",
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# "ledc",
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# "lp_adc",
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# "lp_ana_peri",
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# "lp_aon_clkrst",
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# "lp_gpio",
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# "lp_huk",
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# "lp_i2c_ana_mst",
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# "lp_i2c0",
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# "lp_i2s0",
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# "lp_intr",
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# "lp_io_mux",
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# "lp_peri",
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# "lp_sys",
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# "lp_timer",
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# "lp_touch",
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# "lp_tsens",
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# "lp_uart",
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# "lp_wdt",
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# "mcpwm0",
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# "mcpwm1",
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# "mipi_csi_bridge",
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# "mipi_csi_host",
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# "mipi_dsi_bridge",
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# "mipi_dsi_host",
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# "parl_io",
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# "pau",
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# "pcnt",
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# "pmu",
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# "ppa",
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# "pvt",
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# "rmt",
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# "rsa",
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# "sdhost",
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# "sha",
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# "soc_etm",
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# "spi0",
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# "spi1",
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# "spi2",
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# "spi3",
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# "systimer",
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# "timg0",
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# "timg1",
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# "trace0",
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# "trace1",
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# "twai0",
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# "twai1",
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# "twai2",
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# "uart0",
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# "uhci0",
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# "usb_device",
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# "usb_wrap",
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]
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symbols = [
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# Additional peripherals defined by us (the developers):
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"plic",
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]
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