baea915935
* Create the `hil-test` package * Add a simple integration test to verify basic GPIO functionality * WIP * feat: Update with esp-hal unification * build: Update dependencies * feat: Add a simple CI workflow test * ci: Avoid using a gh-hosted-runner to build * ci: Remove building bins in gh-hosted-runner * ci: Remove HIL Gpio CI test * ci: Test all the available tests * test: Add spi_full_duplex test * docs: Add documentation * test: Add uart test * style: Remove unused imports * docs: Update wiring, document H2 VM * ci: Enable H2 tests * ci: Add rust-cache action * docs: Document H2 vm * test: Add timeout * ci: Enable ESP32-C3 tests * feat: Add timeouts * feat: Add aes test * ci: Avoid running CI workflow when we change hil-test stuff * test: Remove warnings * feat: Address feedback * feat: Update features names and spi methods * ci: Remove rust-cache action * Update HIL to probe-rs#2292 (#1307) * feat: Update probe-rs/embedded-test to probe-rs#2292 * feat: Remove lib * ci: Use a matrix * ci: Enable ESP32C3 * feat: Add a way to cfg away test for unsuported peripherals * ci: Update trigger conditions * feat: Update pins to make it work on s3 * feat: Changes enabling S3 * feat: Remove log feature * feat: Adapt for rebase * feat: Remove env * feat: enable S3 * chore: Remove todo * build: Pin dependencies * feat: Add target alias * docs: Update readme * fix: Fix traits imports after rebase. Use debug * build: Remove lto * feat: Build tests on release mode --------- Co-authored-by: Jesse Braham <jesse@beta7.io>
60 lines
1.5 KiB
YAML
60 lines
1.5 KiB
YAML
name: HIL
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on:
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merge_group:
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workflow_dispatch:
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inputs:
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repository:
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description: "Owner and repository to test"
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required: true
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default: 'esp-rs/esp-hal'
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branch:
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description: "Branch, tag or SHA to checkout."
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required: true
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default: "main"
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env:
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CARGO_TERM_COLOR: always
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jobs:
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# Test RISC-V targets:
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riscv-hil:
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name: HIL Test | ${{ matrix.target.soc }}
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runs-on:
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labels: [self-hosted, "${{ matrix.target.runner }}"]
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strategy:
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fail-fast: false
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matrix:
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target:
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- soc: esp32c3
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runner: rustboard
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rust-target: riscv32imc-unknown-none-elf
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- soc: esp32c6
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runner: esp32c6-usb
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rust-target: riscv32imac-unknown-none-elf
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- soc: esp32h2
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runner: esp32h2-usb
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rust-target: riscv32imac-unknown-none-elf
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steps:
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- uses: actions/checkout@v4
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if: github.event_name != 'workflow_dispatch'
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- uses: actions/checkout@v4
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if: github.event_name == 'workflow_dispatch'
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with:
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repository: ${{ github.event.inputs.repository }}
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ref: ${{ github.event.inputs.branch }}
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- uses: dtolnay/rust-toolchain@v1
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with:
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target: ${{ matrix.target.rust-target }}
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toolchain: nightly
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components: rust-src
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- name: Run tests
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working-directory: hil-test
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run: cargo ${{ matrix.target.soc }}
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# Test Xtensa targets:
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# TODO: Add jobs for Xtensa once supported by `probe-rs`
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