cf270700e7
* Update PACs and modify `esp-hal-common` to use new `esp-riscv-rt` package * Update `esp32c2-hal` and `esp32c3-hal` to use `esp-riscv-rt` as well * Update all RISC-V examples to use `esp-riscv-rt` * Update RISC-V trap frame handling according to review feedback
47 lines
1.1 KiB
Rust
47 lines
1.1 KiB
Rust
//! This demos the watchdog timer.
|
|
//! Basically the same as `hello_world` but if you remove the call to
|
|
//! `wdt.feed()` the watchdog will reset the system.
|
|
|
|
#![no_std]
|
|
#![no_main]
|
|
|
|
use esp32c3_hal::{
|
|
clock::ClockControl,
|
|
peripherals::Peripherals,
|
|
prelude::*,
|
|
timer::TimerGroup,
|
|
Rtc,
|
|
};
|
|
use esp_backtrace as _;
|
|
use esp_println::println;
|
|
use esp_riscv_rt::entry;
|
|
use nb::block;
|
|
|
|
#[entry]
|
|
fn main() -> ! {
|
|
let peripherals = Peripherals::take();
|
|
let system = peripherals.SYSTEM.split();
|
|
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
|
|
|
let mut rtc = Rtc::new(peripherals.RTC_CNTL);
|
|
let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks);
|
|
let mut timer0 = timer_group0.timer0;
|
|
let mut wdt0 = timer_group0.wdt;
|
|
let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks);
|
|
let mut wdt1 = timer_group1.wdt;
|
|
|
|
// Disable watchdog timers
|
|
rtc.swd.disable();
|
|
rtc.rwdt.disable();
|
|
wdt0.start(2u64.secs());
|
|
wdt1.disable();
|
|
|
|
timer0.start(1u64.secs());
|
|
|
|
loop {
|
|
wdt0.feed();
|
|
println!("Hello world!");
|
|
block!(timer0.wait()).unwrap();
|
|
}
|
|
}
|