cf270700e7
* Update PACs and modify `esp-hal-common` to use new `esp-riscv-rt` package * Update `esp32c2-hal` and `esp32c3-hal` to use `esp-riscv-rt` as well * Update all RISC-V examples to use `esp-riscv-rt` * Update RISC-V trap frame handling according to review feedback
48 lines
1.1 KiB
Rust
48 lines
1.1 KiB
Rust
//! This shows how to write text to uart0.
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//! You can see the output with `espflash` if you provide the `--monitor` option
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#![no_std]
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#![no_main]
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use core::fmt::Write;
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use esp32c3_hal::{
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clock::ClockControl,
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peripherals::Peripherals,
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prelude::*,
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timer::TimerGroup,
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Rtc,
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Uart,
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};
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use esp_backtrace as _;
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use esp_riscv_rt::entry;
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use nb::block;
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take();
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let system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut rtc = Rtc::new(peripherals.RTC_CNTL);
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let mut uart0 = Uart::new(peripherals.UART0);
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let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks);
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let mut timer0 = timer_group0.timer0;
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let mut wdt0 = timer_group0.wdt;
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let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks);
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let mut wdt1 = timer_group1.wdt;
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// Disable watchdog timers
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rtc.swd.disable();
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rtc.rwdt.disable();
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wdt0.disable();
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wdt1.disable();
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timer0.start(1u64.secs());
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loop {
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writeln!(uart0, "Hello world!").unwrap();
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block!(timer0.wait()).unwrap();
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}
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}
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