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c612fecfae
esp-hal/esp-hal-common/src/soc
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Björn Quentin c612fecfae
Clear LP/RTC RAM (#916) 
* Clear LP_RAM/RTC RAM to make sure .bss is cleared

* Rename `ulp-riscv-hal` to `esp-ulp-riscv-hal`

* CHANGELOG.md entry
2023-11-09 14:06:58 +01:00
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esp32 Replace the radio module with peripheral singleton structs (#852) 2023-10-20 11:11:32 +01:00
esp32c2 Replace the radio module with peripheral singleton structs (#852) 2023-10-20 11:11:32 +01:00
esp32c3 Make sure BLE and WiFi are not powered down when esp-wifi needs them (#891) 2023-11-01 14:01:02 +01:00
esp32c6 Clear LP/RTC RAM (#916) 2023-11-09 14:06:58 +01:00
esp32h2 Replace the radio module with peripheral singleton structs (#852) 2023-10-20 11:11:32 +01:00
esp32s2 Clear LP/RTC RAM (#916) 2023-11-09 14:06:58 +01:00
esp32s3 Clear LP/RTC RAM (#916) 2023-11-09 14:06:58 +01:00
efuse_field.rs Unified efuse field access (#567) 2023-06-05 06:15:00 -07:00
mod.rs Add FlashSafeDma wrapper for eh traits which ensure correct DMA transfers from flash (#678) 2023-08-09 13:07:20 -07:00