esp-hal/esp-lp-hal
Dominic Fischer bb806d35e0
Add remaining GPIO pins for ESP32-S2/S3 ULP (#1695)
Co-authored-by: Dominic Fischer <git@dominicfischer.me>
2024-06-19 15:17:48 +00:00
..
.cargo GPIO Refactoring (#1542) 2024-05-15 08:49:33 +00:00
examples GPIO Refactoring (#1542) 2024-05-15 08:49:33 +00:00
ld
src Add remaining GPIO pins for ESP32-S2/S3 ULP (#1695) 2024-06-19 15:17:48 +00:00
build.rs Add the esp-build package, update esp-hal and esp-lp-hal to use it in their build scripts (#1325) 2024-03-21 15:36:33 +00:00
Cargo.toml Enable the CI feature to check more features in MSRV checks (#1641) 2024-05-30 14:22:03 +00:00
CHANGELOG.md Add remaining GPIO pins for ESP32-S2/S3 ULP (#1695) 2024-06-19 15:17:48 +00:00
README.md Update READMEs, housekeeping (#1339) 2024-03-22 17:11:20 +00:00

esp-lp-hal

Crates.io docs.rs MSRV Crates.io Matrix

Bare-metal (no_std) hardware abstraction layer for the low-power RISC-V coprocessors found in the ESP32-C6, ESP32-S2, and ESP32-S3 from Espressif.

Implements a number of blocking and, where applicable, async traits from the various packages in the embedded-hal repository.

For help getting started with this HAL, please refer to The Rust on ESP Book and the documentation.

Documentation

Supported Devices

Chip Datasheet Technical Reference Manual Target
ESP32-C6 ESP32-C6 ESP32-C6 riscv32imac-unknown-none-elf
ESP32-S2 ESP32-S2 ESP32-S2 riscv32imc-unknown-none-elf
ESP32-S3 ESP32-S3 ESP32-S3 riscv32imc-unknown-none-elf

Minimum Supported Rust Version (MSRV)

This crate is guaranteed to compile on stable Rust 1.76 and up. It might compile with older versions but that may change in any new patch release.

License

Licensed under either of:

at your option.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.