* LCD_CAM I8080 POC * Hush CI * Apply user provided frequency * Expose bit and byte order * Properly support command and dummy phases * Expose clock edge settings * Allow background transfers * Add support for both 8 bit and 16 bit * Remove unnecessary interrupt usage * Expose all config * Add LcdCamPeripheral * Fix up register modification * Remove 2^13 limit on data phase * Make example a bit more interesting * Add DMA peripheral trait bounds * Use raw interrupts * Write module level docs * Improve example doc |
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| .. | ||
| .cargo | ||
| examples | ||
| src | ||
| build.rs | ||
| Cargo.toml | ||
| README.md | ||
| rust-toolchain.toml | ||
esp32s3-hal
no_std HAL for the ESP32 from Espressif.
Implements a number of the traits defined in embedded-hal.
This device uses the Xtensa ISA, which is not officially supported by the Rust compiler. In order to develop for this device, you must use the Rust compiler fork with Xtensa support, found at esp-rs/rust.
Please refer to the documentation for more information.
Documentation
Resources
- Datasheet
- Technical Reference Manual
- The Rust Programming Language
- The Embedded Rust Book
- The Rust on ESP Book
Getting Started
Installing the Rust Compiler
We provide a tool, espup, for easily installing the Rust toolchain with Xtensa support:
cargo install espup
espup install
Following installation of the Xtensa toolchain, if you are running a Unix-like operating system (macOS, Linux) then you must additionally export the necessary environment variables:
. $HOME/export-esp.sh
See the Installation chapter of The Rust on ESP Book for more details.
License
Licensed under either of:
- Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
- MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)
at your option.
Contribution
Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.