6eca968bb8
* Add LLD option for all Xtensa chips * changelog * Fix linkerscript for esp32s3 rtc fast ram region
14 lines
482 B
Plaintext
14 lines
482 B
Plaintext
/*
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This fix up is required when the RTC fast memory is split across two address spaces.
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This fix up pads the _data bus_ address space by the size of the code accessed by the instruction bus.
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*/
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SECTIONS {
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.rtc_fast.dummy (NOLOAD) :
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{
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_rtc_dummy_start = ABSOLUTE(.); /* needed to make section proper size */
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. = . + SIZEOF(.rtc_fast.text);
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_rtc_dummy_end = ABSOLUTE(.); /* needed to make section proper size */
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} > RTC_FAST_RWDATA
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}
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INSERT BEFORE .rtc_fast.data; |