562c891ef9
* SPI pins are no longer optional, rename DummyPin * Swap QSPI test expected levels * Tweak documentation around Level, implement PeripheralOutput * Fmt
96 lines
2.6 KiB
Rust
96 lines
2.6 KiB
Rust
//! SPI loopback test using DMA
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//!
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//! The following wiring is assumed:
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//! - SCLK => GPIO0
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//! - MISO => GPIO2
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//! - MOSI => GPIO4
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//! - CS => GPIO5
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//!
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//! Depending on your target and the board you are using you have to change the
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//! pins.
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//!
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//! This example transfers data via SPI.
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//! Connect MISO and MOSI pins to see the outgoing data is read as incoming
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//! data.
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//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
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#![no_std]
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#![no_main]
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use esp_backtrace as _;
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use esp_hal::{
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delay::Delay,
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dma::{Dma, DmaPriority, DmaRxBuf, DmaTxBuf},
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dma_buffers,
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gpio::Io,
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prelude::*,
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spi::{master::Spi, SpiMode},
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};
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use esp_println::println;
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#[entry]
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fn main() -> ! {
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let peripherals = esp_hal::init(esp_hal::Config::default());
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let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
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let sclk = io.pins.gpio0;
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let miso = io.pins.gpio2;
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let mosi = io.pins.gpio4;
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let cs = io.pins.gpio5;
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let dma = Dma::new(peripherals.DMA);
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cfg_if::cfg_if! {
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if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
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let dma_channel = dma.spi2channel;
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} else {
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let dma_channel = dma.channel0;
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}
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}
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let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(32000);
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let mut dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
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let mut dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
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let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
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.with_pins(sclk, mosi, miso, cs)
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.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
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let delay = Delay::new();
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let mut i = 0;
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for (i, v) in dma_tx_buf.as_mut_slice().iter_mut().enumerate() {
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*v = (i % 255) as u8;
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}
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loop {
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dma_tx_buf.as_mut_slice()[0] = i;
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*dma_tx_buf.as_mut_slice().last_mut().unwrap() = i;
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i = i.wrapping_add(1);
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let transfer = spi
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.dma_transfer(dma_rx_buf, dma_tx_buf)
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.map_err(|e| e.0)
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.unwrap();
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// here we could do something else while DMA transfer is in progress
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let mut n = 0;
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// Check is_done until the transfer is almost done (32000 bytes at 100kHz is
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// 2.56 seconds), then move to wait().
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while !transfer.is_done() && n < 10 {
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delay.delay_millis(250);
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n += 1;
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}
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(spi, (dma_rx_buf, dma_tx_buf)) = transfer.wait();
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println!(
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"{:x?} .. {:x?}",
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&dma_rx_buf.as_slice()[..10],
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&dma_rx_buf.as_slice().last_chunk::<10>().unwrap()
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);
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delay.delay_millis(250);
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}
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}
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