65 lines
1.9 KiB
Rust
65 lines
1.9 KiB
Rust
#![no_std]
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pub use embedded_hal as ehal;
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pub use esp_hal_common::{pac, prelude, Delay, Serial, Timer};
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pub use self::gpio::IO;
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pub mod gpio;
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pub use esp_hal_common::{interrupt, ram, Cpu};
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#[no_mangle]
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extern "C" fn DefaultHandler(_level: u32, _interrupt: pac::Interrupt) {}
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/// Function initializes ESP32 specific memories (RTC slow and fast) and
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/// then calls original Reset function
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///
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/// ENTRY point is defined in memory.x
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/// *Note: the pre_init function is called in the original reset handler
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/// after the initializations done in this function*
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#[cfg(feature = "rt")]
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#[doc(hidden)]
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#[no_mangle]
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pub unsafe extern "C" fn ESP32Reset() -> ! {
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// These symbols come from `memory.x`
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extern "C" {
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static mut _rtc_fast_bss_start: u32;
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static mut _rtc_fast_bss_end: u32;
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static mut _rtc_slow_bss_start: u32;
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static mut _rtc_slow_bss_end: u32;
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static mut _stack_end_cpu0: u32;
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}
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// set stack pointer to end of memory: no need to retain stack up to this point
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xtensa_lx::set_stack_pointer(&mut _stack_end_cpu0);
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// copying data from flash to various data segments is done by the bootloader
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// initialization to zero needs to be done by the application
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// Initialize RTC RAM
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xtensa_lx_rt::zero_bss(&mut _rtc_fast_bss_start, &mut _rtc_fast_bss_end);
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xtensa_lx_rt::zero_bss(&mut _rtc_slow_bss_start, &mut _rtc_slow_bss_end);
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// continue with default reset handler
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xtensa_lx_rt::Reset();
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}
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/// The ESP32 has a first stage bootloader that handles loading program data
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/// into the right place therefore we skip loading it again.
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#[doc(hidden)]
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#[no_mangle]
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#[rustfmt::skip]
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pub extern "Rust" fn __init_data() -> bool {
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false
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}
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fn gpio_intr_enable(int_enable: bool, nmi_enable: bool) -> u8 {
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int_enable as u8
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| ((nmi_enable as u8) << 1)
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| (int_enable as u8) << 2
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| ((nmi_enable as u8) << 3)
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}
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