* esp32 & esp32s2 sharing scripts * add wokwi files * Add fixup section for esp32s2, fix ordering of sectino includes * Remove debug asm file * Use shared linker scripts for s3 with fixups * Add external.x sections back * Move ld scripts into esp-hal-common * esp32c3 unified linker scripts - rework original c3 script to use the xtensa named sections (e.g, _SECTIONNAME_start) - Add fixups in esp32c3 specific linker - Remove useless text section start and end (not required when using any form of bootloader) * Add RTC alias'. Move some shared fixups to a file * comment and cleanup * unify c2 linker script * unify c6 linker script * remove debug configs * use new esp-riscv-rt * fmt * align db symbol names * fix s3 db
46 lines
1003 B
Plaintext
46 lines
1003 B
Plaintext
|
|
/* before memory.x to allow override */
|
|
ENTRY(Reset)
|
|
|
|
INCLUDE memory.x
|
|
|
|
/* after memory.x to allow override */
|
|
PROVIDE(__pre_init = DefaultPreInit);
|
|
PROVIDE(__zero_bss = default_mem_hook);
|
|
PROVIDE(__init_data = default_mem_hook);
|
|
|
|
INCLUDE exception.x
|
|
|
|
/* map generic regions to output sections */
|
|
INCLUDE "alias.x"
|
|
|
|
/* Fixups for esp32s2 */
|
|
SECTIONS {
|
|
.rwdata_dummy (NOLOAD) : ALIGN(4)
|
|
{
|
|
. = ORIGIN(RWDATA) + SIZEOF(.rwtext) + SIZEOF(.rwtext.wifi);
|
|
} > RWDATA
|
|
}
|
|
INSERT BEFORE .data;
|
|
|
|
INCLUDE "fixups/rtc_fast_rwdata_dummy.x"
|
|
/* End of fixups for esp32s2 */
|
|
|
|
/* Shared sections - ordering matters */
|
|
INCLUDE "text.x"
|
|
INCLUDE "rodata.x"
|
|
INCLUDE "rwtext.x"
|
|
INCLUDE "rwdata.x"
|
|
INCLUDE "rtc_fast.x"
|
|
INCLUDE "rtc_slow.x"
|
|
INCLUDE "external.x"
|
|
/* End of Shared sections */
|
|
|
|
_heap_end = ABSOLUTE(ORIGIN(dram_seg))+LENGTH(dram_seg)-LENGTH(reserved_for_boot_seg) - STACK_SIZE;
|
|
|
|
_stack_start_cpu0 = _heap_end;
|
|
_stack_end_cpu0 = _stack_start_cpu0 + STACK_SIZE;
|
|
|
|
EXTERN(DefaultHandler);
|
|
|
|
INCLUDE "device.x" |