d86300f799
* Update the `GDMA` driver to support the ESP32-H2 * Update the `SPI` driver to support the ESP32-H2 * Add `SPI` examples for ESP32-H2 * Update CHANGELOG * Remove copy-pasted references to ESP32-C6 * Update GPIO pins used in SPI examples, add `qspi_flash` example * Update SPI clock configuration to produce correct clock rate * Correct comment regarding clock source frequency Co-authored-by: Sergio Gasquez Arcos <sergio.gasquez@gmail.com> * H2: Add PLL_48M_CLK src to ClockControl and RawClocks * H2: Use PLL_48M_CLK as SPI clk src * H2: cleanup commented block in SPI driver * H2: update docs comment in embassy_spi example * fmt * Add a new line in embassy_spi example --------- Co-authored-by: Sergio Gasquez Arcos <sergio.gasquez@gmail.com> Co-authored-by: Juraj Sadel <juraj.sadel@espressif.com>
91 lines
2.5 KiB
Plaintext
91 lines
2.5 KiB
Plaintext
ENTRY(_start)
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PROVIDE(_stext = ORIGIN(ROTEXT));
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PROVIDE(_stack_start = ORIGIN(RWDATA) + LENGTH(RWDATA));
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PROVIDE(_max_hart_id = 0);
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PROVIDE(_hart_stack_size = 2K);
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PROVIDE(_heap_size = 0);
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PROVIDE(UserSoft = DefaultHandler);
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PROVIDE(SupervisorSoft = DefaultHandler);
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PROVIDE(MachineSoft = DefaultHandler);
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PROVIDE(UserTimer = DefaultHandler);
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PROVIDE(SupervisorTimer = DefaultHandler);
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PROVIDE(MachineTimer = DefaultHandler);
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PROVIDE(UserExternal = DefaultHandler);
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PROVIDE(SupervisorExternal = DefaultHandler);
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PROVIDE(MachineExternal = DefaultHandler);
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PROVIDE(DefaultHandler = DefaultInterruptHandler);
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PROVIDE(ExceptionHandler = DefaultExceptionHandler);
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/* The ESP32-C2 and ESP32-C3 have interrupt IDs 1-31, while the ESP32-C6 and ESP32-H2 have
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IDs 0-31, so we much define the handler for the one additional interrupt
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ID: */
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PROVIDE(interrupt0 = DefaultHandler);
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PROVIDE(__post_init = default_post_init);
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/* A PAC/HAL defined routine that should initialize custom interrupt controller if needed. */
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PROVIDE(_setup_interrupts = default_setup_interrupts);
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/* # Multi-processing hook function
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fn _mp_hook() -> bool;
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This function is called from all the harts and must return true only for one hart,
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which will perform memory initialization. For other harts it must return false
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and implement wake-up in platform-dependent way (e.g. after waiting for a user interrupt).
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*/
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PROVIDE(_mp_hook = default_mp_hook);
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/* # Start trap function override
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By default uses the riscv crates default trap handler
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but by providing the `_start_trap` symbol external crates can override.
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*/
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PROVIDE(_start_trap = default_start_trap);
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/* Must be called __global_pointer$ for linker relaxations to work. */
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PROVIDE(__global_pointer$ = _data_start + 0x800);
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SECTIONS {
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/* These symbols/functions need to be near eachother, group them together at the start of text */
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.text_init _stext : ALIGN(4)
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{
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KEEP(*(.init));
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KEEP(*(.init.rust));
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KEEP(*(.text.abort));
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} > ROTEXT
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}
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INSERT BEFORE .text;
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SECTIONS {
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.trap : ALIGN(4)
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{
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KEEP(*(.trap));
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*(.trap.*);
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} > RWTEXT
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}
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INSERT AFTER .rwtext;
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SECTIONS {
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/**
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* Bootloader really wants to have separate segments for ROTEXT and RODATA
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* Thus, we need to force a gap here.
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*/
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.text_gap (NOLOAD): {
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. = . + 4;
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. = ALIGN(4) + 0x20;
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} > ROM
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}
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INSERT BEFORE .rodata;
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/* Shared sections - ordering matters */
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INCLUDE "text.x"
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INCLUDE "rodata.x"
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INCLUDE "rwdata.x"
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INCLUDE "rwtext.x"
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INCLUDE "rtc_fast.x"
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/* End of Shared sections */
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INCLUDE "debug.x"
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