esp-hal/esp32c3-hal/.cargo/config.toml
Jesse Braham 29ebd170ee
Update dependencies, miscellaneous fixes/improvements (#878)
* Force frame pointers for RISC-V chips

* Various dependency updates

* Update to latest published PACs and resolve build errors

* Top-level `README` updates

* Further clarify when `RUSCT_BOOTSTRAP=1` is required
2023-10-27 06:41:04 -07:00

29 lines
906 B
TOML

[target.riscv32imc-unknown-none-elf]
runner = "espflash flash --monitor"
rustflags = [
"-C", "link-arg=-Tlinkall.x",
"-C", "force-frame-pointers",
# comment the cfgs below if you do _not_ wish to emulate atomics.
# enable the atomic codegen option for RISCV
"-C", "target-feature=+a",
# tell the core library have atomics even though it's not specified in the target definition
"--cfg", "target_has_atomic_load_store",
"--cfg", 'target_has_atomic_load_store="8"',
"--cfg", 'target_has_atomic_load_store="16"',
"--cfg", 'target_has_atomic_load_store="32"',
"--cfg", 'target_has_atomic_load_store="ptr"',
# enable cas
"--cfg", "target_has_atomic",
"--cfg", 'target_has_atomic="8"',
"--cfg", 'target_has_atomic="16"',
"--cfg", 'target_has_atomic="32"',
"--cfg", 'target_has_atomic="ptr"',
]
[build]
target = "riscv32imc-unknown-none-elf"
[unstable]
build-std = [ "core" ]