* wip: timg embassy driver - read_raw on timg renamed to now() - timg initialized and stored in static for use in the embassy driver - timg sets alarm value - untested whether alarms actually trigger * TIMG timer driver for esp32, esp32s3 - Adds the timg timer block as a time driver for embassy - Not enabled on the C3 as it only has one timer block, better to use systimer - s2 example added but can't build due to atomic requirements in futures-core * Add S2 atomic support with emulation, fixup embassy support for the S2 * Move executor & static-cell to dev deps. Make eha optional * Add c2 support, run fmt * Update to crates.io embassy releases * Update eha * update timg time driver to new trait * Remove exception feature of esp-backtrace and use the user handler for backtracing * Add async testing workflow * Update systick example * Fix S2 examples * Update xtensa-toolchain * set rustflags for s2 target * Disable systick for esp32s2 until we can fix the noted issues * review improvements - Fix intr prio array being off by one - emabssy time prio interrupt set to max prio - use cfg instead of feature for systick detection * Update example time delays
22 lines
553 B
TOML
22 lines
553 B
TOML
[target.xtensa-esp32s2-none-elf]
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runner = "espflash --monitor"
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[build]
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rustflags = [
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"-C", "link-arg=-nostartfiles",
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"-C", "link-arg=-Wl,-Tlinkall.x",
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# enable the atomic codegen option for Xtensa
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"-C", "target-feature=+s32c1i",
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# tell the core library have atomics even though it's not specified in the target definition
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"--cfg", 'target_has_atomic="8"',
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"--cfg", 'target_has_atomic="16"',
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"--cfg", 'target_has_atomic="32"',
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"--cfg", 'target_has_atomic="ptr"',
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]
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target = "xtensa-esp32s2-none-elf"
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[unstable]
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build-std = ["core"]
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