7a733a75db
* Allow accessing signal list via ErasedPin * Replace AnyPin with more flexible signal config * Update tests and examples * Fix enable_from_gpio value * Access signals from pin drivers * DummyPin is not a pin * Remove redundant public fns * Various fixes, rename ErasedPin * Changelog * rustfmt * Update i8080 * Typos and endless recursion * Drop Pin suffix from traits * Extract AF conversion * Touch up changelog * Clean up spi tests * Refactor pull resistor handling * Don't disable configured output functionality * Clean up TODO * Tweak docs * Clean up examples
118 lines
3.4 KiB
Rust
118 lines
3.4 KiB
Rust
//! PCNT Encoder Demo
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//!
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//! This example decodes a quadrature encoder.
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//!
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//! Since the PCNT units reset to zero when they reach their limits
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//! we enable an interrupt on the upper and lower limits and
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//! track the overflow in an AtomicI32
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//!
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//! The following wiring is assumed:
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//! - Control signal => GPIO4
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//! - Edge signal => GPIO5
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//% CHIPS: esp32 esp32c6 esp32h2 esp32s2 esp32s3
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#![no_std]
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#![no_main]
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use core::{cell::RefCell, cmp::min, sync::atomic::Ordering};
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use critical_section::Mutex;
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use esp_backtrace as _;
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use esp_hal::{
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gpio::{Io, Pull},
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interrupt::Priority,
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pcnt::{
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channel::{self, PcntInputConfig, PcntSource},
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unit,
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Pcnt,
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},
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prelude::*,
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};
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use esp_println::println;
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use portable_atomic::AtomicI32;
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static UNIT0: Mutex<RefCell<Option<unit::Unit<'static, 1>>>> = Mutex::new(RefCell::new(None));
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static VALUE: AtomicI32 = AtomicI32::new(0);
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#[entry]
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fn main() -> ! {
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let peripherals = esp_hal::init(esp_hal::Config::default());
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let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
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// Set up a pulse counter:
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println!("setup pulse counter unit 0");
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let mut pcnt = Pcnt::new(peripherals.PCNT);
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pcnt.set_interrupt_handler(interrupt_handler);
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let u0 = pcnt.unit1;
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u0.set_low_limit(Some(-100)).unwrap();
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u0.set_high_limit(Some(100)).unwrap();
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u0.set_filter(Some(min(10u16 * 80, 1023u16))).unwrap();
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u0.clear();
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println!("setup channel 0");
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let ch0 = &u0.channel0;
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let pin_a = io.pins.gpio4;
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let pin_b = io.pins.gpio5;
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ch0.set_ctrl_signal(PcntSource::from(
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pin_a.peripheral_input(),
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PcntInputConfig { pull: Pull::Up },
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));
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ch0.set_edge_signal(PcntSource::from(
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pin_b.peripheral_input(),
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PcntInputConfig { pull: Pull::Up },
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));
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ch0.set_ctrl_mode(channel::CtrlMode::Reverse, channel::CtrlMode::Keep);
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ch0.set_input_mode(channel::EdgeMode::Increment, channel::EdgeMode::Decrement);
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println!("setup channel 1");
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let ch1 = &u0.channel1;
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ch1.set_ctrl_signal(PcntSource::from(
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pin_b.peripheral_input(),
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PcntInputConfig { pull: Pull::Up },
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));
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ch1.set_edge_signal(PcntSource::from(
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pin_a.peripheral_input(),
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PcntInputConfig { pull: Pull::Up },
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));
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ch1.set_ctrl_mode(channel::CtrlMode::Reverse, channel::CtrlMode::Keep);
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ch1.set_input_mode(channel::EdgeMode::Decrement, channel::EdgeMode::Increment);
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println!("enabling interrupts");
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u0.listen();
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println!("resume pulse counter unit 0");
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u0.resume();
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let counter = u0.counter.clone();
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critical_section::with(|cs| UNIT0.borrow_ref_mut(cs).replace(u0));
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let mut last_value: i32 = 0;
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loop {
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let value: i32 = counter.get() as i32 + VALUE.load(Ordering::SeqCst);
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if value != last_value {
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println!("value: {value}");
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last_value = value;
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}
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}
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}
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#[handler(priority = Priority::Priority2)]
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fn interrupt_handler() {
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critical_section::with(|cs| {
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let mut u0 = UNIT0.borrow_ref_mut(cs);
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let u0 = u0.as_mut().unwrap();
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if u0.interrupt_is_set() {
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let events = u0.get_events();
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if events.high_limit {
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VALUE.fetch_add(100, Ordering::SeqCst);
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} else if events.low_limit {
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VALUE.fetch_add(-100, Ordering::SeqCst);
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}
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u0.reset_interrupt();
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}
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});
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}
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