| .. | ||
| .cargo | ||
| examples | ||
| ld | ||
| src | ||
| build.rs | ||
| Cargo.toml | ||
| CHANGELOG.md | ||
| README.md | ||
esp-lp-hal
Bare-metal (no_std) hardware abstraction layer for the low-power RISC-V coprocessors found in the ESP32-C6, ESP32-S2, and ESP32-S3 from Espressif.
Implements a number of blocking and, where applicable, async traits from the various packages in the embedded-hal repository.
For help getting started with this HAL, please refer to The Rust on ESP Book and the documentation.
Documentation
Supported Devices
| Chip | Datasheet | Technical Reference Manual | Target |
|---|---|---|---|
| ESP32-C6 | ESP32-C6 | ESP32-C6 | riscv32imac-unknown-none-elf |
| ESP32-S2 | ESP32-S2 | ESP32-S2 | riscv32imc-unknown-none-elf |
| ESP32-S3 | ESP32-S3 | ESP32-S3 | riscv32imc-unknown-none-elf |
Minimum Supported Rust Version (MSRV)
This crate is guaranteed to compile on stable Rust 1.76 and up. It might compile with older versions but that may change in any new patch release.
License
Licensed under either of:
- Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
- MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)
at your option.
Contribution
Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.