104 lines
2.8 KiB
Rust
104 lines
2.8 KiB
Rust
//! SPI Full Duplex DMA write + read Test
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//! See issue #2059
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//!
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//! Uses the [hil_test::common_test_pins] pair connected to each other.
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//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
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#![no_std]
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#![no_main]
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use esp_hal::{
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dma::{Dma, DmaPriority, DmaRxBuf, DmaTxBuf},
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dma_buffers,
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gpio::Io,
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peripherals::SPI2,
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prelude::*,
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spi::{
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master::{Spi, SpiDma},
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FullDuplexMode,
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SpiMode,
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},
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Blocking,
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};
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use hil_test as _;
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cfg_if::cfg_if! {
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if #[cfg(any(
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feature = "esp32",
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feature = "esp32s2",
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))] {
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use esp_hal::dma::Spi2DmaChannel as DmaChannel0;
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} else {
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use esp_hal::dma::DmaChannel0;
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}
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}
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struct Context {
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spi: SpiDma<'static, SPI2, DmaChannel0, FullDuplexMode, Blocking>,
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}
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#[cfg(test)]
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#[embedded_test::tests]
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mod tests {
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use defmt::assert_eq;
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use esp_hal::gpio::{Level, Output};
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use super::*;
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#[init]
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fn init() -> Context {
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let peripherals = esp_hal::init(esp_hal::Config::default());
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let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
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let sclk = io.pins.gpio0;
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let (miso, gpio) = hil_test::common_test_pins!(io);
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let _gpio = Output::new(gpio, Level::High);
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let dma = Dma::new(peripherals.DMA);
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cfg_if::cfg_if! {
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if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
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let dma_channel = dma.spi2channel;
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} else {
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let dma_channel = dma.channel0;
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}
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}
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let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
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.with_sck(sclk)
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.with_mosi(esp_hal::gpio::DummyPin::new())
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.with_miso(miso)
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.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
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Context { spi }
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}
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#[test]
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#[timeout(3)]
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fn test_write_read(ctx: Context) {
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let spi = ctx.spi;
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let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(4);
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let mut dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
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let mut dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
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dma_tx_buf.fill(&[0xde, 0xad, 0xbe, 0xef]);
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let transfer = spi.dma_write(dma_tx_buf).map_err(|e| e.0).unwrap();
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let (spi, dma_tx_buf) = transfer.wait();
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dma_rx_buf.as_mut_slice().fill(0);
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let transfer = spi.dma_read(dma_rx_buf).map_err(|e| e.0).unwrap();
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let (spi, mut dma_rx_buf) = transfer.wait();
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let transfer = spi.dma_write(dma_tx_buf).map_err(|e| e.0).unwrap();
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let (spi, _dma_tx_buf) = transfer.wait();
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dma_rx_buf.as_mut_slice().fill(0);
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let transfer = spi.dma_read(dma_rx_buf).map_err(|e| e.0).unwrap();
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let (_, dma_rx_buf) = transfer.wait();
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assert_eq!(&[0xff, 0xff, 0xff, 0xff], dma_rx_buf.as_slice());
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}
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}
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