6eca968bb8
* Add LLD option for all Xtensa chips * changelog * Fix linkerscript for esp32s3 rtc fast ram region
34 lines
933 B
TOML
34 lines
933 B
TOML
[target.xtensa-esp32s2-none-elf]
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runner = "espflash flash --monitor"
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[build]
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rustflags = [
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# GNU LD
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"-C", "link-arg=-nostartfiles",
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"-C", "link-arg=-Wl,-Tlinkall.x",
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# LLD
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# "-C", "linker=rust-lld",
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# "-C", "link-arg=-Tlinkall.x",
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# enable the atomic codegen option for Xtensa
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"-C", "target-feature=+s32c1i",
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# tell the core library have atomics even though it's not specified in the target definition
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"--cfg", "target_has_atomic_load_store",
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"--cfg", 'target_has_atomic_load_store="8"',
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"--cfg", 'target_has_atomic_load_store="16"',
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"--cfg", 'target_has_atomic_load_store="32"',
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"--cfg", 'target_has_atomic_load_store="ptr"',
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# enable cas
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"--cfg", "target_has_atomic",
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"--cfg", 'target_has_atomic="8"',
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"--cfg", 'target_has_atomic="16"',
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"--cfg", 'target_has_atomic="32"',
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"--cfg", 'target_has_atomic="ptr"',
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]
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target = "xtensa-esp32s2-none-elf"
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[unstable]
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build-std = ["core", "alloc"]
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