* Define Octal SpiDataMode * Fix BitOrder capitalization * Hide DmaError * Derive more traits * Return error for unsupported half-duplex parameter combinations * Remove unnecessary implementation detail * Return error instead of silently breaking transaction * Downgrade assert to debug_assert * Expand on the enum variants * Remove redundant imports * Hide some unstable functions
97 lines
1.5 KiB
TOML
97 lines
1.5 KiB
TOML
[device]
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name = "esp32s3"
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arch = "xtensa"
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cores = "multi_core"
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peripherals = [
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# Peripherals available in the PAC:
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"aes",
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"apb_ctrl",
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"apb_saradc",
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"assist_debug",
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"dma",
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"ds",
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"efuse",
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"extmem",
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"gpio",
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"gpio_sd",
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"hmac",
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"i2c0",
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"i2c1",
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"i2s0",
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"i2s1",
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"interrupt_core0",
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"interrupt_core1",
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"io_mux",
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"lcd_cam",
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"ledc",
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"mcpwm0",
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"mcpwm1",
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"pcnt",
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"peri_backup",
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"rmt",
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"rng",
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"rsa",
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"rtc_cntl",
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"rtc_i2c",
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"rtc_io",
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"sens",
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"sensitive",
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"sha",
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"spi0",
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"spi1",
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"spi2",
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"spi3",
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"system",
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"systimer",
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"timg0",
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"timg1",
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"twai0",
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"uart0",
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"uart1",
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"uart2",
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"uhci0",
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"uhci1",
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"usb0",
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"usb_device",
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"usb_wrap",
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"wcl",
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"xts_aes",
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]
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symbols = [
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# Additional peripherals defined by us (the developers):
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"adc",
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"assist_debug_region_monitor",
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"gdma",
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"phy",
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"bt",
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"wifi",
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"psram",
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"psram_dma",
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"octal_psram",
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"ulp_riscv_core",
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"timg_timer1",
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"very_large_intr_status",
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"gpio_bank_1",
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"spi_octal",
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# ROM capabilities
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"rom_crc_le",
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"rom_crc_be",
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"rom_md5_bsd",
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# Wakeup SOC based on ESP-IDF:
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"pm_support_ext0_wakeup",
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"pm_support_ext1_wakeup",
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"pm_support_touch_sensor_wakeup",
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"pm_support_wifi_wakeup",
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"pm_support_bt_wakeup",
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"uart_support_wakeup_int",
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"ulp_supported",
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"riscv_coproc_supported",
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# Other capabilities
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"psram_dma",
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]
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