* Remove the chip-specific HAL packages * Update some doc comments which were missed, fix build script for ESP32/S2 * Refactor/update `esp-hal-procmacros` * Create the `examples` package, add back all of the previously existing examples * Use `xtask` automation package for checking examples and documentation in CI * Combine the `rt-riscv` and `rt-xtensa` features into a single `rt` feature * Bump MSRV to 1.76.0 (shocking!) * Re-document the features for the HAL * No need to re-export the `riscv` package like this * Make clippy happy, improve CI clippy checks * Update `CHANGELOG.md` * riscv: zero bss Co-authored-by: Björn Quentin <bjoernQ@users.noreply.github.com> * Address a number of review comments * Correct pin number in `hello_rgb` example for ESP32-C3 * Address the remaining review comments * More small tweaks/improvements * Fix RMT examples (#11) * Fix RMT examples * Remove logger-init * Make I2S examples work on ESP32 (#12) * Make I2S examples work on ESP32 * Remove logger init * Fix the direct-vectoring examples on all RISCV chips (#10) * Update GPIOs for some examples... * Embassy timer example fixes (#13) * Switch to generic queue instead of integrated for all examples * changelog * Update GPIO in another example, make `rustfmt` happy * Fix ESP32-S2 PSRAM * Avoid UART0 and SPI flash pins (#15) * Avoid UART0 and SPI flash pins * Fix spi_eh1_device_loopback for non-ESP32 * Update examples/src/bin/gpio_interrupt.rs Co-authored-by: Juraj Sadel <jurajsadel@gmail.com> --------- Co-authored-by: Juraj Sadel <jurajsadel@gmail.com> --------- Co-authored-by: Scott Mabin <scott@mabez.dev> Co-authored-by: Björn Quentin <bjoernQ@users.noreply.github.com> Co-authored-by: bjoernQ <bjoern.quentin@mobile-j.de> Co-authored-by: Juraj Sadel <jurajsadel@gmail.com>
192 lines
5.1 KiB
Rust
192 lines
5.1 KiB
Rust
//! SPI write and read a flash chip
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//!
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//! Folowing pins are used:
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//! SCLK GPIO0
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//! MISO/IO0 GPIO1
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//! MOSI/IO1 GPIO2
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//! IO2 GPIO3
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//! IO3 GPIO4
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//! CS GPIO5
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//!
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//! Folowing pins are used for ESP32:
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//! SCLK GPIO0
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//! MISO/IO0 GPIO2
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//! MOSI/IO1 GPIO4
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//! IO2 GPIO5
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//! IO3 GPIO13
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//! CS GPIO14
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//!
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//! Depending on your target and the board you are using you have to change the
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//! pins.
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//!
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//! Connect a flash chip (GD25Q64C was used) and make sure QE in the status
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//! register is set.
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//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
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#![no_std]
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#![no_main]
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use esp_backtrace as _;
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use esp_hal::{
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clock::ClockControl,
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dma::{Dma, DmaPriority},
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dma_buffers,
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gpio::IO,
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peripherals::Peripherals,
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prelude::*,
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spi::{
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master::{prelude::*, Address, Command, Spi},
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SpiDataMode,
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SpiMode,
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},
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Delay,
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};
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use esp_println::{print, println};
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take();
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let system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
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cfg_if::cfg_if! {
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if #[cfg(feature = "esp32")] {
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let sclk = io.pins.gpio0;
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let miso = io.pins.gpio2;
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let mosi = io.pins.gpio4;
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let sio2 = io.pins.gpio5;
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let sio3 = io.pins.gpio13;
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let cs = io.pins.gpio14;
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} else {
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let sclk = io.pins.gpio0;
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let miso = io.pins.gpio1;
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let mosi = io.pins.gpio2;
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let sio2 = io.pins.gpio3;
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let sio3 = io.pins.gpio4;
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let cs = io.pins.gpio5;
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}
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}
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let dma = Dma::new(peripherals.DMA);
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#[cfg(any(feature = "esp32", feature = "esp32s2"))]
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let dma_channel = dma.spi2channel;
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#[cfg(not(any(feature = "esp32", feature = "esp32s2")))]
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let dma_channel = dma.channel0;
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let (tx_buffer, mut tx_descriptors, rx_buffer, mut rx_descriptors) = dma_buffers!(256, 320);
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let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
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.with_pins(
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Some(sclk),
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Some(mosi),
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Some(miso),
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Some(sio2),
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Some(sio3),
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Some(cs),
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)
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.with_dma(dma_channel.configure(
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false,
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&mut tx_descriptors,
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&mut rx_descriptors,
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DmaPriority::Priority0,
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));
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let mut delay = Delay::new(&clocks);
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// DMA buffer require a static life-time
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let mut zero_buf = zero_buffer();
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let send = tx_buffer;
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let mut receive = rx_buffer;
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// write enable
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let transfer = spi
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.write(
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SpiDataMode::Single,
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Command::Command8(0x06, SpiDataMode::Single),
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Address::None,
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0,
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zero_buf,
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)
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.unwrap();
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(zero_buf, spi) = transfer.wait().unwrap();
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delay.delay_ms(250u32);
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// erase sector
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let transfer = spi
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.write(
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SpiDataMode::Single,
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Command::Command8(0x20, SpiDataMode::Single),
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Address::Address24(0x000000, SpiDataMode::Single),
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0,
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zero_buf,
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)
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.unwrap();
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(zero_buf, spi) = transfer.wait().unwrap();
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delay.delay_ms(250u32);
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// write enable
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let transfer = spi
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.write(
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SpiDataMode::Single,
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Command::Command8(0x06, SpiDataMode::Single),
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Address::None,
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0,
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zero_buf,
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)
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.unwrap();
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(_, spi) = transfer.wait().unwrap();
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delay.delay_ms(250u32);
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// write data / program page
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send.fill(b'!');
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send[0..][..5].copy_from_slice(&b"Hello"[..]);
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let transfer = spi
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.write(
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SpiDataMode::Quad,
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Command::Command8(0x32, SpiDataMode::Single),
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Address::Address24(0x000000, SpiDataMode::Single),
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0,
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send,
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)
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.unwrap();
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(_, spi) = transfer.wait().unwrap();
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delay.delay_ms(250u32);
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loop {
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// quad fast read
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let transfer = spi
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.read(
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SpiDataMode::Quad,
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Command::Command8(0xeb, SpiDataMode::Single),
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Address::Address32(0x000000 << 8, SpiDataMode::Quad),
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4,
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receive,
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)
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.unwrap();
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// here we could do something else while DMA transfer is in progress
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// the buffers and spi is moved into the transfer and we can get it back via
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// `wait`
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(receive, spi) = transfer.wait().unwrap();
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println!("{:x?}", &receive);
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for b in &mut receive.iter() {
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if *b >= 32 && *b <= 127 {
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print!("{}", *b as char);
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} else {
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print!(".");
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}
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}
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println!();
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delay.delay_ms(250u32);
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}
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}
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fn zero_buffer() -> &'static mut [u8; 0] {
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static mut BUFFER: [u8; 0] = [0u8; 0];
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unsafe { &mut BUFFER }
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}
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