esp-hal/examples/src/bin/qspi_flash.rs
Jesse Braham 6a663f8b1a
Unify: Remove the chip-specific HAL packages, adapt esp-hal for direct use [1/?] (#1196)
* Remove the chip-specific HAL packages

* Update some doc comments which were missed, fix build script for ESP32/S2

* Refactor/update `esp-hal-procmacros`

* Create the `examples` package, add back all of the previously existing examples

* Use `xtask` automation package for checking examples and documentation in CI

* Combine the `rt-riscv` and `rt-xtensa` features into a single `rt` feature

* Bump MSRV to 1.76.0 (shocking!)

* Re-document the features for the HAL

* No need to re-export the `riscv` package like this

* Make clippy happy, improve CI clippy checks

* Update `CHANGELOG.md`

* riscv: zero bss

Co-authored-by: Björn Quentin <bjoernQ@users.noreply.github.com>

* Address a number of review comments

* Correct pin number in `hello_rgb` example for ESP32-C3

* Address the remaining review comments

* More small tweaks/improvements

* Fix RMT examples (#11)

* Fix RMT examples

* Remove logger-init

* Make I2S examples work on ESP32 (#12)

* Make I2S examples work on ESP32

* Remove logger init

* Fix the direct-vectoring examples on all RISCV chips (#10)

* Update GPIOs for some examples...

* Embassy timer example fixes (#13)

* Switch to generic queue instead of integrated for all examples

* changelog

* Update GPIO in another example, make `rustfmt` happy

* Fix ESP32-S2 PSRAM

* Avoid UART0 and SPI flash pins (#15)

* Avoid UART0 and SPI flash pins

* Fix spi_eh1_device_loopback for non-ESP32

* Update examples/src/bin/gpio_interrupt.rs

Co-authored-by: Juraj Sadel <jurajsadel@gmail.com>

---------

Co-authored-by: Juraj Sadel <jurajsadel@gmail.com>

---------

Co-authored-by: Scott Mabin <scott@mabez.dev>
Co-authored-by: Björn Quentin <bjoernQ@users.noreply.github.com>
Co-authored-by: bjoernQ <bjoern.quentin@mobile-j.de>
Co-authored-by: Juraj Sadel <jurajsadel@gmail.com>
2024-02-27 14:10:11 +00:00

192 lines
5.1 KiB
Rust

//! SPI write and read a flash chip
//!
//! Folowing pins are used:
//! SCLK GPIO0
//! MISO/IO0 GPIO1
//! MOSI/IO1 GPIO2
//! IO2 GPIO3
//! IO3 GPIO4
//! CS GPIO5
//!
//! Folowing pins are used for ESP32:
//! SCLK GPIO0
//! MISO/IO0 GPIO2
//! MOSI/IO1 GPIO4
//! IO2 GPIO5
//! IO3 GPIO13
//! CS GPIO14
//!
//! Depending on your target and the board you are using you have to change the
//! pins.
//!
//! Connect a flash chip (GD25Q64C was used) and make sure QE in the status
//! register is set.
//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
#![no_std]
#![no_main]
use esp_backtrace as _;
use esp_hal::{
clock::ClockControl,
dma::{Dma, DmaPriority},
dma_buffers,
gpio::IO,
peripherals::Peripherals,
prelude::*,
spi::{
master::{prelude::*, Address, Command, Spi},
SpiDataMode,
SpiMode,
},
Delay,
};
use esp_println::{print, println};
#[entry]
fn main() -> ! {
let peripherals = Peripherals::take();
let system = peripherals.SYSTEM.split();
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
cfg_if::cfg_if! {
if #[cfg(feature = "esp32")] {
let sclk = io.pins.gpio0;
let miso = io.pins.gpio2;
let mosi = io.pins.gpio4;
let sio2 = io.pins.gpio5;
let sio3 = io.pins.gpio13;
let cs = io.pins.gpio14;
} else {
let sclk = io.pins.gpio0;
let miso = io.pins.gpio1;
let mosi = io.pins.gpio2;
let sio2 = io.pins.gpio3;
let sio3 = io.pins.gpio4;
let cs = io.pins.gpio5;
}
}
let dma = Dma::new(peripherals.DMA);
#[cfg(any(feature = "esp32", feature = "esp32s2"))]
let dma_channel = dma.spi2channel;
#[cfg(not(any(feature = "esp32", feature = "esp32s2")))]
let dma_channel = dma.channel0;
let (tx_buffer, mut tx_descriptors, rx_buffer, mut rx_descriptors) = dma_buffers!(256, 320);
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
)
.with_dma(dma_channel.configure(
false,
&mut tx_descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);
// DMA buffer require a static life-time
let mut zero_buf = zero_buffer();
let send = tx_buffer;
let mut receive = rx_buffer;
// write enable
let transfer = spi
.write(
SpiDataMode::Single,
Command::Command8(0x06, SpiDataMode::Single),
Address::None,
0,
zero_buf,
)
.unwrap();
(zero_buf, spi) = transfer.wait().unwrap();
delay.delay_ms(250u32);
// erase sector
let transfer = spi
.write(
SpiDataMode::Single,
Command::Command8(0x20, SpiDataMode::Single),
Address::Address24(0x000000, SpiDataMode::Single),
0,
zero_buf,
)
.unwrap();
(zero_buf, spi) = transfer.wait().unwrap();
delay.delay_ms(250u32);
// write enable
let transfer = spi
.write(
SpiDataMode::Single,
Command::Command8(0x06, SpiDataMode::Single),
Address::None,
0,
zero_buf,
)
.unwrap();
(_, spi) = transfer.wait().unwrap();
delay.delay_ms(250u32);
// write data / program page
send.fill(b'!');
send[0..][..5].copy_from_slice(&b"Hello"[..]);
let transfer = spi
.write(
SpiDataMode::Quad,
Command::Command8(0x32, SpiDataMode::Single),
Address::Address24(0x000000, SpiDataMode::Single),
0,
send,
)
.unwrap();
(_, spi) = transfer.wait().unwrap();
delay.delay_ms(250u32);
loop {
// quad fast read
let transfer = spi
.read(
SpiDataMode::Quad,
Command::Command8(0xeb, SpiDataMode::Single),
Address::Address32(0x000000 << 8, SpiDataMode::Quad),
4,
receive,
)
.unwrap();
// here we could do something else while DMA transfer is in progress
// the buffers and spi is moved into the transfer and we can get it back via
// `wait`
(receive, spi) = transfer.wait().unwrap();
println!("{:x?}", &receive);
for b in &mut receive.iter() {
if *b >= 32 && *b <= 127 {
print!("{}", *b as char);
} else {
print!(".");
}
}
println!();
delay.delay_ms(250u32);
}
}
fn zero_buffer() -> &'static mut [u8; 0] {
static mut BUFFER: [u8; 0] = [0u8; 0];
unsafe { &mut BUFFER }
}