9a5a546228
* esp32 & esp32s2 sharing scripts * add wokwi files * Add fixup section for esp32s2, fix ordering of sectino includes * Remove debug asm file * Use shared linker scripts for s3 with fixups * Add external.x sections back * Move ld scripts into esp-hal-common * esp32c3 unified linker scripts - rework original c3 script to use the xtensa named sections (e.g, _SECTIONNAME_start) - Add fixups in esp32c3 specific linker - Remove useless text section start and end (not required when using any form of bootloader) * Add RTC alias'. Move some shared fixups to a file * comment and cleanup * unify c2 linker script * unify c6 linker script * remove debug configs * use new esp-riscv-rt * fmt * align db symbol names * fix s3 db
52 lines
2.0 KiB
Plaintext
52 lines
2.0 KiB
Plaintext
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/* Do not exceed this mark in the error messages above | */
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ASSERT(ORIGIN(ROTEXT) % 4 == 0, "
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ERROR(riscv-rt): the start of the ROTEXT must be 4-byte aligned");
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ASSERT(ORIGIN(RODATA) % 4 == 0, "
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ERROR(riscv-rt): the start of the RODATA must be 4-byte aligned");
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ASSERT(ORIGIN(REGION_DATA) % 4 == 0, "
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ERROR(riscv-rt): the start of the REGION_DATA must be 4-byte aligned");
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ASSERT(ORIGIN(REGION_HEAP) % 4 == 0, "
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ERROR(riscv-rt): the start of the REGION_HEAP must be 4-byte aligned");
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ASSERT(ORIGIN(ROTEXT) % 4 == 0, "
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ERROR(riscv-rt): the start of the ROTEXT must be 4-byte aligned");
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ASSERT(ORIGIN(REGION_STACK) % 4 == 0, "
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ERROR(riscv-rt): the start of the REGION_STACK must be 4-byte aligned");
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ASSERT(_stext % 4 == 0, "
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ERROR(riscv-rt): `_stext` must be 4-byte aligned");
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ASSERT(_data_start % 4 == 0 && _data_end % 4 == 0, "
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BUG(riscv-rt): .data is not 4-byte aligned");
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ASSERT(_sidata % 4 == 0, "
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BUG(riscv-rt): the LMA of .data is not 4-byte aligned");
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ASSERT(_bss_start % 4 == 0 && _bss_end % 4 == 0, "
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BUG(riscv-rt): .bss is not 4-byte aligned");
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ASSERT(_sheap % 4 == 0, "
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BUG(riscv-rt): start of .heap is not 4-byte aligned");
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ASSERT(_stext + SIZEOF(.text) < ORIGIN(ROTEXT) + LENGTH(ROTEXT), "
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ERROR(riscv-rt): The .text section must be placed inside the ROTEXT region.
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Set _stext to an address smaller than 'ORIGIN(ROTEXT) + LENGTH(ROTEXT)'");
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ASSERT(SIZEOF(.stack) > (_max_hart_id + 1) * _hart_stack_size, "
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ERROR(riscv-rt): .stack section is too small for allocating stacks for all the harts.
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Consider changing `_max_hart_id` or `_hart_stack_size`.");
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ASSERT(SIZEOF(.got) == 0, "
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.got section detected in the input files. Dynamic relocations are not
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supported. If you are linking to C code compiled using the `gcc` crate
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then modify your build script to compile the C code _without_ the
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-fPIC flag. See the documentation of the `gcc::Config.fpic` method for
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details.");
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/* Do not exceed this mark in the error messages above | */ |