41f9925e2c
* [3/3] DMA Move API: Introduce DMA buffer objects * Remove FlashSafeDma * Add async HIL test * Handle set_length(0) correctly * Fix tx/rx booleans * Unlucky * Preserve previous blocking semantics * Add delay between starting DMA TX and SPI driver * Update CHANGELOG * merge tidy * Add with_buffers builder --------- Co-authored-by: Dominic Fischer <git@dominicfischer.me>
105 lines
2.8 KiB
Rust
105 lines
2.8 KiB
Rust
//! SPI Half Duplex Read Test
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//!
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//! Folowing pins are used:
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//! SCLK GPIO0
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//! MISO GPIO2
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//!
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//! GPIO GPIO3
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//!
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//! Connect MISO (GPIO2) and GPIO (GPIO3) pins.
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//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s3
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#![no_std]
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#![no_main]
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use hil_test as _;
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#[cfg(test)]
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#[embedded_test::tests]
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mod tests {
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use esp_hal::{
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clock::ClockControl,
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dma::{Dma, DmaPriority, DmaRxBuf},
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dma_buffers,
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gpio::{Io, Level, Output},
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peripherals::Peripherals,
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prelude::_fugit_RateExtU32,
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spi::{
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master::{prelude::*, Address, Command, Spi},
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SpiDataMode,
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SpiMode,
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},
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system::SystemControl,
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};
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#[init]
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fn init() {}
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#[test]
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#[timeout(3)]
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fn test_spi_reads_correctly_from_gpio_pin() {
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const DMA_BUFFER_SIZE: usize = 4;
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let peripherals = Peripherals::take();
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let system = SystemControl::new(peripherals.SYSTEM);
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
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let sclk = io.pins.gpio0;
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let miso = io.pins.gpio2;
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let mut miso_mirror = Output::new(io.pins.gpio3, Level::High);
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let dma = Dma::new(peripherals.DMA);
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#[cfg(any(feature = "esp32", feature = "esp32s2"))]
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let dma_channel = dma.spi2channel;
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#[cfg(not(any(feature = "esp32", feature = "esp32s2")))]
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let dma_channel = dma.channel0;
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let (buffer, descriptors, _, _) = dma_buffers!(DMA_BUFFER_SIZE, 0);
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let mut dma_rx_buf = DmaRxBuf::new(descriptors, buffer).unwrap();
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let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100.kHz(), SpiMode::Mode0, &clocks)
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.with_sck(sclk)
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.with_miso(miso)
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.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
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// SPI should read '0's from the MISO pin
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miso_mirror.set_low();
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let transfer = spi
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.read(
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SpiDataMode::Single,
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Command::None,
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Address::None,
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0,
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dma_rx_buf,
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)
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.map_err(|e| e.0)
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.unwrap();
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(spi, dma_rx_buf) = transfer.wait();
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assert_eq!(dma_rx_buf.as_slice(), &[0x00; DMA_BUFFER_SIZE]);
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// SPI should read '1's from the MISO pin
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miso_mirror.set_high();
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let transfer = spi
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.read(
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SpiDataMode::Single,
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Command::None,
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Address::None,
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0,
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dma_rx_buf,
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)
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.map_err(|e| e.0)
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.unwrap();
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(_, dma_rx_buf) = transfer.wait();
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assert_eq!(dma_rx_buf.as_slice(), &[0xFF; DMA_BUFFER_SIZE]);
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}
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}
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