esp-hal/esp-hal-common/build.rs
Jesse Braham d293d9f162
Add support for the ESP32-C6 (#392)
* Create the `esp32c6-hal` package

* Teach `esp-hal-common` about the ESP32-C6

* Get a number of peripheral drivers building for the ESP32-C6

bckup

initial clocks_ii

* Create the `esp32c6-hal` package

C6: update

* Simplify and fix the linker script

update

* C6: add I2S

* Create the `esp32c6-hal` package

* Teach `esp-hal-common` about the ESP32-C6

* Get a number of peripheral drivers building for the ESP32-C6

bckup

initial clocks_ii

* Create the `esp32c6-hal` package

* C6: update

* Simplify and fix the linker script

* update

* C6: add I2S

* update

* C6 Interrupts

* C6: Update build.rs, linker scripts and initial examples

* C6: RMT

* Fix interrupt handling

* Fix `ClockControl::configure`

* C6: revert to I2S0 instead of just I2S

* C6: rebase and update

* RTC not buildable

* Implement RWDT and SWD disable

* C6: working LEDC

* C6: working RMT

* C6: add aes

* C6: add mcpwm

* C6: add rtc_cntln - not finished

* C6: update and formatting

* C6: add pcnt

* C6: add examples and format

* Remove inline assembly, fix interrupts and linker scripts

* Remove unused features, update cargo config for atomic emu, misc cleanup

* Get ADC building and example "working" (as much as it ever does)

* Remove a bunch of unused constants which were copied from ESP-IDF

* The `mcpwm` example now works correctly

* Get `TWAI` peripheral driver building for C6

* Clean up the `rtc_cntl` module and get all the other HALs building again

* Add the C6 to our CI workflow

* Fix various things that have been missed when rebasing

Still missing a few examples (`clock_monitor`, `embassy_spi`, `ram`)

* C6: Small updates in wdt (#1)

* C6: Update WDT

* C6: Update examples with WDT update

* Update `esp-println` dependency to fix build errors

* Fix formatting issues causing pre-commit hook to fail

* Get some more examples working

* Working `ram` example

* Sync with changes in `main` after rebasing

* Working `embassy_spi` example

* Use a git dependency for the PAC until we publish a release

* Fix I2S for ESP32-C6

* Fix esp32c6 direct boot (#4)

* Add direct boot support for C6

* Fix direct boot for c6

- Actually copy into rtc ram
- remove dummy section that is no longer needed (was just a waste of
  flash space)
- Move RTC stuff before the no load sections

* Update RWDT and refactor RTC (#3)

* C6: Update RWDT and add example, refactor RTC and add not-really-good example

* Update based on review comments, resolve bunch of warnings and run cargo fmt

* Update C6 esp-pacs rev commit

* Fix clocks_ll/esp32c6.rs

* Fix riscv interrupts

* Remove clock_monitor example for now

* RAM example works in direct-boot mode

* Add a TODO for &mut TIMG0 and cargo fmt

* Fix linker script after a bad rebase

* Update CI and Cargo.toml embassy required features

* use riscv32imac-unknown-none-elf target for C6 in CI

* change default target to riscv32imac-unknown-none-elf

* add riscv32imac-unknown-none-elf target to MSRV job

* another cleanup

---------

Co-authored-by: bjoernQ <bjoern.quentin@mobile-j.de>
Co-authored-by: Jesse Braham <jesse@beta7.io>

* Make required changes to include new `RADIO` peripheral

* Use published versions of PAC and `esp-println`

* Use the correct target extensions (`imac`)

* Fix the super watchdog timer, plus a few more examples

* Fix UART clock configuration

* Make sure to sync UART registers when configuring AT cmd detection

* Disable APM in direct-boot mode

* Address a number of review comments

* Fix `SPI` clocks and `rtc_watchdog` example  (#6)

* fix SPI clocks

* run cargo fmt

* Add comment about used default clk src

* Fix rtc_watchdog example in BL mode

* run cargo fmt

* Update rtc_watchdog example that it works in DB mode

* README and example fixes/cleanup

* Add I2C peripheral enable and reset

* Fix `ApbSarAdc` configuration in `system.rs`

---------

Co-authored-by: bjoernQ <bjoern.quentin@mobile-j.de>
Co-authored-by: Juraj Sadel <juraj.sadel@espressif.com>
Co-authored-by: Juraj Sadel <jurajsadel@gmail.com>
Co-authored-by: Scott Mabin <scott@mabez.dev>
2023-02-27 09:15:44 -08:00

162 lines
3.9 KiB
Rust

fn main() {
let esp32 = cfg!(feature = "esp32");
let esp32c2 = cfg!(feature = "esp32c2");
let esp32c3 = cfg!(feature = "esp32c3");
let esp32c6 = cfg!(feature = "esp32c6");
let esp32s2 = cfg!(feature = "esp32s2");
let esp32s3 = cfg!(feature = "esp32s3");
// Ensure that exactly one chip has been specified
let chip_features = [esp32, esp32c2, esp32c3, esp32c6, esp32s2, esp32s3];
match chip_features.iter().filter(|&&f| f).count() {
1 => {}
n => panic!("Exactly 1 chip must be enabled via its Cargo feature, {n} provided"),
}
if cfg!(feature = "esp32") && cfg!(feature = "esp32_40mhz") && cfg!(feature = "esp32_26mhz") {
panic!("Only one xtal speed feature can be selected");
}
if cfg!(feature = "esp32c2")
&& cfg!(feature = "esp32c2_40mhz")
&& cfg!(feature = "esp32c2_26mhz")
{
panic!("Only one xtal speed feature can be selected");
}
// Define all required configuration symbols for the enabled chip.
//
// When adding a new device, at the bare minimum the following symbols MUST be
// defined:
// - the name of the device
// - the architecture ('riscv' or 'xtensa')
// - the core count ('single_core' or 'multi_core')
//
// Additionally, the following symbols MAY be defined if present:
// - 'dac'
// - 'gdma'
// - 'i2c1'
// - 'i2s'
// - 'mcpwm'
// - 'pdma'
// - 'rmt'
// - 'spi3'
// - 'systimer'
// - 'timg0'
// - 'timg1'
// - 'uart2'
// - 'usb_otg'
// - 'usb_serial_jtag'
// - 'aes'
// - 'plic'
// - 'radio'
//
// New symbols can be added as needed, but please be sure to update both this
// comment and the required vectors below.
let symbols = if esp32 {
vec![
"esp32",
"xtensa",
"mcpwm",
"multi_core",
"dac",
"i2c1",
"i2s",
"pdma",
"rmt",
"spi3",
"timg0",
"timg1",
"uart2",
"aes",
"radio",
]
} else if esp32c2 {
vec![
"esp32c2",
"riscv",
"single_core",
"gdma",
"systimer",
"timg0",
"radio",
]
} else if esp32c3 {
vec![
"esp32c3",
"riscv",
"single_core",
"gdma",
"i2s",
"rmt",
"spi3",
"systimer",
"timg0",
"timg1",
"usb_serial_jtag",
"aes",
"radio",
]
} else if esp32c6 {
vec![
"esp32c6",
"riscv",
"single_core",
"gdma",
"i2s",
"mcpwm",
"rmt",
"systimer",
"timg0",
"timg1",
"usb_serial_jtag",
"plic",
"aes",
"radio",
]
} else if esp32s2 {
vec![
"esp32s2",
"xtensa",
"single_core",
"dac",
"i2c1",
"i2s",
"pdma",
"rmt",
"spi3",
"systimer",
"timg0",
"timg1",
"usb_otg",
"aes",
"radio",
]
} else if esp32s3 {
vec![
"esp32s3",
"xtensa",
"multi_core",
"gdma",
"i2c1",
"i2s",
"mcpwm",
"rmt",
"spi3",
"systimer",
"timg0",
"timg1",
"uart2",
"usb_otg",
"usb_serial_jtag",
"aes",
"radio",
]
} else {
unreachable!(); // We've already confirmed exactly one chip was selected
};
for symbol in symbols {
println!("cargo:rustc-cfg={symbol}");
}
}