32 lines
875 B
TOML
32 lines
875 B
TOML
[package]
|
|
name = "esp-riscv-rt"
|
|
version = "0.9.1"
|
|
edition = "2021"
|
|
rust-version = "1.65"
|
|
description = "Minimal runtime / startup for RISC-V CPUs from Espressif"
|
|
repository = "https://github.com/esp-rs/esp-hal"
|
|
license = "MIT OR Apache-2.0"
|
|
keywords = ["esp32", "riscv", "runtime", "startup"]
|
|
categories = ["embedded", "no-std"]
|
|
|
|
[dependencies]
|
|
document-features = "0.2.10"
|
|
riscv = "0.12.1"
|
|
riscv-rt-macros = "0.2.2"
|
|
|
|
[features]
|
|
## Move the stack to the start of RAM to get zero-cost stack overflow
|
|
## protection (ESP32-C6 and ESP32-H2 only!)
|
|
fix-sp = []
|
|
## Indicate that the device supports `mie` and `mip` instructions.
|
|
has-mie-mip = []
|
|
## Indicate that the device has RTC RAM.
|
|
rtc-ram = []
|
|
|
|
# This feature is intended for testing; you probably don't want to enable it:
|
|
ci = [
|
|
"fix-sp",
|
|
"has-mie-mip",
|
|
"rtc-ram",
|
|
]
|