122 lines
5.1 KiB
Rust
122 lines
5.1 KiB
Rust
//! `no_std` HAL for the ESP32-S2 from Espressif.
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//!
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//! Implements a number of the traits defined by the various packages in the
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//! [embedded-hal] repository.
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//!
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//! [embedded-hal]: https://github.com/rust-embedded/embedded-hal
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//!
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//! ### Cargo Features
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//!
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//! - `async` - Enable support for asynchronous operation, with interfaces
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//! provided by [embedded-hal-async] and [embedded-io-async]
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//! - `debug` - Enable debug features in the HAL (used for development)
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//! - `defmt` - Enable [`defmt::Format`] on certain types
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//! - `eh1` - Implement the traits defined in the `1.0.0-xxx` pre-releases of
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//! [embedded-hal], [embedded-hal-nb], and [embedded-io]
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//! - `embassy` - Enable support for [embassy], a modern asynchronous embedded
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//! framework. One of `embassy-time-*` features must also be enabled when
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//! using this feature.
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//! - `embassy-executor-interrupt` - Use the interrupt-mode embassy executor
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//! - `embassy-executor-thread` - Use the thread-mode embassy executor
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//! - `embassy-time-systick` - Enable the [embassy] time driver using the
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//! `SYSTIMER` peripheral
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//! - `embassy-time-timg0` - Enable the [embassy] time driver using the `TIMG0`
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//! peripheral
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//! - `embassy-time-systick` - Enable the [embassy] time driver using the
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//! `SYSTIMER` peripheral. The `SYSTIMER` peripheral has three alarms
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//! available for use
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//! - `embassy-time-timg0` - Enable the [embassy] time driver using the `TIMG0`
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//! peripheral. The `TIMG0` peripheral has two alarms available for use
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//! - `embassy-integrated-timers` - Uses hardware timers as alarms for the
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//! executors. Using this feature limits the number of executors to the number
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//! of hardware alarms provided by the time driver
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//! - `embassy-generic-queue-N` (where `N` can be `8`, `16`, `32`, `64` or
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//! `128`) - Use a generic timer queue of size `N` for the executors' timer
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//! queues. Using this feature can expand the number of executors you can use
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//! to `N`
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//! - `log` - enable log output using the `log` crate
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//! - `psram-2m` - Use externally connected PSRAM (2MB)
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//! - `psram-4m` - Use externally connected PSRAM (4MB)
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//! - `psram-8m` - Use externally connected PSRAM (8MB)
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//! - `rt` - Runtime support
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//! - `ufmt` - Implement the [`ufmt_write::uWrite`] trait for the UART driver
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//! - `vectored` - Enable interrupt vectoring
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//!
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//! #### Default Features
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//!
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//! The `rt`, `vectored` and `embassy-integrated-timers` features are enabled by
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//! default.
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//!
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//! [embedded-hal-async]: https://github.com/rust-embedded/embedded-hal/tree/master/embedded-hal-async
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//! [embedded-io-async]: https://github.com/rust-embedded/embedded-hal/tree/master/embedded-io-async
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//! [embedded-hal]: https://github.com/rust-embedded/embedded-hal/tree/master/embedded-hal
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//! [embedded-hal-nb]: https://github.com/rust-embedded/embedded-hal/tree/master/embedded-hal-nb
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//! [embedded-io]: https://github.com/rust-embedded/embedded-hal/tree/master/embedded-io
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//! [embassy]: https://github.com/embassy-rs/embassy
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//! [`ufmt_write::uWrite`]: https://docs.rs/ufmt-write/latest/ufmt_write/trait.uWrite.html
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//! [`defmt::Format`]: https://docs.rs/defmt/0.3.5/defmt/trait.Format.html
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#![no_std]
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#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
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pub use esp_hal_common::*;
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/// Function initializes ESP32 specific memories (RTC slow and fast) and
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/// then calls original Reset function
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///
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/// ENTRY point is defined in memory.x
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/// *Note: the pre_init function is called in the original reset handler
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/// after the initializations done in this function*
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#[cfg(feature = "rt")]
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#[doc(hidden)]
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#[no_mangle]
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pub unsafe extern "C" fn ESP32Reset() -> ! {
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// These symbols come from `memory.x`
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extern "C" {
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static mut _rtc_fast_bss_start: u32;
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static mut _rtc_fast_bss_end: u32;
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static mut _rtc_slow_bss_start: u32;
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static mut _rtc_slow_bss_end: u32;
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static mut _stack_start_cpu0: u32;
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}
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// set stack pointer to end of memory: no need to retain stack up to this point
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esp_hal_common::xtensa_lx::set_stack_pointer(&mut _stack_start_cpu0);
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// copying data from flash to various data segments is done by the bootloader
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// initialization to zero needs to be done by the application
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// Initialize RTC RAM
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esp_hal_common::xtensa_lx_rt::zero_bss(&mut _rtc_fast_bss_start, &mut _rtc_fast_bss_end);
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esp_hal_common::xtensa_lx_rt::zero_bss(&mut _rtc_slow_bss_start, &mut _rtc_slow_bss_end);
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// continue with default reset handler
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esp_hal_common::xtensa_lx_rt::Reset();
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}
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/// The ESP32 has a first stage bootloader that handles loading program data
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/// into the right place therefore we skip loading it again.
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#[doc(hidden)]
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#[no_mangle]
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#[rustfmt::skip]
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pub extern "Rust" fn __init_data() -> bool {
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false
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}
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#[export_name = "__post_init"]
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unsafe fn post_init() {
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use esp_hal_common::{
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peripherals::{RTC_CNTL, TIMG0, TIMG1},
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timer::Wdt,
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};
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// RTC domain must be enabled before we try to disable
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let mut rtc = Rtc::new(RTC_CNTL::steal());
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rtc.rwdt.disable();
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Wdt::<TIMG0>::set_wdt_enabled(false);
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Wdt::<TIMG1>::set_wdt_enabled(false);
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}
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