103 lines
2.9 KiB
Rust
103 lines
2.9 KiB
Rust
//! `no_std` HAL implementations for the peripherals which are common among
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//! Espressif devices. Implements a number of the traits defined by
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//! [embedded-hal].
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//!
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//! This crate should not be used directly; you should use one of the
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//! device-specific HAL crates instead:
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//!
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//! - [esp32-hal]
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//! - [esp32c3-hal]
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//! - [esp32s2-hal]
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//! - [esp32s3-hal]
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//!
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//! [embedded-hal]: https://docs.rs/embedded-hal/latest/embedded_hal/
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//! [esp32-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32-hal
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//! [esp32c3-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32c3-hal
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//! [esp32s2-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32s2-hal
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//! [esp32s3-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32s3-hal
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#![no_std]
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#[cfg(feature = "esp32")]
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pub use esp32_pac as pac;
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#[cfg(feature = "esp32c3")]
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pub use esp32c3_pac as pac;
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#[cfg(feature = "esp32s2")]
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pub use esp32s2_pac as pac;
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#[cfg(feature = "esp32s3")]
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pub use esp32s3_pac as pac;
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pub mod delay;
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#[cfg_attr(feature = "esp32", path = "efuse/esp32.rs")]
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#[cfg_attr(feature = "esp32c3", path = "efuse/esp32c3.rs")]
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#[cfg_attr(feature = "esp32s2", path = "efuse/esp32s2.rs")]
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#[cfg_attr(feature = "esp32s3", path = "efuse/esp32s3.rs")]
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pub mod efuse;
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pub mod gpio;
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pub mod i2c;
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#[cfg_attr(target_arch = "riscv32", path = "interrupt/riscv.rs")]
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#[cfg_attr(target_arch = "xtensa", path = "interrupt/xtensa.rs")]
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pub mod interrupt;
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pub mod ledc;
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pub mod prelude;
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pub mod pulse_control;
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pub mod rng;
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pub mod rtc_cntl;
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pub mod serial;
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pub mod spi;
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pub mod timer;
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#[cfg(any(feature = "esp32c3", feature = "esp32s3"))]
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pub mod usb_serial_jtag;
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pub mod utils;
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pub use delay::Delay;
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pub use gpio::*;
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pub use interrupt::*;
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pub use procmacros as macros;
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pub use pulse_control::PulseControl;
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pub use rng::Rng;
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pub use rtc_cntl::RtcCntl;
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pub use serial::Serial;
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pub use spi::Spi;
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pub use timer::Timer;
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#[cfg(any(feature = "esp32c3", feature = "esp32s3"))]
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pub use usb_serial_jtag::UsbSerialJtag;
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#[cfg(any(feature = "esp32c3", feature = "esp32s3", feature = "esp32s2"))]
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pub mod systimer;
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pub mod clock;
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pub mod system;
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pub mod analog;
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#[cfg_attr(feature = "esp32", path = "cpu_control/esp32.rs")]
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#[cfg_attr(feature = "esp32c3", path = "cpu_control/none.rs")]
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#[cfg_attr(feature = "esp32s2", path = "cpu_control/none.rs")]
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#[cfg_attr(feature = "esp32s3", path = "cpu_control/esp32s3.rs")]
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pub mod cpu_control;
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/// Enumeration of CPU cores
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/// The actual number of available cores depends on the target.
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pub enum Cpu {
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/// The first core
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ProCpu = 0,
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/// The second core
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AppCpu,
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}
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pub fn get_core() -> Cpu {
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#[cfg(all(target_arch = "xtensa", feature = "multi_core"))]
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match ((xtensa_lx::get_processor_id() >> 13) & 1) != 0 {
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false => Cpu::ProCpu,
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true => Cpu::AppCpu,
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}
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// #[cfg(all(target_arch = "riscv32", feature = "multi_core"))]
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// TODO get hart_id
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// single core always has ProCpu only
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#[cfg(feature = "single_core")]
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Cpu::ProCpu
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}
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