9a5a546228
* esp32 & esp32s2 sharing scripts * add wokwi files * Add fixup section for esp32s2, fix ordering of sectino includes * Remove debug asm file * Use shared linker scripts for s3 with fixups * Add external.x sections back * Move ld scripts into esp-hal-common * esp32c3 unified linker scripts - rework original c3 script to use the xtensa named sections (e.g, _SECTIONNAME_start) - Add fixups in esp32c3 specific linker - Remove useless text section start and end (not required when using any form of bootloader) * Add RTC alias'. Move some shared fixups to a file * comment and cleanup * unify c2 linker script * unify c6 linker script * remove debug configs * use new esp-riscv-rt * fmt * align db symbol names * fix s3 db
14 lines
478 B
Plaintext
14 lines
478 B
Plaintext
/*
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This fix up is required when the RTC fast memory is split across two address spaces.
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This fix up pads the _data bus_ address space by the size of the code accessed by the instruction bus.
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*/
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SECTIONS {
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.rtc_fast.dummy (NOLOAD) :
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{
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_rtc_dummy_start = ABSOLUTE(.); /* needed to make section proper size */
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. = SIZEOF(.rtc_fast.text);
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_rtc_dummy_end = ABSOLUTE(.); /* needed to make section proper size */
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} > RTC_FAST_RWDATA
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}
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INSERT BEFORE .rtc_fast.data; |