0b26d3851c
* Create issue_handler.yml * No longer re-export `embedded-hal`, hide exported macros in documentation * Add simple package-level documentation for each HAL package * Clean up/simplify re-exports * Fix the examples that I broke * Ensure top-level modules/types/functions have doc comments * Update CHANGELOG * Re-export the `soc::psram` module where available --------- Co-authored-by: Sergio Gasquez Arcos <sergio.gasquez@gmail.com>
124 lines
4.0 KiB
Rust
124 lines
4.0 KiB
Rust
//! `no_std` HAL for the ESP32-S2 from Espressif.
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//!
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//! Implements a number of the traits defined by the various packages in the
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//! [embedded-hal] repository.
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//!
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//! [embedded-hal]: https://github.com/rust-embedded/embedded-hal
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#![no_std]
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#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
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use esp_hal_common::xtensa_lx_rt::exception::ExceptionCause;
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pub use esp_hal_common::*;
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// Always enable atomic emulation on ESP32-S2
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use xtensa_atomic_emulation_trap as _;
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/// Common module for analog functions
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pub mod analog {
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pub use esp_hal_common::analog::{AvailableAnalog, SensExt};
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}
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/// Function initializes ESP32 specific memories (RTC slow and fast) and
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/// then calls original Reset function
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///
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/// ENTRY point is defined in memory.x
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/// *Note: the pre_init function is called in the original reset handler
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/// after the initializations done in this function*
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#[cfg(feature = "rt")]
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#[doc(hidden)]
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#[no_mangle]
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pub unsafe extern "C" fn ESP32Reset() -> ! {
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// These symbols come from `memory.x`
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extern "C" {
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static mut _rtc_fast_bss_start: u32;
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static mut _rtc_fast_bss_end: u32;
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static mut _rtc_slow_bss_start: u32;
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static mut _rtc_slow_bss_end: u32;
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static mut _stack_end_cpu0: u32;
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}
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// set stack pointer to end of memory: no need to retain stack up to this point
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esp_hal_common::xtensa_lx::set_stack_pointer(&mut _stack_end_cpu0);
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// copying data from flash to various data segments is done by the bootloader
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// initialization to zero needs to be done by the application
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// Initialize RTC RAM
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esp_hal_common::xtensa_lx_rt::zero_bss(&mut _rtc_fast_bss_start, &mut _rtc_fast_bss_end);
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esp_hal_common::xtensa_lx_rt::zero_bss(&mut _rtc_slow_bss_start, &mut _rtc_slow_bss_end);
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// continue with default reset handler
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esp_hal_common::xtensa_lx_rt::Reset();
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}
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/// The ESP32 has a first stage bootloader that handles loading program data
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/// into the right place therefore we skip loading it again.
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#[doc(hidden)]
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#[no_mangle]
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#[rustfmt::skip]
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pub extern "Rust" fn __init_data() -> bool {
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false
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}
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/// Atomic Emulation is always enabled on ESP32-S2
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#[doc(hidden)]
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#[no_mangle]
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#[export_name = "__exception"] // this overrides the exception handler in xtensa_lx_rt
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#[link_section = ".rwtext"]
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unsafe fn exception(cause: ExceptionCause, save_frame: &mut trapframe::TrapFrame) {
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match cause {
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ExceptionCause::Illegal => {
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let mut regs = [
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save_frame.A0,
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save_frame.A1,
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save_frame.A2,
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save_frame.A3,
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save_frame.A4,
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save_frame.A5,
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save_frame.A6,
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save_frame.A7,
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save_frame.A8,
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save_frame.A9,
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save_frame.A10,
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save_frame.A11,
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save_frame.A12,
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save_frame.A13,
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save_frame.A14,
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save_frame.A15,
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];
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if xtensa_atomic_emulation_trap::atomic_emulation(save_frame.PC, &mut regs) {
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save_frame.PC += 3; // 24bit instruction
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save_frame.A0 = regs[0];
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save_frame.A1 = regs[1];
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save_frame.A2 = regs[2];
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save_frame.A3 = regs[3];
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save_frame.A4 = regs[4];
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save_frame.A5 = regs[5];
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save_frame.A6 = regs[6];
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save_frame.A7 = regs[7];
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save_frame.A8 = regs[8];
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save_frame.A9 = regs[9];
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save_frame.A10 = regs[10];
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save_frame.A11 = regs[11];
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save_frame.A12 = regs[12];
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save_frame.A13 = regs[13];
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save_frame.A14 = regs[14];
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save_frame.A15 = regs[15];
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return;
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}
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}
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_ => (),
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}
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extern "C" {
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fn __user_exception(cause: ExceptionCause, save_frame: &mut trapframe::TrapFrame);
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}
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__user_exception(cause, save_frame);
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}
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