0142703112
* cleanup prelude docs * fixups and i2c rename * changelog and migration * fixup docs and examples * fix lint
70 lines
1.6 KiB
Rust
70 lines
1.6 KiB
Rust
//! I2C test
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//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
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#![no_std]
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#![no_main]
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use esp_hal::{
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gpio::Io,
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i2c::{I2c, Operation},
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peripherals::I2C0,
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prelude::*,
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Blocking,
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};
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use hil_test as _;
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struct Context {
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i2c: I2c<'static, I2C0, Blocking>,
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}
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#[cfg(test)]
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#[embedded_test::tests]
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mod tests {
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use super::*;
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#[init]
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fn init() -> Context {
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let peripherals = esp_hal::init(esp_hal::Config::default());
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let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
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let (sda, scl) = hil_test::i2c_pins!(io);
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// Create a new peripheral object with the described wiring and standard
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// I2C clock speed:
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let i2c = I2c::new(peripherals.I2C0, sda, scl, 100.kHz());
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Context { i2c }
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}
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#[test]
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#[timeout(3)]
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fn test_read_cali(mut ctx: Context) {
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let mut read_data = [0u8; 22];
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// have a failing read which might could leave the peripheral in an undesirable
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// state
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ctx.i2c.write_read(0x55, &[0xaa], &mut read_data).ok();
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// do the real read which should succeed
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ctx.i2c.write_read(0x77, &[0xaa], &mut read_data).ok();
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assert_ne!(read_data, [0u8; 22])
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}
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#[test]
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#[timeout(3)]
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fn test_read_cali_with_transactions(mut ctx: Context) {
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let mut read_data = [0u8; 22];
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// do the real read which should succeed
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ctx.i2c
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.transaction(
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0x77,
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&mut [Operation::Write(&[0xaa]), Operation::Read(&mut read_data)],
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)
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.ok();
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assert_ne!(read_data, [0u8; 22])
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}
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}
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