[package]
name         = "xtensa-lx-rt"
version      = "0.16.0"
edition      = "2021"
rust-version = "1.65"
description  = "Minimal startup/runtime for Xtensa LX CPUs"
repository   = "https://github.com/esp-rs/esp-hal"
license      = "MIT OR Apache-2.0"
keywords     = ["xtensa", "lx", "register", "peripheral"]
categories   = ["embedded", "hardware-support", "no-std"]

[package.metadata.docs.rs]
features = ["esp32"]

[dependencies]
bare-metal        = "1.0.0"
document-features = "0.2.8"
macros            = { version = "0.2.1", package = "xtensa-lx-rt-proc-macros", path = "./procmacros" }
r0                = "1.0.0"
xtensa-lx         = { version = "0.9.0", path = "../xtensa-lx" }

[build-dependencies]
anyhow          = "1.0.86"
enum-as-inner   = "0.6.0"
minijinja       = "2.0.3"
serde           = { version = "1.0.204", features = ["derive"] }
strum           = { version = "0.26.3", features = ["derive"] }
toml            = "0.8.10"

[features]
## Save and restore float registers for exceptions
float-save-restore = []

#! ### Chip Support Feature Flags
## Target the ESP32
esp32   = []
## Target the ESP32-S2
esp32s2 = []
## Target the ESP32-S3
esp32s3 = []

[lints.rust]
unexpected_cfgs = "allow"